[linux-2.6-block.git] / drivers / gpu / drm / msm / msm_rd.c

/*
 * Copyright (C) 2013 Red Hat
 * Author: Rob Clark <robdclark@gmail.com>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/* For debugging crashes, userspace can:
 *
 *   tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd
 *
 * to log the cmdstream in a format that is understood by freedreno/cffdump
 * utility.  By comparing the last successfully completed fence #, to the
 * cmdstream for the next fence, you can narrow down which process and submit
 * caused the gpu crash/lockup.
 *
 * Additionally:
 *
 *   tail -f /sys/kernel/debug/dri/<minor>/hangrd > logfile.rd
 *
 * will capture just the cmdstream from submits which triggered a GPU hang.
 *
 * This bypasses drm_debugfs_create_files() mainly because we need to use
 * our own fops for a bit more control.  In particular, we don't want to
 * do anything if userspace doesn't have the debugfs file open.
 *
 * The module-param "rd_full", which defaults to false, enables snapshotting
 * all (non-written) buffers in the submit, rather than just cmdstream bo's.
 * This is useful to capture the contents of (for example) vbo's or textures,
 * or shader programs (if not emitted inline in cmdstream).
 */

#ifdef CONFIG_DEBUG_FS

#include <linux/kfifo.h>
#include <linux/debugfs.h>
#include <linux/circ_buf.h>
#include <linux/wait.h>

#include "msm_drv.h"
#include "msm_gpu.h"
#include "msm_gem.h"

static bool rd_full = false;
MODULE_PARM_DESC(rd_full, "If true, $debugfs/.../rd will snapshot all buffer contents");
module_param_named(rd_full, rd_full, bool, 0600);

enum rd_sect_type {
	RD_NONE,
	RD_TEST,       /* ascii text */
	RD_CMD,        /* ascii text */
	RD_GPUADDR,    /* u32 gpuaddr, u32 size */
	RD_CONTEXT,    /* raw dump */
	RD_CMDSTREAM,  /* raw dump */
	RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */
	RD_PARAM,      /* u32 param_type, u32 param_val, u32 bitlen */
	RD_FLUSH,      /* empty, clear previous params */
	RD_PROGRAM,    /* shader program, raw dump */
	RD_VERT_SHADER,
	RD_FRAG_SHADER,
	RD_BUFFER_CONTENTS,
	RD_GPU_ID,
};

#define BUF_SZ 512  /* should be power of 2 */

/* space used: */
#define circ_count(circ) \
	(CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ))
#define circ_count_to_end(circ) \
	(CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ))
/* space available: */
#define circ_space(circ) \
	(CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ))
#define circ_space_to_end(circ) \
	(CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ))

struct msm_rd_state {
	struct drm_device *dev;

	bool open;

	/* current submit to read out: */
	struct msm_gem_submit *submit;

	/* fifo access is synchronized on the producer side by
	 * struct_mutex held by submit code (otherwise we could
	 * end up w/ cmds logged in different order than they
	 * were executed).  And read_lock synchronizes the reads
	 */
	struct mutex read_lock;

	wait_queue_head_t fifo_event;
	struct circ_buf fifo;

	char buf[BUF_SZ];
};

static void rd_write(struct msm_rd_state *rd, const void *buf, int sz)
{
	struct circ_buf *fifo = &rd->fifo;
	const char *ptr = buf;

	while (sz > 0) {
		char *fptr = &fifo->buf[fifo->head];
		int n;

		wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0);

		/* Note that smp_load_acquire() is not strictly required
		 * as CIRC_SPACE_TO_END() does not access the tail more
		 * than once.
		 */
		n = min(sz, circ_space_to_end(&rd->fifo));
		memcpy(fptr, ptr, n);

		smp_store_release(&fifo->head, (fifo->head + n) & (BUF_SZ - 1));
		sz  -= n;
		ptr += n;

		wake_up_all(&rd->fifo_event);
	}
}

static void rd_write_section(struct msm_rd_state *rd,
		enum rd_sect_type type, const void *buf, int sz)
{
	rd_write(rd, &type, 4);
	rd_write(rd, &sz, 4);
	rd_write(rd, buf, sz);
}

static ssize_t rd_read(struct file *file, char __user *buf,
		size_t sz, loff_t *ppos)
{
	struct msm_rd_state *rd = file->private_data;
	struct circ_buf *fifo = &rd->fifo;
	const char *fptr = &fifo->buf[fifo->tail];
	int n = 0, ret = 0;

	mutex_lock(&rd->read_lock);

	ret = wait_event_interruptible(rd->fifo_event,
			circ_count(&rd->fifo) > 0);
	if (ret)
		goto out;

	/* Note that smp_load_acquire() is not strictly required
	 * as CIRC_CNT_TO_END() does not access the head more than
	 * once.
	 */
	n = min_t(int, sz, circ_count_to_end(&rd->fifo));
	if (copy_to_user(buf, fptr, n)) {
		ret = -EFAULT;
		goto out;
	}

	smp_store_release(&fifo->tail, (fifo->tail + n) & (BUF_SZ - 1));
	*ppos += n;

	wake_up_all(&rd->fifo_event);

out:
	mutex_unlock(&rd->read_lock);
	if (ret)
		return ret;
	return n;
}

static int rd_open(struct inode *inode, struct file *file)
{
	struct msm_rd_state *rd = inode->i_private;
	struct drm_device *dev = rd->dev;
	struct msm_drm_private *priv = dev->dev_private;
	struct msm_gpu *gpu = priv->gpu;
	uint64_t val;
	uint32_t gpu_id;
	int ret = 0;

	mutex_lock(&dev->struct_mutex);

	if (rd->open || !gpu) {
		ret = -EBUSY;
		goto out;
	}

	file->private_data = rd;
	rd->open = true;

	/* the parsing tools need to know gpu-id to know which
	 * register database to load.
	 */
	gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val);
	gpu_id = val;

	rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id));

out:
	mutex_unlock(&dev->struct_mutex);
	return ret;
}

static int rd_release(struct inode *inode, struct file *file)
{
	struct msm_rd_state *rd = inode->i_private;
	rd->open = false;
	return 0;
}


static const struct file_operations rd_debugfs_fops = {
	.owner = THIS_MODULE,
	.open = rd_open,
	.read = rd_read,
	.llseek = no_llseek,
	.release = rd_release,
};


static void rd_cleanup(struct msm_rd_state *rd)
{
	if (!rd)
		return;

	mutex_destroy(&rd->read_lock);
	kfree(rd);
}

static struct msm_rd_state *rd_init(struct drm_minor *minor, const char *name)
{
	struct msm_rd_state *rd;
	struct dentry *ent;
	int ret = 0;

	rd = kzalloc(sizeof(*rd), GFP_KERNEL);
	if (!rd)
		return ERR_PTR(-ENOMEM);

	rd->dev = minor->dev;
	rd->fifo.buf = rd->buf;

	mutex_init(&rd->read_lock);

	init_waitqueue_head(&rd->fifo_event);

	ent = debugfs_create_file(name, S_IFREG | S_IRUGO,
			minor->debugfs_root, rd, &rd_debugfs_fops);
	if (!ent) {
		DRM_ERROR("Cannot create /sys/kernel/debug/dri/%pd/%s\n",
				minor->debugfs_root, name);
		ret = -ENOMEM;
		goto fail;
	}

	return rd;

fail:
	rd_cleanup(rd);
	return ERR_PTR(ret);
}

int msm_rd_debugfs_init(struct drm_minor *minor)
{
	struct msm_drm_private *priv = minor->dev->dev_private;
	struct msm_rd_state *rd;
	int ret;

	/* only create on first minor: */
	if (priv->rd)
		return 0;

	rd = rd_init(minor, "rd");
	if (IS_ERR(rd)) {
		ret = PTR_ERR(rd);
		goto fail;
	}

	priv->rd = rd;

	rd = rd_init(minor, "hangrd");
	if (IS_ERR(rd)) {
		ret = PTR_ERR(rd);
		goto fail;
	}

	priv->hangrd = rd;

	return 0;

fail:
	msm_rd_debugfs_cleanup(priv);
	return ret;
}

void msm_rd_debugfs_cleanup(struct msm_drm_private *priv)
{
	rd_cleanup(priv->rd);
	priv->rd = NULL;

	rd_cleanup(priv->hangrd);
	priv->hangrd = NULL;
}

static void snapshot_buf(struct msm_rd_state *rd,
		struct msm_gem_submit *submit, int idx,
		uint64_t iova, uint32_t size)
{
	struct msm_gem_object *obj = submit->bos[idx].obj;
	unsigned offset = 0;
	const char *buf;

	if (iova) {
		offset = iova - submit->bos[idx].iova;
	} else {
		iova = submit->bos[idx].iova;
		size = obj->base.size;
	}

	/*
	 * Always write the GPUADDR header so can get a complete list of all the
	 * buffers in the cmd
	 */
	rd_write_section(rd, RD_GPUADDR,
			(uint32_t[3]){ iova, size, iova >> 32 }, 12);

	/* But only dump the contents of buffers marked READ */
	if (!(submit->bos[idx].flags & MSM_SUBMIT_BO_READ))
		return;

	buf = msm_gem_get_vaddr_active(&obj->base);
	if (IS_ERR(buf))
		return;

	buf += offset;

	rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size);

	msm_gem_put_vaddr(&obj->base);
}

/* called under struct_mutex */
void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
		const char *fmt, ...)
{
	struct drm_device *dev = submit->dev;
	struct task_struct *task;
	char msg[256];
	int i, n;

	if (!rd->open)
		return;

	/* writing into fifo is serialized by caller, and
	 * rd->read_lock is used to serialize the reads
	 */
	WARN_ON(!mutex_is_locked(&dev->struct_mutex));

	if (fmt) {
		va_list args;

		va_start(args, fmt);
		n = vscnprintf(msg, sizeof(msg), fmt, args);
		va_end(args);

		rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4));
	}

	rcu_read_lock();
	task = pid_task(submit->pid, PIDTYPE_PID);
	if (task) {
		n = scnprintf(msg, sizeof(msg), "%.*s/%d: fence=%u",
				TASK_COMM_LEN, task->comm,
				pid_nr(submit->pid), submit->seqno);
	} else {
		n = scnprintf(msg, sizeof(msg), "???/%d: fence=%u",
				pid_nr(submit->pid), submit->seqno);
	}
	rcu_read_unlock();

	rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4));

	for (i = 0; rd_full && i < submit->nr_bos; i++)
		snapshot_buf(rd, submit, i, 0, 0);

	for (i = 0; i < submit->nr_cmds; i++) {
		uint64_t iova = submit->cmd[i].iova;
		uint32_t szd  = submit->cmd[i].size; /* in dwords */

		/* snapshot cmdstream bo's (if we haven't already): */
		if (!rd_full) {
			snapshot_buf(rd, submit, submit->cmd[i].idx,
					submit->cmd[i].iova, szd * 4);
		}

		switch (submit->cmd[i].type) {
		case MSM_SUBMIT_CMD_IB_TARGET_BUF:
			/* ignore IB-targets, we've logged the buffer, the
			 * parser tool will follow the IB based on the logged
			 * buffer/gpuaddr, so nothing more to do.
			 */
			break;
		case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
		case MSM_SUBMIT_CMD_BUF:
			rd_write_section(rd, RD_CMDSTREAM_ADDR,
				(uint32_t[3]){ iova, szd, iova >> 32 }, 12);
			break;
		}
	}
}
#endif
Commit	Line	Data
a7d3c950 RC	1	/*
	2	* Copyright (C) 2013 Red Hat
	3	* Author: Rob Clark <robdclark@gmail.com>
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms of the GNU General Public License version 2 as published by
	7	* the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful, but WITHOUT
	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	12	* more details.
	13	*
	14	* You should have received a copy of the GNU General Public License along with
	15	* this program. If not, see <http://www.gnu.org/licenses/>.
	16	*/
	17
	18	/* For debugging crashes, userspace can:
	19	*
	20	* tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd
	21	*
2165e2b9	22	* to log the cmdstream in a format that is understood by freedreno/cffdump
a7d3c950 RC	23	* utility. By comparing the last successfully completed fence #, to the
	24	* cmdstream for the next fence, you can narrow down which process and submit
	25	* caused the gpu crash/lockup.
	26	*
2165e2b9 RC	27	* Additionally:
	28	*
	29	* tail -f /sys/kernel/debug/dri/<minor>/hangrd > logfile.rd
	30	*
	31	* will capture just the cmdstream from submits which triggered a GPU hang.
	32	*
a7d3c950 RC	33	* This bypasses drm_debugfs_create_files() mainly because we need to use
	34	* our own fops for a bit more control. In particular, we don't want to
	35	* do anything if userspace doesn't have the debugfs file open.
79c21187 RC	36	*
	37	* The module-param "rd_full", which defaults to false, enables snapshotting
	38	* all (non-written) buffers in the submit, rather than just cmdstream bo's.
	39	* This is useful to capture the contents of (for example) vbo's or textures,
	40	* or shader programs (if not emitted inline in cmdstream).
a7d3c950 RC	41	*/
	42
	43	#ifdef CONFIG_DEBUG_FS
	44
	45	#include <linux/kfifo.h>
	46	#include <linux/debugfs.h>
	47	#include <linux/circ_buf.h>
	48	#include <linux/wait.h>
	49
	50	#include "msm_drv.h"
	51	#include "msm_gpu.h"
	52	#include "msm_gem.h"
	53
79c21187 RC	54	static bool rd_full = false;
	55	MODULE_PARM_DESC(rd_full, "If true, $debugfs/.../rd will snapshot all buffer contents");
	56	module_param_named(rd_full, rd_full, bool, 0600);
	57
a7d3c950 RC	58	enum rd_sect_type {
	59	RD_NONE,
	60	RD_TEST, /* ascii text */
	61	RD_CMD, /* ascii text */
	62	RD_GPUADDR, /* u32 gpuaddr, u32 size */
	63	RD_CONTEXT, /* raw dump */
	64	RD_CMDSTREAM, /* raw dump */
	65	RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */
	66	RD_PARAM, /* u32 param_type, u32 param_val, u32 bitlen */
	67	RD_FLUSH, /* empty, clear previous params */
	68	RD_PROGRAM, /* shader program, raw dump */
	69	RD_VERT_SHADER,
	70	RD_FRAG_SHADER,
	71	RD_BUFFER_CONTENTS,
	72	RD_GPU_ID,
	73	};
	74
	75	#define BUF_SZ 512 /* should be power of 2 */
	76
	77	/* space used: */
	78	#define circ_count(circ) \
	79	(CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ))
	80	#define circ_count_to_end(circ) \
	81	(CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ))
	82	/* space available: */
	83	#define circ_space(circ) \
	84	(CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ))
	85	#define circ_space_to_end(circ) \
	86	(CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ))
	87
	88	struct msm_rd_state {
	89	struct drm_device *dev;
	90
	91	bool open;
	92
a7d3c950 RC	93	/* current submit to read out: */
	94	struct msm_gem_submit *submit;
	95
	96	/* fifo access is synchronized on the producer side by
	97	* struct_mutex held by submit code (otherwise we could
	98	* end up w/ cmds logged in different order than they
	99	* were executed). And read_lock synchronizes the reads
	100	*/
	101	struct mutex read_lock;
	102
	103	wait_queue_head_t fifo_event;
	104	struct circ_buf fifo;
	105
	106	char buf[BUF_SZ];
	107	};
	108
	109	static void rd_write(struct msm_rd_state rd, const void buf, int sz)
	110	{
	111	struct circ_buf *fifo = &rd->fifo;
	112	const char *ptr = buf;
	113
	114	while (sz > 0) {
	115	char *fptr = &fifo->buf[fifo->head];
	116	int n;
	117
	118	wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0);
	119
f44001e2 RC	120	/* Note that smp_load_acquire() is not strictly required
	121	* as CIRC_SPACE_TO_END() does not access the tail more
	122	* than once.
	123	*/
a7d3c950 RC	124	n = min(sz, circ_space_to_end(&rd->fifo));
	125	memcpy(fptr, ptr, n);
	126
f44001e2	127	smp_store_release(&fifo->head, (fifo->head + n) & (BUF_SZ - 1));
a7d3c950 RC	128	sz -= n;
	129	ptr += n;
	130
	131	wake_up_all(&rd->fifo_event);
	132	}
	133	}
	134
	135	static void rd_write_section(struct msm_rd_state *rd,
	136	enum rd_sect_type type, const void *buf, int sz)
	137	{
	138	rd_write(rd, &type, 4);
	139	rd_write(rd, &sz, 4);
	140	rd_write(rd, buf, sz);
	141	}
	142
	143	static ssize_t rd_read(struct file file, char __user buf,
	144	size_t sz, loff_t *ppos)
	145	{
	146	struct msm_rd_state *rd = file->private_data;
	147	struct circ_buf *fifo = &rd->fifo;
	148	const char *fptr = &fifo->buf[fifo->tail];
	149	int n = 0, ret = 0;
	150
	151	mutex_lock(&rd->read_lock);
	152
	153	ret = wait_event_interruptible(rd->fifo_event,
	154	circ_count(&rd->fifo) > 0);
	155	if (ret)
	156	goto out;
	157
f44001e2 RC	158	/* Note that smp_load_acquire() is not strictly required
	159	* as CIRC_CNT_TO_END() does not access the head more than
	160	* once.
	161	*/
a7d3c950	162	n = min_t(int, sz, circ_count_to_end(&rd->fifo));
5745d21f DC	163	if (copy_to_user(buf, fptr, n)) {
5745d21f DC	164	ret = -EFAULT;
a7d3c950	165	goto out;
5745d21f	166	}
a7d3c950	167
f44001e2	168	smp_store_release(&fifo->tail, (fifo->tail + n) & (BUF_SZ - 1));
a7d3c950 RC	169	*ppos += n;
	170
	171	wake_up_all(&rd->fifo_event);
	172
	173	out:
	174	mutex_unlock(&rd->read_lock);
	175	if (ret)
	176	return ret;
	177	return n;
	178	}
	179
	180	static int rd_open(struct inode inode, struct file file)
	181	{
	182	struct msm_rd_state *rd = inode->i_private;
	183	struct drm_device *dev = rd->dev;
	184	struct msm_drm_private *priv = dev->dev_private;
	185	struct msm_gpu *gpu = priv->gpu;
	186	uint64_t val;
	187	uint32_t gpu_id;
	188	int ret = 0;
	189
	190	mutex_lock(&dev->struct_mutex);
	191
	192	if (rd->open \|\| !gpu) {
	193	ret = -EBUSY;
	194	goto out;
	195	}
	196
	197	file->private_data = rd;
	198	rd->open = true;
	199
	200	/* the parsing tools need to know gpu-id to know which
	201	* register database to load.
	202	*/
	203	gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val);
	204	gpu_id = val;
	205
	206	rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id));
	207
	208	out:
	209	mutex_unlock(&dev->struct_mutex);
	210	return ret;
	211	}
	212
	213	static int rd_release(struct inode inode, struct file file)
	214	{
	215	struct msm_rd_state *rd = inode->i_private;
	216	rd->open = false;
	217	return 0;
	218	}
	219
	220
	221	static const struct file_operations rd_debugfs_fops = {
	222	.owner = THIS_MODULE,
	223	.open = rd_open,
	224	.read = rd_read,
	225	.llseek = no_llseek,
	226	.release = rd_release,
	227	};
	228
2165e2b9 RC	229
	230	static void rd_cleanup(struct msm_rd_state *rd)
	231	{
	232	if (!rd)
	233	return;
	234
	235	mutex_destroy(&rd->read_lock);
	236	kfree(rd);
	237	}
	238
	239	static struct msm_rd_state rd_init(struct drm_minor minor, const char *name)
a7d3c950	240	{
a7d3c950	241	struct msm_rd_state *rd;
81895b54	242	struct dentry *ent;
2165e2b9	243	int ret = 0;
a7d3c950 RC	244
	245	rd = kzalloc(sizeof(*rd), GFP_KERNEL);
	246	if (!rd)
2165e2b9	247	return ERR_PTR(-ENOMEM);
a7d3c950 RC	248
	249	rd->dev = minor->dev;
	250	rd->fifo.buf = rd->buf;
	251
	252	mutex_init(&rd->read_lock);
a7d3c950 RC	253
	254	init_waitqueue_head(&rd->fifo_event);
	255
2165e2b9	256	ent = debugfs_create_file(name, S_IFREG \| S_IRUGO,
a7d3c950	257	minor->debugfs_root, rd, &rd_debugfs_fops);
81895b54	258	if (!ent) {
2165e2b9 RC	259	DRM_ERROR("Cannot create /sys/kernel/debug/dri/%pd/%s\n",
	260	minor->debugfs_root, name);
	261	ret = -ENOMEM;
a7d3c950 RC	262	goto fail;
	263	}
	264
2165e2b9 RC	265	return rd;
	266
	267	fail:
	268	rd_cleanup(rd);
	269	return ERR_PTR(ret);
	270	}
	271
	272	int msm_rd_debugfs_init(struct drm_minor *minor)
	273	{
	274	struct msm_drm_private *priv = minor->dev->dev_private;
	275	struct msm_rd_state *rd;
	276	int ret;
	277
	278	/* only create on first minor: */
	279	if (priv->rd)
	280	return 0;
	281
	282	rd = rd_init(minor, "rd");
	283	if (IS_ERR(rd)) {
	284	ret = PTR_ERR(rd);
	285	goto fail;
	286	}
	287
	288	priv->rd = rd;
	289
	290	rd = rd_init(minor, "hangrd");
	291	if (IS_ERR(rd)) {
	292	ret = PTR_ERR(rd);
	293	goto fail;
	294	}
	295
	296	priv->hangrd = rd;
	297
a7d3c950 RC	298	return 0;
	299
	300	fail:
85eac470	301	msm_rd_debugfs_cleanup(priv);
2165e2b9	302	return ret;
a7d3c950 RC	303	}
a7d3c950 RC	304
85eac470	305	void msm_rd_debugfs_cleanup(struct msm_drm_private *priv)
a7d3c950	306	{
2165e2b9	307	rd_cleanup(priv->rd);
a7d3c950	308	priv->rd = NULL;
2165e2b9 RC	309
	310	rd_cleanup(priv->hangrd);
	311	priv->hangrd = NULL;
a7d3c950 RC	312	}
a7d3c950 RC	313
6507e799 RC	314	static void snapshot_buf(struct msm_rd_state *rd,
6507e799 RC	315	struct msm_gem_submit *submit, int idx,
d0651fe8	316	uint64_t iova, uint32_t size)
6507e799 RC	317	{
6507e799 RC	318	struct msm_gem_object *obj = submit->bos[idx].obj;
47e7f506	319	unsigned offset = 0;
6507e799 RC	320	const char *buf;
6507e799 RC	321
79c21187	322	if (iova) {
47e7f506	323	offset = iova - submit->bos[idx].iova;
79c21187 RC	324	} else {
	325	iova = submit->bos[idx].iova;
	326	size = obj->base.size;
	327	}
6507e799	328
78b8e5b8 JC	329	/*
	330	* Always write the GPUADDR header so can get a complete list of all the
	331	* buffers in the cmd
	332	*/
6507e799	333	rd_write_section(rd, RD_GPUADDR,
d0651fe8	334	(uint32_t[3]){ iova, size, iova >> 32 }, 12);
78b8e5b8 JC	335
	336	/* But only dump the contents of buffers marked READ */
	337	if (!(submit->bos[idx].flags & MSM_SUBMIT_BO_READ))
	338	return;
	339
fad33f4b	340	buf = msm_gem_get_vaddr_active(&obj->base);
78b8e5b8 JC	341	if (IS_ERR(buf))
	342	return;
	343
47e7f506 RC	344	buf += offset;
47e7f506 RC	345
6507e799 RC	346	rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size);
6507e799 RC	347
0e08270a	348	msm_gem_put_vaddr(&obj->base);
6507e799 RC	349	}
6507e799 RC	350
a7d3c950	351	/* called under struct_mutex */
998b9a58 RC	352	void msm_rd_dump_submit(struct msm_rd_state rd, struct msm_gem_submit submit,
998b9a58 RC	353	const char *fmt, ...)
a7d3c950 RC	354	{
a7d3c950 RC	355	struct drm_device *dev = submit->dev;
2165e2b9	356	struct task_struct *task;
998b9a58	357	char msg[256];
a7d3c950 RC	358	int i, n;
	359
	360	if (!rd->open)
	361	return;
	362
	363	/* writing into fifo is serialized by caller, and
	364	* rd->read_lock is used to serialize the reads
	365	*/
	366	WARN_ON(!mutex_is_locked(&dev->struct_mutex));
	367
998b9a58 RC	368	if (fmt) {
	369	va_list args;
	370
	371	va_start(args, fmt);
b689a830	372	n = vscnprintf(msg, sizeof(msg), fmt, args);
998b9a58 RC	373	va_end(args);
	374
	375	rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4));
	376	}
	377
2165e2b9 RC	378	rcu_read_lock();
	379	task = pid_task(submit->pid, PIDTYPE_PID);
	380	if (task) {
b689a830	381	n = scnprintf(msg, sizeof(msg), "%.*s/%d: fence=%u",
2165e2b9 RC	382	TASK_COMM_LEN, task->comm,
	383	pid_nr(submit->pid), submit->seqno);
	384	} else {
b689a830	385	n = scnprintf(msg, sizeof(msg), "???/%d: fence=%u",
2165e2b9 RC	386	pid_nr(submit->pid), submit->seqno);
	387	}
	388	rcu_read_unlock();
a7d3c950 RC	389
	390	rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4));
	391
78b8e5b8 JC	392	for (i = 0; rd_full && i < submit->nr_bos; i++)
78b8e5b8 JC	393	snapshot_buf(rd, submit, i, 0, 0);
a7d3c950 RC	394
a7d3c950 RC	395	for (i = 0; i < submit->nr_cmds; i++) {
22dd5c14	396	uint64_t iova = submit->cmd[i].iova;
a7d3c950	397	uint32_t szd = submit->cmd[i].size; /* in dwords */
69a834c2	398
79c21187 RC	399	/* snapshot cmdstream bo's (if we haven't already): */
	400	if (!rd_full) {
	401	snapshot_buf(rd, submit, submit->cmd[i].idx,
	402	submit->cmd[i].iova, szd * 4);
	403	}
a7d3c950 RC	404
	405	switch (submit->cmd[i].type) {
	406	case MSM_SUBMIT_CMD_IB_TARGET_BUF:
	407	/* ignore IB-targets, we've logged the buffer, the
	408	* parser tool will follow the IB based on the logged
	409	* buffer/gpuaddr, so nothing more to do.
	410	*/
	411	break;
	412	case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
	413	case MSM_SUBMIT_CMD_BUF:
	414	rd_write_section(rd, RD_CMDSTREAM_ADDR,
22dd5c14	415	(uint32_t[3]){ iova, szd, iova >> 32 }, 12);
a7d3c950 RC	416	break;
	417	}
	418	}
	419	}
	420	#endif