Commit | Line | Data |
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c943b494 CU |
1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* | |
3 | * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. | |
4 | */ | |
5 | ||
6 | #include <linux/module.h> | |
7 | #include <linux/slab.h> | |
8 | #include <linux/uaccess.h> | |
9 | #include <linux/debugfs.h> | |
10 | #include <linux/component.h> | |
11 | #include <linux/of_irq.h> | |
8ede2ecc | 12 | #include <linux/delay.h> |
f83493f7 | 13 | #include <drm/display/drm_dp_aux_bus.h> |
a05f7279 | 14 | #include <drm/drm_edid.h> |
c943b494 CU |
15 | |
16 | #include "msm_drv.h" | |
17 | #include "msm_kms.h" | |
c943b494 CU |
18 | #include "dp_parser.h" |
19 | #include "dp_power.h" | |
20 | #include "dp_catalog.h" | |
21 | #include "dp_aux.h" | |
220b856a | 22 | #include "dp_reg.h" |
c943b494 CU |
23 | #include "dp_link.h" |
24 | #include "dp_panel.h" | |
25 | #include "dp_ctrl.h" | |
26 | #include "dp_display.h" | |
27 | #include "dp_drm.h" | |
d13e36d7 | 28 | #include "dp_audio.h" |
d11a9369 | 29 | #include "dp_debug.h" |
c943b494 | 30 | |
b78c7727 AK |
31 | static bool psr_enabled = false; |
32 | module_param(psr_enabled, bool, 0); | |
33 | MODULE_PARM_DESC(psr_enabled, "enable PSR for eDP and DP displays"); | |
34 | ||
c943b494 CU |
35 | #define HPD_STRING_SIZE 30 |
36 | ||
8ede2ecc KH |
37 | enum { |
38 | ISR_DISCONNECTED, | |
39 | ISR_CONNECT_PENDING, | |
40 | ISR_CONNECTED, | |
41 | ISR_HPD_REPLUG_COUNT, | |
42 | ISR_IRQ_HPD_PULSE_COUNT, | |
43 | ISR_HPD_LO_GLITH_COUNT, | |
44 | }; | |
45 | ||
46 | /* event thread connection state */ | |
47 | enum { | |
48 | ST_DISCONNECTED, | |
375a1260 | 49 | ST_MAINLINK_READY, |
8ede2ecc KH |
50 | ST_CONNECTED, |
51 | ST_DISCONNECT_PENDING, | |
62671d2e | 52 | ST_DISPLAY_OFF, |
8ede2ecc KH |
53 | }; |
54 | ||
55 | enum { | |
56 | EV_NO_EVENT, | |
57 | /* hpd events */ | |
8ede2ecc KH |
58 | EV_HPD_PLUG_INT, |
59 | EV_IRQ_HPD_INT, | |
8ede2ecc KH |
60 | EV_HPD_UNPLUG_INT, |
61 | EV_USER_NOTIFICATION, | |
8ede2ecc KH |
62 | }; |
63 | ||
64 | #define EVENT_TIMEOUT (HZ/10) /* 100ms */ | |
65 | #define DP_EVENT_Q_MAX 8 | |
66 | ||
8ede2ecc KH |
67 | #define DP_TIMEOUT_NONE 0 |
68 | ||
69 | #define WAIT_FOR_RESUME_TIMEOUT_JIFFIES (HZ / 2) | |
70 | ||
71 | struct dp_event { | |
72 | u32 event_id; | |
73 | u32 data; | |
74 | u32 delay; | |
75 | }; | |
76 | ||
c943b494 CU |
77 | struct dp_display_private { |
78 | char *name; | |
79 | int irq; | |
80 | ||
bb3de286 BA |
81 | unsigned int id; |
82 | ||
c943b494 CU |
83 | /* state variables */ |
84 | bool core_initialized; | |
989ebe7b | 85 | bool phy_initialized; |
c943b494 CU |
86 | bool hpd_irq_on; |
87 | bool audio_supported; | |
88 | ||
202aceac | 89 | struct drm_device *drm_dev; |
c943b494 | 90 | struct dentry *root; |
c943b494 | 91 | |
c943b494 CU |
92 | struct dp_parser *parser; |
93 | struct dp_power *power; | |
94 | struct dp_catalog *catalog; | |
95 | struct drm_dp_aux *aux; | |
96 | struct dp_link *link; | |
97 | struct dp_panel *panel; | |
98 | struct dp_ctrl *ctrl; | |
8ede2ecc | 99 | struct dp_debug *debug; |
c943b494 | 100 | |
c943b494 CU |
101 | struct dp_display_mode dp_mode; |
102 | struct msm_dp dp_display; | |
220b856a | 103 | |
158b9aa7 AK |
104 | /* wait for audio signaling */ |
105 | struct completion audio_comp; | |
106 | ||
8ede2ecc KH |
107 | /* event related only access by event thread */ |
108 | struct mutex event_mutex; | |
109 | wait_queue_head_t event_q; | |
19e52bcb | 110 | u32 hpd_state; |
8ede2ecc KH |
111 | u32 event_pndx; |
112 | u32 event_gndx; | |
570d3e5d | 113 | struct task_struct *ev_tsk; |
8ede2ecc KH |
114 | struct dp_event event_list[DP_EVENT_Q_MAX]; |
115 | spinlock_t event_lock; | |
116 | ||
757a2f36 KH |
117 | bool wide_bus_en; |
118 | ||
d13e36d7 | 119 | struct dp_audio *audio; |
c943b494 CU |
120 | }; |
121 | ||
269e92d8 BA |
122 | struct msm_dp_desc { |
123 | phys_addr_t io_start; | |
5d417b40 | 124 | unsigned int id; |
269e92d8 | 125 | unsigned int connector_type; |
757a2f36 | 126 | bool wide_bus_en; |
269e92d8 BA |
127 | }; |
128 | ||
94a9e052 | 129 | static const struct msm_dp_desc sc7180_dp_descs[] = { |
5d417b40 BA |
130 | { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, |
131 | {} | |
94a9e052 DB |
132 | }; |
133 | ||
134 | static const struct msm_dp_desc sc7280_dp_descs[] = { | |
5d417b40 BA |
135 | { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, |
136 | { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, | |
137 | {} | |
94a9e052 DB |
138 | }; |
139 | ||
140 | static const struct msm_dp_desc sc8180x_dp_descs[] = { | |
5d417b40 BA |
141 | { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, |
142 | { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, | |
143 | { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_eDP }, | |
144 | {} | |
ef7837ff SB |
145 | }; |
146 | ||
5bd69fd1 BA |
147 | static const struct msm_dp_desc sc8280xp_dp_descs[] = { |
148 | { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, | |
149 | { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, | |
150 | { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, | |
151 | { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, | |
152 | { .io_start = 0x22090000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, | |
153 | { .io_start = 0x22098000, .id = MSM_DP_CONTROLLER_1, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, | |
154 | { .io_start = 0x2209a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, | |
155 | { .io_start = 0x220a0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, | |
156 | {} | |
94a9e052 DB |
157 | }; |
158 | ||
5bd69fd1 BA |
159 | static const struct msm_dp_desc sc8280xp_edp_descs[] = { |
160 | { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, | |
161 | { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, | |
162 | { .io_start = 0x2209a000, .id = MSM_DP_CONTROLLER_2, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, | |
163 | { .io_start = 0x220a0000, .id = MSM_DP_CONTROLLER_3, .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, | |
164 | {} | |
74222b7c BA |
165 | }; |
166 | ||
94a9e052 | 167 | static const struct msm_dp_desc sm8350_dp_descs[] = { |
5d417b40 BA |
168 | { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, |
169 | {} | |
f5408b21 BA |
170 | }; |
171 | ||
1b2d98bd NA |
172 | static const struct msm_dp_desc sm8650_dp_descs[] = { |
173 | { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .connector_type = DRM_MODE_CONNECTOR_DisplayPort }, | |
174 | {} | |
175 | }; | |
176 | ||
c943b494 | 177 | static const struct of_device_id dp_dt_match[] = { |
5d417b40 BA |
178 | { .compatible = "qcom,sc7180-dp", .data = &sc7180_dp_descs }, |
179 | { .compatible = "qcom,sc7280-dp", .data = &sc7280_dp_descs }, | |
180 | { .compatible = "qcom,sc7280-edp", .data = &sc7280_dp_descs }, | |
181 | { .compatible = "qcom,sc8180x-dp", .data = &sc8180x_dp_descs }, | |
182 | { .compatible = "qcom,sc8180x-edp", .data = &sc8180x_dp_descs }, | |
5bd69fd1 BA |
183 | { .compatible = "qcom,sc8280xp-dp", .data = &sc8280xp_dp_descs }, |
184 | { .compatible = "qcom,sc8280xp-edp", .data = &sc8280xp_edp_descs }, | |
fa33f2aa | 185 | { .compatible = "qcom,sdm845-dp", .data = &sc7180_dp_descs }, |
5d417b40 | 186 | { .compatible = "qcom,sm8350-dp", .data = &sm8350_dp_descs }, |
1b2d98bd | 187 | { .compatible = "qcom,sm8650-dp", .data = &sm8650_dp_descs }, |
c943b494 CU |
188 | {} |
189 | }; | |
190 | ||
d624e50a BA |
191 | static struct dp_display_private *dev_get_dp_display_private(struct device *dev) |
192 | { | |
193 | struct msm_dp *dp = dev_get_drvdata(dev); | |
194 | ||
195 | return container_of(dp, struct dp_display_private, dp_display); | |
196 | } | |
197 | ||
8ede2ecc KH |
198 | static int dp_add_event(struct dp_display_private *dp_priv, u32 event, |
199 | u32 data, u32 delay) | |
c943b494 | 200 | { |
8ede2ecc KH |
201 | unsigned long flag; |
202 | struct dp_event *todo; | |
203 | int pndx; | |
204 | ||
205 | spin_lock_irqsave(&dp_priv->event_lock, flag); | |
206 | pndx = dp_priv->event_pndx + 1; | |
207 | pndx %= DP_EVENT_Q_MAX; | |
208 | if (pndx == dp_priv->event_gndx) { | |
209 | pr_err("event_q is full: pndx=%d gndx=%d\n", | |
210 | dp_priv->event_pndx, dp_priv->event_gndx); | |
211 | spin_unlock_irqrestore(&dp_priv->event_lock, flag); | |
212 | return -EPERM; | |
220b856a | 213 | } |
8ede2ecc KH |
214 | todo = &dp_priv->event_list[dp_priv->event_pndx++]; |
215 | dp_priv->event_pndx %= DP_EVENT_Q_MAX; | |
216 | todo->event_id = event; | |
217 | todo->data = data; | |
218 | todo->delay = delay; | |
219 | wake_up(&dp_priv->event_q); | |
220 | spin_unlock_irqrestore(&dp_priv->event_lock, flag); | |
c943b494 | 221 | |
8ede2ecc | 222 | return 0; |
220b856a TS |
223 | } |
224 | ||
8ede2ecc | 225 | static int dp_del_event(struct dp_display_private *dp_priv, u32 event) |
220b856a | 226 | { |
8ede2ecc KH |
227 | unsigned long flag; |
228 | struct dp_event *todo; | |
229 | u32 gndx; | |
230 | ||
231 | spin_lock_irqsave(&dp_priv->event_lock, flag); | |
232 | if (dp_priv->event_pndx == dp_priv->event_gndx) { | |
233 | spin_unlock_irqrestore(&dp_priv->event_lock, flag); | |
234 | return -ENOENT; | |
235 | } | |
220b856a | 236 | |
8ede2ecc KH |
237 | gndx = dp_priv->event_gndx; |
238 | while (dp_priv->event_pndx != gndx) { | |
239 | todo = &dp_priv->event_list[gndx]; | |
240 | if (todo->event_id == event) { | |
241 | todo->event_id = EV_NO_EVENT; /* deleted */ | |
242 | todo->delay = 0; | |
243 | } | |
244 | gndx++; | |
245 | gndx %= DP_EVENT_Q_MAX; | |
220b856a | 246 | } |
8ede2ecc | 247 | spin_unlock_irqrestore(&dp_priv->event_lock, flag); |
220b856a | 248 | |
8ede2ecc | 249 | return 0; |
c943b494 CU |
250 | } |
251 | ||
f2f46b87 KH |
252 | void dp_display_signal_audio_start(struct msm_dp *dp_display) |
253 | { | |
254 | struct dp_display_private *dp; | |
255 | ||
256 | dp = container_of(dp_display, struct dp_display_private, dp_display); | |
257 | ||
258 | reinit_completion(&dp->audio_comp); | |
259 | } | |
260 | ||
158b9aa7 AK |
261 | void dp_display_signal_audio_complete(struct msm_dp *dp_display) |
262 | { | |
263 | struct dp_display_private *dp; | |
264 | ||
265 | dp = container_of(dp_display, struct dp_display_private, dp_display); | |
266 | ||
267 | complete_all(&dp->audio_comp); | |
268 | } | |
269 | ||
570d3e5d KH |
270 | static int dp_hpd_event_thread_start(struct dp_display_private *dp_priv); |
271 | ||
c943b494 CU |
272 | static int dp_display_bind(struct device *dev, struct device *master, |
273 | void *data) | |
274 | { | |
275 | int rc = 0; | |
d624e50a | 276 | struct dp_display_private *dp = dev_get_dp_display_private(dev); |
ec919e6e ADR |
277 | struct msm_drm_private *priv = dev_get_drvdata(master); |
278 | struct drm_device *drm = priv->dev; | |
c943b494 | 279 | |
c943b494 | 280 | dp->dp_display.drm_dev = drm; |
bb3de286 | 281 | priv->dp[dp->id] = &dp->dp_display; |
c943b494 | 282 | |
c943b494 | 283 | |
4b296d15 | 284 | |
202aceac | 285 | dp->drm_dev = drm; |
fc71c9e6 | 286 | dp->aux->drm_dev = drm; |
c943b494 CU |
287 | rc = dp_aux_register(dp->aux); |
288 | if (rc) { | |
289 | DRM_ERROR("DRM DP AUX register failed\n"); | |
290 | goto end; | |
291 | } | |
292 | ||
d13e36d7 AK |
293 | |
294 | rc = dp_register_audio_driver(dev, dp->audio); | |
570d3e5d | 295 | if (rc) { |
d13e36d7 | 296 | DRM_ERROR("Audio registration Dp failed\n"); |
570d3e5d KH |
297 | goto end; |
298 | } | |
d13e36d7 | 299 | |
570d3e5d KH |
300 | rc = dp_hpd_event_thread_start(dp); |
301 | if (rc) { | |
302 | DRM_ERROR("Event thread create failed\n"); | |
303 | goto end; | |
304 | } | |
d13e36d7 | 305 | |
570d3e5d | 306 | return 0; |
c943b494 CU |
307 | end: |
308 | return rc; | |
309 | } | |
310 | ||
311 | static void dp_display_unbind(struct device *dev, struct device *master, | |
312 | void *data) | |
313 | { | |
d624e50a | 314 | struct dp_display_private *dp = dev_get_dp_display_private(dev); |
ec919e6e | 315 | struct msm_drm_private *priv = dev_get_drvdata(master); |
c943b494 | 316 | |
570d3e5d KH |
317 | kthread_stop(dp->ev_tsk); |
318 | ||
a7bfb2ad BA |
319 | of_dp_aux_depopulate_bus(dp->aux); |
320 | ||
85c63628 | 321 | dp_unregister_audio_driver(dev, dp->audio); |
c943b494 | 322 | dp_aux_unregister(dp->aux); |
0769d0a7 KH |
323 | dp->drm_dev = NULL; |
324 | dp->aux->drm_dev = NULL; | |
bb3de286 | 325 | priv->dp[dp->id] = NULL; |
c943b494 CU |
326 | } |
327 | ||
328 | static const struct component_ops dp_display_comp_ops = { | |
329 | .bind = dp_display_bind, | |
330 | .unbind = dp_display_unbind, | |
331 | }; | |
332 | ||
c58eb1b5 KH |
333 | static int dp_display_send_hpd_notification(struct dp_display_private *dp, |
334 | bool hpd) | |
335 | { | |
e467e0bd | 336 | struct drm_bridge *bridge = dp->dp_display.bridge; |
c943b494 CU |
337 | |
338 | /* reset video pattern flag on disconnect */ | |
bfcc3d8f | 339 | if (!hpd) { |
c943b494 | 340 | dp->panel->video_test = false; |
ebfa85c5 AV |
341 | if (!dp->dp_display.is_edp) |
342 | drm_dp_set_subconnector_property(dp->dp_display.connector, | |
343 | connector_status_disconnected, | |
344 | dp->panel->dpcd, | |
345 | dp->panel->downstream_ports); | |
bfcc3d8f | 346 | } |
c943b494 | 347 | |
aa113120 | 348 | dp->dp_display.link_ready = hpd; |
c943b494 | 349 | |
202aceac KH |
350 | drm_dbg_dp(dp->drm_dev, "type=%d hpd=%d\n", |
351 | dp->dp_display.connector_type, hpd); | |
e467e0bd | 352 | drm_bridge_hpd_notify(bridge, dp->dp_display.link_ready); |
c943b494 | 353 | |
c943b494 CU |
354 | return 0; |
355 | } | |
356 | ||
357 | static int dp_display_process_hpd_high(struct dp_display_private *dp) | |
358 | { | |
359 | int rc = 0; | |
360 | struct edid *edid; | |
361 | ||
c943b494 | 362 | dp->panel->max_dp_lanes = dp->parser->max_dp_lanes; |
0e7f2705 KH |
363 | dp->panel->max_dp_link_rate = dp->parser->max_dp_link_rate; |
364 | ||
365 | drm_dbg_dp(dp->drm_dev, "max_lanes=%d max_link_rate=%d\n", | |
366 | dp->panel->max_dp_lanes, dp->panel->max_dp_link_rate); | |
c943b494 CU |
367 | |
368 | rc = dp_panel_read_sink_caps(dp->panel, dp->dp_display.connector); | |
369 | if (rc) | |
8ede2ecc | 370 | goto end; |
c943b494 CU |
371 | |
372 | dp_link_process_request(dp->link); | |
373 | ||
ebfa85c5 AV |
374 | if (!dp->dp_display.is_edp) |
375 | drm_dp_set_subconnector_property(dp->dp_display.connector, | |
376 | connector_status_connected, | |
377 | dp->panel->dpcd, | |
378 | dp->panel->downstream_ports); | |
bfcc3d8f | 379 | |
c943b494 CU |
380 | edid = dp->panel->edid; |
381 | ||
b78c7727 | 382 | dp->dp_display.psr_supported = dp->panel->psr_cap.version && psr_enabled; |
cd779808 | 383 | |
c943b494 | 384 | dp->audio_supported = drm_detect_monitor_audio(edid); |
c943b494 CU |
385 | dp_panel_handle_sink_request(dp->panel); |
386 | ||
c943b494 | 387 | dp->dp_display.max_dp_lanes = dp->parser->max_dp_lanes; |
8ede2ecc | 388 | |
f21c8a27 KH |
389 | /* |
390 | * set sink to normal operation mode -- D0 | |
391 | * before dpcd read | |
392 | */ | |
393 | dp_link_psm_config(dp->link, &dp->panel->link_info, false); | |
394 | ||
6625e263 | 395 | dp_link_reset_phy_params_vx_px(dp->link); |
8ede2ecc KH |
396 | rc = dp_ctrl_on_link(dp->ctrl); |
397 | if (rc) { | |
398 | DRM_ERROR("failed to complete DP link training\n"); | |
399 | goto end; | |
400 | } | |
401 | ||
402 | dp_add_event(dp, EV_USER_NOTIFICATION, true, 0); | |
403 | ||
c943b494 CU |
404 | end: |
405 | return rc; | |
406 | } | |
407 | ||
989ebe7b | 408 | static void dp_display_host_phy_init(struct dp_display_private *dp) |
c943b494 | 409 | { |
202aceac | 410 | drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", |
78fc35c5 KH |
411 | dp->dp_display.connector_type, dp->core_initialized, |
412 | dp->phy_initialized); | |
c943b494 | 413 | |
989ebe7b KH |
414 | if (!dp->phy_initialized) { |
415 | dp_ctrl_phy_init(dp->ctrl); | |
416 | dp->phy_initialized = true; | |
c943b494 | 417 | } |
989ebe7b KH |
418 | } |
419 | ||
420 | static void dp_display_host_phy_exit(struct dp_display_private *dp) | |
421 | { | |
202aceac | 422 | drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", |
78fc35c5 KH |
423 | dp->dp_display.connector_type, dp->core_initialized, |
424 | dp->phy_initialized); | |
c943b494 | 425 | |
989ebe7b KH |
426 | if (dp->phy_initialized) { |
427 | dp_ctrl_phy_exit(dp->ctrl); | |
428 | dp->phy_initialized = false; | |
429 | } | |
430 | } | |
431 | ||
432 | static void dp_display_host_init(struct dp_display_private *dp) | |
433 | { | |
202aceac | 434 | drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", |
78fc35c5 KH |
435 | dp->dp_display.connector_type, dp->core_initialized, |
436 | dp->phy_initialized); | |
c943b494 | 437 | |
1c5f6051 | 438 | dp_power_init(dp->power); |
989ebe7b | 439 | dp_ctrl_reset_irq_ctrl(dp->ctrl, true); |
c943b494 CU |
440 | dp_aux_init(dp->aux); |
441 | dp->core_initialized = true; | |
442 | } | |
443 | ||
19e52bcb KH |
444 | static void dp_display_host_deinit(struct dp_display_private *dp) |
445 | { | |
202aceac | 446 | drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n", |
78fc35c5 KH |
447 | dp->dp_display.connector_type, dp->core_initialized, |
448 | dp->phy_initialized); | |
19e52bcb | 449 | |
989ebe7b | 450 | dp_ctrl_reset_irq_ctrl(dp->ctrl, false); |
19e52bcb KH |
451 | dp_aux_deinit(dp->aux); |
452 | dp_power_deinit(dp->power); | |
19e52bcb KH |
453 | dp->core_initialized = false; |
454 | } | |
455 | ||
c943b494 CU |
456 | static int dp_display_usbpd_configure_cb(struct device *dev) |
457 | { | |
d624e50a | 458 | struct dp_display_private *dp = dev_get_dp_display_private(dev); |
c943b494 | 459 | |
989ebe7b | 460 | dp_display_host_phy_init(dp); |
c943b494 | 461 | |
d624e50a | 462 | return dp_display_process_hpd_high(dp); |
c943b494 CU |
463 | } |
464 | ||
375a1260 | 465 | static int dp_display_notify_disconnect(struct device *dev) |
c943b494 | 466 | { |
d624e50a | 467 | struct dp_display_private *dp = dev_get_dp_display_private(dev); |
c943b494 | 468 | |
8ede2ecc | 469 | dp_add_event(dp, EV_USER_NOTIFICATION, false, 0); |
c943b494 | 470 | |
7620bdfb | 471 | return 0; |
c943b494 CU |
472 | } |
473 | ||
474 | static void dp_display_handle_video_request(struct dp_display_private *dp) | |
475 | { | |
476 | if (dp->link->sink_request & DP_TEST_LINK_VIDEO_PATTERN) { | |
c943b494 | 477 | dp->panel->video_test = true; |
c943b494 CU |
478 | dp_link_send_test_response(dp->link); |
479 | } | |
480 | } | |
481 | ||
c58eb1b5 | 482 | static int dp_display_handle_port_ststus_changed(struct dp_display_private *dp) |
c943b494 | 483 | { |
c58eb1b5 | 484 | int rc = 0; |
c943b494 | 485 | |
cc2e4923 | 486 | if (drm_dp_is_branch(dp->panel->dpcd) && dp->link->sink_count == 0) { |
202aceac | 487 | drm_dbg_dp(dp->drm_dev, "sink count is zero, nothing to do\n"); |
c58eb1b5 KH |
488 | if (dp->hpd_state != ST_DISCONNECTED) { |
489 | dp->hpd_state = ST_DISCONNECT_PENDING; | |
490 | dp_add_event(dp, EV_USER_NOTIFICATION, false, 0); | |
491 | } | |
492 | } else { | |
493 | if (dp->hpd_state == ST_DISCONNECTED) { | |
375a1260 | 494 | dp->hpd_state = ST_MAINLINK_READY; |
c58eb1b5 KH |
495 | rc = dp_display_process_hpd_high(dp); |
496 | if (rc) | |
497 | dp->hpd_state = ST_DISCONNECTED; | |
c943b494 | 498 | } |
c58eb1b5 KH |
499 | } |
500 | ||
501 | return rc; | |
502 | } | |
503 | ||
504 | static int dp_display_handle_irq_hpd(struct dp_display_private *dp) | |
505 | { | |
506 | u32 sink_request = dp->link->sink_request; | |
c943b494 | 507 | |
202aceac | 508 | drm_dbg_dp(dp->drm_dev, "%d\n", sink_request); |
c58eb1b5 KH |
509 | if (dp->hpd_state == ST_DISCONNECTED) { |
510 | if (sink_request & DP_LINK_STATUS_UPDATED) { | |
202aceac KH |
511 | drm_dbg_dp(dp->drm_dev, "Disconnected sink_request: %d\n", |
512 | sink_request); | |
c58eb1b5 KH |
513 | DRM_ERROR("Disconnected, no DP_LINK_STATUS_UPDATED\n"); |
514 | return -EINVAL; | |
515 | } | |
c943b494 CU |
516 | } |
517 | ||
518 | dp_ctrl_handle_sink_request(dp->ctrl); | |
519 | ||
c58eb1b5 | 520 | if (sink_request & DP_TEST_LINK_VIDEO_PATTERN) |
8ede2ecc | 521 | dp_display_handle_video_request(dp); |
c943b494 CU |
522 | |
523 | return 0; | |
524 | } | |
525 | ||
526 | static int dp_display_usbpd_attention_cb(struct device *dev) | |
527 | { | |
528 | int rc = 0; | |
26b8d66a | 529 | u32 sink_request; |
d624e50a | 530 | struct dp_display_private *dp = dev_get_dp_display_private(dev); |
c943b494 | 531 | |
8ede2ecc KH |
532 | /* check for any test request issued by sink */ |
533 | rc = dp_link_process_request(dp->link); | |
26b8d66a KH |
534 | if (!rc) { |
535 | sink_request = dp->link->sink_request; | |
202aceac KH |
536 | drm_dbg_dp(dp->drm_dev, "hpd_state=%d sink_request=%d\n", |
537 | dp->hpd_state, sink_request); | |
c58eb1b5 KH |
538 | if (sink_request & DS_PORT_STATUS_CHANGED) |
539 | rc = dp_display_handle_port_ststus_changed(dp); | |
540 | else | |
541 | rc = dp_display_handle_irq_hpd(dp); | |
26b8d66a | 542 | } |
c943b494 | 543 | |
8ede2ecc KH |
544 | return rc; |
545 | } | |
c943b494 | 546 | |
8ede2ecc KH |
547 | static int dp_hpd_plug_handle(struct dp_display_private *dp, u32 data) |
548 | { | |
8ede2ecc | 549 | u32 state; |
8ede2ecc | 550 | int ret; |
5814b8bf | 551 | struct platform_device *pdev = dp->dp_display.pdev; |
8ede2ecc | 552 | |
8ede2ecc KH |
553 | mutex_lock(&dp->event_mutex); |
554 | ||
19e52bcb | 555 | state = dp->hpd_state; |
202aceac | 556 | drm_dbg_dp(dp->drm_dev, "Before, type=%d hpd_state=%d\n", |
78fc35c5 KH |
557 | dp->dp_display.connector_type, state); |
558 | ||
5814b8bf | 559 | if (state == ST_DISPLAY_OFF) { |
8ede2ecc KH |
560 | mutex_unlock(&dp->event_mutex); |
561 | return 0; | |
c943b494 CU |
562 | } |
563 | ||
375a1260 | 564 | if (state == ST_MAINLINK_READY || state == ST_CONNECTED) { |
8ede2ecc KH |
565 | mutex_unlock(&dp->event_mutex); |
566 | return 0; | |
c943b494 CU |
567 | } |
568 | ||
8ede2ecc KH |
569 | if (state == ST_DISCONNECT_PENDING) { |
570 | /* wait until ST_DISCONNECTED */ | |
571 | dp_add_event(dp, EV_HPD_PLUG_INT, 0, 1); /* delay = 1 */ | |
572 | mutex_unlock(&dp->event_mutex); | |
573 | return 0; | |
574 | } | |
575 | ||
5814b8bf KH |
576 | ret = pm_runtime_resume_and_get(&pdev->dev); |
577 | if (ret) { | |
578 | DRM_ERROR("failed to pm_runtime_resume\n"); | |
801207c1 | 579 | mutex_unlock(&dp->event_mutex); |
5814b8bf KH |
580 | return ret; |
581 | } | |
582 | ||
583 | ret = dp_display_usbpd_configure_cb(&pdev->dev); | |
62671d2e | 584 | if (ret) { /* link train failed */ |
19e52bcb | 585 | dp->hpd_state = ST_DISCONNECTED; |
62671d2e | 586 | } else { |
375a1260 | 587 | dp->hpd_state = ST_MAINLINK_READY; |
8ede2ecc KH |
588 | } |
589 | ||
202aceac | 590 | drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n", |
78fc35c5 | 591 | dp->dp_display.connector_type, state); |
8ede2ecc KH |
592 | mutex_unlock(&dp->event_mutex); |
593 | ||
594 | /* uevent will complete connection part */ | |
595 | return 0; | |
596 | }; | |
597 | ||
bf4a1b31 AK |
598 | static void dp_display_handle_plugged_change(struct msm_dp *dp_display, |
599 | bool plugged) | |
600 | { | |
e8c76581 AK |
601 | struct dp_display_private *dp; |
602 | ||
603 | dp = container_of(dp_display, | |
604 | struct dp_display_private, dp_display); | |
605 | ||
606 | /* notify audio subsystem only if sink supports audio */ | |
607 | if (dp_display->plugged_cb && dp_display->codec_dev && | |
608 | dp->audio_supported) | |
bf4a1b31 AK |
609 | dp_display->plugged_cb(dp_display->codec_dev, plugged); |
610 | } | |
611 | ||
8ede2ecc KH |
612 | static int dp_hpd_unplug_handle(struct dp_display_private *dp, u32 data) |
613 | { | |
8ede2ecc | 614 | u32 state; |
5814b8bf | 615 | struct platform_device *pdev = dp->dp_display.pdev; |
8ede2ecc | 616 | |
8ede2ecc KH |
617 | mutex_lock(&dp->event_mutex); |
618 | ||
19e52bcb | 619 | state = dp->hpd_state; |
f21c8a27 | 620 | |
202aceac | 621 | drm_dbg_dp(dp->drm_dev, "Before, type=%d hpd_state=%d\n", |
78fc35c5 KH |
622 | dp->dp_display.connector_type, state); |
623 | ||
f21c8a27 KH |
624 | /* unplugged, no more irq_hpd handle */ |
625 | dp_del_event(dp, EV_IRQ_HPD_INT); | |
626 | ||
627 | if (state == ST_DISCONNECTED) { | |
628 | /* triggered by irq_hdp with sink_count = 0 */ | |
629 | if (dp->link->sink_count == 0) { | |
989ebe7b | 630 | dp_display_host_phy_exit(dp); |
f21c8a27 | 631 | } |
b8ec1e7f | 632 | dp_display_notify_disconnect(&dp->dp_display.pdev->dev); |
f21c8a27 KH |
633 | mutex_unlock(&dp->event_mutex); |
634 | return 0; | |
375a1260 | 635 | } else if (state == ST_DISCONNECT_PENDING) { |
8ede2ecc KH |
636 | mutex_unlock(&dp->event_mutex); |
637 | return 0; | |
375a1260 KH |
638 | } else if (state == ST_MAINLINK_READY) { |
639 | dp_ctrl_off_link(dp->ctrl); | |
640 | dp_display_host_phy_exit(dp); | |
641 | dp->hpd_state = ST_DISCONNECTED; | |
b8ec1e7f | 642 | dp_display_notify_disconnect(&dp->dp_display.pdev->dev); |
8ede2ecc KH |
643 | mutex_unlock(&dp->event_mutex); |
644 | return 0; | |
645 | } | |
646 | ||
8ede2ecc KH |
647 | /* |
648 | * We don't need separate work for disconnect as | |
649 | * connect/attention interrupts are disabled | |
650 | */ | |
b8ec1e7f | 651 | dp_display_notify_disconnect(&dp->dp_display.pdev->dev); |
8ede2ecc | 652 | |
375a1260 KH |
653 | if (state == ST_DISPLAY_OFF) { |
654 | dp->hpd_state = ST_DISCONNECTED; | |
655 | } else { | |
656 | dp->hpd_state = ST_DISCONNECT_PENDING; | |
657 | } | |
8ede2ecc | 658 | |
bf4a1b31 | 659 | /* signal the disconnect event early to ensure proper teardown */ |
d624e50a | 660 | dp_display_handle_plugged_change(&dp->dp_display, false); |
bf4a1b31 | 661 | |
202aceac | 662 | drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n", |
78fc35c5 KH |
663 | dp->dp_display.connector_type, state); |
664 | ||
8ede2ecc | 665 | /* uevent will complete disconnection part */ |
5814b8bf | 666 | pm_runtime_put_sync(&pdev->dev); |
8ede2ecc KH |
667 | mutex_unlock(&dp->event_mutex); |
668 | return 0; | |
669 | } | |
670 | ||
8ede2ecc KH |
671 | static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data) |
672 | { | |
673 | u32 state; | |
674 | ||
675 | mutex_lock(&dp->event_mutex); | |
676 | ||
677 | /* irq_hpd can happen at either connected or disconnected state */ | |
19e52bcb | 678 | state = dp->hpd_state; |
202aceac | 679 | drm_dbg_dp(dp->drm_dev, "Before, type=%d hpd_state=%d\n", |
78fc35c5 KH |
680 | dp->dp_display.connector_type, state); |
681 | ||
5814b8bf | 682 | if (state == ST_DISPLAY_OFF) { |
8ede2ecc KH |
683 | mutex_unlock(&dp->event_mutex); |
684 | return 0; | |
685 | } | |
686 | ||
375a1260 | 687 | if (state == ST_MAINLINK_READY || state == ST_DISCONNECT_PENDING) { |
9fc41843 KH |
688 | /* wait until ST_CONNECTED */ |
689 | dp_add_event(dp, EV_IRQ_HPD_INT, 0, 1); /* delay = 1 */ | |
690 | mutex_unlock(&dp->event_mutex); | |
691 | return 0; | |
692 | } | |
693 | ||
b8ec1e7f | 694 | dp_display_usbpd_attention_cb(&dp->dp_display.pdev->dev); |
989ebe7b | 695 | |
202aceac | 696 | drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n", |
78fc35c5 | 697 | dp->dp_display.connector_type, state); |
8ede2ecc KH |
698 | |
699 | mutex_unlock(&dp->event_mutex); | |
700 | ||
701 | return 0; | |
c943b494 CU |
702 | } |
703 | ||
704 | static void dp_display_deinit_sub_modules(struct dp_display_private *dp) | |
705 | { | |
12e5eab9 | 706 | dp_audio_put(dp->audio); |
c943b494 CU |
707 | dp_panel_put(dp->panel); |
708 | dp_aux_put(dp->aux); | |
709 | } | |
710 | ||
711 | static int dp_init_sub_modules(struct dp_display_private *dp) | |
712 | { | |
713 | int rc = 0; | |
b8ec1e7f | 714 | struct device *dev = &dp->dp_display.pdev->dev; |
c943b494 CU |
715 | struct dp_panel_in panel_in = { |
716 | .dev = dev, | |
717 | }; | |
718 | ||
b8ec1e7f | 719 | dp->parser = dp_parser_get(dp->dp_display.pdev); |
c943b494 CU |
720 | if (IS_ERR(dp->parser)) { |
721 | rc = PTR_ERR(dp->parser); | |
722 | DRM_ERROR("failed to initialize parser, rc = %d\n", rc); | |
723 | dp->parser = NULL; | |
724 | goto error; | |
725 | } | |
726 | ||
727 | dp->catalog = dp_catalog_get(dev, &dp->parser->io); | |
728 | if (IS_ERR(dp->catalog)) { | |
729 | rc = PTR_ERR(dp->catalog); | |
730 | DRM_ERROR("failed to initialize catalog, rc = %d\n", rc); | |
731 | dp->catalog = NULL; | |
732 | goto error; | |
733 | } | |
734 | ||
ab387647 | 735 | dp->power = dp_power_get(dev, dp->parser); |
c943b494 CU |
736 | if (IS_ERR(dp->power)) { |
737 | rc = PTR_ERR(dp->power); | |
738 | DRM_ERROR("failed to initialize power, rc = %d\n", rc); | |
739 | dp->power = NULL; | |
740 | goto error; | |
741 | } | |
742 | ||
86d56a77 | 743 | dp->aux = dp_aux_get(dev, dp->catalog, dp->dp_display.is_edp); |
c943b494 CU |
744 | if (IS_ERR(dp->aux)) { |
745 | rc = PTR_ERR(dp->aux); | |
746 | DRM_ERROR("failed to initialize aux, rc = %d\n", rc); | |
747 | dp->aux = NULL; | |
748 | goto error; | |
749 | } | |
750 | ||
751 | dp->link = dp_link_get(dev, dp->aux); | |
752 | if (IS_ERR(dp->link)) { | |
753 | rc = PTR_ERR(dp->link); | |
754 | DRM_ERROR("failed to initialize link, rc = %d\n", rc); | |
755 | dp->link = NULL; | |
756 | goto error_link; | |
757 | } | |
758 | ||
759 | panel_in.aux = dp->aux; | |
760 | panel_in.catalog = dp->catalog; | |
761 | panel_in.link = dp->link; | |
762 | ||
763 | dp->panel = dp_panel_get(&panel_in); | |
764 | if (IS_ERR(dp->panel)) { | |
765 | rc = PTR_ERR(dp->panel); | |
766 | DRM_ERROR("failed to initialize panel, rc = %d\n", rc); | |
767 | dp->panel = NULL; | |
768 | goto error_link; | |
769 | } | |
770 | ||
771 | dp->ctrl = dp_ctrl_get(dev, dp->link, dp->panel, dp->aux, | |
772 | dp->power, dp->catalog, dp->parser); | |
773 | if (IS_ERR(dp->ctrl)) { | |
774 | rc = PTR_ERR(dp->ctrl); | |
775 | DRM_ERROR("failed to initialize ctrl, rc = %d\n", rc); | |
776 | dp->ctrl = NULL; | |
777 | goto error_ctrl; | |
778 | } | |
779 | ||
b8ec1e7f | 780 | dp->audio = dp_audio_get(dp->dp_display.pdev, dp->panel, dp->catalog); |
d13e36d7 AK |
781 | if (IS_ERR(dp->audio)) { |
782 | rc = PTR_ERR(dp->audio); | |
783 | pr_err("failed to initialize audio, rc = %d\n", rc); | |
784 | dp->audio = NULL; | |
11120e93 | 785 | goto error_ctrl; |
d13e36d7 AK |
786 | } |
787 | ||
757a2f36 KH |
788 | /* populate wide_bus_en to differernt layers */ |
789 | dp->ctrl->wide_bus_en = dp->wide_bus_en; | |
790 | dp->catalog->wide_bus_en = dp->wide_bus_en; | |
791 | ||
c943b494 | 792 | return rc; |
d13e36d7 | 793 | |
c943b494 CU |
794 | error_ctrl: |
795 | dp_panel_put(dp->panel); | |
796 | error_link: | |
797 | dp_aux_put(dp->aux); | |
798 | error: | |
799 | return rc; | |
800 | } | |
801 | ||
802 | static int dp_display_set_mode(struct msm_dp *dp_display, | |
803 | struct dp_display_mode *mode) | |
804 | { | |
805 | struct dp_display_private *dp; | |
806 | ||
807 | dp = container_of(dp_display, struct dp_display_private, dp_display); | |
808 | ||
b2a1c5ca | 809 | drm_mode_copy(&dp->panel->dp_mode.drm_mode, &mode->drm_mode); |
c943b494 CU |
810 | dp->panel->dp_mode.bpp = mode->bpp; |
811 | dp->panel->dp_mode.capabilities = mode->capabilities; | |
812 | dp_panel_init_panel_info(dp->panel); | |
813 | return 0; | |
814 | } | |
815 | ||
786a4f66 | 816 | static int dp_display_enable(struct dp_display_private *dp, bool force_link_train) |
c943b494 CU |
817 | { |
818 | int rc = 0; | |
d624e50a | 819 | struct msm_dp *dp_display = &dp->dp_display; |
158b9aa7 | 820 | |
202aceac | 821 | drm_dbg_dp(dp->drm_dev, "sink_count=%d\n", dp->link->sink_count); |
231a04fc | 822 | if (dp_display->power_on) { |
202aceac | 823 | drm_dbg_dp(dp->drm_dev, "Link already setup, return\n"); |
231a04fc KH |
824 | return 0; |
825 | } | |
826 | ||
786a4f66 | 827 | rc = dp_ctrl_on_stream(dp->ctrl, force_link_train); |
c943b494 | 828 | if (!rc) |
158b9aa7 | 829 | dp_display->power_on = true; |
c943b494 | 830 | |
c943b494 CU |
831 | return rc; |
832 | } | |
833 | ||
834 | static int dp_display_post_enable(struct msm_dp *dp_display) | |
835 | { | |
d13e36d7 AK |
836 | struct dp_display_private *dp; |
837 | u32 rate; | |
838 | ||
839 | dp = container_of(dp_display, struct dp_display_private, dp_display); | |
840 | ||
841 | rate = dp->link->link_params.rate; | |
842 | ||
843 | if (dp->audio_supported) { | |
844 | dp->audio->bw_code = drm_dp_link_rate_to_bw_code(rate); | |
845 | dp->audio->lane_count = dp->link->link_params.num_lanes; | |
846 | } | |
847 | ||
a1f5bda9 AK |
848 | /* signal the connect event late to synchronize video and display */ |
849 | dp_display_handle_plugged_change(dp_display, true); | |
cd779808 VP |
850 | |
851 | if (dp_display->psr_supported) | |
852 | dp_ctrl_config_psr(dp->ctrl); | |
853 | ||
c943b494 CU |
854 | return 0; |
855 | } | |
856 | ||
ff46c2c4 | 857 | static int dp_display_disable(struct dp_display_private *dp) |
c943b494 | 858 | { |
d624e50a | 859 | struct msm_dp *dp_display = &dp->dp_display; |
158b9aa7 | 860 | |
231a04fc KH |
861 | if (!dp_display->power_on) |
862 | return 0; | |
863 | ||
158b9aa7 AK |
864 | /* wait only if audio was enabled */ |
865 | if (dp_display->audio_enabled) { | |
c703d578 | 866 | /* signal the disconnect event */ |
c703d578 | 867 | dp_display_handle_plugged_change(dp_display, false); |
158b9aa7 AK |
868 | if (!wait_for_completion_timeout(&dp->audio_comp, |
869 | HZ * 5)) | |
870 | DRM_ERROR("audio comp timeout\n"); | |
871 | } | |
872 | ||
873 | dp_display->audio_enabled = false; | |
874 | ||
f21c8a27 | 875 | if (dp->link->sink_count == 0) { |
989ebe7b KH |
876 | /* |
877 | * irq_hpd with sink_count = 0 | |
878 | * hdmi unplugged out of dongle | |
879 | */ | |
f21c8a27 KH |
880 | dp_ctrl_off_link_stream(dp->ctrl); |
881 | } else { | |
989ebe7b KH |
882 | /* |
883 | * unplugged interrupt | |
884 | * dongle unplugged out of DUT | |
885 | */ | |
f21c8a27 | 886 | dp_ctrl_off(dp->ctrl); |
989ebe7b | 887 | dp_display_host_phy_exit(dp); |
f21c8a27 | 888 | } |
c943b494 | 889 | |
158b9aa7 | 890 | dp_display->power_on = false; |
c943b494 | 891 | |
202aceac | 892 | drm_dbg_dp(dp->drm_dev, "sink count: %d\n", dp->link->sink_count); |
c943b494 CU |
893 | return 0; |
894 | } | |
895 | ||
a1f5bda9 AK |
896 | int dp_display_set_plugged_cb(struct msm_dp *dp_display, |
897 | hdmi_codec_plugged_cb fn, struct device *codec_dev) | |
898 | { | |
899 | bool plugged; | |
900 | ||
901 | dp_display->plugged_cb = fn; | |
902 | dp_display->codec_dev = codec_dev; | |
aa113120 | 903 | plugged = dp_display->link_ready; |
a1f5bda9 AK |
904 | dp_display_handle_plugged_change(dp_display, plugged); |
905 | ||
906 | return 0; | |
907 | } | |
908 | ||
13ea4799 DB |
909 | /** |
910 | * dp_bridge_mode_valid - callback to determine if specified mode is valid | |
911 | * @bridge: Pointer to drm bridge structure | |
912 | * @info: display info | |
913 | * @mode: Pointer to drm mode structure | |
914 | * Returns: Validity status for specified mode | |
915 | */ | |
916 | enum drm_mode_status dp_bridge_mode_valid(struct drm_bridge *bridge, | |
917 | const struct drm_display_info *info, | |
918 | const struct drm_display_mode *mode) | |
c943b494 CU |
919 | { |
920 | const u32 num_components = 3, default_bpp = 24; | |
921 | struct dp_display_private *dp_display; | |
922 | struct dp_link_info *link_info; | |
923 | u32 mode_rate_khz = 0, supported_rate_khz = 0, mode_bpp = 0; | |
13ea4799 DB |
924 | struct msm_dp *dp; |
925 | int mode_pclk_khz = mode->clock; | |
926 | ||
927 | dp = to_dp_bridge(bridge)->dp_display; | |
c943b494 CU |
928 | |
929 | if (!dp || !mode_pclk_khz || !dp->connector) { | |
930 | DRM_ERROR("invalid params\n"); | |
931 | return -EINVAL; | |
932 | } | |
933 | ||
13b73e1f | 934 | if (mode->clock > DP_MAX_PIXEL_CLK_KHZ) |
3bcecf2b | 935 | return MODE_CLOCK_HIGH; |
13ea4799 | 936 | |
c943b494 CU |
937 | dp_display = container_of(dp, struct dp_display_private, dp_display); |
938 | link_info = &dp_display->panel->link_info; | |
939 | ||
940 | mode_bpp = dp->connector->display_info.bpc * num_components; | |
941 | if (!mode_bpp) | |
942 | mode_bpp = default_bpp; | |
943 | ||
944 | mode_bpp = dp_panel_get_mode_bpp(dp_display->panel, | |
945 | mode_bpp, mode_pclk_khz); | |
946 | ||
947 | mode_rate_khz = mode_pclk_khz * mode_bpp; | |
948 | supported_rate_khz = link_info->num_lanes * link_info->rate * 8; | |
949 | ||
950 | if (mode_rate_khz > supported_rate_khz) | |
951 | return MODE_BAD; | |
952 | ||
953 | return MODE_OK; | |
954 | } | |
955 | ||
a52bfaf6 | 956 | int dp_display_get_modes(struct msm_dp *dp) |
c943b494 CU |
957 | { |
958 | struct dp_display_private *dp_display; | |
c943b494 CU |
959 | |
960 | if (!dp) { | |
961 | DRM_ERROR("invalid params\n"); | |
962 | return 0; | |
963 | } | |
964 | ||
965 | dp_display = container_of(dp, struct dp_display_private, dp_display); | |
966 | ||
a52bfaf6 | 967 | return dp_panel_get_modes(dp_display->panel, |
ac31f338 | 968 | dp->connector); |
c943b494 CU |
969 | } |
970 | ||
971 | bool dp_display_check_video_test(struct msm_dp *dp) | |
972 | { | |
973 | struct dp_display_private *dp_display; | |
974 | ||
975 | dp_display = container_of(dp, struct dp_display_private, dp_display); | |
976 | ||
977 | return dp_display->panel->video_test; | |
978 | } | |
979 | ||
980 | int dp_display_get_test_bpp(struct msm_dp *dp) | |
981 | { | |
982 | struct dp_display_private *dp_display; | |
983 | ||
984 | if (!dp) { | |
985 | DRM_ERROR("invalid params\n"); | |
986 | return 0; | |
987 | } | |
988 | ||
989 | dp_display = container_of(dp, struct dp_display_private, dp_display); | |
990 | ||
991 | return dp_link_bit_depth_to_bpp( | |
992 | dp_display->link->test_video.test_bit_depth); | |
993 | } | |
994 | ||
eb9d6c7e | 995 | void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp) |
0f6090f3 AK |
996 | { |
997 | struct dp_display_private *dp_display; | |
0f6090f3 AK |
998 | |
999 | dp_display = container_of(dp, struct dp_display_private, dp_display); | |
0f6090f3 AK |
1000 | |
1001 | /* | |
1002 | * if we are reading registers we need the link clocks to be on | |
1003 | * however till DP cable is connected this will not happen as we | |
1004 | * do not know the resolution to power up with. Hence check the | |
1005 | * power_on status before dumping DP registers to avoid crash due | |
1006 | * to unclocked access | |
1007 | */ | |
1008 | mutex_lock(&dp_display->event_mutex); | |
1009 | ||
1010 | if (!dp->power_on) { | |
1011 | mutex_unlock(&dp_display->event_mutex); | |
1012 | return; | |
1013 | } | |
1014 | ||
1015 | dp_catalog_snapshot(dp_display->catalog, disp_state); | |
1016 | ||
1017 | mutex_unlock(&dp_display->event_mutex); | |
1018 | } | |
1019 | ||
cd779808 VP |
1020 | void dp_display_set_psr(struct msm_dp *dp_display, bool enter) |
1021 | { | |
1022 | struct dp_display_private *dp; | |
1023 | ||
1024 | if (!dp_display) { | |
1025 | DRM_ERROR("invalid params\n"); | |
1026 | return; | |
1027 | } | |
1028 | ||
1029 | dp = container_of(dp_display, struct dp_display_private, dp_display); | |
1030 | dp_ctrl_set_psr(dp->ctrl, enter); | |
1031 | } | |
1032 | ||
8ede2ecc KH |
1033 | static int hpd_event_thread(void *data) |
1034 | { | |
1035 | struct dp_display_private *dp_priv; | |
1036 | unsigned long flag; | |
1037 | struct dp_event *todo; | |
1038 | int timeout_mode = 0; | |
1039 | ||
1040 | dp_priv = (struct dp_display_private *)data; | |
1041 | ||
1042 | while (1) { | |
1043 | if (timeout_mode) { | |
1044 | wait_event_timeout(dp_priv->event_q, | |
2f9b5b3a KH |
1045 | (dp_priv->event_pndx == dp_priv->event_gndx) || |
1046 | kthread_should_stop(), EVENT_TIMEOUT); | |
8ede2ecc | 1047 | } else { |
710a040a | 1048 | wait_event_interruptible(dp_priv->event_q, |
2f9b5b3a KH |
1049 | (dp_priv->event_pndx != dp_priv->event_gndx) || |
1050 | kthread_should_stop()); | |
8ede2ecc | 1051 | } |
2f9b5b3a KH |
1052 | |
1053 | if (kthread_should_stop()) | |
1054 | break; | |
1055 | ||
8ede2ecc KH |
1056 | spin_lock_irqsave(&dp_priv->event_lock, flag); |
1057 | todo = &dp_priv->event_list[dp_priv->event_gndx]; | |
1058 | if (todo->delay) { | |
1059 | struct dp_event *todo_next; | |
1060 | ||
1061 | dp_priv->event_gndx++; | |
1062 | dp_priv->event_gndx %= DP_EVENT_Q_MAX; | |
1063 | ||
1064 | /* re enter delay event into q */ | |
1065 | todo_next = &dp_priv->event_list[dp_priv->event_pndx++]; | |
1066 | dp_priv->event_pndx %= DP_EVENT_Q_MAX; | |
1067 | todo_next->event_id = todo->event_id; | |
1068 | todo_next->data = todo->data; | |
1069 | todo_next->delay = todo->delay - 1; | |
1070 | ||
1071 | /* clean up older event */ | |
1072 | todo->event_id = EV_NO_EVENT; | |
1073 | todo->delay = 0; | |
1074 | ||
1075 | /* switch to timeout mode */ | |
1076 | timeout_mode = 1; | |
1077 | spin_unlock_irqrestore(&dp_priv->event_lock, flag); | |
1078 | continue; | |
1079 | } | |
1080 | ||
1081 | /* timeout with no events in q */ | |
1082 | if (dp_priv->event_pndx == dp_priv->event_gndx) { | |
1083 | spin_unlock_irqrestore(&dp_priv->event_lock, flag); | |
1084 | continue; | |
1085 | } | |
1086 | ||
1087 | dp_priv->event_gndx++; | |
1088 | dp_priv->event_gndx %= DP_EVENT_Q_MAX; | |
1089 | timeout_mode = 0; | |
1090 | spin_unlock_irqrestore(&dp_priv->event_lock, flag); | |
1091 | ||
1092 | switch (todo->event_id) { | |
8ede2ecc KH |
1093 | case EV_HPD_PLUG_INT: |
1094 | dp_hpd_plug_handle(dp_priv, todo->data); | |
1095 | break; | |
1096 | case EV_HPD_UNPLUG_INT: | |
1097 | dp_hpd_unplug_handle(dp_priv, todo->data); | |
1098 | break; | |
1099 | case EV_IRQ_HPD_INT: | |
1100 | dp_irq_hpd_handle(dp_priv, todo->data); | |
1101 | break; | |
8ede2ecc KH |
1102 | case EV_USER_NOTIFICATION: |
1103 | dp_display_send_hpd_notification(dp_priv, | |
1104 | todo->data); | |
1105 | break; | |
8ede2ecc KH |
1106 | default: |
1107 | break; | |
1108 | } | |
1109 | } | |
1110 | ||
1111 | return 0; | |
1112 | } | |
1113 | ||
570d3e5d | 1114 | static int dp_hpd_event_thread_start(struct dp_display_private *dp_priv) |
8ede2ecc | 1115 | { |
570d3e5d KH |
1116 | /* set event q to empty */ |
1117 | dp_priv->event_gndx = 0; | |
1118 | dp_priv->event_pndx = 0; | |
8ede2ecc | 1119 | |
570d3e5d KH |
1120 | dp_priv->ev_tsk = kthread_run(hpd_event_thread, dp_priv, "dp_hpd_handler"); |
1121 | if (IS_ERR(dp_priv->ev_tsk)) | |
1122 | return PTR_ERR(dp_priv->ev_tsk); | |
8ede2ecc | 1123 | |
570d3e5d | 1124 | return 0; |
8ede2ecc KH |
1125 | } |
1126 | ||
1127 | static irqreturn_t dp_display_irq_handler(int irq, void *dev_id) | |
1128 | { | |
1129 | struct dp_display_private *dp = dev_id; | |
bfc12020 | 1130 | irqreturn_t ret = IRQ_NONE; |
8ede2ecc KH |
1131 | u32 hpd_isr_status; |
1132 | ||
1133 | if (!dp) { | |
1134 | DRM_ERROR("invalid data\n"); | |
1135 | return IRQ_NONE; | |
1136 | } | |
1137 | ||
1138 | hpd_isr_status = dp_catalog_hpd_get_intr_status(dp->catalog); | |
1139 | ||
1140 | if (hpd_isr_status & 0x0F) { | |
202aceac | 1141 | drm_dbg_dp(dp->drm_dev, "type=%d isr=0x%x\n", |
78fc35c5 | 1142 | dp->dp_display.connector_type, hpd_isr_status); |
8ede2ecc | 1143 | /* hpd related interrupts */ |
7e10bf42 | 1144 | if (hpd_isr_status & DP_DP_HPD_PLUG_INT_MASK) |
8ede2ecc | 1145 | dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0); |
8ede2ecc KH |
1146 | |
1147 | if (hpd_isr_status & DP_DP_IRQ_HPD_INT_MASK) { | |
8ede2ecc KH |
1148 | dp_add_event(dp, EV_IRQ_HPD_INT, 0, 0); |
1149 | } | |
1150 | ||
7e10bf42 KH |
1151 | if (hpd_isr_status & DP_DP_HPD_REPLUG_INT_MASK) { |
1152 | dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); | |
1153 | dp_add_event(dp, EV_HPD_PLUG_INT, 0, 3); | |
1154 | } | |
8ede2ecc KH |
1155 | |
1156 | if (hpd_isr_status & DP_DP_HPD_UNPLUG_INT_MASK) | |
1157 | dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); | |
bfc12020 DA |
1158 | |
1159 | ret = IRQ_HANDLED; | |
8ede2ecc KH |
1160 | } |
1161 | ||
1162 | /* DP controller isr */ | |
bfc12020 | 1163 | ret |= dp_ctrl_isr(dp->ctrl); |
8ede2ecc KH |
1164 | |
1165 | /* DP aux isr */ | |
bfc12020 | 1166 | ret |= dp_aux_isr(dp->aux); |
8ede2ecc KH |
1167 | |
1168 | return ret; | |
1169 | } | |
1170 | ||
82c2a575 | 1171 | static int dp_display_request_irq(struct dp_display_private *dp) |
8ede2ecc KH |
1172 | { |
1173 | int rc = 0; | |
82c2a575 | 1174 | struct platform_device *pdev = dp->dp_display.pdev; |
8ede2ecc | 1175 | |
82c2a575 | 1176 | dp->irq = platform_get_irq(pdev, 0); |
c4ac0c6c | 1177 | if (dp->irq < 0) { |
e92d0d93 | 1178 | DRM_ERROR("failed to get irq\n"); |
c4ac0c6c | 1179 | return dp->irq; |
8ede2ecc KH |
1180 | } |
1181 | ||
82c2a575 | 1182 | rc = devm_request_irq(&pdev->dev, dp->irq, dp_display_irq_handler, |
5814b8bf KH |
1183 | IRQF_TRIGGER_HIGH|IRQF_NO_AUTOEN, |
1184 | "dp_display_isr", dp); | |
1185 | ||
8ede2ecc KH |
1186 | if (rc < 0) { |
1187 | DRM_ERROR("failed to request IRQ%u: %d\n", | |
1188 | dp->irq, rc); | |
1189 | return rc; | |
1190 | } | |
8ede2ecc KH |
1191 | |
1192 | return 0; | |
1193 | } | |
1194 | ||
5d417b40 | 1195 | static const struct msm_dp_desc *dp_display_get_desc(struct platform_device *pdev) |
269e92d8 | 1196 | { |
5d417b40 | 1197 | const struct msm_dp_desc *descs = of_device_get_match_data(&pdev->dev); |
269e92d8 BA |
1198 | struct resource *res; |
1199 | int i; | |
1200 | ||
1201 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
1202 | if (!res) | |
1203 | return NULL; | |
1204 | ||
5d417b40 BA |
1205 | for (i = 0; i < descs[i].io_start; i++) { |
1206 | if (descs[i].io_start == res->start) | |
1207 | return &descs[i]; | |
bb3de286 | 1208 | } |
269e92d8 BA |
1209 | |
1210 | dev_err(&pdev->dev, "unknown displayport instance\n"); | |
1211 | return NULL; | |
1212 | } | |
1213 | ||
d4ca26ac DB |
1214 | static int dp_display_get_next_bridge(struct msm_dp *dp); |
1215 | ||
1216 | static int dp_display_probe_tail(struct device *dev) | |
e2969ee3 | 1217 | { |
d4ca26ac DB |
1218 | struct msm_dp *dp = dev_get_drvdata(dev); |
1219 | int ret; | |
e2969ee3 | 1220 | |
d4ca26ac DB |
1221 | ret = dp_display_get_next_bridge(dp); |
1222 | if (ret) | |
1223 | return ret; | |
e2969ee3 | 1224 | |
d4ca26ac DB |
1225 | ret = component_add(dev, &dp_display_comp_ops); |
1226 | if (ret) | |
1227 | DRM_ERROR("component add failed, rc=%d\n", ret); | |
1228 | ||
1229 | return ret; | |
1230 | } | |
1231 | ||
1232 | static int dp_auxbus_done_probe(struct drm_dp_aux *aux) | |
1233 | { | |
1234 | return dp_display_probe_tail(aux->dev); | |
e2969ee3 KH |
1235 | } |
1236 | ||
c943b494 CU |
1237 | static int dp_display_probe(struct platform_device *pdev) |
1238 | { | |
1239 | int rc = 0; | |
1240 | struct dp_display_private *dp; | |
269e92d8 | 1241 | const struct msm_dp_desc *desc; |
c943b494 CU |
1242 | |
1243 | if (!pdev || !pdev->dev.of_node) { | |
1244 | DRM_ERROR("pdev not found\n"); | |
1245 | return -ENODEV; | |
1246 | } | |
1247 | ||
1248 | dp = devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL); | |
1249 | if (!dp) | |
1250 | return -ENOMEM; | |
1251 | ||
5d417b40 | 1252 | desc = dp_display_get_desc(pdev); |
269e92d8 BA |
1253 | if (!desc) |
1254 | return -EINVAL; | |
1255 | ||
b8ec1e7f | 1256 | dp->dp_display.pdev = pdev; |
c943b494 | 1257 | dp->name = "drm_dp"; |
5d417b40 | 1258 | dp->id = desc->id; |
269e92d8 | 1259 | dp->dp_display.connector_type = desc->connector_type; |
757a2f36 | 1260 | dp->wide_bus_en = desc->wide_bus_en; |
c3bf8e21 SB |
1261 | dp->dp_display.is_edp = |
1262 | (dp->dp_display.connector_type == DRM_MODE_CONNECTOR_eDP); | |
c943b494 CU |
1263 | |
1264 | rc = dp_init_sub_modules(dp); | |
1265 | if (rc) { | |
1266 | DRM_ERROR("init sub module failed\n"); | |
1267 | return -EPROBE_DEFER; | |
1268 | } | |
1269 | ||
9179fd95 KH |
1270 | rc = dp_power_client_init(dp->power); |
1271 | if (rc) { | |
1272 | DRM_ERROR("Power client create failed\n"); | |
1273 | goto err; | |
1274 | } | |
1275 | ||
570d3e5d | 1276 | /* setup event q */ |
8ede2ecc | 1277 | mutex_init(&dp->event_mutex); |
570d3e5d KH |
1278 | init_waitqueue_head(&dp->event_q); |
1279 | spin_lock_init(&dp->event_lock); | |
c943b494 | 1280 | |
d13e36d7 | 1281 | /* Store DP audio handle inside DP display */ |
d624e50a | 1282 | dp->dp_display.dp_audio = dp->audio; |
d13e36d7 | 1283 | |
158b9aa7 AK |
1284 | init_completion(&dp->audio_comp); |
1285 | ||
d624e50a | 1286 | platform_set_drvdata(pdev, &dp->dp_display); |
061eb621 | 1287 | |
5814b8bf KH |
1288 | rc = devm_pm_runtime_enable(&pdev->dev); |
1289 | if (rc) | |
1290 | goto err; | |
1291 | ||
82c2a575 KH |
1292 | rc = dp_display_request_irq(dp); |
1293 | if (rc) | |
1294 | goto err; | |
1295 | ||
e2969ee3 KH |
1296 | if (dp->dp_display.is_edp) { |
1297 | rc = devm_of_dp_aux_populate_bus(dp->aux, dp_auxbus_done_probe); | |
1298 | if (rc) { | |
1299 | DRM_ERROR("eDP auxbus population failed, rc=%d\n", rc); | |
1300 | goto err; | |
1301 | } | |
1302 | } else { | |
d4ca26ac DB |
1303 | rc = dp_display_probe_tail(&pdev->dev); |
1304 | if (rc) | |
e2969ee3 | 1305 | goto err; |
c943b494 CU |
1306 | } |
1307 | ||
1308 | return rc; | |
82c2a575 KH |
1309 | |
1310 | err: | |
1311 | dp_display_deinit_sub_modules(dp); | |
1312 | return rc; | |
c943b494 CU |
1313 | } |
1314 | ||
01790d5e | 1315 | static void dp_display_remove(struct platform_device *pdev) |
c943b494 | 1316 | { |
d624e50a | 1317 | struct dp_display_private *dp = dev_get_dp_display_private(&pdev->dev); |
c943b494 | 1318 | |
fa0048a4 | 1319 | component_del(&pdev->dev, &dp_display_comp_ops); |
c943b494 | 1320 | dp_display_deinit_sub_modules(dp); |
c943b494 | 1321 | platform_set_drvdata(pdev, NULL); |
c943b494 CU |
1322 | } |
1323 | ||
5814b8bf | 1324 | static int dp_pm_runtime_suspend(struct device *dev) |
c943b494 | 1325 | { |
5814b8bf | 1326 | struct dp_display_private *dp = dev_get_dp_display_private(dev); |
391c96ff | 1327 | |
5814b8bf | 1328 | disable_irq(dp->irq); |
989ebe7b | 1329 | |
5814b8bf | 1330 | if (dp->dp_display.is_edp) { |
989ebe7b | 1331 | dp_display_host_phy_exit(dp); |
5814b8bf | 1332 | dp_catalog_ctrl_hpd_disable(dp->catalog); |
e8a767e0 | 1333 | } |
5814b8bf | 1334 | dp_display_host_deinit(dp); |
19e52bcb | 1335 | |
c943b494 CU |
1336 | return 0; |
1337 | } | |
1338 | ||
5814b8bf | 1339 | static int dp_pm_runtime_resume(struct device *dev) |
c943b494 | 1340 | { |
5814b8bf | 1341 | struct dp_display_private *dp = dev_get_dp_display_private(dev); |
26ae419c | 1342 | |
5814b8bf KH |
1343 | /* |
1344 | * for eDP, host cotroller, HPD block and PHY are enabled here | |
1345 | * but with HPD irq disabled | |
1346 | * | |
1347 | * for DP, only host controller is enabled here. | |
1348 | * HPD block is enabled at dp_bridge_hpd_enable() | |
1349 | * PHY will be enabled at plugin handler later | |
1350 | */ | |
1351 | dp_display_host_init(dp); | |
1352 | if (dp->dp_display.is_edp) { | |
1353 | dp_catalog_ctrl_hpd_enable(dp->catalog); | |
1354 | dp_display_host_phy_init(dp); | |
1355 | } | |
8ede2ecc | 1356 | |
5814b8bf | 1357 | enable_irq(dp->irq); |
c943b494 CU |
1358 | return 0; |
1359 | } | |
1360 | ||
c943b494 | 1361 | static const struct dev_pm_ops dp_pm_ops = { |
5814b8bf KH |
1362 | SET_RUNTIME_PM_OPS(dp_pm_runtime_suspend, dp_pm_runtime_resume, NULL) |
1363 | SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, | |
1364 | pm_runtime_force_resume) | |
c943b494 CU |
1365 | }; |
1366 | ||
1367 | static struct platform_driver dp_display_driver = { | |
1368 | .probe = dp_display_probe, | |
01790d5e | 1369 | .remove_new = dp_display_remove, |
c943b494 CU |
1370 | .driver = { |
1371 | .name = "msm-dp-display", | |
1372 | .of_match_table = dp_dt_match, | |
1373 | .suppress_bind_attrs = true, | |
1374 | .pm = &dp_pm_ops, | |
1375 | }, | |
1376 | }; | |
1377 | ||
1378 | int __init msm_dp_register(void) | |
1379 | { | |
1380 | int ret; | |
1381 | ||
1382 | ret = platform_driver_register(&dp_display_driver); | |
1383 | if (ret) | |
1384 | DRM_ERROR("Dp display driver register failed"); | |
1385 | ||
1386 | return ret; | |
1387 | } | |
1388 | ||
1389 | void __exit msm_dp_unregister(void) | |
1390 | { | |
1391 | platform_driver_unregister(&dp_display_driver); | |
1392 | } | |
1393 | ||
757a2f36 KH |
1394 | bool msm_dp_wide_bus_available(const struct msm_dp *dp_display) |
1395 | { | |
1396 | struct dp_display_private *dp; | |
1397 | ||
1398 | dp = container_of(dp_display, struct dp_display_private, dp_display); | |
8ede2ecc | 1399 | |
757a2f36 | 1400 | return dp->wide_bus_en; |
220b856a TS |
1401 | } |
1402 | ||
ab842041 | 1403 | void dp_display_debugfs_init(struct msm_dp *dp_display, struct dentry *root, bool is_edp) |
f913454a AK |
1404 | { |
1405 | struct dp_display_private *dp; | |
1406 | struct device *dev; | |
1407 | int rc; | |
1408 | ||
1409 | dp = container_of(dp_display, struct dp_display_private, dp_display); | |
b8ec1e7f | 1410 | dev = &dp->dp_display.pdev->dev; |
f913454a | 1411 | |
1c5f6051 | 1412 | dp->debug = dp_debug_get(dev, dp->panel, |
899b2608 | 1413 | dp->link, dp->dp_display.connector, |
ab842041 | 1414 | root, is_edp); |
f913454a AK |
1415 | if (IS_ERR(dp->debug)) { |
1416 | rc = PTR_ERR(dp->debug); | |
1417 | DRM_ERROR("failed to initialize debug, rc = %d\n", rc); | |
1418 | dp->debug = NULL; | |
1419 | } | |
1420 | } | |
1421 | ||
c3bf8e21 SB |
1422 | static int dp_display_get_next_bridge(struct msm_dp *dp) |
1423 | { | |
1424 | int rc; | |
1425 | struct dp_display_private *dp_priv; | |
c3bf8e21 SB |
1426 | |
1427 | dp_priv = container_of(dp, struct dp_display_private, dp_display); | |
c3bf8e21 SB |
1428 | |
1429 | /* | |
1430 | * External bridges are mandatory for eDP interfaces: one has to | |
1431 | * provide at least an eDP panel (which gets wrapped into panel-bridge). | |
1432 | * | |
1433 | * For DisplayPort interfaces external bridges are optional, so | |
1434 | * silently ignore an error if one is not present (-ENODEV). | |
1435 | */ | |
d4ca26ac | 1436 | rc = devm_dp_parser_find_next_bridge(&dp->pdev->dev, dp_priv->parser); |
c3bf8e21 SB |
1437 | if (!dp->is_edp && rc == -ENODEV) |
1438 | return 0; | |
1439 | ||
e2969ee3 | 1440 | if (!rc) |
c3bf8e21 | 1441 | dp->next_bridge = dp_priv->parser->next_bridge; |
c3bf8e21 | 1442 | |
c3bf8e21 SB |
1443 | return rc; |
1444 | } | |
1445 | ||
c943b494 CU |
1446 | int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev, |
1447 | struct drm_encoder *encoder) | |
1448 | { | |
5e602f51 | 1449 | struct dp_display_private *dp_priv; |
c943b494 CU |
1450 | int ret; |
1451 | ||
c943b494 CU |
1452 | dp_display->drm_dev = dev; |
1453 | ||
5e602f51 KH |
1454 | dp_priv = container_of(dp_display, struct dp_display_private, dp_display); |
1455 | ||
61a72d5e DB |
1456 | ret = dp_bridge_init(dp_display, dev, encoder); |
1457 | if (ret) { | |
8a3b4c17 KH |
1458 | DRM_DEV_ERROR(dev->dev, |
1459 | "failed to create dp bridge: %d\n", ret); | |
8a3b4c17 KH |
1460 | return ret; |
1461 | } | |
1462 | ||
efc76170 | 1463 | dp_display->connector = dp_drm_connector_init(dp_display, encoder); |
a586191c DB |
1464 | if (IS_ERR(dp_display->connector)) { |
1465 | ret = PTR_ERR(dp_display->connector); | |
1466 | DRM_DEV_ERROR(dev->dev, | |
1467 | "failed to create dp connector: %d\n", ret); | |
1468 | dp_display->connector = NULL; | |
1469 | return ret; | |
1470 | } | |
1471 | ||
1472 | dp_priv->panel->connector = dp_display->connector; | |
1473 | ||
c943b494 CU |
1474 | return 0; |
1475 | } | |
1476 | ||
cdfd0e62 VP |
1477 | void dp_bridge_atomic_enable(struct drm_bridge *drm_bridge, |
1478 | struct drm_bridge_state *old_bridge_state) | |
c943b494 | 1479 | { |
13ea4799 DB |
1480 | struct msm_dp_bridge *dp_bridge = to_dp_bridge(drm_bridge); |
1481 | struct msm_dp *dp = dp_bridge->dp_display; | |
c943b494 CU |
1482 | int rc = 0; |
1483 | struct dp_display_private *dp_display; | |
8ede2ecc | 1484 | u32 state; |
a6e2af64 | 1485 | bool force_link_train = false; |
c943b494 CU |
1486 | |
1487 | dp_display = container_of(dp, struct dp_display_private, dp_display); | |
1488 | if (!dp_display->dp_mode.drm_mode.clock) { | |
1489 | DRM_ERROR("invalid params\n"); | |
13ea4799 | 1490 | return; |
c943b494 CU |
1491 | } |
1492 | ||
391c96ff SB |
1493 | if (dp->is_edp) |
1494 | dp_hpd_plug_handle(dp_display, 0); | |
1495 | ||
8ede2ecc | 1496 | mutex_lock(&dp_display->event_mutex); |
5814b8bf KH |
1497 | if (pm_runtime_resume_and_get(&dp->pdev->dev)) { |
1498 | DRM_ERROR("failed to pm_runtime_resume\n"); | |
1499 | mutex_unlock(&dp_display->event_mutex); | |
1500 | return; | |
1501 | } | |
8ede2ecc | 1502 | |
375a1260 KH |
1503 | state = dp_display->hpd_state; |
1504 | if (state != ST_DISPLAY_OFF && state != ST_MAINLINK_READY) { | |
1505 | mutex_unlock(&dp_display->event_mutex); | |
1506 | return; | |
1507 | } | |
19e52bcb | 1508 | |
c943b494 CU |
1509 | rc = dp_display_set_mode(dp, &dp_display->dp_mode); |
1510 | if (rc) { | |
1511 | DRM_ERROR("Failed to perform a mode set, rc=%d\n", rc); | |
8ede2ecc | 1512 | mutex_unlock(&dp_display->event_mutex); |
13ea4799 | 1513 | return; |
c943b494 CU |
1514 | } |
1515 | ||
19e52bcb | 1516 | state = dp_display->hpd_state; |
8ede2ecc | 1517 | |
a6e2af64 | 1518 | if (state == ST_DISPLAY_OFF) { |
989ebe7b | 1519 | dp_display_host_phy_init(dp_display); |
a6e2af64 KH |
1520 | force_link_train = true; |
1521 | } | |
c943b494 | 1522 | |
a6e2af64 | 1523 | dp_display_enable(dp_display, force_link_train); |
8ede2ecc | 1524 | |
c943b494 CU |
1525 | rc = dp_display_post_enable(dp); |
1526 | if (rc) { | |
1527 | DRM_ERROR("DP display post enable failed, rc=%d\n", rc); | |
ff46c2c4 | 1528 | dp_display_disable(dp_display); |
c943b494 | 1529 | } |
8ede2ecc | 1530 | |
8ede2ecc | 1531 | /* completed connection */ |
19e52bcb | 1532 | dp_display->hpd_state = ST_CONNECTED; |
8ede2ecc | 1533 | |
202aceac | 1534 | drm_dbg_dp(dp->drm_dev, "type=%d Done\n", dp->connector_type); |
8ede2ecc | 1535 | mutex_unlock(&dp_display->event_mutex); |
8ede2ecc KH |
1536 | } |
1537 | ||
cdfd0e62 VP |
1538 | void dp_bridge_atomic_disable(struct drm_bridge *drm_bridge, |
1539 | struct drm_bridge_state *old_bridge_state) | |
8ede2ecc | 1540 | { |
13ea4799 DB |
1541 | struct msm_dp_bridge *dp_bridge = to_dp_bridge(drm_bridge); |
1542 | struct msm_dp *dp = dp_bridge->dp_display; | |
8ede2ecc KH |
1543 | struct dp_display_private *dp_display; |
1544 | ||
1545 | dp_display = container_of(dp, struct dp_display_private, dp_display); | |
1546 | ||
1547 | dp_ctrl_push_idle(dp_display->ctrl); | |
c943b494 CU |
1548 | } |
1549 | ||
cdfd0e62 VP |
1550 | void dp_bridge_atomic_post_disable(struct drm_bridge *drm_bridge, |
1551 | struct drm_bridge_state *old_bridge_state) | |
c943b494 | 1552 | { |
13ea4799 DB |
1553 | struct msm_dp_bridge *dp_bridge = to_dp_bridge(drm_bridge); |
1554 | struct msm_dp *dp = dp_bridge->dp_display; | |
8ede2ecc KH |
1555 | u32 state; |
1556 | struct dp_display_private *dp_display; | |
c943b494 | 1557 | |
8ede2ecc | 1558 | dp_display = container_of(dp, struct dp_display_private, dp_display); |
c943b494 | 1559 | |
391c96ff SB |
1560 | if (dp->is_edp) |
1561 | dp_hpd_unplug_handle(dp_display, 0); | |
1562 | ||
8ede2ecc KH |
1563 | mutex_lock(&dp_display->event_mutex); |
1564 | ||
375a1260 | 1565 | state = dp_display->hpd_state; |
5814b8bf KH |
1566 | if (state != ST_DISCONNECT_PENDING && state != ST_CONNECTED) |
1567 | drm_dbg_dp(dp->drm_dev, "type=%d wrong hpd_state=%d\n", | |
1568 | dp->connector_type, state); | |
19e52bcb | 1569 | |
ff46c2c4 | 1570 | dp_display_disable(dp_display); |
c943b494 | 1571 | |
19e52bcb | 1572 | state = dp_display->hpd_state; |
8ede2ecc KH |
1573 | if (state == ST_DISCONNECT_PENDING) { |
1574 | /* completed disconnection */ | |
19e52bcb | 1575 | dp_display->hpd_state = ST_DISCONNECTED; |
8ede2ecc | 1576 | } else { |
62671d2e | 1577 | dp_display->hpd_state = ST_DISPLAY_OFF; |
8ede2ecc KH |
1578 | } |
1579 | ||
202aceac | 1580 | drm_dbg_dp(dp->drm_dev, "type=%d Done\n", dp->connector_type); |
5814b8bf KH |
1581 | |
1582 | pm_runtime_put_sync(&dp->pdev->dev); | |
8ede2ecc | 1583 | mutex_unlock(&dp_display->event_mutex); |
c943b494 CU |
1584 | } |
1585 | ||
13ea4799 DB |
1586 | void dp_bridge_mode_set(struct drm_bridge *drm_bridge, |
1587 | const struct drm_display_mode *mode, | |
1588 | const struct drm_display_mode *adjusted_mode) | |
c943b494 | 1589 | { |
13ea4799 DB |
1590 | struct msm_dp_bridge *dp_bridge = to_dp_bridge(drm_bridge); |
1591 | struct msm_dp *dp = dp_bridge->dp_display; | |
c943b494 CU |
1592 | struct dp_display_private *dp_display; |
1593 | ||
1594 | dp_display = container_of(dp, struct dp_display_private, dp_display); | |
1595 | ||
1596 | memset(&dp_display->dp_mode, 0x0, sizeof(struct dp_display_mode)); | |
1597 | ||
1598 | if (dp_display_check_video_test(dp)) | |
1599 | dp_display->dp_mode.bpp = dp_display_get_test_bpp(dp); | |
1600 | else /* Default num_components per pixel = 3 */ | |
1601 | dp_display->dp_mode.bpp = dp->connector->display_info.bpc * 3; | |
1602 | ||
1603 | if (!dp_display->dp_mode.bpp) | |
1604 | dp_display->dp_mode.bpp = 24; /* Default bpp */ | |
1605 | ||
1606 | drm_mode_copy(&dp_display->dp_mode.drm_mode, adjusted_mode); | |
1607 | ||
1608 | dp_display->dp_mode.v_active_low = | |
1609 | !!(dp_display->dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); | |
1610 | ||
1611 | dp_display->dp_mode.h_active_low = | |
1612 | !!(dp_display->dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); | |
1613 | } | |
cd198cad BA |
1614 | |
1615 | void dp_bridge_hpd_enable(struct drm_bridge *bridge) | |
1616 | { | |
1617 | struct msm_dp_bridge *dp_bridge = to_dp_bridge(bridge); | |
1618 | struct msm_dp *dp_display = dp_bridge->dp_display; | |
a8e981ac KH |
1619 | struct dp_display_private *dp = container_of(dp_display, struct dp_display_private, dp_display); |
1620 | ||
5814b8bf KH |
1621 | /* |
1622 | * this is for external DP with hpd irq enabled case, | |
1623 | * step-1: dp_pm_runtime_resume() enable dp host only | |
1624 | * step-2: enable hdp block and have hpd irq enabled here | |
1625 | * step-3: waiting for plugin irq while phy is not initialized | |
1626 | * step-4: DP PHY is initialized at plugin handler before link training | |
1627 | * | |
1628 | */ | |
a8e981ac | 1629 | mutex_lock(&dp->event_mutex); |
5814b8bf KH |
1630 | if (pm_runtime_resume_and_get(&dp_display->pdev->dev)) { |
1631 | DRM_ERROR("failed to resume power\n"); | |
1632 | mutex_unlock(&dp->event_mutex); | |
1633 | return; | |
1634 | } | |
1635 | ||
a8e981ac KH |
1636 | dp_catalog_ctrl_hpd_enable(dp->catalog); |
1637 | ||
1638 | /* enable HDP interrupts */ | |
1639 | dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, true); | |
cd198cad BA |
1640 | |
1641 | dp_display->internal_hpd = true; | |
a8e981ac | 1642 | mutex_unlock(&dp->event_mutex); |
cd198cad BA |
1643 | } |
1644 | ||
1645 | void dp_bridge_hpd_disable(struct drm_bridge *bridge) | |
1646 | { | |
1647 | struct msm_dp_bridge *dp_bridge = to_dp_bridge(bridge); | |
1648 | struct msm_dp *dp_display = dp_bridge->dp_display; | |
a8e981ac KH |
1649 | struct dp_display_private *dp = container_of(dp_display, struct dp_display_private, dp_display); |
1650 | ||
1651 | mutex_lock(&dp->event_mutex); | |
1652 | /* disable HDP interrupts */ | |
1653 | dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, false); | |
1654 | dp_catalog_ctrl_hpd_disable(dp->catalog); | |
cd198cad BA |
1655 | |
1656 | dp_display->internal_hpd = false; | |
5814b8bf KH |
1657 | |
1658 | pm_runtime_put_sync(&dp_display->pdev->dev); | |
a8e981ac | 1659 | mutex_unlock(&dp->event_mutex); |
cd198cad | 1660 | } |
542b37ef BA |
1661 | |
1662 | void dp_bridge_hpd_notify(struct drm_bridge *bridge, | |
1663 | enum drm_connector_status status) | |
1664 | { | |
1665 | struct msm_dp_bridge *dp_bridge = to_dp_bridge(bridge); | |
1666 | struct msm_dp *dp_display = dp_bridge->dp_display; | |
1667 | struct dp_display_private *dp = container_of(dp_display, struct dp_display_private, dp_display); | |
1668 | ||
1669 | /* Without next_bridge interrupts are handled by the DP core directly */ | |
1670 | if (dp_display->internal_hpd) | |
1671 | return; | |
1672 | ||
aa113120 | 1673 | if (!dp_display->link_ready && status == connector_status_connected) |
542b37ef | 1674 | dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0); |
aa113120 | 1675 | else if (dp_display->link_ready && status == connector_status_disconnected) |
542b37ef BA |
1676 | dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); |
1677 | } |