[linux-2.6-block.git] / drivers / gpu / drm / msm / disp / dpu1 / dpu_hw_pingpong.h

/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
 */

#ifndef _DPU_HW_PINGPONG_H
#define _DPU_HW_PINGPONG_H

#include "dpu_hw_catalog.h"
#include "dpu_hw_mdss.h"
#include "dpu_hw_util.h"
#include "dpu_hw_blk.h"

#define DITHER_MATRIX_SZ 16

struct dpu_hw_pingpong;

struct dpu_hw_tear_check {
	/*
	 * This is ratio of MDP VSYNC clk freq(Hz) to
	 * refresh rate divided by no of lines
	 */
	u32 vsync_count;
	u32 sync_cfg_height;
	u32 vsync_init_val;
	u32 sync_threshold_start;
	u32 sync_threshold_continue;
	u32 start_pos;
	u32 rd_ptr_irq;
	u8 hw_vsync_mode;
};

struct dpu_hw_pp_vsync_info {
	u32 rd_ptr_init_val;	/* value of rd pointer at vsync edge */
	u32 rd_ptr_frame_count;	/* num frames sent since enabling interface */
	u32 rd_ptr_line_count;	/* current line on panel (rd ptr) */
	u32 wr_ptr_line_count;	/* current line within pp fifo (wr ptr) */
};

/**
 * struct dpu_hw_dither_cfg - dither feature structure
 * @flags: for customizing operations
 * @temporal_en: temperal dither enable
 * @c0_bitdepth: c0 component bit depth
 * @c1_bitdepth: c1 component bit depth
 * @c2_bitdepth: c2 component bit depth
 * @c3_bitdepth: c2 component bit depth
 * @matrix: dither strength matrix
 */
struct dpu_hw_dither_cfg {
	u64 flags;
	u32 temporal_en;
	u32 c0_bitdepth;
	u32 c1_bitdepth;
	u32 c2_bitdepth;
	u32 c3_bitdepth;
	u32 matrix[DITHER_MATRIX_SZ];
};

/**
 *
 * struct dpu_hw_pingpong_ops : Interface to the pingpong Hw driver functions
 *  Assumption is these functions will be called after clocks are enabled
 *  @setup_tearcheck : program tear check values
 *  @enable_tearcheck : enables tear check
 *  @get_vsync_info : retries timing info of the panel
 *  @setup_autorefresh : configure and enable the autorefresh config
 *  @get_autorefresh : retrieve autorefresh config from hardware
 *  @setup_dither : function to program the dither hw block
 *  @get_line_count: obtain current vertical line counter
 */
struct dpu_hw_pingpong_ops {
	/**
	 * enables vysnc generation and sets up init value of
	 * read pointer and programs the tear check cofiguration
	 */
	int (*setup_tearcheck)(struct dpu_hw_pingpong *pp,
			struct dpu_hw_tear_check *cfg);

	/**
	 * enables tear check block
	 */
	int (*enable_tearcheck)(struct dpu_hw_pingpong *pp,
			bool enable);

	/**
	 * read, modify, write to either set or clear listening to external TE
	 * @Return: 1 if TE was originally connected, 0 if not, or -ERROR
	 */
	int (*connect_external_te)(struct dpu_hw_pingpong *pp,
			bool enable_external_te);

	/**
	 * provides the programmed and current
	 * line_count
	 */
	int (*get_vsync_info)(struct dpu_hw_pingpong *pp,
			struct dpu_hw_pp_vsync_info  *info);

	/**
	 * configure and enable the autorefresh config
	 */
	void (*setup_autorefresh)(struct dpu_hw_pingpong *pp,
				  u32 frame_count, bool enable);

	/**
	 * retrieve autorefresh config from hardware
	 */
	bool (*get_autorefresh)(struct dpu_hw_pingpong *pp,
				u32 *frame_count);

	/**
	 * poll until write pointer transmission starts
	 * @Return: 0 on success, -ETIMEDOUT on timeout
	 */
	int (*poll_timeout_wr_ptr)(struct dpu_hw_pingpong *pp, u32 timeout_us);

	/**
	 * Obtain current vertical line counter
	 */
	u32 (*get_line_count)(struct dpu_hw_pingpong *pp);

	/**
	 * Setup dither matix for pingpong block
	 */
	void (*setup_dither)(struct dpu_hw_pingpong *pp,
			struct dpu_hw_dither_cfg *cfg);
};

struct dpu_hw_merge_3d;

struct dpu_hw_pingpong {
	struct dpu_hw_blk base;
	struct dpu_hw_blk_reg_map hw;

	/* pingpong */
	enum dpu_pingpong idx;
	const struct dpu_pingpong_cfg *caps;
	struct dpu_hw_merge_3d *merge_3d;

	/* ops */
	struct dpu_hw_pingpong_ops ops;
};

/**
 * to_dpu_hw_pingpong - convert base object dpu_hw_base to container
 * @hw: Pointer to base hardware block
 * return: Pointer to hardware block container
 */
static inline struct dpu_hw_pingpong *to_dpu_hw_pingpong(struct dpu_hw_blk *hw)
{
	return container_of(hw, struct dpu_hw_pingpong, base);
}

/**
 * dpu_hw_pingpong_init - initializes the pingpong driver for the passed
 *	pingpong idx.
 * @idx:  Pingpong index for which driver object is required
 * @addr: Mapped register io address of MDP
 * @m:    Pointer to mdss catalog data
 * Returns: Error code or allocated dpu_hw_pingpong context
 */
struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
		void __iomem *addr,
		const struct dpu_mdss_cfg *m);

/**
 * dpu_hw_pingpong_destroy - destroys pingpong driver context
 *	should be called to free the context
 * @pp:   Pointer to PP driver context returned by dpu_hw_pingpong_init
 */
void dpu_hw_pingpong_destroy(struct dpu_hw_pingpong *pp);

#endif /*_DPU_HW_PINGPONG_H */
Commit	Line	Data
97fb5e8d	1	/* SPDX-License-Identifier: GPL-2.0-only */
25fdd593	2	/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
25fdd593 JS	3	*/
	4
	5	#ifndef _DPU_HW_PINGPONG_H
	6	#define _DPU_HW_PINGPONG_H
	7
	8	#include "dpu_hw_catalog.h"
	9	#include "dpu_hw_mdss.h"
	10	#include "dpu_hw_util.h"
	11	#include "dpu_hw_blk.h"
	12
3c128638 KT	13	#define DITHER_MATRIX_SZ 16
3c128638 KT	14
25fdd593 JS	15	struct dpu_hw_pingpong;
	16
	17	struct dpu_hw_tear_check {
	18	/*
	19	* This is ratio of MDP VSYNC clk freq(Hz) to
	20	* refresh rate divided by no of lines
	21	*/
	22	u32 vsync_count;
	23	u32 sync_cfg_height;
	24	u32 vsync_init_val;
	25	u32 sync_threshold_start;
	26	u32 sync_threshold_continue;
	27	u32 start_pos;
	28	u32 rd_ptr_irq;
	29	u8 hw_vsync_mode;
	30	};
	31
	32	struct dpu_hw_pp_vsync_info {
	33	u32 rd_ptr_init_val; /* value of rd pointer at vsync edge */
	34	u32 rd_ptr_frame_count; /* num frames sent since enabling interface */
	35	u32 rd_ptr_line_count; /* current line on panel (rd ptr) */
	36	u32 wr_ptr_line_count; /* current line within pp fifo (wr ptr) */
	37	};
	38
3c128638 KT	39	/**
	40	* struct dpu_hw_dither_cfg - dither feature structure
	41	* @flags: for customizing operations
	42	* @temporal_en: temperal dither enable
	43	* @c0_bitdepth: c0 component bit depth
	44	* @c1_bitdepth: c1 component bit depth
	45	* @c2_bitdepth: c2 component bit depth
	46	* @c3_bitdepth: c2 component bit depth
	47	* @matrix: dither strength matrix
	48	*/
	49	struct dpu_hw_dither_cfg {
	50	u64 flags;
	51	u32 temporal_en;
	52	u32 c0_bitdepth;
	53	u32 c1_bitdepth;
	54	u32 c2_bitdepth;
	55	u32 c3_bitdepth;
	56	u32 matrix[DITHER_MATRIX_SZ];
	57	};
	58
25fdd593 JS	59	/**
	60	*
	61	* struct dpu_hw_pingpong_ops : Interface to the pingpong Hw driver functions
	62	* Assumption is these functions will be called after clocks are enabled
	63	* @setup_tearcheck : program tear check values
	64	* @enable_tearcheck : enables tear check
	65	* @get_vsync_info : retries timing info of the panel
aa9223a6 ADR	66	* @setup_autorefresh : configure and enable the autorefresh config
aa9223a6 ADR	67	* @get_autorefresh : retrieve autorefresh config from hardware
25fdd593 JS	68	* @setup_dither : function to program the dither hw block
	69	* @get_line_count: obtain current vertical line counter
	70	*/
	71	struct dpu_hw_pingpong_ops {
	72	/**
	73	* enables vysnc generation and sets up init value of
	74	* read pointer and programs the tear check cofiguration
	75	*/
	76	int (setup_tearcheck)(struct dpu_hw_pingpong pp,
	77	struct dpu_hw_tear_check *cfg);
	78
	79	/**
	80	* enables tear check block
	81	*/
	82	int (enable_tearcheck)(struct dpu_hw_pingpong pp,
	83	bool enable);
	84
	85	/**
	86	* read, modify, write to either set or clear listening to external TE
	87	* @Return: 1 if TE was originally connected, 0 if not, or -ERROR
	88	*/
	89	int (connect_external_te)(struct dpu_hw_pingpong pp,
	90	bool enable_external_te);
	91
	92	/**
	93	* provides the programmed and current
	94	* line_count
	95	*/
	96	int (get_vsync_info)(struct dpu_hw_pingpong pp,
	97	struct dpu_hw_pp_vsync_info *info);
	98
aa9223a6 ADR	99	/**
	100	* configure and enable the autorefresh config
	101	*/
	102	void (setup_autorefresh)(struct dpu_hw_pingpong pp,
	103	u32 frame_count, bool enable);
	104
	105	/**
	106	* retrieve autorefresh config from hardware
	107	*/
	108	bool (get_autorefresh)(struct dpu_hw_pingpong pp,
	109	u32 *frame_count);
	110
25fdd593 JS	111	/**
	112	* poll until write pointer transmission starts
	113	* @Return: 0 on success, -ETIMEDOUT on timeout
	114	*/
	115	int (poll_timeout_wr_ptr)(struct dpu_hw_pingpong pp, u32 timeout_us);
	116
	117	/**
	118	* Obtain current vertical line counter
	119	*/
	120	u32 (get_line_count)(struct dpu_hw_pingpong pp);
3c128638 KT	121
	122	/**
	123	* Setup dither matix for pingpong block
	124	*/
	125	void (setup_dither)(struct dpu_hw_pingpong pp,
	126	struct dpu_hw_dither_cfg *cfg);
25fdd593 JS	127	};
25fdd593 JS	128
dfa35bac DB	129	struct dpu_hw_merge_3d;
dfa35bac DB	130
25fdd593 JS	131	struct dpu_hw_pingpong {
	132	struct dpu_hw_blk base;
	133	struct dpu_hw_blk_reg_map hw;
	134
	135	/* pingpong */
	136	enum dpu_pingpong idx;
	137	const struct dpu_pingpong_cfg *caps;
dfa35bac	138	struct dpu_hw_merge_3d *merge_3d;
25fdd593 JS	139
	140	/* ops */
	141	struct dpu_hw_pingpong_ops ops;
	142	};
	143
b954fa6b DD	144	/**
	145	* to_dpu_hw_pingpong - convert base object dpu_hw_base to container
	146	* @hw: Pointer to base hardware block
	147	* return: Pointer to hardware block container
	148	*/
	149	static inline struct dpu_hw_pingpong to_dpu_hw_pingpong(struct dpu_hw_blk hw)
	150	{
	151	return container_of(hw, struct dpu_hw_pingpong, base);
	152	}
	153
25fdd593 JS	154	/**
	155	* dpu_hw_pingpong_init - initializes the pingpong driver for the passed
	156	* pingpong idx.
	157	* @idx: Pingpong index for which driver object is required
	158	* @addr: Mapped register io address of MDP
	159	* @m: Pointer to mdss catalog data
	160	* Returns: Error code or allocated dpu_hw_pingpong context
	161	*/
	162	struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
	163	void __iomem *addr,
abda0d92	164	const struct dpu_mdss_cfg *m);
25fdd593 JS	165
	166	/**
	167	* dpu_hw_pingpong_destroy - destroys pingpong driver context
	168	* should be called to free the context
	169	* @pp: Pointer to PP driver context returned by dpu_hw_pingpong_init
	170	*/
	171	void dpu_hw_pingpong_destroy(struct dpu_hw_pingpong *pp);
	172
	173	#endif /_DPU_HW_PINGPONG_H /