[linux-2.6-block.git] / drivers / gpu / drm / msm / disp / dpu1 / dpu_hw_pingpong.h

/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
 */

#ifndef _DPU_HW_PINGPONG_H
#define _DPU_HW_PINGPONG_H

#include "dpu_hw_catalog.h"
#include "dpu_hw_mdss.h"
#include "dpu_hw_util.h"

#define DITHER_MATRIX_SZ 16

struct dpu_hw_pingpong;

struct dpu_hw_tear_check {
	/*
	 * This is ratio of MDP VSYNC clk freq(Hz) to
	 * refresh rate divided by no of lines
	 */
	u32 vsync_count;
	u32 sync_cfg_height;
	u32 vsync_init_val;
	u32 sync_threshold_start;
	u32 sync_threshold_continue;
	u32 start_pos;
	u32 rd_ptr_irq;
	u8 hw_vsync_mode;
};

struct dpu_hw_pp_vsync_info {
	u32 rd_ptr_init_val;	/* value of rd pointer at vsync edge */
	u32 rd_ptr_frame_count;	/* num frames sent since enabling interface */
	u32 rd_ptr_line_count;	/* current line on panel (rd ptr) */
	u32 wr_ptr_line_count;	/* current line within pp fifo (wr ptr) */
};

/**
 * struct dpu_hw_dither_cfg - dither feature structure
 * @flags: for customizing operations
 * @temporal_en: temperal dither enable
 * @c0_bitdepth: c0 component bit depth
 * @c1_bitdepth: c1 component bit depth
 * @c2_bitdepth: c2 component bit depth
 * @c3_bitdepth: c2 component bit depth
 * @matrix: dither strength matrix
 */
struct dpu_hw_dither_cfg {
	u64 flags;
	u32 temporal_en;
	u32 c0_bitdepth;
	u32 c1_bitdepth;
	u32 c2_bitdepth;
	u32 c3_bitdepth;
	u32 matrix[DITHER_MATRIX_SZ];
};

/**
 *
 * struct dpu_hw_pingpong_ops : Interface to the pingpong Hw driver functions
 *  Assumption is these functions will be called after clocks are enabled
 *  @setup_tearcheck : program tear check values
 *  @enable_tearcheck : enables tear check
 *  @get_vsync_info : retries timing info of the panel
 *  @setup_autorefresh : configure and enable the autorefresh config
 *  @get_autorefresh : retrieve autorefresh config from hardware
 *  @setup_dither : function to program the dither hw block
 *  @get_line_count: obtain current vertical line counter
 */
struct dpu_hw_pingpong_ops {
	/**
	 * enables vysnc generation and sets up init value of
	 * read pointer and programs the tear check cofiguration
	 */
	int (*setup_tearcheck)(struct dpu_hw_pingpong *pp,
			struct dpu_hw_tear_check *cfg);

	/**
	 * enables tear check block
	 */
	int (*enable_tearcheck)(struct dpu_hw_pingpong *pp,
			bool enable);

	/**
	 * read, modify, write to either set or clear listening to external TE
	 * @Return: 1 if TE was originally connected, 0 if not, or -ERROR
	 */
	int (*connect_external_te)(struct dpu_hw_pingpong *pp,
			bool enable_external_te);

	/**
	 * provides the programmed and current
	 * line_count
	 */
	int (*get_vsync_info)(struct dpu_hw_pingpong *pp,
			struct dpu_hw_pp_vsync_info  *info);

	/**
	 * configure and enable the autorefresh config
	 */
	void (*setup_autorefresh)(struct dpu_hw_pingpong *pp,
				  u32 frame_count, bool enable);

	/**
	 * retrieve autorefresh config from hardware
	 */
	bool (*get_autorefresh)(struct dpu_hw_pingpong *pp,
				u32 *frame_count);

	/**
	 * Obtain current vertical line counter
	 */
	u32 (*get_line_count)(struct dpu_hw_pingpong *pp);

	/**
	 * Setup dither matix for pingpong block
	 */
	void (*setup_dither)(struct dpu_hw_pingpong *pp,
			struct dpu_hw_dither_cfg *cfg);
	/**
	 * Enable DSC
	 */
	int (*enable_dsc)(struct dpu_hw_pingpong *pp);

	/**
	 * Disable DSC
	 */
	void (*disable_dsc)(struct dpu_hw_pingpong *pp);

	/**
	 * Setup DSC
	 */
	int (*setup_dsc)(struct dpu_hw_pingpong *pp);
};

struct dpu_hw_merge_3d;

struct dpu_hw_pingpong {
	struct dpu_hw_blk base;
	struct dpu_hw_blk_reg_map hw;

	/* pingpong */
	enum dpu_pingpong idx;
	const struct dpu_pingpong_cfg *caps;
	struct dpu_hw_merge_3d *merge_3d;

	/* ops */
	struct dpu_hw_pingpong_ops ops;
};

/**
 * to_dpu_hw_pingpong - convert base object dpu_hw_base to container
 * @hw: Pointer to base hardware block
 * return: Pointer to hardware block container
 */
static inline struct dpu_hw_pingpong *to_dpu_hw_pingpong(struct dpu_hw_blk *hw)
{
	return container_of(hw, struct dpu_hw_pingpong, base);
}

/**
 * dpu_hw_pingpong_init() - initializes the pingpong driver for the passed
 * pingpong catalog entry.
 * @cfg:  Pingpong catalog entry for which driver object is required
 * @addr: Mapped register io address of MDP
 * Return: Error code or allocated dpu_hw_pingpong context
 */
struct dpu_hw_pingpong *dpu_hw_pingpong_init(const struct dpu_pingpong_cfg *cfg,
		void __iomem *addr);

/**
 * dpu_hw_pingpong_destroy - destroys pingpong driver context
 *	should be called to free the context
 * @pp:   Pointer to PP driver context returned by dpu_hw_pingpong_init
 */
void dpu_hw_pingpong_destroy(struct dpu_hw_pingpong *pp);

#endif /*_DPU_HW_PINGPONG_H */
Commit	Line	Data
97fb5e8d	1	/* SPDX-License-Identifier: GPL-2.0-only */
25fdd593	2	/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
25fdd593 JS	3	*/
	4
	5	#ifndef _DPU_HW_PINGPONG_H
	6	#define _DPU_HW_PINGPONG_H
	7
	8	#include "dpu_hw_catalog.h"
	9	#include "dpu_hw_mdss.h"
	10	#include "dpu_hw_util.h"
25fdd593	11
3c128638 KT	12	#define DITHER_MATRIX_SZ 16
3c128638 KT	13
25fdd593 JS	14	struct dpu_hw_pingpong;
	15
	16	struct dpu_hw_tear_check {
	17	/*
	18	* This is ratio of MDP VSYNC clk freq(Hz) to
	19	* refresh rate divided by no of lines
	20	*/
	21	u32 vsync_count;
	22	u32 sync_cfg_height;
	23	u32 vsync_init_val;
	24	u32 sync_threshold_start;
	25	u32 sync_threshold_continue;
	26	u32 start_pos;
	27	u32 rd_ptr_irq;
	28	u8 hw_vsync_mode;
	29	};
	30
	31	struct dpu_hw_pp_vsync_info {
	32	u32 rd_ptr_init_val; /* value of rd pointer at vsync edge */
	33	u32 rd_ptr_frame_count; /* num frames sent since enabling interface */
	34	u32 rd_ptr_line_count; /* current line on panel (rd ptr) */
	35	u32 wr_ptr_line_count; /* current line within pp fifo (wr ptr) */
	36	};
	37
3c128638 KT	38	/**
	39	* struct dpu_hw_dither_cfg - dither feature structure
	40	* @flags: for customizing operations
	41	* @temporal_en: temperal dither enable
	42	* @c0_bitdepth: c0 component bit depth
	43	* @c1_bitdepth: c1 component bit depth
	44	* @c2_bitdepth: c2 component bit depth
	45	* @c3_bitdepth: c2 component bit depth
	46	* @matrix: dither strength matrix
	47	*/
	48	struct dpu_hw_dither_cfg {
	49	u64 flags;
	50	u32 temporal_en;
	51	u32 c0_bitdepth;
	52	u32 c1_bitdepth;
	53	u32 c2_bitdepth;
	54	u32 c3_bitdepth;
	55	u32 matrix[DITHER_MATRIX_SZ];
	56	};
	57
25fdd593 JS	58	/**
	59	*
	60	* struct dpu_hw_pingpong_ops : Interface to the pingpong Hw driver functions
	61	* Assumption is these functions will be called after clocks are enabled
	62	* @setup_tearcheck : program tear check values
	63	* @enable_tearcheck : enables tear check
	64	* @get_vsync_info : retries timing info of the panel
aa9223a6 ADR	65	* @setup_autorefresh : configure and enable the autorefresh config
aa9223a6 ADR	66	* @get_autorefresh : retrieve autorefresh config from hardware
25fdd593 JS	67	* @setup_dither : function to program the dither hw block
	68	* @get_line_count: obtain current vertical line counter
	69	*/
	70	struct dpu_hw_pingpong_ops {
	71	/**
	72	* enables vysnc generation and sets up init value of
	73	* read pointer and programs the tear check cofiguration
	74	*/
	75	int (setup_tearcheck)(struct dpu_hw_pingpong pp,
	76	struct dpu_hw_tear_check *cfg);
	77
	78	/**
	79	* enables tear check block
	80	*/
	81	int (enable_tearcheck)(struct dpu_hw_pingpong pp,
	82	bool enable);
	83
	84	/**
	85	* read, modify, write to either set or clear listening to external TE
	86	* @Return: 1 if TE was originally connected, 0 if not, or -ERROR
	87	*/
	88	int (connect_external_te)(struct dpu_hw_pingpong pp,
	89	bool enable_external_te);
	90
	91	/**
	92	* provides the programmed and current
	93	* line_count
	94	*/
	95	int (get_vsync_info)(struct dpu_hw_pingpong pp,
	96	struct dpu_hw_pp_vsync_info *info);
	97
aa9223a6 ADR	98	/**
	99	* configure and enable the autorefresh config
	100	*/
	101	void (setup_autorefresh)(struct dpu_hw_pingpong pp,
	102	u32 frame_count, bool enable);
	103
	104	/**
	105	* retrieve autorefresh config from hardware
	106	*/
	107	bool (get_autorefresh)(struct dpu_hw_pingpong pp,
	108	u32 *frame_count);
	109
25fdd593 JS	110	/**
	111	* Obtain current vertical line counter
	112	*/
	113	u32 (get_line_count)(struct dpu_hw_pingpong pp);
3c128638 KT	114
	115	/**
	116	* Setup dither matix for pingpong block
	117	*/
	118	void (setup_dither)(struct dpu_hw_pingpong pp,
	119	struct dpu_hw_dither_cfg *cfg);
893d6982 VK	120	/**
	121	* Enable DSC
	122	*/
	123	int (enable_dsc)(struct dpu_hw_pingpong pp);
	124
	125	/**
	126	* Disable DSC
	127	*/
	128	void (disable_dsc)(struct dpu_hw_pingpong pp);
	129
	130	/**
	131	* Setup DSC
	132	*/
	133	int (setup_dsc)(struct dpu_hw_pingpong pp);
25fdd593 JS	134	};
25fdd593 JS	135
dfa35bac DB	136	struct dpu_hw_merge_3d;
dfa35bac DB	137
25fdd593 JS	138	struct dpu_hw_pingpong {
	139	struct dpu_hw_blk base;
	140	struct dpu_hw_blk_reg_map hw;
	141
	142	/* pingpong */
	143	enum dpu_pingpong idx;
	144	const struct dpu_pingpong_cfg *caps;
dfa35bac	145	struct dpu_hw_merge_3d *merge_3d;
25fdd593 JS	146
	147	/* ops */
	148	struct dpu_hw_pingpong_ops ops;
	149	};
	150
b954fa6b DD	151	/**
	152	* to_dpu_hw_pingpong - convert base object dpu_hw_base to container
	153	* @hw: Pointer to base hardware block
	154	* return: Pointer to hardware block container
	155	*/
	156	static inline struct dpu_hw_pingpong to_dpu_hw_pingpong(struct dpu_hw_blk hw)
	157	{
	158	return container_of(hw, struct dpu_hw_pingpong, base);
	159	}
	160
25fdd593	161	/**
babdb815 MS	162	* dpu_hw_pingpong_init() - initializes the pingpong driver for the passed
	163	* pingpong catalog entry.
	164	* @cfg: Pingpong catalog entry for which driver object is required
25fdd593	165	* @addr: Mapped register io address of MDP
babdb815	166	* Return: Error code or allocated dpu_hw_pingpong context
25fdd593	167	*/
babdb815 MS	168	struct dpu_hw_pingpong dpu_hw_pingpong_init(const struct dpu_pingpong_cfg cfg,
babdb815 MS	169	void __iomem *addr);
25fdd593 JS	170
	171	/**
	172	* dpu_hw_pingpong_destroy - destroys pingpong driver context
	173	* should be called to free the context
	174	* @pp: Pointer to PP driver context returned by dpu_hw_pingpong_init
	175	*/
	176	void dpu_hw_pingpong_destroy(struct dpu_hw_pingpong *pp);
	177
	178	#endif /_DPU_HW_PINGPONG_H /