[linux-block.git] / drivers / gpu / drm / meson / meson_encoder_hdmi.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright (C) 2016 BayLibre, SAS
 * Author: Neil Armstrong <narmstrong@baylibre.com>
 * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
 */

#include <linux/clk.h>
#include <linux/component.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/of_graph.h>
#include <linux/regulator/consumer.h>
#include <linux/reset.h>

#include <media/cec-notifier.h>

#include <drm/drm_atomic_helper.h>
#include <drm/drm_bridge.h>
#include <drm/drm_bridge_connector.h>
#include <drm/drm_device.h>
#include <drm/drm_edid.h>
#include <drm/drm_probe_helper.h>
#include <drm/drm_simple_kms_helper.h>

#include <linux/media-bus-format.h>
#include <linux/videodev2.h>

#include "meson_drv.h"
#include "meson_registers.h"
#include "meson_vclk.h"
#include "meson_venc.h"
#include "meson_encoder_hdmi.h"

struct meson_encoder_hdmi {
	struct drm_encoder encoder;
	struct drm_bridge bridge;
	struct drm_bridge *next_bridge;
	struct drm_connector *connector;
	struct meson_drm *priv;
	unsigned long output_bus_fmt;
	struct cec_notifier *cec_notifier;
};

#define bridge_to_meson_encoder_hdmi(x) \
	container_of(x, struct meson_encoder_hdmi, bridge)

static int meson_encoder_hdmi_attach(struct drm_bridge *bridge,
				     enum drm_bridge_attach_flags flags)
{
	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);

	return drm_bridge_attach(bridge->encoder, encoder_hdmi->next_bridge,
				 &encoder_hdmi->bridge, flags);
}

static void meson_encoder_hdmi_detach(struct drm_bridge *bridge)
{
	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);

	cec_notifier_conn_unregister(encoder_hdmi->cec_notifier);
	encoder_hdmi->cec_notifier = NULL;
}

static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
					const struct drm_display_mode *mode)
{
	struct meson_drm *priv = encoder_hdmi->priv;
	int vic = drm_match_cea_mode(mode);
	unsigned int phy_freq;
	unsigned int vclk_freq;
	unsigned int venc_freq;
	unsigned int hdmi_freq;

	vclk_freq = mode->clock;

	/* For 420, pixel clock is half unlike venc clock */
	if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
		vclk_freq /= 2;

	/* TMDS clock is pixel_clock * 10 */
	phy_freq = vclk_freq * 10;

	if (!vic) {
		meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq,
				 vclk_freq, vclk_freq, vclk_freq, false);
		return;
	}

	/* 480i/576i needs global pixel doubling */
	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
		vclk_freq *= 2;

	venc_freq = vclk_freq;
	hdmi_freq = vclk_freq;

	/* VENC double pixels for 1080i, 720p and YUV420 modes */
	if (meson_venc_hdmi_venc_repeat(vic) ||
	    encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
		venc_freq *= 2;

	vclk_freq = max(venc_freq, hdmi_freq);

	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
		venc_freq /= 2;

	dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
		phy_freq, vclk_freq, venc_freq, hdmi_freq,
		priv->venc.hdmi_use_enci);

	meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq,
			 venc_freq, hdmi_freq, priv->venc.hdmi_use_enci);
}

static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bridge,
					const struct drm_display_info *display_info,
					const struct drm_display_mode *mode)
{
	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
	struct meson_drm *priv = encoder_hdmi->priv;
	bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
	unsigned int phy_freq;
	unsigned int vclk_freq;
	unsigned int venc_freq;
	unsigned int hdmi_freq;
	int vic = drm_match_cea_mode(mode);
	enum drm_mode_status status;

	dev_dbg(priv->dev, "Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));

	/* If sink does not support 540MHz, reject the non-420 HDMI2 modes */
	if (display_info->max_tmds_clock &&
	    mode->clock > display_info->max_tmds_clock &&
	    !drm_mode_is_420_only(display_info, mode) &&
	    !drm_mode_is_420_also(display_info, mode))
		return MODE_BAD;

	/* Check against non-VIC supported modes */
	if (!vic) {
		status = meson_venc_hdmi_supported_mode(mode);
		if (status != MODE_OK)
			return status;

		return meson_vclk_dmt_supported_freq(priv, mode->clock);
	/* Check against supported VIC modes */
	} else if (!meson_venc_hdmi_supported_vic(vic))
		return MODE_BAD;

	vclk_freq = mode->clock;

	/* For 420, pixel clock is half unlike venc clock */
	if (drm_mode_is_420_only(display_info, mode) ||
	    (!is_hdmi2_sink &&
	     drm_mode_is_420_also(display_info, mode)))
		vclk_freq /= 2;

	/* TMDS clock is pixel_clock * 10 */
	phy_freq = vclk_freq * 10;

	/* 480i/576i needs global pixel doubling */
	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
		vclk_freq *= 2;

	venc_freq = vclk_freq;
	hdmi_freq = vclk_freq;

	/* VENC double pixels for 1080i, 720p and YUV420 modes */
	if (meson_venc_hdmi_venc_repeat(vic) ||
	    drm_mode_is_420_only(display_info, mode) ||
	    (!is_hdmi2_sink &&
	     drm_mode_is_420_also(display_info, mode)))
		venc_freq *= 2;

	vclk_freq = max(venc_freq, hdmi_freq);

	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
		venc_freq /= 2;

	dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
		__func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);

	return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
}

static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge,
					     struct drm_bridge_state *bridge_state)
{
	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
	struct drm_atomic_state *state = bridge_state->base.state;
	unsigned int ycrcb_map = VPU_HDMI_OUTPUT_CBYCR;
	struct meson_drm *priv = encoder_hdmi->priv;
	struct drm_connector_state *conn_state;
	const struct drm_display_mode *mode;
	struct drm_crtc_state *crtc_state;
	struct drm_connector *connector;
	bool yuv420_mode = false;
	int vic;

	connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder);
	if (WARN_ON(!connector))
		return;

	conn_state = drm_atomic_get_new_connector_state(state, connector);
	if (WARN_ON(!conn_state))
		return;

	crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
	if (WARN_ON(!crtc_state))
		return;

	mode = &crtc_state->adjusted_mode;

	vic = drm_match_cea_mode(mode);

	dev_dbg(priv->dev, "\"%s\" vic %d\n", mode->name, vic);

	if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) {
		ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;
		yuv420_mode = true;
	} else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16)
		ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;

	/* VENC + VENC-DVI Mode setup */
	meson_venc_hdmi_mode_set(priv, vic, ycrcb_map, yuv420_mode, mode);

	/* VCLK Set clock */
	meson_encoder_hdmi_set_vclk(encoder_hdmi, mode);

	if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
		/* Setup YUV420 to HDMI-TX, no 10bit diphering */
		writel_relaxed(2 | (2 << 2),
			       priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
	else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16)
		/* Setup YUV422 to HDMI-TX, no 10bit diphering */
		writel_relaxed(1 | (2 << 2),
				priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
	else
		/* Setup YUV444 to HDMI-TX, no 10bit diphering */
		writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL));

	dev_dbg(priv->dev, "%s\n", priv->venc.hdmi_use_enci ? "VENCI" : "VENCP");

	if (priv->venc.hdmi_use_enci)
		writel_relaxed(1, priv->io_base + _REG(ENCI_VIDEO_EN));
	else
		writel_relaxed(1, priv->io_base + _REG(ENCP_VIDEO_EN));
}

static void meson_encoder_hdmi_atomic_disable(struct drm_bridge *bridge,
					     struct drm_bridge_state *bridge_state)
{
	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
	struct meson_drm *priv = encoder_hdmi->priv;

	writel_bits_relaxed(0x3, 0,
			    priv->io_base + _REG(VPU_HDMI_SETTING));

	writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN));
	writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN));
}

static const u32 meson_encoder_hdmi_out_bus_fmts[] = {
	MEDIA_BUS_FMT_YUV8_1X24,
	MEDIA_BUS_FMT_UYVY8_1X16,
	MEDIA_BUS_FMT_UYYVYY8_0_5X24,
};

static u32 *
meson_encoder_hdmi_get_inp_bus_fmts(struct drm_bridge *bridge,
					struct drm_bridge_state *bridge_state,
					struct drm_crtc_state *crtc_state,
					struct drm_connector_state *conn_state,
					u32 output_fmt,
					unsigned int *num_input_fmts)
{
	u32 *input_fmts = NULL;
	int i;

	*num_input_fmts = 0;

	for (i = 0 ; i < ARRAY_SIZE(meson_encoder_hdmi_out_bus_fmts) ; ++i) {
		if (output_fmt == meson_encoder_hdmi_out_bus_fmts[i]) {
			*num_input_fmts = 1;
			input_fmts = kcalloc(*num_input_fmts,
					     sizeof(*input_fmts),
					     GFP_KERNEL);
			if (!input_fmts)
				return NULL;

			input_fmts[0] = output_fmt;

			break;
		}
	}

	return input_fmts;
}

static int meson_encoder_hdmi_atomic_check(struct drm_bridge *bridge,
					struct drm_bridge_state *bridge_state,
					struct drm_crtc_state *crtc_state,
					struct drm_connector_state *conn_state)
{
	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
	struct drm_connector_state *old_conn_state =
		drm_atomic_get_old_connector_state(conn_state->state, conn_state->connector);
	struct meson_drm *priv = encoder_hdmi->priv;

	encoder_hdmi->output_bus_fmt = bridge_state->output_bus_cfg.format;

	dev_dbg(priv->dev, "output_bus_fmt %lx\n", encoder_hdmi->output_bus_fmt);

	if (!drm_connector_atomic_hdr_metadata_equal(old_conn_state, conn_state))
		crtc_state->mode_changed = true;

	return 0;
}

static void meson_encoder_hdmi_hpd_notify(struct drm_bridge *bridge,
					  enum drm_connector_status status)
{
	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
	struct edid *edid;

	if (!encoder_hdmi->cec_notifier)
		return;

	if (status == connector_status_connected) {
		edid = drm_bridge_get_edid(encoder_hdmi->next_bridge, encoder_hdmi->connector);
		if (!edid)
			return;

		cec_notifier_set_phys_addr_from_edid(encoder_hdmi->cec_notifier, edid);
	} else
		cec_notifier_phys_addr_invalidate(encoder_hdmi->cec_notifier);
}

static const struct drm_bridge_funcs meson_encoder_hdmi_bridge_funcs = {
	.attach = meson_encoder_hdmi_attach,
	.detach = meson_encoder_hdmi_detach,
	.mode_valid = meson_encoder_hdmi_mode_valid,
	.hpd_notify = meson_encoder_hdmi_hpd_notify,
	.atomic_enable = meson_encoder_hdmi_atomic_enable,
	.atomic_disable = meson_encoder_hdmi_atomic_disable,
	.atomic_get_input_bus_fmts = meson_encoder_hdmi_get_inp_bus_fmts,
	.atomic_check = meson_encoder_hdmi_atomic_check,
	.atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
	.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
	.atomic_reset = drm_atomic_helper_bridge_reset,
};

int meson_encoder_hdmi_init(struct meson_drm *priv)
{
	struct meson_encoder_hdmi *meson_encoder_hdmi;
	struct platform_device *pdev;
	struct device_node *remote;
	int ret;

	meson_encoder_hdmi = devm_kzalloc(priv->dev, sizeof(*meson_encoder_hdmi), GFP_KERNEL);
	if (!meson_encoder_hdmi)
		return -ENOMEM;

	/* HDMI Transceiver Bridge */
	remote = of_graph_get_remote_node(priv->dev->of_node, 1, 0);
	if (!remote) {
		dev_err(priv->dev, "HDMI transceiver device is disabled");
		return 0;
	}

	meson_encoder_hdmi->next_bridge = of_drm_find_bridge(remote);
	if (!meson_encoder_hdmi->next_bridge) {
		dev_err(priv->dev, "Failed to find HDMI transceiver bridge\n");
		return -EPROBE_DEFER;
	}

	/* HDMI Encoder Bridge */
	meson_encoder_hdmi->bridge.funcs = &meson_encoder_hdmi_bridge_funcs;
	meson_encoder_hdmi->bridge.of_node = priv->dev->of_node;
	meson_encoder_hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
	meson_encoder_hdmi->bridge.interlace_allowed = true;

	drm_bridge_add(&meson_encoder_hdmi->bridge);

	meson_encoder_hdmi->priv = priv;

	/* Encoder */
	ret = drm_simple_encoder_init(priv->drm, &meson_encoder_hdmi->encoder,
				      DRM_MODE_ENCODER_TMDS);
	if (ret) {
		dev_err(priv->dev, "Failed to init HDMI encoder: %d\n", ret);
		return ret;
	}

	meson_encoder_hdmi->encoder.possible_crtcs = BIT(0);

	/* Attach HDMI Encoder Bridge to Encoder */
	ret = drm_bridge_attach(&meson_encoder_hdmi->encoder, &meson_encoder_hdmi->bridge, NULL,
				DRM_BRIDGE_ATTACH_NO_CONNECTOR);
	if (ret) {
		dev_err(priv->dev, "Failed to attach bridge: %d\n", ret);
		return ret;
	}

	/* Initialize & attach Bridge Connector */
	meson_encoder_hdmi->connector = drm_bridge_connector_init(priv->drm,
							&meson_encoder_hdmi->encoder);
	if (IS_ERR(meson_encoder_hdmi->connector)) {
		dev_err(priv->dev, "Unable to create HDMI bridge connector\n");
		return PTR_ERR(meson_encoder_hdmi->connector);
	}
	drm_connector_attach_encoder(meson_encoder_hdmi->connector,
				     &meson_encoder_hdmi->encoder);

	/*
	 * We should have now in place:
	 * encoder->[hdmi encoder bridge]->[dw-hdmi bridge]->[display connector bridge]->[display connector]
	 */

	/*
	 * drm_connector_attach_max_bpc_property() requires the
	 * connector to have a state.
	 */
	drm_atomic_helper_connector_reset(meson_encoder_hdmi->connector);

	if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL) ||
	    meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) ||
	    meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
		drm_connector_attach_hdr_output_metadata_property(meson_encoder_hdmi->connector);

	drm_connector_attach_max_bpc_property(meson_encoder_hdmi->connector, 8, 8);

	/* Handle this here until handled by drm_bridge_connector_init() */
	meson_encoder_hdmi->connector->ycbcr_420_allowed = true;

	pdev = of_find_device_by_node(remote);
	if (pdev) {
		struct cec_connector_info conn_info;
		struct cec_notifier *notifier;

		cec_fill_conn_info_from_drm(&conn_info, meson_encoder_hdmi->connector);

		notifier = cec_notifier_conn_register(&pdev->dev, NULL, &conn_info);
		if (!notifier) {
			put_device(&pdev->dev);
			return -ENOMEM;
		}

		meson_encoder_hdmi->cec_notifier = notifier;
	}

	dev_dbg(priv->dev, "HDMI encoder initialized\n");

	return 0;
}
Commit	Line	Data
e67f6037 NA	1	// SPDX-License-Identifier: GPL-2.0-or-later
	2	/*
	3	* Copyright (C) 2016 BayLibre, SAS
	4	* Author: Neil Armstrong <narmstrong@baylibre.com>
	5	* Copyright (C) 2015 Amlogic, Inc. All rights reserved.
	6	*/
	7
	8	#include <linux/clk.h>
	9	#include <linux/component.h>
	10	#include <linux/kernel.h>
	11	#include <linux/module.h>
	12	#include <linux/of_device.h>
	13	#include <linux/of_graph.h>
	14	#include <linux/regulator/consumer.h>
	15	#include <linux/reset.h>
	16
0af5e0b4 NA	17	#include <media/cec-notifier.h>
0af5e0b4 NA	18
e67f6037 NA	19	#include <drm/drm_atomic_helper.h>
e67f6037 NA	20	#include <drm/drm_bridge.h>
0af5e0b4	21	#include <drm/drm_bridge_connector.h>
e67f6037 NA	22	#include <drm/drm_device.h>
	23	#include <drm/drm_edid.h>
	24	#include <drm/drm_probe_helper.h>
	25	#include <drm/drm_simple_kms_helper.h>
	26
	27	#include <linux/media-bus-format.h>
	28	#include <linux/videodev2.h>
	29
	30	#include "meson_drv.h"
	31	#include "meson_registers.h"
	32	#include "meson_vclk.h"
	33	#include "meson_venc.h"
	34	#include "meson_encoder_hdmi.h"
	35
	36	struct meson_encoder_hdmi {
	37	struct drm_encoder encoder;
	38	struct drm_bridge bridge;
	39	struct drm_bridge *next_bridge;
0af5e0b4	40	struct drm_connector *connector;
e67f6037 NA	41	struct meson_drm *priv;
e67f6037 NA	42	unsigned long output_bus_fmt;
0af5e0b4	43	struct cec_notifier *cec_notifier;
e67f6037 NA	44	};
	45
	46	#define bridge_to_meson_encoder_hdmi(x) \
	47	container_of(x, struct meson_encoder_hdmi, bridge)
	48
	49	static int meson_encoder_hdmi_attach(struct drm_bridge *bridge,
	50	enum drm_bridge_attach_flags flags)
	51	{
	52	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
	53
	54	return drm_bridge_attach(bridge->encoder, encoder_hdmi->next_bridge,
	55	&encoder_hdmi->bridge, flags);
	56	}
	57
0af5e0b4 NA	58	static void meson_encoder_hdmi_detach(struct drm_bridge *bridge)
	59	{
	60	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
	61
	62	cec_notifier_conn_unregister(encoder_hdmi->cec_notifier);
	63	encoder_hdmi->cec_notifier = NULL;
	64	}
	65
e67f6037 NA	66	static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi,
	67	const struct drm_display_mode *mode)
	68	{
	69	struct meson_drm *priv = encoder_hdmi->priv;
	70	int vic = drm_match_cea_mode(mode);
	71	unsigned int phy_freq;
	72	unsigned int vclk_freq;
	73	unsigned int venc_freq;
	74	unsigned int hdmi_freq;
	75
	76	vclk_freq = mode->clock;
	77
	78	/* For 420, pixel clock is half unlike venc clock */
	79	if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
	80	vclk_freq /= 2;
	81
	82	/* TMDS clock is pixel_clock * 10 */
	83	phy_freq = vclk_freq * 10;
	84
	85	if (!vic) {
	86	meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq,
	87	vclk_freq, vclk_freq, vclk_freq, false);
	88	return;
	89	}
	90
	91	/* 480i/576i needs global pixel doubling */
	92	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
	93	vclk_freq *= 2;
	94
	95	venc_freq = vclk_freq;
	96	hdmi_freq = vclk_freq;
	97
	98	/* VENC double pixels for 1080i, 720p and YUV420 modes */
	99	if (meson_venc_hdmi_venc_repeat(vic) \|\|
	100	encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
	101	venc_freq *= 2;
	102
	103	vclk_freq = max(venc_freq, hdmi_freq);
	104
	105	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
	106	venc_freq /= 2;
	107
	108	dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n",
	109	phy_freq, vclk_freq, venc_freq, hdmi_freq,
	110	priv->venc.hdmi_use_enci);
	111
	112	meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq,
	113	venc_freq, hdmi_freq, priv->venc.hdmi_use_enci);
	114	}
	115
	116	static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bridge,
	117	const struct drm_display_info *display_info,
	118	const struct drm_display_mode *mode)
	119	{
	120	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
	121	struct meson_drm *priv = encoder_hdmi->priv;
	122	bool is_hdmi2_sink = display_info->hdmi.scdc.supported;
	123	unsigned int phy_freq;
	124	unsigned int vclk_freq;
	125	unsigned int venc_freq;
	126	unsigned int hdmi_freq;
	127	int vic = drm_match_cea_mode(mode);
	128	enum drm_mode_status status;
	129
130	dev_dbg(priv->dev, "Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
131
132	/* If sink does not support 540MHz, reject the non-420 HDMI2 modes */
133	if (display_info->max_tmds_clock &&
134	mode->clock > display_info->max_tmds_clock &&
135	!drm_mode_is_420_only(display_info, mode) &&
136	!drm_mode_is_420_also(display_info, mode))
137	return MODE_BAD;
138
139	/* Check against non-VIC supported modes */
140	if (!vic) {
141	status = meson_venc_hdmi_supported_mode(mode);
142	if (status != MODE_OK)
143	return status;
144
145	return meson_vclk_dmt_supported_freq(priv, mode->clock);
146	/* Check against supported VIC modes */
147	} else if (!meson_venc_hdmi_supported_vic(vic))
148	return MODE_BAD;
149
150	vclk_freq = mode->clock;
151
152	/* For 420, pixel clock is half unlike venc clock */
153	if (drm_mode_is_420_only(display_info, mode) \|\|
154	(!is_hdmi2_sink &&
155	drm_mode_is_420_also(display_info, mode)))
156	vclk_freq /= 2;
157
158	/* TMDS clock is pixel_clock * 10 */
159	phy_freq = vclk_freq * 10;
160
161	/* 480i/576i needs global pixel doubling */
162	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
163	vclk_freq *= 2;
164
165	venc_freq = vclk_freq;
166	hdmi_freq = vclk_freq;
167
168	/* VENC double pixels for 1080i, 720p and YUV420 modes */
169	if (meson_venc_hdmi_venc_repeat(vic) \|\|
170	drm_mode_is_420_only(display_info, mode) \|\|
171	(!is_hdmi2_sink &&
172	drm_mode_is_420_also(display_info, mode)))
173	venc_freq *= 2;
174
175	vclk_freq = max(venc_freq, hdmi_freq);
176
177	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
178	venc_freq /= 2;
179
180	dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",
181	__func__, phy_freq, vclk_freq, venc_freq, hdmi_freq);
182
183	return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq);
184	}
185
186	static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge,
187	struct drm_bridge_state *bridge_state)
188	{
189	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
190	struct drm_atomic_state *state = bridge_state->base.state;
191	unsigned int ycrcb_map = VPU_HDMI_OUTPUT_CBYCR;
192	struct meson_drm *priv = encoder_hdmi->priv;
193	struct drm_connector_state *conn_state;
194	const struct drm_display_mode *mode;
195	struct drm_crtc_state *crtc_state;
196	struct drm_connector *connector;
197	bool yuv420_mode = false;
198	int vic;
199
200	connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder);
201	if (WARN_ON(!connector))
202	return;
203
204	conn_state = drm_atomic_get_new_connector_state(state, connector);
205	if (WARN_ON(!conn_state))
206	return;
207
208	crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
209	if (WARN_ON(!crtc_state))
210	return;
211
212	mode = &crtc_state->adjusted_mode;
213
214	vic = drm_match_cea_mode(mode);
215
216	dev_dbg(priv->dev, "\"%s\" vic %d\n", mode->name, vic);
217
218	if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) {
219	ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;
220	yuv420_mode = true;
c193a003 DK	221	} else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16)
c193a003 DK	222	ycrcb_map = VPU_HDMI_OUTPUT_CRYCB;
e67f6037 NA	223
	224	/* VENC + VENC-DVI Mode setup */
	225	meson_venc_hdmi_mode_set(priv, vic, ycrcb_map, yuv420_mode, mode);
	226
	227	/* VCLK Set clock */
	228	meson_encoder_hdmi_set_vclk(encoder_hdmi, mode);
	229
	230	if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)
	231	/* Setup YUV420 to HDMI-TX, no 10bit diphering */
	232	writel_relaxed(2 \| (2 << 2),
	233	priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
c193a003 DK	234	else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16)
	235	/* Setup YUV422 to HDMI-TX, no 10bit diphering */
	236	writel_relaxed(1 \| (2 << 2),
	237	priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
e67f6037 NA	238	else
	239	/* Setup YUV444 to HDMI-TX, no 10bit diphering */
	240	writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL));
	241
	242	dev_dbg(priv->dev, "%s\n", priv->venc.hdmi_use_enci ? "VENCI" : "VENCP");
	243
	244	if (priv->venc.hdmi_use_enci)
	245	writel_relaxed(1, priv->io_base + _REG(ENCI_VIDEO_EN));
	246	else
	247	writel_relaxed(1, priv->io_base + _REG(ENCP_VIDEO_EN));
	248	}
	249
	250	static void meson_encoder_hdmi_atomic_disable(struct drm_bridge *bridge,
	251	struct drm_bridge_state *bridge_state)
	252	{
	253	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
	254	struct meson_drm *priv = encoder_hdmi->priv;
	255
	256	writel_bits_relaxed(0x3, 0,
	257	priv->io_base + _REG(VPU_HDMI_SETTING));
	258
	259	writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN));
	260	writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN));
	261	}
	262
	263	static const u32 meson_encoder_hdmi_out_bus_fmts[] = {
	264	MEDIA_BUS_FMT_YUV8_1X24,
c193a003	265	MEDIA_BUS_FMT_UYVY8_1X16,
e67f6037 NA	266	MEDIA_BUS_FMT_UYYVYY8_0_5X24,
	267	};
	268
	269	static u32 *
	270	meson_encoder_hdmi_get_inp_bus_fmts(struct drm_bridge *bridge,
	271	struct drm_bridge_state *bridge_state,
	272	struct drm_crtc_state *crtc_state,
	273	struct drm_connector_state *conn_state,
	274	u32 output_fmt,
	275	unsigned int *num_input_fmts)
	276	{
	277	u32 *input_fmts = NULL;
	278	int i;
	279
	280	*num_input_fmts = 0;
	281
	282	for (i = 0 ; i < ARRAY_SIZE(meson_encoder_hdmi_out_bus_fmts) ; ++i) {
	283	if (output_fmt == meson_encoder_hdmi_out_bus_fmts[i]) {
	284	*num_input_fmts = 1;
	285	input_fmts = kcalloc(*num_input_fmts,
	286	sizeof(*input_fmts),
	287	GFP_KERNEL);
	288	if (!input_fmts)
	289	return NULL;
	290
	291	input_fmts[0] = output_fmt;
	292
	293	break;
	294	}
	295	}
	296
	297	return input_fmts;
	298	}
	299
	300	static int meson_encoder_hdmi_atomic_check(struct drm_bridge *bridge,
	301	struct drm_bridge_state *bridge_state,
	302	struct drm_crtc_state *crtc_state,
	303	struct drm_connector_state *conn_state)
	304	{
	305	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
	306	struct drm_connector_state *old_conn_state =
	307	drm_atomic_get_old_connector_state(conn_state->state, conn_state->connector);
	308	struct meson_drm *priv = encoder_hdmi->priv;
	309
	310	encoder_hdmi->output_bus_fmt = bridge_state->output_bus_cfg.format;
	311
	312	dev_dbg(priv->dev, "output_bus_fmt %lx\n", encoder_hdmi->output_bus_fmt);
	313
	314	if (!drm_connector_atomic_hdr_metadata_equal(old_conn_state, conn_state))
	315	crtc_state->mode_changed = true;
	316
	317	return 0;
	318	}
	319
0af5e0b4 NA	320	static void meson_encoder_hdmi_hpd_notify(struct drm_bridge *bridge,
	321	enum drm_connector_status status)
	322	{
	323	struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge);
	324	struct edid *edid;
	325
	326	if (!encoder_hdmi->cec_notifier)
	327	return;
	328
	329	if (status == connector_status_connected) {
	330	edid = drm_bridge_get_edid(encoder_hdmi->next_bridge, encoder_hdmi->connector);
	331	if (!edid)
	332	return;
	333
	334	cec_notifier_set_phys_addr_from_edid(encoder_hdmi->cec_notifier, edid);
	335	} else
	336	cec_notifier_phys_addr_invalidate(encoder_hdmi->cec_notifier);
	337	}
	338
e67f6037 NA	339	static const struct drm_bridge_funcs meson_encoder_hdmi_bridge_funcs = {
e67f6037 NA	340	.attach = meson_encoder_hdmi_attach,
0af5e0b4	341	.detach = meson_encoder_hdmi_detach,
e67f6037	342	.mode_valid = meson_encoder_hdmi_mode_valid,
0af5e0b4	343	.hpd_notify = meson_encoder_hdmi_hpd_notify,
e67f6037 NA	344	.atomic_enable = meson_encoder_hdmi_atomic_enable,
	345	.atomic_disable = meson_encoder_hdmi_atomic_disable,
	346	.atomic_get_input_bus_fmts = meson_encoder_hdmi_get_inp_bus_fmts,
	347	.atomic_check = meson_encoder_hdmi_atomic_check,
	348	.atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
	349	.atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
	350	.atomic_reset = drm_atomic_helper_bridge_reset,
	351	};
	352
	353	int meson_encoder_hdmi_init(struct meson_drm *priv)
	354	{
	355	struct meson_encoder_hdmi *meson_encoder_hdmi;
0af5e0b4	356	struct platform_device *pdev;
e67f6037 NA	357	struct device_node *remote;
	358	int ret;
	359
	360	meson_encoder_hdmi = devm_kzalloc(priv->dev, sizeof(*meson_encoder_hdmi), GFP_KERNEL);
	361	if (!meson_encoder_hdmi)
	362	return -ENOMEM;
	363
	364	/* HDMI Transceiver Bridge */
	365	remote = of_graph_get_remote_node(priv->dev->of_node, 1, 0);
	366	if (!remote) {
	367	dev_err(priv->dev, "HDMI transceiver device is disabled");
	368	return 0;
	369	}
	370
	371	meson_encoder_hdmi->next_bridge = of_drm_find_bridge(remote);
	372	if (!meson_encoder_hdmi->next_bridge) {
	373	dev_err(priv->dev, "Failed to find HDMI transceiver bridge\n");
	374	return -EPROBE_DEFER;
	375	}
	376
	377	/* HDMI Encoder Bridge */
	378	meson_encoder_hdmi->bridge.funcs = &meson_encoder_hdmi_bridge_funcs;
	379	meson_encoder_hdmi->bridge.of_node = priv->dev->of_node;
	380	meson_encoder_hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
0af5e0b4	381	meson_encoder_hdmi->bridge.interlace_allowed = true;
e67f6037 NA	382
	383	drm_bridge_add(&meson_encoder_hdmi->bridge);
	384
	385	meson_encoder_hdmi->priv = priv;
	386
	387	/* Encoder */
	388	ret = drm_simple_encoder_init(priv->drm, &meson_encoder_hdmi->encoder,
	389	DRM_MODE_ENCODER_TMDS);
	390	if (ret) {
	391	dev_err(priv->dev, "Failed to init HDMI encoder: %d\n", ret);
	392	return ret;
	393	}
	394
	395	meson_encoder_hdmi->encoder.possible_crtcs = BIT(0);
	396
	397	/* Attach HDMI Encoder Bridge to Encoder */
0af5e0b4 NA	398	ret = drm_bridge_attach(&meson_encoder_hdmi->encoder, &meson_encoder_hdmi->bridge, NULL,
0af5e0b4 NA	399	DRM_BRIDGE_ATTACH_NO_CONNECTOR);
e67f6037 NA	400	if (ret) {
	401	dev_err(priv->dev, "Failed to attach bridge: %d\n", ret);
	402	return ret;
	403	}
	404
0af5e0b4 NA	405	/* Initialize & attach Bridge Connector */
	406	meson_encoder_hdmi->connector = drm_bridge_connector_init(priv->drm,
	407	&meson_encoder_hdmi->encoder);
	408	if (IS_ERR(meson_encoder_hdmi->connector)) {
	409	dev_err(priv->dev, "Unable to create HDMI bridge connector\n");
	410	return PTR_ERR(meson_encoder_hdmi->connector);
	411	}
	412	drm_connector_attach_encoder(meson_encoder_hdmi->connector,
	413	&meson_encoder_hdmi->encoder);
	414
e67f6037 NA	415	/*
e67f6037 NA	416	* We should have now in place:
0af5e0b4	417	* encoder->[hdmi encoder bridge]->[dw-hdmi bridge]->[display connector bridge]->[display connector]
e67f6037 NA	418	*/
e67f6037 NA	419
0af5e0b4 NA	420	/*
	421	* drm_connector_attach_max_bpc_property() requires the
	422	* connector to have a state.
	423	*/
	424	drm_atomic_helper_connector_reset(meson_encoder_hdmi->connector);
	425
	426	if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL) \|\|
	427	meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) \|\|
	428	meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
	429	drm_connector_attach_hdr_output_metadata_property(meson_encoder_hdmi->connector);
	430
	431	drm_connector_attach_max_bpc_property(meson_encoder_hdmi->connector, 8, 8);
	432
	433	/* Handle this here until handled by drm_bridge_connector_init() */
	434	meson_encoder_hdmi->connector->ycbcr_420_allowed = true;
	435
	436	pdev = of_find_device_by_node(remote);
	437	if (pdev) {
	438	struct cec_connector_info conn_info;
	439	struct cec_notifier *notifier;
	440
	441	cec_fill_conn_info_from_drm(&conn_info, meson_encoder_hdmi->connector);
	442
	443	notifier = cec_notifier_conn_register(&pdev->dev, NULL, &conn_info);
73810768 ML	444	if (!notifier) {
73810768 ML	445	put_device(&pdev->dev);
0af5e0b4	446	return -ENOMEM;
73810768	447	}
0af5e0b4 NA	448
	449	meson_encoder_hdmi->cec_notifier = notifier;
	450	}
	451
e67f6037 NA	452	dev_dbg(priv->dev, "HDMI encoder initialized\n");
	453
	454	return 0;
	455	}