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e67f6037 NA |
1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2 | /* | |
3 | * Copyright (C) 2016 BayLibre, SAS | |
4 | * Author: Neil Armstrong <narmstrong@baylibre.com> | |
5 | * Copyright (C) 2015 Amlogic, Inc. All rights reserved. | |
6 | */ | |
7 | ||
8 | #include <linux/clk.h> | |
9 | #include <linux/component.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/module.h> | |
722d4f06 | 12 | #include <linux/of.h> |
e67f6037 | 13 | #include <linux/of_graph.h> |
722d4f06 RH |
14 | #include <linux/of_platform.h> |
15 | #include <linux/platform_device.h> | |
e67f6037 NA |
16 | #include <linux/regulator/consumer.h> |
17 | #include <linux/reset.h> | |
18 | ||
0af5e0b4 NA |
19 | #include <media/cec-notifier.h> |
20 | ||
e67f6037 NA |
21 | #include <drm/drm_atomic_helper.h> |
22 | #include <drm/drm_bridge.h> | |
0af5e0b4 | 23 | #include <drm/drm_bridge_connector.h> |
e67f6037 NA |
24 | #include <drm/drm_device.h> |
25 | #include <drm/drm_edid.h> | |
26 | #include <drm/drm_probe_helper.h> | |
27 | #include <drm/drm_simple_kms_helper.h> | |
28 | ||
29 | #include <linux/media-bus-format.h> | |
30 | #include <linux/videodev2.h> | |
31 | ||
32 | #include "meson_drv.h" | |
33 | #include "meson_registers.h" | |
34 | #include "meson_vclk.h" | |
35 | #include "meson_venc.h" | |
36 | #include "meson_encoder_hdmi.h" | |
37 | ||
38 | struct meson_encoder_hdmi { | |
39 | struct drm_encoder encoder; | |
40 | struct drm_bridge bridge; | |
41 | struct drm_bridge *next_bridge; | |
0af5e0b4 | 42 | struct drm_connector *connector; |
e67f6037 NA |
43 | struct meson_drm *priv; |
44 | unsigned long output_bus_fmt; | |
0af5e0b4 | 45 | struct cec_notifier *cec_notifier; |
e67f6037 NA |
46 | }; |
47 | ||
48 | #define bridge_to_meson_encoder_hdmi(x) \ | |
49 | container_of(x, struct meson_encoder_hdmi, bridge) | |
50 | ||
51 | static int meson_encoder_hdmi_attach(struct drm_bridge *bridge, | |
52 | enum drm_bridge_attach_flags flags) | |
53 | { | |
54 | struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); | |
55 | ||
56 | return drm_bridge_attach(bridge->encoder, encoder_hdmi->next_bridge, | |
57 | &encoder_hdmi->bridge, flags); | |
58 | } | |
59 | ||
0af5e0b4 NA |
60 | static void meson_encoder_hdmi_detach(struct drm_bridge *bridge) |
61 | { | |
62 | struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); | |
63 | ||
64 | cec_notifier_conn_unregister(encoder_hdmi->cec_notifier); | |
65 | encoder_hdmi->cec_notifier = NULL; | |
66 | } | |
67 | ||
e67f6037 NA |
68 | static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi, |
69 | const struct drm_display_mode *mode) | |
70 | { | |
71 | struct meson_drm *priv = encoder_hdmi->priv; | |
72 | int vic = drm_match_cea_mode(mode); | |
73 | unsigned int phy_freq; | |
74 | unsigned int vclk_freq; | |
75 | unsigned int venc_freq; | |
76 | unsigned int hdmi_freq; | |
77 | ||
78 | vclk_freq = mode->clock; | |
79 | ||
80 | /* For 420, pixel clock is half unlike venc clock */ | |
81 | if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) | |
82 | vclk_freq /= 2; | |
83 | ||
84 | /* TMDS clock is pixel_clock * 10 */ | |
85 | phy_freq = vclk_freq * 10; | |
86 | ||
87 | if (!vic) { | |
88 | meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq, | |
89 | vclk_freq, vclk_freq, vclk_freq, false); | |
90 | return; | |
91 | } | |
92 | ||
93 | /* 480i/576i needs global pixel doubling */ | |
94 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) | |
95 | vclk_freq *= 2; | |
96 | ||
97 | venc_freq = vclk_freq; | |
98 | hdmi_freq = vclk_freq; | |
99 | ||
100 | /* VENC double pixels for 1080i, 720p and YUV420 modes */ | |
101 | if (meson_venc_hdmi_venc_repeat(vic) || | |
102 | encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) | |
103 | venc_freq *= 2; | |
104 | ||
105 | vclk_freq = max(venc_freq, hdmi_freq); | |
106 | ||
107 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) | |
108 | venc_freq /= 2; | |
109 | ||
110 | dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n", | |
111 | phy_freq, vclk_freq, venc_freq, hdmi_freq, | |
112 | priv->venc.hdmi_use_enci); | |
113 | ||
114 | meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq, | |
115 | venc_freq, hdmi_freq, priv->venc.hdmi_use_enci); | |
116 | } | |
117 | ||
118 | static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bridge, | |
119 | const struct drm_display_info *display_info, | |
120 | const struct drm_display_mode *mode) | |
121 | { | |
122 | struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); | |
123 | struct meson_drm *priv = encoder_hdmi->priv; | |
124 | bool is_hdmi2_sink = display_info->hdmi.scdc.supported; | |
125 | unsigned int phy_freq; | |
126 | unsigned int vclk_freq; | |
127 | unsigned int venc_freq; | |
128 | unsigned int hdmi_freq; | |
129 | int vic = drm_match_cea_mode(mode); | |
130 | enum drm_mode_status status; | |
131 | ||
132 | dev_dbg(priv->dev, "Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); | |
133 | ||
134 | /* If sink does not support 540MHz, reject the non-420 HDMI2 modes */ | |
135 | if (display_info->max_tmds_clock && | |
136 | mode->clock > display_info->max_tmds_clock && | |
137 | !drm_mode_is_420_only(display_info, mode) && | |
138 | !drm_mode_is_420_also(display_info, mode)) | |
139 | return MODE_BAD; | |
140 | ||
141 | /* Check against non-VIC supported modes */ | |
142 | if (!vic) { | |
143 | status = meson_venc_hdmi_supported_mode(mode); | |
144 | if (status != MODE_OK) | |
145 | return status; | |
146 | ||
147 | return meson_vclk_dmt_supported_freq(priv, mode->clock); | |
148 | /* Check against supported VIC modes */ | |
149 | } else if (!meson_venc_hdmi_supported_vic(vic)) | |
150 | return MODE_BAD; | |
151 | ||
152 | vclk_freq = mode->clock; | |
153 | ||
154 | /* For 420, pixel clock is half unlike venc clock */ | |
155 | if (drm_mode_is_420_only(display_info, mode) || | |
156 | (!is_hdmi2_sink && | |
157 | drm_mode_is_420_also(display_info, mode))) | |
158 | vclk_freq /= 2; | |
159 | ||
160 | /* TMDS clock is pixel_clock * 10 */ | |
161 | phy_freq = vclk_freq * 10; | |
162 | ||
163 | /* 480i/576i needs global pixel doubling */ | |
164 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) | |
165 | vclk_freq *= 2; | |
166 | ||
167 | venc_freq = vclk_freq; | |
168 | hdmi_freq = vclk_freq; | |
169 | ||
170 | /* VENC double pixels for 1080i, 720p and YUV420 modes */ | |
171 | if (meson_venc_hdmi_venc_repeat(vic) || | |
172 | drm_mode_is_420_only(display_info, mode) || | |
173 | (!is_hdmi2_sink && | |
174 | drm_mode_is_420_also(display_info, mode))) | |
175 | venc_freq *= 2; | |
176 | ||
177 | vclk_freq = max(venc_freq, hdmi_freq); | |
178 | ||
179 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) | |
180 | venc_freq /= 2; | |
181 | ||
182 | dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n", | |
183 | __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq); | |
184 | ||
185 | return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq); | |
186 | } | |
187 | ||
188 | static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge, | |
189 | struct drm_bridge_state *bridge_state) | |
190 | { | |
191 | struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); | |
192 | struct drm_atomic_state *state = bridge_state->base.state; | |
193 | unsigned int ycrcb_map = VPU_HDMI_OUTPUT_CBYCR; | |
194 | struct meson_drm *priv = encoder_hdmi->priv; | |
195 | struct drm_connector_state *conn_state; | |
196 | const struct drm_display_mode *mode; | |
197 | struct drm_crtc_state *crtc_state; | |
198 | struct drm_connector *connector; | |
199 | bool yuv420_mode = false; | |
200 | int vic; | |
201 | ||
202 | connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); | |
203 | if (WARN_ON(!connector)) | |
204 | return; | |
205 | ||
206 | conn_state = drm_atomic_get_new_connector_state(state, connector); | |
207 | if (WARN_ON(!conn_state)) | |
208 | return; | |
209 | ||
210 | crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); | |
211 | if (WARN_ON(!crtc_state)) | |
212 | return; | |
213 | ||
214 | mode = &crtc_state->adjusted_mode; | |
215 | ||
216 | vic = drm_match_cea_mode(mode); | |
217 | ||
218 | dev_dbg(priv->dev, "\"%s\" vic %d\n", mode->name, vic); | |
219 | ||
220 | if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) { | |
221 | ycrcb_map = VPU_HDMI_OUTPUT_CRYCB; | |
222 | yuv420_mode = true; | |
c193a003 DK |
223 | } else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16) |
224 | ycrcb_map = VPU_HDMI_OUTPUT_CRYCB; | |
e67f6037 NA |
225 | |
226 | /* VENC + VENC-DVI Mode setup */ | |
227 | meson_venc_hdmi_mode_set(priv, vic, ycrcb_map, yuv420_mode, mode); | |
228 | ||
229 | /* VCLK Set clock */ | |
230 | meson_encoder_hdmi_set_vclk(encoder_hdmi, mode); | |
231 | ||
232 | if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) | |
233 | /* Setup YUV420 to HDMI-TX, no 10bit diphering */ | |
234 | writel_relaxed(2 | (2 << 2), | |
235 | priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); | |
c193a003 DK |
236 | else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16) |
237 | /* Setup YUV422 to HDMI-TX, no 10bit diphering */ | |
238 | writel_relaxed(1 | (2 << 2), | |
239 | priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); | |
e67f6037 NA |
240 | else |
241 | /* Setup YUV444 to HDMI-TX, no 10bit diphering */ | |
242 | writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); | |
243 | ||
244 | dev_dbg(priv->dev, "%s\n", priv->venc.hdmi_use_enci ? "VENCI" : "VENCP"); | |
245 | ||
246 | if (priv->venc.hdmi_use_enci) | |
247 | writel_relaxed(1, priv->io_base + _REG(ENCI_VIDEO_EN)); | |
248 | else | |
249 | writel_relaxed(1, priv->io_base + _REG(ENCP_VIDEO_EN)); | |
250 | } | |
251 | ||
252 | static void meson_encoder_hdmi_atomic_disable(struct drm_bridge *bridge, | |
253 | struct drm_bridge_state *bridge_state) | |
254 | { | |
255 | struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); | |
256 | struct meson_drm *priv = encoder_hdmi->priv; | |
257 | ||
258 | writel_bits_relaxed(0x3, 0, | |
259 | priv->io_base + _REG(VPU_HDMI_SETTING)); | |
260 | ||
261 | writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN)); | |
262 | writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN)); | |
263 | } | |
264 | ||
265 | static const u32 meson_encoder_hdmi_out_bus_fmts[] = { | |
266 | MEDIA_BUS_FMT_YUV8_1X24, | |
c193a003 | 267 | MEDIA_BUS_FMT_UYVY8_1X16, |
e67f6037 NA |
268 | MEDIA_BUS_FMT_UYYVYY8_0_5X24, |
269 | }; | |
270 | ||
271 | static u32 * | |
272 | meson_encoder_hdmi_get_inp_bus_fmts(struct drm_bridge *bridge, | |
273 | struct drm_bridge_state *bridge_state, | |
274 | struct drm_crtc_state *crtc_state, | |
275 | struct drm_connector_state *conn_state, | |
276 | u32 output_fmt, | |
277 | unsigned int *num_input_fmts) | |
278 | { | |
279 | u32 *input_fmts = NULL; | |
280 | int i; | |
281 | ||
282 | *num_input_fmts = 0; | |
283 | ||
284 | for (i = 0 ; i < ARRAY_SIZE(meson_encoder_hdmi_out_bus_fmts) ; ++i) { | |
285 | if (output_fmt == meson_encoder_hdmi_out_bus_fmts[i]) { | |
286 | *num_input_fmts = 1; | |
287 | input_fmts = kcalloc(*num_input_fmts, | |
288 | sizeof(*input_fmts), | |
289 | GFP_KERNEL); | |
290 | if (!input_fmts) | |
291 | return NULL; | |
292 | ||
293 | input_fmts[0] = output_fmt; | |
294 | ||
295 | break; | |
296 | } | |
297 | } | |
298 | ||
299 | return input_fmts; | |
300 | } | |
301 | ||
302 | static int meson_encoder_hdmi_atomic_check(struct drm_bridge *bridge, | |
303 | struct drm_bridge_state *bridge_state, | |
304 | struct drm_crtc_state *crtc_state, | |
305 | struct drm_connector_state *conn_state) | |
306 | { | |
307 | struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); | |
308 | struct drm_connector_state *old_conn_state = | |
309 | drm_atomic_get_old_connector_state(conn_state->state, conn_state->connector); | |
310 | struct meson_drm *priv = encoder_hdmi->priv; | |
311 | ||
312 | encoder_hdmi->output_bus_fmt = bridge_state->output_bus_cfg.format; | |
313 | ||
314 | dev_dbg(priv->dev, "output_bus_fmt %lx\n", encoder_hdmi->output_bus_fmt); | |
315 | ||
316 | if (!drm_connector_atomic_hdr_metadata_equal(old_conn_state, conn_state)) | |
317 | crtc_state->mode_changed = true; | |
318 | ||
319 | return 0; | |
320 | } | |
321 | ||
0af5e0b4 NA |
322 | static void meson_encoder_hdmi_hpd_notify(struct drm_bridge *bridge, |
323 | enum drm_connector_status status) | |
324 | { | |
325 | struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); | |
326 | struct edid *edid; | |
327 | ||
328 | if (!encoder_hdmi->cec_notifier) | |
329 | return; | |
330 | ||
331 | if (status == connector_status_connected) { | |
332 | edid = drm_bridge_get_edid(encoder_hdmi->next_bridge, encoder_hdmi->connector); | |
333 | if (!edid) | |
334 | return; | |
335 | ||
336 | cec_notifier_set_phys_addr_from_edid(encoder_hdmi->cec_notifier, edid); | |
099f0af9 JN |
337 | |
338 | kfree(edid); | |
0af5e0b4 NA |
339 | } else |
340 | cec_notifier_phys_addr_invalidate(encoder_hdmi->cec_notifier); | |
341 | } | |
342 | ||
e67f6037 NA |
343 | static const struct drm_bridge_funcs meson_encoder_hdmi_bridge_funcs = { |
344 | .attach = meson_encoder_hdmi_attach, | |
0af5e0b4 | 345 | .detach = meson_encoder_hdmi_detach, |
e67f6037 | 346 | .mode_valid = meson_encoder_hdmi_mode_valid, |
0af5e0b4 | 347 | .hpd_notify = meson_encoder_hdmi_hpd_notify, |
e67f6037 NA |
348 | .atomic_enable = meson_encoder_hdmi_atomic_enable, |
349 | .atomic_disable = meson_encoder_hdmi_atomic_disable, | |
350 | .atomic_get_input_bus_fmts = meson_encoder_hdmi_get_inp_bus_fmts, | |
351 | .atomic_check = meson_encoder_hdmi_atomic_check, | |
352 | .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, | |
353 | .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, | |
354 | .atomic_reset = drm_atomic_helper_bridge_reset, | |
355 | }; | |
356 | ||
357 | int meson_encoder_hdmi_init(struct meson_drm *priv) | |
358 | { | |
359 | struct meson_encoder_hdmi *meson_encoder_hdmi; | |
0af5e0b4 | 360 | struct platform_device *pdev; |
e67f6037 NA |
361 | struct device_node *remote; |
362 | int ret; | |
363 | ||
364 | meson_encoder_hdmi = devm_kzalloc(priv->dev, sizeof(*meson_encoder_hdmi), GFP_KERNEL); | |
365 | if (!meson_encoder_hdmi) | |
366 | return -ENOMEM; | |
367 | ||
368 | /* HDMI Transceiver Bridge */ | |
369 | remote = of_graph_get_remote_node(priv->dev->of_node, 1, 0); | |
370 | if (!remote) { | |
371 | dev_err(priv->dev, "HDMI transceiver device is disabled"); | |
372 | return 0; | |
373 | } | |
374 | ||
375 | meson_encoder_hdmi->next_bridge = of_drm_find_bridge(remote); | |
376 | if (!meson_encoder_hdmi->next_bridge) { | |
377 | dev_err(priv->dev, "Failed to find HDMI transceiver bridge\n"); | |
d82a5a4a ML |
378 | ret = -EPROBE_DEFER; |
379 | goto err_put_node; | |
e67f6037 NA |
380 | } |
381 | ||
382 | /* HDMI Encoder Bridge */ | |
383 | meson_encoder_hdmi->bridge.funcs = &meson_encoder_hdmi_bridge_funcs; | |
384 | meson_encoder_hdmi->bridge.of_node = priv->dev->of_node; | |
385 | meson_encoder_hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA; | |
0af5e0b4 | 386 | meson_encoder_hdmi->bridge.interlace_allowed = true; |
e67f6037 NA |
387 | |
388 | drm_bridge_add(&meson_encoder_hdmi->bridge); | |
389 | ||
390 | meson_encoder_hdmi->priv = priv; | |
391 | ||
392 | /* Encoder */ | |
393 | ret = drm_simple_encoder_init(priv->drm, &meson_encoder_hdmi->encoder, | |
394 | DRM_MODE_ENCODER_TMDS); | |
395 | if (ret) { | |
396 | dev_err(priv->dev, "Failed to init HDMI encoder: %d\n", ret); | |
d82a5a4a | 397 | goto err_put_node; |
e67f6037 NA |
398 | } |
399 | ||
400 | meson_encoder_hdmi->encoder.possible_crtcs = BIT(0); | |
401 | ||
402 | /* Attach HDMI Encoder Bridge to Encoder */ | |
0af5e0b4 NA |
403 | ret = drm_bridge_attach(&meson_encoder_hdmi->encoder, &meson_encoder_hdmi->bridge, NULL, |
404 | DRM_BRIDGE_ATTACH_NO_CONNECTOR); | |
e67f6037 NA |
405 | if (ret) { |
406 | dev_err(priv->dev, "Failed to attach bridge: %d\n", ret); | |
d82a5a4a | 407 | goto err_put_node; |
e67f6037 NA |
408 | } |
409 | ||
0af5e0b4 NA |
410 | /* Initialize & attach Bridge Connector */ |
411 | meson_encoder_hdmi->connector = drm_bridge_connector_init(priv->drm, | |
412 | &meson_encoder_hdmi->encoder); | |
413 | if (IS_ERR(meson_encoder_hdmi->connector)) { | |
414 | dev_err(priv->dev, "Unable to create HDMI bridge connector\n"); | |
d82a5a4a ML |
415 | ret = PTR_ERR(meson_encoder_hdmi->connector); |
416 | goto err_put_node; | |
0af5e0b4 NA |
417 | } |
418 | drm_connector_attach_encoder(meson_encoder_hdmi->connector, | |
419 | &meson_encoder_hdmi->encoder); | |
420 | ||
e67f6037 NA |
421 | /* |
422 | * We should have now in place: | |
0af5e0b4 | 423 | * encoder->[hdmi encoder bridge]->[dw-hdmi bridge]->[display connector bridge]->[display connector] |
e67f6037 NA |
424 | */ |
425 | ||
0af5e0b4 NA |
426 | /* |
427 | * drm_connector_attach_max_bpc_property() requires the | |
428 | * connector to have a state. | |
429 | */ | |
430 | drm_atomic_helper_connector_reset(meson_encoder_hdmi->connector); | |
431 | ||
432 | if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL) || | |
433 | meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) || | |
434 | meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) | |
435 | drm_connector_attach_hdr_output_metadata_property(meson_encoder_hdmi->connector); | |
436 | ||
437 | drm_connector_attach_max_bpc_property(meson_encoder_hdmi->connector, 8, 8); | |
438 | ||
439 | /* Handle this here until handled by drm_bridge_connector_init() */ | |
440 | meson_encoder_hdmi->connector->ycbcr_420_allowed = true; | |
441 | ||
442 | pdev = of_find_device_by_node(remote); | |
d82a5a4a | 443 | of_node_put(remote); |
0af5e0b4 NA |
444 | if (pdev) { |
445 | struct cec_connector_info conn_info; | |
446 | struct cec_notifier *notifier; | |
447 | ||
448 | cec_fill_conn_info_from_drm(&conn_info, meson_encoder_hdmi->connector); | |
449 | ||
450 | notifier = cec_notifier_conn_register(&pdev->dev, NULL, &conn_info); | |
73810768 ML |
451 | if (!notifier) { |
452 | put_device(&pdev->dev); | |
0af5e0b4 | 453 | return -ENOMEM; |
73810768 | 454 | } |
0af5e0b4 NA |
455 | |
456 | meson_encoder_hdmi->cec_notifier = notifier; | |
457 | } | |
458 | ||
09847723 AL |
459 | priv->encoders[MESON_ENC_HDMI] = meson_encoder_hdmi; |
460 | ||
e67f6037 NA |
461 | dev_dbg(priv->dev, "HDMI encoder initialized\n"); |
462 | ||
463 | return 0; | |
d82a5a4a ML |
464 | |
465 | err_put_node: | |
466 | of_node_put(remote); | |
467 | return ret; | |
e67f6037 | 468 | } |
09847723 AL |
469 | |
470 | void meson_encoder_hdmi_remove(struct meson_drm *priv) | |
471 | { | |
472 | struct meson_encoder_hdmi *meson_encoder_hdmi; | |
473 | ||
474 | if (priv->encoders[MESON_ENC_HDMI]) { | |
475 | meson_encoder_hdmi = priv->encoders[MESON_ENC_HDMI]; | |
476 | drm_bridge_remove(&meson_encoder_hdmi->bridge); | |
09847723 AL |
477 | } |
478 | } |