[linux-block.git] / drivers / gpu / drm / meson / meson_drv.c

/*
 * Copyright (C) 2016 BayLibre, SAS
 * Author: Neil Armstrong <narmstrong@baylibre.com>
 * Copyright (C) 2014 Endless Mobile
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of the
 * License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see <http://www.gnu.org/licenses/>.
 *
 * Written by:
 *     Jasper St. Pierre <jstpierre@mecheye.net>
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/platform_device.h>
#include <linux/component.h>
#include <linux/of_graph.h>

#include <drm/drmP.h>
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_flip_work.h>
#include <drm/drm_gem_cma_helper.h>
#include <drm/drm_gem_framebuffer_helper.h>
#include <drm/drm_plane_helper.h>
#include <drm/drm_probe_helper.h>
#include <drm/drm_rect.h>

#include "meson_drv.h"
#include "meson_plane.h"
#include "meson_overlay.h"
#include "meson_crtc.h"
#include "meson_venc_cvbs.h"

#include "meson_vpp.h"
#include "meson_viu.h"
#include "meson_venc.h"
#include "meson_canvas.h"
#include "meson_registers.h"

#define DRIVER_NAME "meson"
#define DRIVER_DESC "Amlogic Meson DRM driver"

/**
 * DOC: Video Processing Unit
 *
 * VPU Handles the Global Video Processing, it includes management of the
 * clocks gates, blocks reset lines and power domains.
 *
 * What is missing :
 *
 * - Full reset of entire video processing HW blocks
 * - Scaling and setup of the VPU clock
 * - Bus clock gates
 * - Powering up video processing HW blocks
 * - Powering Up HDMI controller and PHY
 */

static const struct drm_mode_config_funcs meson_mode_config_funcs = {
	.atomic_check        = drm_atomic_helper_check,
	.atomic_commit       = drm_atomic_helper_commit,
	.fb_create           = drm_gem_fb_create,
};

static irqreturn_t meson_irq(int irq, void *arg)
{
	struct drm_device *dev = arg;
	struct meson_drm *priv = dev->dev_private;

	(void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));

	meson_crtc_irq(priv);

	return IRQ_HANDLED;
}

DEFINE_DRM_GEM_CMA_FOPS(fops);

static struct drm_driver meson_driver = {
	.driver_features	= DRIVER_HAVE_IRQ | DRIVER_GEM |
				  DRIVER_MODESET | DRIVER_PRIME |
				  DRIVER_ATOMIC,

	/* IRQ */
	.irq_handler		= meson_irq,

	/* PRIME Ops */
	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,
	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
	.gem_prime_import	= drm_gem_prime_import,
	.gem_prime_export	= drm_gem_prime_export,
	.gem_prime_get_sg_table	= drm_gem_cma_prime_get_sg_table,
	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
	.gem_prime_vmap		= drm_gem_cma_prime_vmap,
	.gem_prime_vunmap	= drm_gem_cma_prime_vunmap,
	.gem_prime_mmap		= drm_gem_cma_prime_mmap,

	/* GEM Ops */
	.dumb_create		= drm_gem_cma_dumb_create,
	.gem_free_object_unlocked = drm_gem_cma_free_object,
	.gem_vm_ops		= &drm_gem_cma_vm_ops,

	/* Misc */
	.fops			= &fops,
	.name			= DRIVER_NAME,
	.desc			= DRIVER_DESC,
	.date			= "20161109",
	.major			= 1,
	.minor			= 0,
};

static bool meson_vpu_has_available_connectors(struct device *dev)
{
	struct device_node *ep, *remote;

	/* Parses each endpoint and check if remote exists */
	for_each_endpoint_of_node(dev->of_node, ep) {
		/* If the endpoint node exists, consider it enabled */
		remote = of_graph_get_remote_port(ep);
		if (remote)
			return true;
	}

	return false;
}

static struct regmap_config meson_regmap_config = {
	.reg_bits       = 32,
	.val_bits       = 32,
	.reg_stride     = 4,
	.max_register   = 0x1000,
};

static void meson_vpu_init(struct meson_drm *priv)
{
	writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
	writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
	writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
	writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
}

static void meson_remove_framebuffers(void)
{
	struct apertures_struct *ap;

	ap = alloc_apertures(1);
	if (!ap)
		return;

	/* The framebuffer can be located anywhere in RAM */
	ap->ranges[0].base = 0;
	ap->ranges[0].size = ~0;

	drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb",
						      false);
	kfree(ap);
}

static int meson_drv_bind_master(struct device *dev, bool has_components)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct meson_drm *priv;
	struct drm_device *drm;
	struct resource *res;
	void __iomem *regs;
	int ret;

	/* Checks if an output connector is available */
	if (!meson_vpu_has_available_connectors(dev)) {
		dev_err(dev, "No output connector available\n");
		return -ENODEV;
	}

	drm = drm_dev_alloc(&meson_driver, dev);
	if (IS_ERR(drm))
		return PTR_ERR(drm);

	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	if (!priv) {
		ret = -ENOMEM;
		goto free_drm;
	}
	drm->dev_private = priv;
	priv->drm = drm;
	priv->dev = dev;

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
	regs = devm_ioremap_resource(dev, res);
	if (IS_ERR(regs)) {
		ret = PTR_ERR(regs);
		goto free_drm;
	}

	priv->io_base = regs;

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
	if (!res) {
		ret = -EINVAL;
		goto free_drm;
	}
	/* Simply ioremap since it may be a shared register zone */
	regs = devm_ioremap(dev, res->start, resource_size(res));
	if (!regs) {
		ret = -EADDRNOTAVAIL;
		goto free_drm;
	}

	priv->hhi = devm_regmap_init_mmio(dev, regs,
					  &meson_regmap_config);
	if (IS_ERR(priv->hhi)) {
		dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
		ret = PTR_ERR(priv->hhi);
		goto free_drm;
	}

	priv->canvas = meson_canvas_get(dev);
	if (!IS_ERR(priv->canvas)) {
		ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
		if (ret)
			goto free_drm;
		ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
		if (ret) {
			meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
			goto free_drm;
		}
		ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
		if (ret) {
			meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
			meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
			goto free_drm;
		}
		ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
		if (ret) {
			meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
			meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
			meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
			goto free_drm;
		}
	} else {
		priv->canvas = NULL;

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc");
		if (!res) {
			ret = -EINVAL;
			goto free_drm;
		}
		/* Simply ioremap since it may be a shared register zone */
		regs = devm_ioremap(dev, res->start, resource_size(res));
		if (!regs) {
			ret = -EADDRNOTAVAIL;
			goto free_drm;
		}

		priv->dmc = devm_regmap_init_mmio(dev, regs,
						  &meson_regmap_config);
		if (IS_ERR(priv->dmc)) {
			dev_err(&pdev->dev, "Couldn't create the DMC regmap\n");
			ret = PTR_ERR(priv->dmc);
			goto free_drm;
		}
	}

	priv->vsync_irq = platform_get_irq(pdev, 0);

	ret = drm_vblank_init(drm, 1);
	if (ret)
		goto free_drm;

	/* Remove early framebuffers (ie. simplefb) */
	meson_remove_framebuffers();

	drm_mode_config_init(drm);
	drm->mode_config.max_width = 3840;
	drm->mode_config.max_height = 2160;
	drm->mode_config.funcs = &meson_mode_config_funcs;

	/* Hardware Initialization */

	meson_vpu_init(priv);
	meson_venc_init(priv);
	meson_vpp_init(priv);
	meson_viu_init(priv);

	/* Encoder Initialization */

	ret = meson_venc_cvbs_create(priv);
	if (ret)
		goto free_drm;

	if (has_components) {
		ret = component_bind_all(drm->dev, drm);
		if (ret) {
			dev_err(drm->dev, "Couldn't bind all components\n");
			goto free_drm;
		}
	}

	ret = meson_plane_create(priv);
	if (ret)
		goto free_drm;

	ret = meson_overlay_create(priv);
	if (ret)
		goto free_drm;

	ret = meson_crtc_create(priv);
	if (ret)
		goto free_drm;

	ret = drm_irq_install(drm, priv->vsync_irq);
	if (ret)
		goto free_drm;

	drm_mode_config_reset(drm);

	drm_kms_helper_poll_init(drm);

	platform_set_drvdata(pdev, priv);

	ret = drm_dev_register(drm, 0);
	if (ret)
		goto free_drm;

	drm_fbdev_generic_setup(drm, 32);

	return 0;

free_drm:
	drm_dev_put(drm);

	return ret;
}

static int meson_drv_bind(struct device *dev)
{
	return meson_drv_bind_master(dev, true);
}

static void meson_drv_unbind(struct device *dev)
{
	struct drm_device *drm = dev_get_drvdata(dev);
	struct meson_drm *priv = drm->dev_private;

	if (priv->canvas) {
		meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
	}

	drm_dev_unregister(drm);
	drm_kms_helper_poll_fini(drm);
	drm_mode_config_cleanup(drm);
	drm_dev_put(drm);

}

static const struct component_master_ops meson_drv_master_ops = {
	.bind	= meson_drv_bind,
	.unbind	= meson_drv_unbind,
};

static int compare_of(struct device *dev, void *data)
{
	DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
			 dev->of_node, data);

	return dev->of_node == data;
}

/* Possible connectors nodes to ignore */
static const struct of_device_id connectors_match[] = {
	{ .compatible = "composite-video-connector" },
	{ .compatible = "svideo-connector" },
	{ .compatible = "hdmi-connector" },
	{ .compatible = "dvi-connector" },
	{}
};

static int meson_probe_remote(struct platform_device *pdev,
			      struct component_match **match,
			      struct device_node *parent,
			      struct device_node *remote)
{
	struct device_node *ep, *remote_node;
	int count = 1;

	/* If node is a connector, return and do not add to match table */
	if (of_match_node(connectors_match, remote))
		return 1;

	component_match_add(&pdev->dev, match, compare_of, remote);

	for_each_endpoint_of_node(remote, ep) {
		remote_node = of_graph_get_remote_port_parent(ep);
		if (!remote_node ||
		    remote_node == parent || /* Ignore parent endpoint */
		    !of_device_is_available(remote_node))
			continue;

		count += meson_probe_remote(pdev, match, remote, remote_node);

		of_node_put(remote_node);
	}

	return count;
}

static int meson_drv_probe(struct platform_device *pdev)
{
	struct component_match *match = NULL;
	struct device_node *np = pdev->dev.of_node;
	struct device_node *ep, *remote;
	int count = 0;

	for_each_endpoint_of_node(np, ep) {
		remote = of_graph_get_remote_port_parent(ep);
		if (!remote || !of_device_is_available(remote))
			continue;

		count += meson_probe_remote(pdev, &match, np, remote);
	}

	if (count && !match)
		return meson_drv_bind_master(&pdev->dev, false);

	/* If some endpoints were found, initialize the nodes */
	if (count) {
		dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);

		return component_master_add_with_match(&pdev->dev,
						       &meson_drv_master_ops,
						       match);
	}

	/* If no output endpoints were available, simply bail out */
	return 0;
};

static const struct of_device_id dt_match[] = {
	{ .compatible = "amlogic,meson-gxbb-vpu" },
	{ .compatible = "amlogic,meson-gxl-vpu" },
	{ .compatible = "amlogic,meson-gxm-vpu" },
	{}
};
MODULE_DEVICE_TABLE(of, dt_match);

static struct platform_driver meson_drm_platform_driver = {
	.probe      = meson_drv_probe,
	.driver     = {
		.name	= "meson-drm",
		.of_match_table = dt_match,
	},
};

module_platform_driver(meson_drm_platform_driver);

MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");
Commit	Line	Data
bbbe775e NA	1	/*
	2	* Copyright (C) 2016 BayLibre, SAS
	3	* Author: Neil Armstrong <narmstrong@baylibre.com>
	4	* Copyright (C) 2014 Endless Mobile
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License as
	8	* published by the Free Software Foundation; either version 2 of the
	9	* License, or (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful, but
	12	* WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, see <http://www.gnu.org/licenses/>.
	18	*
	19	* Written by:
	20	* Jasper St. Pierre <jstpierre@mecheye.net>
	21	*/
	22
	23	#include <linux/kernel.h>
	24	#include <linux/module.h>
	25	#include <linux/mutex.h>
	26	#include <linux/platform_device.h>
a41e82e6	27	#include <linux/component.h>
bbbe775e NA	28	#include <linux/of_graph.h>
	29
	30	#include <drm/drmP.h>
	31	#include <drm/drm_atomic.h>
	32	#include <drm/drm_atomic_helper.h>
fcd70cd3 DV	33	#include <drm/drm_fb_cma_helper.h>
fcd70cd3 DV	34	#include <drm/drm_fb_helper.h>
bbbe775e	35	#include <drm/drm_flip_work.h>
bbbe775e	36	#include <drm/drm_gem_cma_helper.h>
24ef8157	37	#include <drm/drm_gem_framebuffer_helper.h>
fcd70cd3 DV	38	#include <drm/drm_plane_helper.h>
fcd70cd3 DV	39	#include <drm/drm_probe_helper.h>
bbbe775e	40	#include <drm/drm_rect.h>
bbbe775e NA	41
	42	#include "meson_drv.h"
	43	#include "meson_plane.h"
f9a23481	44	#include "meson_overlay.h"
bbbe775e NA	45	#include "meson_crtc.h"
	46	#include "meson_venc_cvbs.h"
	47
	48	#include "meson_vpp.h"
	49	#include "meson_viu.h"
	50	#include "meson_venc.h"
	51	#include "meson_canvas.h"
	52	#include "meson_registers.h"
	53
	54	#define DRIVER_NAME "meson"
	55	#define DRIVER_DESC "Amlogic Meson DRM driver"
	56
2021d5b7 NA	57	/**
2021d5b7 NA	58	* DOC: Video Processing Unit
bbbe775e NA	59	*
	60	* VPU Handles the Global Video Processing, it includes management of the
	61	* clocks gates, blocks reset lines and power domains.
	62	*
	63	* What is missing :
2021d5b7	64	*
bbbe775e NA	65	* - Full reset of entire video processing HW blocks
	66	* - Scaling and setup of the VPU clock
	67	* - Bus clock gates
	68	* - Powering up video processing HW blocks
	69	* - Powering Up HDMI controller and PHY
	70	*/
	71
bbbe775e	72	static const struct drm_mode_config_funcs meson_mode_config_funcs = {
bbbe775e NA	73	.atomic_check = drm_atomic_helper_check,
bbbe775e NA	74	.atomic_commit = drm_atomic_helper_commit,
24ef8157	75	.fb_create = drm_gem_fb_create,
bbbe775e NA	76	};
bbbe775e NA	77
bbbe775e NA	78	static irqreturn_t meson_irq(int irq, void *arg)
	79	{
	80	struct drm_device *dev = arg;
	81	struct meson_drm *priv = dev->dev_private;
	82
	83	(void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
	84
	85	meson_crtc_irq(priv);
	86
	87	return IRQ_HANDLED;
	88	}
	89
d55f7e5d	90	DEFINE_DRM_GEM_CMA_FOPS(fops);
bbbe775e NA	91
	92	static struct drm_driver meson_driver = {
	93	.driver_features = DRIVER_HAVE_IRQ \| DRIVER_GEM \|
	94	DRIVER_MODESET \| DRIVER_PRIME \|
	95	DRIVER_ATOMIC,
	96
bbbe775e NA	97	/* IRQ */
	98	.irq_handler = meson_irq,
	99
	100	/* PRIME Ops */
	101	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	102	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	103	.gem_prime_import = drm_gem_prime_import,
	104	.gem_prime_export = drm_gem_prime_export,
	105	.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
	106	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
	107	.gem_prime_vmap = drm_gem_cma_prime_vmap,
	108	.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
	109	.gem_prime_mmap = drm_gem_cma_prime_mmap,
	110
	111	/* GEM Ops */
	112	.dumb_create = drm_gem_cma_dumb_create,
bbbe775e NA	113	.gem_free_object_unlocked = drm_gem_cma_free_object,
	114	.gem_vm_ops = &drm_gem_cma_vm_ops,
	115
	116	/* Misc */
	117	.fops = &fops,
	118	.name = DRIVER_NAME,
	119	.desc = DRIVER_DESC,
	120	.date = "20161109",
	121	.major = 1,
	122	.minor = 0,
	123	};
	124
	125	static bool meson_vpu_has_available_connectors(struct device *dev)
	126	{
	127	struct device_node ep, remote;
	128
	129	/* Parses each endpoint and check if remote exists */
	130	for_each_endpoint_of_node(dev->of_node, ep) {
	131	/* If the endpoint node exists, consider it enabled */
	132	remote = of_graph_get_remote_port(ep);
	133	if (remote)
	134	return true;
	135	}
	136
	137	return false;
	138	}
	139
	140	static struct regmap_config meson_regmap_config = {
	141	.reg_bits = 32,
	142	.val_bits = 32,
	143	.reg_stride = 4,
	144	.max_register = 0x1000,
	145	};
	146
09762525 NA	147	static void meson_vpu_init(struct meson_drm *priv)
	148	{
	149	writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
	150	writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
	151	writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
	152	writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
	153	}
	154
e3de0aa6 MJ	155	static void meson_remove_framebuffers(void)
	156	{
	157	struct apertures_struct *ap;
	158
	159	ap = alloc_apertures(1);
	160	if (!ap)
	161	return;
	162
	163	/* The framebuffer can be located anywhere in RAM */
	164	ap->ranges[0].base = 0;
	165	ap->ranges[0].size = ~0;
	166
	167	drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb",
	168	false);
	169	kfree(ap);
	170	}
	171
8604889f	172	static int meson_drv_bind_master(struct device *dev, bool has_components)
bbbe775e	173	{
a41e82e6	174	struct platform_device *pdev = to_platform_device(dev);
bbbe775e NA	175	struct meson_drm *priv;
	176	struct drm_device *drm;
	177	struct resource *res;
	178	void __iomem *regs;
	179	int ret;
	180
	181	/* Checks if an output connector is available */
	182	if (!meson_vpu_has_available_connectors(dev)) {
	183	dev_err(dev, "No output connector available\n");
	184	return -ENODEV;
	185	}
	186
	187	drm = drm_dev_alloc(&meson_driver, dev);
	188	if (IS_ERR(drm))
	189	return PTR_ERR(drm);
	190
	191	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	192	if (!priv) {
	193	ret = -ENOMEM;
	194	goto free_drm;
	195	}
	196	drm->dev_private = priv;
	197	priv->drm = drm;
	198	priv->dev = dev;
	199
	200	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
	201	regs = devm_ioremap_resource(dev, res);
2c18107b CJ	202	if (IS_ERR(regs)) {
	203	ret = PTR_ERR(regs);
	204	goto free_drm;
	205	}
bbbe775e NA	206
	207	priv->io_base = regs;
	208
	209	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
01a9e949 CJ	210	if (!res) {
	211	ret = -EINVAL;
	212	goto free_drm;
	213	}
bbbe775e NA	214	/* Simply ioremap since it may be a shared register zone */
bbbe775e NA	215	regs = devm_ioremap(dev, res->start, resource_size(res));
2c18107b CJ	216	if (!regs) {
	217	ret = -EADDRNOTAVAIL;
	218	goto free_drm;
	219	}
bbbe775e NA	220
	221	priv->hhi = devm_regmap_init_mmio(dev, regs,
	222	&meson_regmap_config);
	223	if (IS_ERR(priv->hhi)) {
	224	dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
2c18107b CJ	225	ret = PTR_ERR(priv->hhi);
2c18107b CJ	226	goto free_drm;
bbbe775e NA	227	}
bbbe775e NA	228
66cae477 MJ	229	priv->canvas = meson_canvas_get(dev);
	230	if (!IS_ERR(priv->canvas)) {
	231	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
	232	if (ret)
	233	goto free_drm;
f9a23481 NA	234	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
	235	if (ret) {
	236	meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
	237	goto free_drm;
	238	}
	239	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
	240	if (ret) {
	241	meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
	242	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
	243	goto free_drm;
	244	}
	245	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
	246	if (ret) {
	247	meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
	248	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
	249	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
	250	goto free_drm;
	251	}
66cae477 MJ	252	} else {
66cae477 MJ	253	priv->canvas = NULL;
bbbe775e	254
66cae477 MJ	255	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc");
	256	if (!res) {
	257	ret = -EINVAL;
	258	goto free_drm;
	259	}
	260	/* Simply ioremap since it may be a shared register zone */
	261	regs = devm_ioremap(dev, res->start, resource_size(res));
	262	if (!regs) {
	263	ret = -EADDRNOTAVAIL;
	264	goto free_drm;
	265	}
	266
	267	priv->dmc = devm_regmap_init_mmio(dev, regs,
	268	&meson_regmap_config);
	269	if (IS_ERR(priv->dmc)) {
	270	dev_err(&pdev->dev, "Couldn't create the DMC regmap\n");
	271	ret = PTR_ERR(priv->dmc);
	272	goto free_drm;
	273	}
bbbe775e NA	274	}
	275
	276	priv->vsync_irq = platform_get_irq(pdev, 0);
	277
e770f6bf CJ	278	ret = drm_vblank_init(drm, 1);
	279	if (ret)
	280	goto free_drm;
	281
e3de0aa6 MJ	282	/* Remove early framebuffers (ie. simplefb) */
	283	meson_remove_framebuffers();
	284
bbbe775e	285	drm_mode_config_init(drm);
a41e82e6 NA	286	drm->mode_config.max_width = 3840;
	287	drm->mode_config.max_height = 2160;
	288	drm->mode_config.funcs = &meson_mode_config_funcs;
	289
	290	/* Hardware Initialization */
	291
09762525	292	meson_vpu_init(priv);
a41e82e6 NA	293	meson_venc_init(priv);
	294	meson_vpp_init(priv);
	295	meson_viu_init(priv);
bbbe775e NA	296
	297	/* Encoder Initialization */
	298
	299	ret = meson_venc_cvbs_create(priv);
	300	if (ret)
	301	goto free_drm;
	302
8604889f NA	303	if (has_components) {
	304	ret = component_bind_all(drm->dev, drm);
	305	if (ret) {
	306	dev_err(drm->dev, "Couldn't bind all components\n");
	307	goto free_drm;
	308	}
a41e82e6	309	}
bbbe775e NA	310
	311	ret = meson_plane_create(priv);
	312	if (ret)
	313	goto free_drm;
	314
f9a23481 NA	315	ret = meson_overlay_create(priv);
	316	if (ret)
	317	goto free_drm;
	318
bbbe775e NA	319	ret = meson_crtc_create(priv);
	320	if (ret)
	321	goto free_drm;
	322
	323	ret = drm_irq_install(drm, priv->vsync_irq);
	324	if (ret)
	325	goto free_drm;
	326
	327	drm_mode_config_reset(drm);
bbbe775e	328
bbbe775e NA	329	drm_kms_helper_poll_init(drm);
	330
	331	platform_set_drvdata(pdev, priv);
	332
	333	ret = drm_dev_register(drm, 0);
	334	if (ret)
	335	goto free_drm;
	336
efbb9df9 NT	337	drm_fbdev_generic_setup(drm, 32);
efbb9df9 NT	338
bbbe775e NA	339	return 0;
	340
	341	free_drm:
dcacf651	342	drm_dev_put(drm);
bbbe775e NA	343
	344	return ret;
	345	}
	346
8604889f NA	347	static int meson_drv_bind(struct device *dev)
	348	{
	349	return meson_drv_bind_master(dev, true);
	350	}
	351
a41e82e6	352	static void meson_drv_unbind(struct device *dev)
bbbe775e	353	{
a41e82e6	354	struct drm_device *drm = dev_get_drvdata(dev);
66cae477 MJ	355	struct meson_drm *priv = drm->dev_private;
66cae477 MJ	356
f9a23481	357	if (priv->canvas) {
66cae477	358	meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
f9a23481 NA	359	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
	360	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
	361	meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
	362	}
bbbe775e NA	363
	364	drm_dev_unregister(drm);
	365	drm_kms_helper_poll_fini(drm);
bbbe775e	366	drm_mode_config_cleanup(drm);
dcacf651	367	drm_dev_put(drm);
bbbe775e	368
bbbe775e NA	369	}
bbbe775e NA	370
a41e82e6 NA	371	static const struct component_master_ops meson_drv_master_ops = {
	372	.bind = meson_drv_bind,
	373	.unbind = meson_drv_unbind,
	374	};
	375
	376	static int compare_of(struct device dev, void data)
	377	{
4bf99144 RH	378	DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
4bf99144 RH	379	dev->of_node, data);
a41e82e6 NA	380
	381	return dev->of_node == data;
	382	}
	383
	384	/* Possible connectors nodes to ignore */
	385	static const struct of_device_id connectors_match[] = {
	386	{ .compatible = "composite-video-connector" },
	387	{ .compatible = "svideo-connector" },
	388	{ .compatible = "hdmi-connector" },
	389	{ .compatible = "dvi-connector" },
	390	{}
	391	};
	392
	393	static int meson_probe_remote(struct platform_device *pdev,
	394	struct component_match **match,
	395	struct device_node *parent,
	396	struct device_node *remote)
	397	{
	398	struct device_node ep, remote_node;
	399	int count = 1;
	400
	401	/* If node is a connector, return and do not add to match table */
	402	if (of_match_node(connectors_match, remote))
	403	return 1;
	404
	405	component_match_add(&pdev->dev, match, compare_of, remote);
	406
	407	for_each_endpoint_of_node(remote, ep) {
	408	remote_node = of_graph_get_remote_port_parent(ep);
	409	if (!remote_node \|\|
	410	remote_node == parent \|\| /* Ignore parent endpoint */
	411	!of_device_is_available(remote_node))
	412	continue;
	413
	414	count += meson_probe_remote(pdev, match, remote, remote_node);
	415
	416	of_node_put(remote_node);
	417	}
	418
	419	return count;
	420	}
	421
	422	static int meson_drv_probe(struct platform_device *pdev)
	423	{
	424	struct component_match *match = NULL;
	425	struct device_node *np = pdev->dev.of_node;
	426	struct device_node ep, remote;
	427	int count = 0;
	428
	429	for_each_endpoint_of_node(np, ep) {
	430	remote = of_graph_get_remote_port_parent(ep);
	431	if (!remote \|\| !of_device_is_available(remote))
	432	continue;
	433
	434	count += meson_probe_remote(pdev, &match, np, remote);
	435	}
	436
8604889f NA	437	if (count && !match)
	438	return meson_drv_bind_master(&pdev->dev, false);
	439
a41e82e6 NA	440	/* If some endpoints were found, initialize the nodes */
	441	if (count) {
	442	dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
	443
	444	return component_master_add_with_match(&pdev->dev,
	445	&meson_drv_master_ops,
	446	match);
	447	}
	448
	449	/* If no output endpoints were available, simply bail out */
	450	return 0;
	451	};
	452
bbbe775e NA	453	static const struct of_device_id dt_match[] = {
	454	{ .compatible = "amlogic,meson-gxbb-vpu" },
	455	{ .compatible = "amlogic,meson-gxl-vpu" },
	456	{ .compatible = "amlogic,meson-gxm-vpu" },
	457	{}
	458	};
	459	MODULE_DEVICE_TABLE(of, dt_match);
	460
	461	static struct platform_driver meson_drm_platform_driver = {
	462	.probe = meson_drv_probe,
bbbe775e	463	.driver = {
8aaacbc0	464	.name = "meson-drm",
bbbe775e NA	465	.of_match_table = dt_match,
	466	},
	467	};
	468
	469	module_platform_driver(meson_drm_platform_driver);
	470
	471	MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
	472	MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
	473	MODULE_DESCRIPTION(DRIVER_DESC);
	474	MODULE_LICENSE("GPL");