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bbbe775e NA |
1 | /* |
2 | * Copyright (C) 2016 BayLibre, SAS | |
3 | * Author: Neil Armstrong <narmstrong@baylibre.com> | |
4 | * Copyright (C) 2014 Endless Mobile | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License as | |
8 | * published by the Free Software Foundation; either version 2 of the | |
9 | * License, or (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but | |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, see <http://www.gnu.org/licenses/>. | |
18 | * | |
19 | * Written by: | |
20 | * Jasper St. Pierre <jstpierre@mecheye.net> | |
21 | */ | |
22 | ||
23 | #include <linux/kernel.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/mutex.h> | |
26 | #include <linux/platform_device.h> | |
a41e82e6 | 27 | #include <linux/component.h> |
bbbe775e NA |
28 | #include <linux/of_graph.h> |
29 | ||
30 | #include <drm/drmP.h> | |
31 | #include <drm/drm_atomic.h> | |
32 | #include <drm/drm_atomic_helper.h> | |
33 | #include <drm/drm_flip_work.h> | |
34 | #include <drm/drm_crtc_helper.h> | |
35 | #include <drm/drm_plane_helper.h> | |
36 | #include <drm/drm_gem_cma_helper.h> | |
24ef8157 | 37 | #include <drm/drm_gem_framebuffer_helper.h> |
bbbe775e NA |
38 | #include <drm/drm_fb_cma_helper.h> |
39 | #include <drm/drm_rect.h> | |
40 | #include <drm/drm_fb_helper.h> | |
41 | ||
42 | #include "meson_drv.h" | |
43 | #include "meson_plane.h" | |
44 | #include "meson_crtc.h" | |
45 | #include "meson_venc_cvbs.h" | |
46 | ||
47 | #include "meson_vpp.h" | |
48 | #include "meson_viu.h" | |
49 | #include "meson_venc.h" | |
50 | #include "meson_canvas.h" | |
51 | #include "meson_registers.h" | |
52 | ||
53 | #define DRIVER_NAME "meson" | |
54 | #define DRIVER_DESC "Amlogic Meson DRM driver" | |
55 | ||
2021d5b7 NA |
56 | /** |
57 | * DOC: Video Processing Unit | |
bbbe775e NA |
58 | * |
59 | * VPU Handles the Global Video Processing, it includes management of the | |
60 | * clocks gates, blocks reset lines and power domains. | |
61 | * | |
62 | * What is missing : | |
2021d5b7 | 63 | * |
bbbe775e NA |
64 | * - Full reset of entire video processing HW blocks |
65 | * - Scaling and setup of the VPU clock | |
66 | * - Bus clock gates | |
67 | * - Powering up video processing HW blocks | |
68 | * - Powering Up HDMI controller and PHY | |
69 | */ | |
70 | ||
bbbe775e | 71 | static const struct drm_mode_config_funcs meson_mode_config_funcs = { |
bbbe775e NA |
72 | .atomic_check = drm_atomic_helper_check, |
73 | .atomic_commit = drm_atomic_helper_commit, | |
24ef8157 | 74 | .fb_create = drm_gem_fb_create, |
bbbe775e NA |
75 | }; |
76 | ||
bbbe775e NA |
77 | static irqreturn_t meson_irq(int irq, void *arg) |
78 | { | |
79 | struct drm_device *dev = arg; | |
80 | struct meson_drm *priv = dev->dev_private; | |
81 | ||
82 | (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG)); | |
83 | ||
84 | meson_crtc_irq(priv); | |
85 | ||
86 | return IRQ_HANDLED; | |
87 | } | |
88 | ||
d55f7e5d | 89 | DEFINE_DRM_GEM_CMA_FOPS(fops); |
bbbe775e NA |
90 | |
91 | static struct drm_driver meson_driver = { | |
92 | .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | | |
93 | DRIVER_MODESET | DRIVER_PRIME | | |
94 | DRIVER_ATOMIC, | |
95 | ||
bbbe775e NA |
96 | /* IRQ */ |
97 | .irq_handler = meson_irq, | |
98 | ||
99 | /* PRIME Ops */ | |
100 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
101 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
102 | .gem_prime_import = drm_gem_prime_import, | |
103 | .gem_prime_export = drm_gem_prime_export, | |
104 | .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, | |
105 | .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, | |
106 | .gem_prime_vmap = drm_gem_cma_prime_vmap, | |
107 | .gem_prime_vunmap = drm_gem_cma_prime_vunmap, | |
108 | .gem_prime_mmap = drm_gem_cma_prime_mmap, | |
109 | ||
110 | /* GEM Ops */ | |
111 | .dumb_create = drm_gem_cma_dumb_create, | |
bbbe775e NA |
112 | .gem_free_object_unlocked = drm_gem_cma_free_object, |
113 | .gem_vm_ops = &drm_gem_cma_vm_ops, | |
114 | ||
115 | /* Misc */ | |
116 | .fops = &fops, | |
117 | .name = DRIVER_NAME, | |
118 | .desc = DRIVER_DESC, | |
119 | .date = "20161109", | |
120 | .major = 1, | |
121 | .minor = 0, | |
122 | }; | |
123 | ||
124 | static bool meson_vpu_has_available_connectors(struct device *dev) | |
125 | { | |
126 | struct device_node *ep, *remote; | |
127 | ||
128 | /* Parses each endpoint and check if remote exists */ | |
129 | for_each_endpoint_of_node(dev->of_node, ep) { | |
130 | /* If the endpoint node exists, consider it enabled */ | |
131 | remote = of_graph_get_remote_port(ep); | |
132 | if (remote) | |
133 | return true; | |
134 | } | |
135 | ||
136 | return false; | |
137 | } | |
138 | ||
139 | static struct regmap_config meson_regmap_config = { | |
140 | .reg_bits = 32, | |
141 | .val_bits = 32, | |
142 | .reg_stride = 4, | |
143 | .max_register = 0x1000, | |
144 | }; | |
145 | ||
09762525 NA |
146 | static void meson_vpu_init(struct meson_drm *priv) |
147 | { | |
148 | writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1)); | |
149 | writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2)); | |
150 | writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1)); | |
151 | writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1)); | |
152 | } | |
153 | ||
8604889f | 154 | static int meson_drv_bind_master(struct device *dev, bool has_components) |
bbbe775e | 155 | { |
a41e82e6 | 156 | struct platform_device *pdev = to_platform_device(dev); |
bbbe775e NA |
157 | struct meson_drm *priv; |
158 | struct drm_device *drm; | |
159 | struct resource *res; | |
160 | void __iomem *regs; | |
161 | int ret; | |
162 | ||
163 | /* Checks if an output connector is available */ | |
164 | if (!meson_vpu_has_available_connectors(dev)) { | |
165 | dev_err(dev, "No output connector available\n"); | |
166 | return -ENODEV; | |
167 | } | |
168 | ||
169 | drm = drm_dev_alloc(&meson_driver, dev); | |
170 | if (IS_ERR(drm)) | |
171 | return PTR_ERR(drm); | |
172 | ||
173 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); | |
174 | if (!priv) { | |
175 | ret = -ENOMEM; | |
176 | goto free_drm; | |
177 | } | |
178 | drm->dev_private = priv; | |
179 | priv->drm = drm; | |
180 | priv->dev = dev; | |
181 | ||
182 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu"); | |
183 | regs = devm_ioremap_resource(dev, res); | |
2c18107b CJ |
184 | if (IS_ERR(regs)) { |
185 | ret = PTR_ERR(regs); | |
186 | goto free_drm; | |
187 | } | |
bbbe775e NA |
188 | |
189 | priv->io_base = regs; | |
190 | ||
191 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi"); | |
01a9e949 CJ |
192 | if (!res) { |
193 | ret = -EINVAL; | |
194 | goto free_drm; | |
195 | } | |
bbbe775e NA |
196 | /* Simply ioremap since it may be a shared register zone */ |
197 | regs = devm_ioremap(dev, res->start, resource_size(res)); | |
2c18107b CJ |
198 | if (!regs) { |
199 | ret = -EADDRNOTAVAIL; | |
200 | goto free_drm; | |
201 | } | |
bbbe775e NA |
202 | |
203 | priv->hhi = devm_regmap_init_mmio(dev, regs, | |
204 | &meson_regmap_config); | |
205 | if (IS_ERR(priv->hhi)) { | |
206 | dev_err(&pdev->dev, "Couldn't create the HHI regmap\n"); | |
2c18107b CJ |
207 | ret = PTR_ERR(priv->hhi); |
208 | goto free_drm; | |
bbbe775e NA |
209 | } |
210 | ||
66cae477 MJ |
211 | priv->canvas = meson_canvas_get(dev); |
212 | if (!IS_ERR(priv->canvas)) { | |
213 | ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); | |
214 | if (ret) | |
215 | goto free_drm; | |
216 | } else { | |
217 | priv->canvas = NULL; | |
bbbe775e | 218 | |
66cae477 MJ |
219 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc"); |
220 | if (!res) { | |
221 | ret = -EINVAL; | |
222 | goto free_drm; | |
223 | } | |
224 | /* Simply ioremap since it may be a shared register zone */ | |
225 | regs = devm_ioremap(dev, res->start, resource_size(res)); | |
226 | if (!regs) { | |
227 | ret = -EADDRNOTAVAIL; | |
228 | goto free_drm; | |
229 | } | |
230 | ||
231 | priv->dmc = devm_regmap_init_mmio(dev, regs, | |
232 | &meson_regmap_config); | |
233 | if (IS_ERR(priv->dmc)) { | |
234 | dev_err(&pdev->dev, "Couldn't create the DMC regmap\n"); | |
235 | ret = PTR_ERR(priv->dmc); | |
236 | goto free_drm; | |
237 | } | |
bbbe775e NA |
238 | } |
239 | ||
240 | priv->vsync_irq = platform_get_irq(pdev, 0); | |
241 | ||
e770f6bf CJ |
242 | ret = drm_vblank_init(drm, 1); |
243 | if (ret) | |
244 | goto free_drm; | |
245 | ||
bbbe775e | 246 | drm_mode_config_init(drm); |
a41e82e6 NA |
247 | drm->mode_config.max_width = 3840; |
248 | drm->mode_config.max_height = 2160; | |
249 | drm->mode_config.funcs = &meson_mode_config_funcs; | |
250 | ||
251 | /* Hardware Initialization */ | |
252 | ||
09762525 | 253 | meson_vpu_init(priv); |
a41e82e6 NA |
254 | meson_venc_init(priv); |
255 | meson_vpp_init(priv); | |
256 | meson_viu_init(priv); | |
bbbe775e NA |
257 | |
258 | /* Encoder Initialization */ | |
259 | ||
260 | ret = meson_venc_cvbs_create(priv); | |
261 | if (ret) | |
262 | goto free_drm; | |
263 | ||
8604889f NA |
264 | if (has_components) { |
265 | ret = component_bind_all(drm->dev, drm); | |
266 | if (ret) { | |
267 | dev_err(drm->dev, "Couldn't bind all components\n"); | |
268 | goto free_drm; | |
269 | } | |
a41e82e6 | 270 | } |
bbbe775e NA |
271 | |
272 | ret = meson_plane_create(priv); | |
273 | if (ret) | |
274 | goto free_drm; | |
275 | ||
276 | ret = meson_crtc_create(priv); | |
277 | if (ret) | |
278 | goto free_drm; | |
279 | ||
280 | ret = drm_irq_install(drm, priv->vsync_irq); | |
281 | if (ret) | |
282 | goto free_drm; | |
283 | ||
284 | drm_mode_config_reset(drm); | |
bbbe775e | 285 | |
bbbe775e NA |
286 | drm_kms_helper_poll_init(drm); |
287 | ||
288 | platform_set_drvdata(pdev, priv); | |
289 | ||
290 | ret = drm_dev_register(drm, 0); | |
291 | if (ret) | |
292 | goto free_drm; | |
293 | ||
efbb9df9 NT |
294 | drm_fbdev_generic_setup(drm, 32); |
295 | ||
bbbe775e NA |
296 | return 0; |
297 | ||
298 | free_drm: | |
dcacf651 | 299 | drm_dev_put(drm); |
bbbe775e NA |
300 | |
301 | return ret; | |
302 | } | |
303 | ||
8604889f NA |
304 | static int meson_drv_bind(struct device *dev) |
305 | { | |
306 | return meson_drv_bind_master(dev, true); | |
307 | } | |
308 | ||
a41e82e6 | 309 | static void meson_drv_unbind(struct device *dev) |
bbbe775e | 310 | { |
a41e82e6 | 311 | struct drm_device *drm = dev_get_drvdata(dev); |
66cae477 MJ |
312 | struct meson_drm *priv = drm->dev_private; |
313 | ||
314 | if (priv->canvas) | |
315 | meson_canvas_free(priv->canvas, priv->canvas_id_osd1); | |
bbbe775e NA |
316 | |
317 | drm_dev_unregister(drm); | |
318 | drm_kms_helper_poll_fini(drm); | |
bbbe775e | 319 | drm_mode_config_cleanup(drm); |
dcacf651 | 320 | drm_dev_put(drm); |
bbbe775e | 321 | |
bbbe775e NA |
322 | } |
323 | ||
a41e82e6 NA |
324 | static const struct component_master_ops meson_drv_master_ops = { |
325 | .bind = meson_drv_bind, | |
326 | .unbind = meson_drv_unbind, | |
327 | }; | |
328 | ||
329 | static int compare_of(struct device *dev, void *data) | |
330 | { | |
4bf99144 RH |
331 | DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n", |
332 | dev->of_node, data); | |
a41e82e6 NA |
333 | |
334 | return dev->of_node == data; | |
335 | } | |
336 | ||
337 | /* Possible connectors nodes to ignore */ | |
338 | static const struct of_device_id connectors_match[] = { | |
339 | { .compatible = "composite-video-connector" }, | |
340 | { .compatible = "svideo-connector" }, | |
341 | { .compatible = "hdmi-connector" }, | |
342 | { .compatible = "dvi-connector" }, | |
343 | {} | |
344 | }; | |
345 | ||
346 | static int meson_probe_remote(struct platform_device *pdev, | |
347 | struct component_match **match, | |
348 | struct device_node *parent, | |
349 | struct device_node *remote) | |
350 | { | |
351 | struct device_node *ep, *remote_node; | |
352 | int count = 1; | |
353 | ||
354 | /* If node is a connector, return and do not add to match table */ | |
355 | if (of_match_node(connectors_match, remote)) | |
356 | return 1; | |
357 | ||
358 | component_match_add(&pdev->dev, match, compare_of, remote); | |
359 | ||
360 | for_each_endpoint_of_node(remote, ep) { | |
361 | remote_node = of_graph_get_remote_port_parent(ep); | |
362 | if (!remote_node || | |
363 | remote_node == parent || /* Ignore parent endpoint */ | |
364 | !of_device_is_available(remote_node)) | |
365 | continue; | |
366 | ||
367 | count += meson_probe_remote(pdev, match, remote, remote_node); | |
368 | ||
369 | of_node_put(remote_node); | |
370 | } | |
371 | ||
372 | return count; | |
373 | } | |
374 | ||
375 | static int meson_drv_probe(struct platform_device *pdev) | |
376 | { | |
377 | struct component_match *match = NULL; | |
378 | struct device_node *np = pdev->dev.of_node; | |
379 | struct device_node *ep, *remote; | |
380 | int count = 0; | |
381 | ||
382 | for_each_endpoint_of_node(np, ep) { | |
383 | remote = of_graph_get_remote_port_parent(ep); | |
384 | if (!remote || !of_device_is_available(remote)) | |
385 | continue; | |
386 | ||
387 | count += meson_probe_remote(pdev, &match, np, remote); | |
388 | } | |
389 | ||
8604889f NA |
390 | if (count && !match) |
391 | return meson_drv_bind_master(&pdev->dev, false); | |
392 | ||
a41e82e6 NA |
393 | /* If some endpoints were found, initialize the nodes */ |
394 | if (count) { | |
395 | dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count); | |
396 | ||
397 | return component_master_add_with_match(&pdev->dev, | |
398 | &meson_drv_master_ops, | |
399 | match); | |
400 | } | |
401 | ||
402 | /* If no output endpoints were available, simply bail out */ | |
403 | return 0; | |
404 | }; | |
405 | ||
bbbe775e NA |
406 | static const struct of_device_id dt_match[] = { |
407 | { .compatible = "amlogic,meson-gxbb-vpu" }, | |
408 | { .compatible = "amlogic,meson-gxl-vpu" }, | |
409 | { .compatible = "amlogic,meson-gxm-vpu" }, | |
410 | {} | |
411 | }; | |
412 | MODULE_DEVICE_TABLE(of, dt_match); | |
413 | ||
414 | static struct platform_driver meson_drm_platform_driver = { | |
415 | .probe = meson_drv_probe, | |
bbbe775e | 416 | .driver = { |
8aaacbc0 | 417 | .name = "meson-drm", |
bbbe775e NA |
418 | .of_match_table = dt_match, |
419 | }, | |
420 | }; | |
421 | ||
422 | module_platform_driver(meson_drm_platform_driver); | |
423 | ||
424 | MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>"); | |
425 | MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>"); | |
426 | MODULE_DESCRIPTION(DRIVER_DESC); | |
427 | MODULE_LICENSE("GPL"); |