Commit | Line | Data |
---|---|---|
1ccea77e | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
bbbe775e NA |
2 | /* |
3 | * Copyright (C) 2016 BayLibre, SAS | |
4 | * Author: Neil Armstrong <narmstrong@baylibre.com> | |
5 | * Copyright (C) 2014 Endless Mobile | |
6 | * | |
bbbe775e NA |
7 | * Written by: |
8 | * Jasper St. Pierre <jstpierre@mecheye.net> | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/module.h> | |
13 | #include <linux/mutex.h> | |
14 | #include <linux/platform_device.h> | |
a41e82e6 | 15 | #include <linux/component.h> |
bbbe775e NA |
16 | #include <linux/of_graph.h> |
17 | ||
18 | #include <drm/drmP.h> | |
19 | #include <drm/drm_atomic.h> | |
20 | #include <drm/drm_atomic_helper.h> | |
fcd70cd3 DV |
21 | #include <drm/drm_fb_cma_helper.h> |
22 | #include <drm/drm_fb_helper.h> | |
bbbe775e | 23 | #include <drm/drm_flip_work.h> |
bbbe775e | 24 | #include <drm/drm_gem_cma_helper.h> |
24ef8157 | 25 | #include <drm/drm_gem_framebuffer_helper.h> |
fcd70cd3 DV |
26 | #include <drm/drm_plane_helper.h> |
27 | #include <drm/drm_probe_helper.h> | |
bbbe775e | 28 | #include <drm/drm_rect.h> |
bbbe775e NA |
29 | |
30 | #include "meson_drv.h" | |
31 | #include "meson_plane.h" | |
f9a23481 | 32 | #include "meson_overlay.h" |
bbbe775e NA |
33 | #include "meson_crtc.h" |
34 | #include "meson_venc_cvbs.h" | |
35 | ||
36 | #include "meson_vpp.h" | |
37 | #include "meson_viu.h" | |
38 | #include "meson_venc.h" | |
bbbe775e NA |
39 | #include "meson_registers.h" |
40 | ||
41 | #define DRIVER_NAME "meson" | |
42 | #define DRIVER_DESC "Amlogic Meson DRM driver" | |
43 | ||
2021d5b7 NA |
44 | /** |
45 | * DOC: Video Processing Unit | |
bbbe775e NA |
46 | * |
47 | * VPU Handles the Global Video Processing, it includes management of the | |
48 | * clocks gates, blocks reset lines and power domains. | |
49 | * | |
50 | * What is missing : | |
2021d5b7 | 51 | * |
bbbe775e NA |
52 | * - Full reset of entire video processing HW blocks |
53 | * - Scaling and setup of the VPU clock | |
54 | * - Bus clock gates | |
55 | * - Powering up video processing HW blocks | |
56 | * - Powering Up HDMI controller and PHY | |
57 | */ | |
58 | ||
bbbe775e | 59 | static const struct drm_mode_config_funcs meson_mode_config_funcs = { |
bbbe775e NA |
60 | .atomic_check = drm_atomic_helper_check, |
61 | .atomic_commit = drm_atomic_helper_commit, | |
24ef8157 | 62 | .fb_create = drm_gem_fb_create, |
bbbe775e NA |
63 | }; |
64 | ||
ce0210c1 NA |
65 | static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = { |
66 | .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, | |
67 | }; | |
68 | ||
bbbe775e NA |
69 | static irqreturn_t meson_irq(int irq, void *arg) |
70 | { | |
71 | struct drm_device *dev = arg; | |
72 | struct meson_drm *priv = dev->dev_private; | |
73 | ||
74 | (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG)); | |
75 | ||
76 | meson_crtc_irq(priv); | |
77 | ||
78 | return IRQ_HANDLED; | |
79 | } | |
80 | ||
852ce728 NA |
81 | static int meson_dumb_create(struct drm_file *file, struct drm_device *dev, |
82 | struct drm_mode_create_dumb *args) | |
83 | { | |
84 | /* | |
85 | * We need 64bytes aligned stride, and PAGE aligned size | |
86 | */ | |
87 | args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64); | |
88 | args->size = PAGE_ALIGN(args->pitch * args->height); | |
89 | ||
90 | return drm_gem_cma_dumb_create_internal(file, dev, args); | |
91 | } | |
92 | ||
d55f7e5d | 93 | DEFINE_DRM_GEM_CMA_FOPS(fops); |
bbbe775e NA |
94 | |
95 | static struct drm_driver meson_driver = { | |
5b38e747 | 96 | .driver_features = DRIVER_GEM | |
bbbe775e NA |
97 | DRIVER_MODESET | DRIVER_PRIME | |
98 | DRIVER_ATOMIC, | |
99 | ||
bbbe775e NA |
100 | /* IRQ */ |
101 | .irq_handler = meson_irq, | |
102 | ||
103 | /* PRIME Ops */ | |
104 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
105 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
106 | .gem_prime_import = drm_gem_prime_import, | |
107 | .gem_prime_export = drm_gem_prime_export, | |
108 | .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, | |
109 | .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, | |
110 | .gem_prime_vmap = drm_gem_cma_prime_vmap, | |
111 | .gem_prime_vunmap = drm_gem_cma_prime_vunmap, | |
112 | .gem_prime_mmap = drm_gem_cma_prime_mmap, | |
113 | ||
114 | /* GEM Ops */ | |
852ce728 | 115 | .dumb_create = meson_dumb_create, |
bbbe775e NA |
116 | .gem_free_object_unlocked = drm_gem_cma_free_object, |
117 | .gem_vm_ops = &drm_gem_cma_vm_ops, | |
118 | ||
119 | /* Misc */ | |
120 | .fops = &fops, | |
121 | .name = DRIVER_NAME, | |
122 | .desc = DRIVER_DESC, | |
123 | .date = "20161109", | |
124 | .major = 1, | |
125 | .minor = 0, | |
126 | }; | |
127 | ||
128 | static bool meson_vpu_has_available_connectors(struct device *dev) | |
129 | { | |
130 | struct device_node *ep, *remote; | |
131 | ||
132 | /* Parses each endpoint and check if remote exists */ | |
133 | for_each_endpoint_of_node(dev->of_node, ep) { | |
134 | /* If the endpoint node exists, consider it enabled */ | |
135 | remote = of_graph_get_remote_port(ep); | |
136 | if (remote) | |
137 | return true; | |
138 | } | |
139 | ||
140 | return false; | |
141 | } | |
142 | ||
143 | static struct regmap_config meson_regmap_config = { | |
144 | .reg_bits = 32, | |
145 | .val_bits = 32, | |
146 | .reg_stride = 4, | |
147 | .max_register = 0x1000, | |
148 | }; | |
149 | ||
09762525 NA |
150 | static void meson_vpu_init(struct meson_drm *priv) |
151 | { | |
152 | writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1)); | |
153 | writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2)); | |
154 | writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1)); | |
155 | writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1)); | |
156 | } | |
157 | ||
e3de0aa6 MJ |
158 | static void meson_remove_framebuffers(void) |
159 | { | |
160 | struct apertures_struct *ap; | |
161 | ||
162 | ap = alloc_apertures(1); | |
163 | if (!ap) | |
164 | return; | |
165 | ||
166 | /* The framebuffer can be located anywhere in RAM */ | |
167 | ap->ranges[0].base = 0; | |
168 | ap->ranges[0].size = ~0; | |
169 | ||
170 | drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb", | |
171 | false); | |
172 | kfree(ap); | |
173 | } | |
174 | ||
8604889f | 175 | static int meson_drv_bind_master(struct device *dev, bool has_components) |
bbbe775e | 176 | { |
a41e82e6 | 177 | struct platform_device *pdev = to_platform_device(dev); |
bbbe775e NA |
178 | struct meson_drm *priv; |
179 | struct drm_device *drm; | |
180 | struct resource *res; | |
181 | void __iomem *regs; | |
182 | int ret; | |
183 | ||
184 | /* Checks if an output connector is available */ | |
185 | if (!meson_vpu_has_available_connectors(dev)) { | |
186 | dev_err(dev, "No output connector available\n"); | |
187 | return -ENODEV; | |
188 | } | |
189 | ||
190 | drm = drm_dev_alloc(&meson_driver, dev); | |
191 | if (IS_ERR(drm)) | |
192 | return PTR_ERR(drm); | |
193 | ||
194 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); | |
195 | if (!priv) { | |
196 | ret = -ENOMEM; | |
197 | goto free_drm; | |
198 | } | |
199 | drm->dev_private = priv; | |
200 | priv->drm = drm; | |
201 | priv->dev = dev; | |
202 | ||
203 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu"); | |
204 | regs = devm_ioremap_resource(dev, res); | |
2c18107b CJ |
205 | if (IS_ERR(regs)) { |
206 | ret = PTR_ERR(regs); | |
207 | goto free_drm; | |
208 | } | |
bbbe775e NA |
209 | |
210 | priv->io_base = regs; | |
211 | ||
212 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi"); | |
01a9e949 CJ |
213 | if (!res) { |
214 | ret = -EINVAL; | |
215 | goto free_drm; | |
216 | } | |
bbbe775e NA |
217 | /* Simply ioremap since it may be a shared register zone */ |
218 | regs = devm_ioremap(dev, res->start, resource_size(res)); | |
2c18107b CJ |
219 | if (!regs) { |
220 | ret = -EADDRNOTAVAIL; | |
221 | goto free_drm; | |
222 | } | |
bbbe775e NA |
223 | |
224 | priv->hhi = devm_regmap_init_mmio(dev, regs, | |
225 | &meson_regmap_config); | |
226 | if (IS_ERR(priv->hhi)) { | |
227 | dev_err(&pdev->dev, "Couldn't create the HHI regmap\n"); | |
2c18107b CJ |
228 | ret = PTR_ERR(priv->hhi); |
229 | goto free_drm; | |
bbbe775e NA |
230 | } |
231 | ||
66cae477 | 232 | priv->canvas = meson_canvas_get(dev); |
2bf6b5b0 MJ |
233 | if (IS_ERR(priv->canvas)) { |
234 | ret = PTR_ERR(priv->canvas); | |
235 | goto free_drm; | |
236 | } | |
237 | ||
238 | ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1); | |
239 | if (ret) | |
240 | goto free_drm; | |
241 | ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0); | |
242 | if (ret) { | |
243 | meson_canvas_free(priv->canvas, priv->canvas_id_osd1); | |
244 | goto free_drm; | |
245 | } | |
246 | ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1); | |
247 | if (ret) { | |
248 | meson_canvas_free(priv->canvas, priv->canvas_id_osd1); | |
249 | meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); | |
250 | goto free_drm; | |
251 | } | |
252 | ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2); | |
253 | if (ret) { | |
254 | meson_canvas_free(priv->canvas, priv->canvas_id_osd1); | |
255 | meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); | |
256 | meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); | |
257 | goto free_drm; | |
bbbe775e NA |
258 | } |
259 | ||
260 | priv->vsync_irq = platform_get_irq(pdev, 0); | |
261 | ||
e770f6bf CJ |
262 | ret = drm_vblank_init(drm, 1); |
263 | if (ret) | |
264 | goto free_drm; | |
265 | ||
e3de0aa6 MJ |
266 | /* Remove early framebuffers (ie. simplefb) */ |
267 | meson_remove_framebuffers(); | |
268 | ||
bbbe775e | 269 | drm_mode_config_init(drm); |
a41e82e6 NA |
270 | drm->mode_config.max_width = 3840; |
271 | drm->mode_config.max_height = 2160; | |
272 | drm->mode_config.funcs = &meson_mode_config_funcs; | |
ce0210c1 | 273 | drm->mode_config.helper_private = &meson_mode_config_helpers; |
a41e82e6 NA |
274 | |
275 | /* Hardware Initialization */ | |
276 | ||
09762525 | 277 | meson_vpu_init(priv); |
a41e82e6 NA |
278 | meson_venc_init(priv); |
279 | meson_vpp_init(priv); | |
280 | meson_viu_init(priv); | |
bbbe775e NA |
281 | |
282 | /* Encoder Initialization */ | |
283 | ||
284 | ret = meson_venc_cvbs_create(priv); | |
285 | if (ret) | |
286 | goto free_drm; | |
287 | ||
8604889f NA |
288 | if (has_components) { |
289 | ret = component_bind_all(drm->dev, drm); | |
290 | if (ret) { | |
291 | dev_err(drm->dev, "Couldn't bind all components\n"); | |
292 | goto free_drm; | |
293 | } | |
a41e82e6 | 294 | } |
bbbe775e NA |
295 | |
296 | ret = meson_plane_create(priv); | |
297 | if (ret) | |
298 | goto free_drm; | |
299 | ||
f9a23481 NA |
300 | ret = meson_overlay_create(priv); |
301 | if (ret) | |
302 | goto free_drm; | |
303 | ||
bbbe775e NA |
304 | ret = meson_crtc_create(priv); |
305 | if (ret) | |
306 | goto free_drm; | |
307 | ||
308 | ret = drm_irq_install(drm, priv->vsync_irq); | |
309 | if (ret) | |
310 | goto free_drm; | |
311 | ||
312 | drm_mode_config_reset(drm); | |
bbbe775e | 313 | |
bbbe775e NA |
314 | drm_kms_helper_poll_init(drm); |
315 | ||
316 | platform_set_drvdata(pdev, priv); | |
317 | ||
318 | ret = drm_dev_register(drm, 0); | |
319 | if (ret) | |
2d8f9289 | 320 | goto uninstall_irq; |
bbbe775e | 321 | |
efbb9df9 NT |
322 | drm_fbdev_generic_setup(drm, 32); |
323 | ||
bbbe775e NA |
324 | return 0; |
325 | ||
2d8f9289 JPB |
326 | uninstall_irq: |
327 | drm_irq_uninstall(drm); | |
bbbe775e | 328 | free_drm: |
dcacf651 | 329 | drm_dev_put(drm); |
bbbe775e NA |
330 | |
331 | return ret; | |
332 | } | |
333 | ||
8604889f NA |
334 | static int meson_drv_bind(struct device *dev) |
335 | { | |
336 | return meson_drv_bind_master(dev, true); | |
337 | } | |
338 | ||
a41e82e6 | 339 | static void meson_drv_unbind(struct device *dev) |
bbbe775e | 340 | { |
776e7867 JPB |
341 | struct meson_drm *priv = dev_get_drvdata(dev); |
342 | struct drm_device *drm = priv->drm; | |
66cae477 | 343 | |
f9a23481 | 344 | if (priv->canvas) { |
66cae477 | 345 | meson_canvas_free(priv->canvas, priv->canvas_id_osd1); |
f9a23481 NA |
346 | meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); |
347 | meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); | |
348 | meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2); | |
349 | } | |
bbbe775e NA |
350 | |
351 | drm_dev_unregister(drm); | |
2d8f9289 | 352 | drm_irq_uninstall(drm); |
bbbe775e | 353 | drm_kms_helper_poll_fini(drm); |
bbbe775e | 354 | drm_mode_config_cleanup(drm); |
dcacf651 | 355 | drm_dev_put(drm); |
bbbe775e | 356 | |
bbbe775e NA |
357 | } |
358 | ||
a41e82e6 NA |
359 | static const struct component_master_ops meson_drv_master_ops = { |
360 | .bind = meson_drv_bind, | |
361 | .unbind = meson_drv_unbind, | |
362 | }; | |
363 | ||
364 | static int compare_of(struct device *dev, void *data) | |
365 | { | |
4bf99144 RH |
366 | DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n", |
367 | dev->of_node, data); | |
a41e82e6 NA |
368 | |
369 | return dev->of_node == data; | |
370 | } | |
371 | ||
372 | /* Possible connectors nodes to ignore */ | |
373 | static const struct of_device_id connectors_match[] = { | |
374 | { .compatible = "composite-video-connector" }, | |
375 | { .compatible = "svideo-connector" }, | |
376 | { .compatible = "hdmi-connector" }, | |
377 | { .compatible = "dvi-connector" }, | |
378 | {} | |
379 | }; | |
380 | ||
381 | static int meson_probe_remote(struct platform_device *pdev, | |
382 | struct component_match **match, | |
383 | struct device_node *parent, | |
384 | struct device_node *remote) | |
385 | { | |
386 | struct device_node *ep, *remote_node; | |
387 | int count = 1; | |
388 | ||
389 | /* If node is a connector, return and do not add to match table */ | |
390 | if (of_match_node(connectors_match, remote)) | |
391 | return 1; | |
392 | ||
393 | component_match_add(&pdev->dev, match, compare_of, remote); | |
394 | ||
395 | for_each_endpoint_of_node(remote, ep) { | |
396 | remote_node = of_graph_get_remote_port_parent(ep); | |
397 | if (!remote_node || | |
398 | remote_node == parent || /* Ignore parent endpoint */ | |
f672b93e JL |
399 | !of_device_is_available(remote_node)) { |
400 | of_node_put(remote_node); | |
a41e82e6 | 401 | continue; |
f672b93e | 402 | } |
a41e82e6 NA |
403 | |
404 | count += meson_probe_remote(pdev, match, remote, remote_node); | |
405 | ||
406 | of_node_put(remote_node); | |
407 | } | |
408 | ||
409 | return count; | |
410 | } | |
411 | ||
412 | static int meson_drv_probe(struct platform_device *pdev) | |
413 | { | |
414 | struct component_match *match = NULL; | |
415 | struct device_node *np = pdev->dev.of_node; | |
416 | struct device_node *ep, *remote; | |
417 | int count = 0; | |
418 | ||
419 | for_each_endpoint_of_node(np, ep) { | |
420 | remote = of_graph_get_remote_port_parent(ep); | |
f672b93e JL |
421 | if (!remote || !of_device_is_available(remote)) { |
422 | of_node_put(remote); | |
a41e82e6 | 423 | continue; |
f672b93e | 424 | } |
a41e82e6 NA |
425 | |
426 | count += meson_probe_remote(pdev, &match, np, remote); | |
f672b93e | 427 | of_node_put(remote); |
a41e82e6 NA |
428 | } |
429 | ||
8604889f NA |
430 | if (count && !match) |
431 | return meson_drv_bind_master(&pdev->dev, false); | |
432 | ||
a41e82e6 NA |
433 | /* If some endpoints were found, initialize the nodes */ |
434 | if (count) { | |
435 | dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count); | |
436 | ||
437 | return component_master_add_with_match(&pdev->dev, | |
438 | &meson_drv_master_ops, | |
439 | match); | |
440 | } | |
441 | ||
442 | /* If no output endpoints were available, simply bail out */ | |
443 | return 0; | |
444 | }; | |
445 | ||
bbbe775e NA |
446 | static const struct of_device_id dt_match[] = { |
447 | { .compatible = "amlogic,meson-gxbb-vpu" }, | |
448 | { .compatible = "amlogic,meson-gxl-vpu" }, | |
449 | { .compatible = "amlogic,meson-gxm-vpu" }, | |
4deb190a | 450 | { .compatible = "amlogic,meson-g12a-vpu" }, |
bbbe775e NA |
451 | {} |
452 | }; | |
453 | MODULE_DEVICE_TABLE(of, dt_match); | |
454 | ||
455 | static struct platform_driver meson_drm_platform_driver = { | |
456 | .probe = meson_drv_probe, | |
bbbe775e | 457 | .driver = { |
8aaacbc0 | 458 | .name = "meson-drm", |
bbbe775e NA |
459 | .of_match_table = dt_match, |
460 | }, | |
461 | }; | |
462 | ||
463 | module_platform_driver(meson_drm_platform_driver); | |
464 | ||
465 | MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>"); | |
466 | MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>"); | |
467 | MODULE_DESCRIPTION(DRIVER_DESC); | |
468 | MODULE_LICENSE("GPL"); |