projects / linux-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge remote-tracking branches 'asoc/topic/wm8753', 'asoc/topic/wm8770', 'asoc/topic...
[linux-block.git] / drivers / gpu / drm / imx / ipuv3-plane.c
CommitLineData
b8d181e4
PZ		 1/*
2 * i.MX IPUv3 DP Overlay Planes
3 *
4 * Copyright (C) 2013 Philipp Zabel, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#include <drm/drmP.h>
5f2f9115 17#include <drm/drm_atomic.h>
255c35f8 18#include <drm/drm_atomic_helper.h>
b8d181e4
PZ		 19#include <drm/drm_fb_cma_helper.h>
20#include <drm/drm_gem_cma_helper.h>
bd106353 21#include <drm/drm_gem_framebuffer_helper.h>
33f14235 22#include <drm/drm_plane_helper.h>
b8d181e4 23
39b9004d 24#include "video/imx-ipu-v3.h"
a71d3241 25#include "imx-drm.h"
b8d181e4
PZ		 26#include "ipuv3-plane.h"
27
00514e85
LS		 28struct ipu_plane_state {
29 struct drm_plane_state base;
30 bool use_pre;
31};
32
33static inline struct ipu_plane_state *
34to_ipu_plane_state(struct drm_plane_state *p)
35{
36 return container_of(p, struct ipu_plane_state, base);
37}
38
3df07390
PZ		 39static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
40{
41 return container_of(p, struct ipu_plane, base);
42}
b8d181e4
PZ		 43
44static const uint32_t ipu_plane_formats[] = {
c639a1cf 45 DRM_FORMAT_ARGB1555,
b8d181e4 46 DRM_FORMAT_XRGB1555,
c639a1cf 47 DRM_FORMAT_ABGR1555,
b8d181e4 48 DRM_FORMAT_XBGR1555,
c639a1cf
PZ		 49 DRM_FORMAT_RGBA5551,
50 DRM_FORMAT_BGRA5551,
cb166a30 51 DRM_FORMAT_ARGB4444,
b8d181e4
PZ		 52 DRM_FORMAT_ARGB8888,
53 DRM_FORMAT_XRGB8888,
54 DRM_FORMAT_ABGR8888,
55 DRM_FORMAT_XBGR8888,
59d6b718
PZ		 56 DRM_FORMAT_RGBA8888,
57 DRM_FORMAT_RGBX8888,
58 DRM_FORMAT_BGRA8888,
f2ad99fc 59 DRM_FORMAT_BGRX8888,
7932131f
PZ		 60 DRM_FORMAT_UYVY,
61 DRM_FORMAT_VYUY,
b8d181e4
PZ		 62 DRM_FORMAT_YUYV,
63 DRM_FORMAT_YVYU,
64 DRM_FORMAT_YUV420,
65 DRM_FORMAT_YVU420,
eae13c93
PZ		 66 DRM_FORMAT_YUV422,
67 DRM_FORMAT_YVU422,
68 DRM_FORMAT_YUV444,
69 DRM_FORMAT_YVU444,
70 DRM_FORMAT_NV12,
71 DRM_FORMAT_NV16,
33bee520 72 DRM_FORMAT_RGB565,
f6b50ef1
PZ		 73 DRM_FORMAT_RGB565_A8,
74 DRM_FORMAT_BGR565_A8,
75 DRM_FORMAT_RGB888_A8,
76 DRM_FORMAT_BGR888_A8,
77 DRM_FORMAT_RGBX8888_A8,
78 DRM_FORMAT_BGRX8888_A8,
b8d181e4
PZ		 79};
80
37aca51b
LS		 81static const uint64_t ipu_format_modifiers[] = {
82 DRM_FORMAT_MOD_LINEAR,
83 DRM_FORMAT_MOD_INVALID
84};
85
86static const uint64_t pre_format_modifiers[] = {
87 DRM_FORMAT_MOD_LINEAR,
88 DRM_FORMAT_MOD_VIVANTE_TILED,
89 DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
90 DRM_FORMAT_MOD_INVALID
91};
92
b8d181e4
PZ		 93int ipu_plane_irq(struct ipu_plane *ipu_plane)
94{
95 return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
96 IPU_IRQ_EOF);
97}
98
33f14235 99static inline unsigned long
0bfd56f0 100drm_plane_state_to_eba(struct drm_plane_state *state, int plane)
b8d181e4 101{
33f14235
LY		 102 struct drm_framebuffer *fb = state->fb;
103 struct drm_gem_cma_object *cma_obj;
03ee3da8
PZ		 104 int x = state->src.x1 >> 16;
105 int y = state->src.y1 >> 16;
b8d181e4 106
0bfd56f0 107 cma_obj = drm_fb_cma_get_gem_obj(fb, plane);
33f14235 108 BUG_ON(!cma_obj);
b8d181e4 109
0bfd56f0
PZ		 110 return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y +
111 fb->format->cpp[plane] * x;
33f14235 112}
08a89018 113
33f14235
LY		 114static inline unsigned long
115drm_plane_state_to_ubo(struct drm_plane_state *state)
116{
117 struct drm_framebuffer *fb = state->fb;
118 struct drm_gem_cma_object *cma_obj;
0bfd56f0 119 unsigned long eba = drm_plane_state_to_eba(state, 0);
03ee3da8
PZ		 120 int x = state->src.x1 >> 16;
121 int y = state->src.y1 >> 16;
b8d181e4 122
33f14235
LY		 123 cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
124 BUG_ON(!cma_obj);
9a666030 125
438b74a5
VS		 126 x /= drm_format_horz_chroma_subsampling(fb->format->format);
127 y /= drm_format_vert_chroma_subsampling(fb->format->format);
f2fa3536
PZ		 128
129 return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
353c8598 130 fb->format->cpp[1] * x - eba;
33f14235 131}
9a666030 132
33f14235
LY		 133static inline unsigned long
134drm_plane_state_to_vbo(struct drm_plane_state *state)
135{
136 struct drm_framebuffer *fb = state->fb;
137 struct drm_gem_cma_object *cma_obj;
0bfd56f0 138 unsigned long eba = drm_plane_state_to_eba(state, 0);
03ee3da8
PZ		 139 int x = state->src.x1 >> 16;
140 int y = state->src.y1 >> 16;
33f14235
LY		 141
142 cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
143 BUG_ON(!cma_obj);
144
438b74a5
VS		 145 x /= drm_format_horz_chroma_subsampling(fb->format->format);
146 y /= drm_format_vert_chroma_subsampling(fb->format->format);
f2fa3536
PZ		 147
148 return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
353c8598 149 fb->format->cpp[2] * x - eba;
33f14235
LY		 150}
151
b8d181e4
PZ		 152void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
153{
154 if (!IS_ERR_OR_NULL(ipu_plane->dp))
155 ipu_dp_put(ipu_plane->dp);
156 if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
157 ipu_dmfc_put(ipu_plane->dmfc);
158 if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
159 ipu_idmac_put(ipu_plane->ipu_ch);
f6b50ef1
PZ		 160 if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
161 ipu_idmac_put(ipu_plane->alpha_ch);
b8d181e4
PZ		 162}
163
164int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
165{
166 int ret;
f6b50ef1 167 int alpha_ch;
b8d181e4
PZ		 168
169 ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
170 if (IS_ERR(ipu_plane->ipu_ch)) {
171 ret = PTR_ERR(ipu_plane->ipu_ch);
172 DRM_ERROR("failed to get idmac channel: %d\n", ret);
173 return ret;
174 }
175
f6b50ef1
PZ		 176 alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
177 if (alpha_ch >= 0) {
178 ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
179 if (IS_ERR(ipu_plane->alpha_ch)) {
180 ret = PTR_ERR(ipu_plane->alpha_ch);
181 DRM_ERROR("failed to get alpha idmac channel %d: %d\n",
182 alpha_ch, ret);
183 return ret;
184 }
185 }
186
b8d181e4
PZ		 187 ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
188 if (IS_ERR(ipu_plane->dmfc)) {
189 ret = PTR_ERR(ipu_plane->dmfc);
190 DRM_ERROR("failed to get dmfc: ret %d\n", ret);
191 goto err_out;
192 }
193
194 if (ipu_plane->dp_flow >= 0) {
195 ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
196 if (IS_ERR(ipu_plane->dp)) {
197 ret = PTR_ERR(ipu_plane->dp);
198 DRM_ERROR("failed to get dp flow: %d\n", ret);
199 goto err_out;
200 }
201 }
202
203 return 0;
204err_out:
205 ipu_plane_put_resources(ipu_plane);
206
207 return ret;
208}
209
f6b50ef1
PZ		 210static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
211{
212 switch (ipu_plane->base.state->fb->format->format) {
213 case DRM_FORMAT_RGB565_A8:
214 case DRM_FORMAT_BGR565_A8:
215 case DRM_FORMAT_RGB888_A8:
216 case DRM_FORMAT_BGR888_A8:
217 case DRM_FORMAT_RGBX8888_A8:
218 case DRM_FORMAT_BGRX8888_A8:
219 return true;
220 default:
221 return false;
222 }
223}
224
33f14235 225static void ipu_plane_enable(struct ipu_plane *ipu_plane)
b8d181e4 226{
285bbb01
PZ		 227 if (ipu_plane->dp)
228 ipu_dp_enable(ipu_plane->ipu);
b8d181e4
PZ		 229 ipu_dmfc_enable_channel(ipu_plane->dmfc);
230 ipu_idmac_enable_channel(ipu_plane->ipu_ch);
f6b50ef1
PZ		 231 if (ipu_plane_separate_alpha(ipu_plane))
232 ipu_idmac_enable_channel(ipu_plane->alpha_ch);
b8d181e4
PZ		 233 if (ipu_plane->dp)
234 ipu_dp_enable_channel(ipu_plane->dp);
b8d181e4
PZ		 235}
236
eb8c8880 237void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
b8d181e4 238{
df4b2233
LS		 239 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
240
b8d181e4
PZ		 241 ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
242
eb8c8880
PZ		 243 if (ipu_plane->dp && disable_dp_channel)
244 ipu_dp_disable_channel(ipu_plane->dp, false);
b8d181e4 245 ipu_idmac_disable_channel(ipu_plane->ipu_ch);
f6b50ef1
PZ		 246 if (ipu_plane->alpha_ch)
247 ipu_idmac_disable_channel(ipu_plane->alpha_ch);
b8d181e4 248 ipu_dmfc_disable_channel(ipu_plane->dmfc);
285bbb01
PZ		 249 if (ipu_plane->dp)
250 ipu_dp_disable(ipu_plane->ipu);
00514e85
LS		 251 if (ipu_prg_present(ipu_plane->ipu))
252 ipu_prg_channel_disable(ipu_plane->ipu_ch);
eb8c8880 253}
b8d181e4 254
eb8c8880
PZ		 255void ipu_plane_disable_deferred(struct drm_plane *plane)
256{
257 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
258
259 if (ipu_plane->disabling) {
260 ipu_plane->disabling = false;
261 ipu_plane_disable(ipu_plane, false);
262 }
b8d181e4 263}
eb8c8880 264EXPORT_SYMBOL_GPL(ipu_plane_disable_deferred);
b8d181e4 265
33f14235 266static void ipu_plane_destroy(struct drm_plane *plane)
b8d181e4
PZ		 267{
268 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
269
270 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
271
33f14235
LY		 272 drm_plane_cleanup(plane);
273 kfree(ipu_plane);
274}
b8d181e4 275
2ead44a5 276static void ipu_plane_state_reset(struct drm_plane *plane)
00514e85
LS		 277{
278 struct ipu_plane_state *ipu_state;
279
280 if (plane->state) {
281 ipu_state = to_ipu_plane_state(plane->state);
282 __drm_atomic_helper_plane_destroy_state(plane->state);
283 kfree(ipu_state);
284 }
285
286 ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);
287
288 if (ipu_state) {
289 ipu_state->base.plane = plane;
c2c446ad 290 ipu_state->base.rotation = DRM_MODE_ROTATE_0;
00514e85
LS		 291 }
292
293 plane->state = &ipu_state->base;
294}
295
2ead44a5
FE		 296static struct drm_plane_state *
297ipu_plane_duplicate_state(struct drm_plane *plane)
00514e85
LS		 298{
299 struct ipu_plane_state *state;
300
301 if (WARN_ON(!plane->state))
302 return NULL;
303
304 state = kmalloc(sizeof(*state), GFP_KERNEL);
305 if (state)
306 __drm_atomic_helper_plane_duplicate_state(plane, &state->base);
307
308 return &state->base;
309}
310
2ead44a5
FE		 311static void ipu_plane_destroy_state(struct drm_plane *plane,
312 struct drm_plane_state *state)
00514e85
LS		 313{
314 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
315
316 __drm_atomic_helper_plane_destroy_state(state);
317 kfree(ipu_state);
318}
319
37aca51b
LS		 320static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
321 uint32_t format, uint64_t modifier)
322{
323 struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
324
325 /* linear is supported for all planes and formats */
326 if (modifier == DRM_FORMAT_MOD_LINEAR)
327 return true;
328
329 /* without a PRG there are no supported modifiers */
330 if (!ipu_prg_present(ipu))
331 return false;
332
333 return ipu_prg_format_supported(ipu, format, modifier);
334}
335
33f14235 336static const struct drm_plane_funcs ipu_plane_funcs = {
5f2f9115
LY		 337 .update_plane = drm_atomic_helper_update_plane,
338 .disable_plane = drm_atomic_helper_disable_plane,
33f14235 339 .destroy = ipu_plane_destroy,
00514e85
LS		 340 .reset = ipu_plane_state_reset,
341 .atomic_duplicate_state = ipu_plane_duplicate_state,
342 .atomic_destroy_state = ipu_plane_destroy_state,
37aca51b 343 .format_mod_supported = ipu_plane_format_mod_supported,
33f14235
LY		 344};
345
346static int ipu_plane_atomic_check(struct drm_plane *plane,
347 struct drm_plane_state *state)
348{
349 struct drm_plane_state *old_state = plane->state;
350 struct drm_crtc_state *crtc_state;
351 struct device *dev = plane->dev->dev;
352 struct drm_framebuffer *fb = state->fb;
353 struct drm_framebuffer *old_fb = old_state->fb;
f6b50ef1 354 unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
03ee3da8
PZ		 355 bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
356 struct drm_rect clip;
5fb57ab3 357 int hsub, vsub;
03ee3da8 358 int ret;
33f14235
LY		 359
360 /* Ok to disable */
361 if (!fb)
5f2f9115
LY		 362 return 0;
363
364 if (!state->crtc)
365 return -EINVAL;
366
367 crtc_state =
368 drm_atomic_get_existing_crtc_state(state->state, state->crtc);
369 if (WARN_ON(!crtc_state))
370 return -EINVAL;
33f14235 371
03ee3da8
PZ		 372 clip.x1 = 0;
373 clip.y1 = 0;
374 clip.x2 = crtc_state->adjusted_mode.hdisplay;
375 clip.y2 = crtc_state->adjusted_mode.vdisplay;
a01cb8ba
VS		 376 ret = drm_atomic_helper_check_plane_state(state, crtc_state, &clip,
377 DRM_PLANE_HELPER_NO_SCALING,
378 DRM_PLANE_HELPER_NO_SCALING,
379 can_position, true);
03ee3da8
PZ		 380 if (ret)
381 return ret;
382
33f14235 383 /* CRTC should be enabled */
5f2f9115 384 if (!crtc_state->enable)
33f14235
LY		 385 return -EINVAL;
386
33f14235
LY		 387 switch (plane->type) {
388 case DRM_PLANE_TYPE_PRIMARY:
33f14235 389 /* full plane minimum width is 13 pixels */
03ee3da8 390 if (drm_rect_width(&state->dst) < 13)
33f14235
LY		 391 return -EINVAL;
392 break;
393 case DRM_PLANE_TYPE_OVERLAY:
33f14235
LY		 394 break;
395 default:
03ee3da8 396 dev_warn(dev, "Unsupported plane type %d\n", plane->type);
33f14235
LY		 397 return -EINVAL;
398 }
399
03ee3da8 400 if (drm_rect_height(&state->dst) < 2)
33f14235
LY		 401 return -EINVAL;
402
403 /*
1780999c
LY		 404 * We support resizing active plane or changing its format by
405 * forcing CRTC mode change in plane's ->atomic_check callback
406 * and disabling all affected active planes in CRTC's ->atomic_disable
407 * callback. The planes will be reenabled in plane's ->atomic_update
408 * callback.
33f14235 409 */
03ee3da8
PZ		 410 if (old_fb &&
411 (drm_rect_width(&state->dst) != drm_rect_width(&old_state->dst) ||
412 drm_rect_height(&state->dst) != drm_rect_height(&old_state->dst) ||
413 fb->format != old_fb->format))
1780999c 414 crtc_state->mode_changed = true;
33f14235 415
0bfd56f0 416 eba = drm_plane_state_to_eba(state, 0);
33f14235
LY		 417
418 if (eba & 0x7)
419 return -EINVAL;
420
421 if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
422 return -EINVAL;
423
424 if (old_fb && fb->pitches[0] != old_fb->pitches[0])
1780999c 425 crtc_state->mode_changed = true;
33f14235 426
438b74a5 427 switch (fb->format->format) {
33f14235
LY		 428 case DRM_FORMAT_YUV420:
429 case DRM_FORMAT_YVU420:
eae13c93
PZ		 430 case DRM_FORMAT_YUV422:
431 case DRM_FORMAT_YVU422:
432 case DRM_FORMAT_YUV444:
433 case DRM_FORMAT_YVU444:
33f14235
LY		 434 /*
435 * Multiplanar formats have to meet the following restrictions:
436 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
437 * - EBA, UBO and VBO are a multiple of 8
438 * - UBO and VBO are unsigned and not larger than 0xfffff8
439 * - Only EBA may be changed while scanout is active
440 * - The strides of U and V planes must be identical.
441 */
33f14235
LY		 442 vbo = drm_plane_state_to_vbo(state);
443
eae13c93 444 if (vbo & 0x7 || vbo > 0xfffff8)
33f14235
LY		 445 return -EINVAL;
446
dbd4d576 447 if (old_fb && (fb->format == old_fb->format)) {
33f14235 448 old_vbo = drm_plane_state_to_vbo(old_state);
eae13c93 449 if (vbo != old_vbo)
181c9bfe 450 crtc_state->mode_changed = true;
33f14235
LY		 451 }
452
453 if (fb->pitches[1] != fb->pitches[2])
454 return -EINVAL;
455
eae13c93
PZ		 456 /* fall-through */
457 case DRM_FORMAT_NV12:
458 case DRM_FORMAT_NV16:
459 ubo = drm_plane_state_to_ubo(state);
460
461 if (ubo & 0x7 || ubo > 0xfffff8)
462 return -EINVAL;
463
dbd4d576 464 if (old_fb && (fb->format == old_fb->format)) {
eae13c93
PZ		 465 old_ubo = drm_plane_state_to_ubo(old_state);
466 if (ubo != old_ubo)
467 crtc_state->mode_changed = true;
468 }
469
33f14235
LY		 470 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
471 return -EINVAL;
472
473 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
1780999c 474 crtc_state->mode_changed = true;
5fb57ab3
PZ		 475
476 /*
477 * The x/y offsets must be even in case of horizontal/vertical
478 * chroma subsampling.
479 */
438b74a5
VS		 480 hsub = drm_format_horz_chroma_subsampling(fb->format->format);
481 vsub = drm_format_vert_chroma_subsampling(fb->format->format);
03ee3da8
PZ		 482 if (((state->src.x1 >> 16) & (hsub - 1)) ||
483 ((state->src.y1 >> 16) & (vsub - 1)))
5fb57ab3 484 return -EINVAL;
f6b50ef1
PZ		 485 break;
486 case DRM_FORMAT_RGB565_A8:
487 case DRM_FORMAT_BGR565_A8:
488 case DRM_FORMAT_RGB888_A8:
489 case DRM_FORMAT_BGR888_A8:
490 case DRM_FORMAT_RGBX8888_A8:
491 case DRM_FORMAT_BGRX8888_A8:
492 alpha_eba = drm_plane_state_to_eba(state, 1);
493 if (alpha_eba & 0x7)
494 return -EINVAL;
495
496 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
497 return -EINVAL;
498
499 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
500 crtc_state->mode_changed = true;
501 break;
33f14235 502 }
b8d181e4
PZ		 503
504 return 0;
505}
506
33f14235
LY		 507static void ipu_plane_atomic_disable(struct drm_plane *plane,
508 struct drm_plane_state *old_state)
509{
eb8c8880
PZ		 510 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
511
512 if (ipu_plane->dp)
513 ipu_dp_disable_channel(ipu_plane->dp, true);
514 ipu_plane->disabling = true;
33f14235
LY		 515}
516
00514e85
LS		 517static int ipu_chan_assign_axi_id(int ipu_chan)
518{
519 switch (ipu_chan) {
520 case IPUV3_CHANNEL_MEM_BG_SYNC:
521 return 1;
522 case IPUV3_CHANNEL_MEM_FG_SYNC:
523 return 2;
524 case IPUV3_CHANNEL_MEM_DC_SYNC:
525 return 3;
526 default:
527 return 0;
528 }
529}
530
790cb4c7
PZ		 531static void ipu_calculate_bursts(u32 width, u32 cpp, u32 stride,
532 u8 *burstsize, u8 *num_bursts)
533{
534 const unsigned int width_bytes = width * cpp;
535 unsigned int npb, bursts;
536
537 /* Maximum number of pixels per burst without overshooting stride */
538 for (npb = 64 / cpp; npb > 0; --npb) {
539 if (round_up(width_bytes, npb * cpp) <= stride)
540 break;
541 }
542 *burstsize = npb;
543
544 /* Maximum number of consecutive bursts without overshooting stride */
545 for (bursts = 8; bursts > 1; bursts /= 2) {
546 if (round_up(width_bytes, npb * cpp * bursts) <= stride)
547 break;
548 }
549 *num_bursts = bursts;
550}
551
33f14235
LY		 552static void ipu_plane_atomic_update(struct drm_plane *plane,
553 struct drm_plane_state *old_state)
b8d181e4
PZ		 554{
555 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
33f14235 556 struct drm_plane_state *state = plane->state;
00514e85 557 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
3fd8b292
PZ		 558 struct drm_crtc_state *crtc_state = state->crtc->state;
559 struct drm_framebuffer *fb = state->fb;
2e9a7121 560 struct drm_rect *dst = &state->dst;
3fd8b292 561 unsigned long eba, ubo, vbo;
f6b50ef1 562 unsigned long alpha_eba = 0;
33f14235 563 enum ipu_color_space ics;
00514e85 564 unsigned int axi_id = 0;
790cb4c7
PZ		 565 const struct drm_format_info *info;
566 u8 burstsize, num_bursts;
567 u32 width, height;
3fd8b292 568 int active;
b8d181e4 569
2e9a7121
PZ		 570 if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
571 ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
572
0bfd56f0 573 eba = drm_plane_state_to_eba(state, 0);
5f4df0c7 574
00514e85
LS		 575 /*
576 * Configure PRG channel and attached PRE, this changes the EBA to an
577 * internal SRAM location.
578 */
579 if (ipu_state->use_pre) {
580 axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
581 ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
582 drm_rect_width(&state->src) >> 16,
583 drm_rect_height(&state->src) >> 16,
a2ceec52 584 fb->pitches[0], fb->format->format,
9222f768 585 fb->modifier, &eba);
00514e85
LS		 586 }
587
3fd8b292 588 if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
00514e85
LS		 589 /* nothing to do if PRE is used */
590 if (ipu_state->use_pre)
591 return;
3fd8b292
PZ		 592 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
593 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
594 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
f6b50ef1
PZ		 595 if (ipu_plane_separate_alpha(ipu_plane)) {
596 active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
597 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
598 alpha_eba);
599 ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
600 }
3fd8b292 601 return;
33f14235 602 }
b8d181e4 603
5be5dd38 604 ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
33f14235
LY		 605 switch (ipu_plane->dp_flow) {
606 case IPU_DP_FLOW_SYNC_BG:
5be5dd38 607 ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_RGB);
33f14235
LY		 608 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
609 break;
610 case IPU_DP_FLOW_SYNC_FG:
33f14235
LY		 611 ipu_dp_setup_channel(ipu_plane->dp, ics,
612 IPUV3_COLORSPACE_UNKNOWN);
33f14235 613 /* Enable local alpha on partial plane */
58dff399 614 switch (fb->format->format) {
33f14235
LY		 615 case DRM_FORMAT_ARGB1555:
616 case DRM_FORMAT_ABGR1555:
617 case DRM_FORMAT_RGBA5551:
618 case DRM_FORMAT_BGRA5551:
619 case DRM_FORMAT_ARGB4444:
620 case DRM_FORMAT_ARGB8888:
621 case DRM_FORMAT_ABGR8888:
622 case DRM_FORMAT_RGBA8888:
623 case DRM_FORMAT_BGRA8888:
f6b50ef1
PZ		 624 case DRM_FORMAT_RGB565_A8:
625 case DRM_FORMAT_BGR565_A8:
626 case DRM_FORMAT_RGB888_A8:
627 case DRM_FORMAT_BGR888_A8:
628 case DRM_FORMAT_RGBX8888_A8:
629 case DRM_FORMAT_BGRX8888_A8:
33f14235
LY		 630 ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
631 break;
632 default:
86126748 633 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
33f14235
LY		 634 break;
635 }
636 }
637
2e9a7121 638 ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));
33f14235 639
790cb4c7
PZ		 640 width = drm_rect_width(&state->src) >> 16;
641 height = drm_rect_height(&state->src) >> 16;
642 info = drm_format_info(fb->format->format);
643 ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0],
644 &burstsize, &num_bursts);
645
33f14235 646 ipu_cpmem_zero(ipu_plane->ipu_ch);
790cb4c7 647 ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
58dff399 648 ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
790cb4c7 649 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
33f14235
LY		 650 ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
651 ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
58dff399 652 ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
00514e85 653 ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
790cb4c7 654
438b74a5 655 switch (fb->format->format) {
3fd8b292
PZ		 656 case DRM_FORMAT_YUV420:
657 case DRM_FORMAT_YVU420:
eae13c93
PZ		 658 case DRM_FORMAT_YUV422:
659 case DRM_FORMAT_YVU422:
660 case DRM_FORMAT_YUV444:
661 case DRM_FORMAT_YVU444:
3fd8b292
PZ		 662 ubo = drm_plane_state_to_ubo(state);
663 vbo = drm_plane_state_to_vbo(state);
438b74a5
VS		 664 if (fb->format->format == DRM_FORMAT_YVU420 ||
665 fb->format->format == DRM_FORMAT_YVU422 ||
666 fb->format->format == DRM_FORMAT_YVU444)
eae13c93 667 swap(ubo, vbo);
3fd8b292 668
eae13c93
PZ		 669 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
670 fb->pitches[1], ubo, vbo);
3fd8b292
PZ		 671
672 dev_dbg(ipu_plane->base.dev->dev,
673 "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
03ee3da8 674 state->src.x1 >> 16, state->src.y1 >> 16);
3fd8b292 675 break;
eae13c93
PZ		 676 case DRM_FORMAT_NV12:
677 case DRM_FORMAT_NV16:
678 ubo = drm_plane_state_to_ubo(state);
679
680 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
681 fb->pitches[1], ubo, ubo);
682
683 dev_dbg(ipu_plane->base.dev->dev,
684 "phy = %lu %lu, x = %d, y = %d", eba, ubo,
03ee3da8 685 state->src.x1 >> 16, state->src.y1 >> 16);
eae13c93 686 break;
f6b50ef1
PZ		 687 case DRM_FORMAT_RGB565_A8:
688 case DRM_FORMAT_BGR565_A8:
689 case DRM_FORMAT_RGB888_A8:
690 case DRM_FORMAT_BGR888_A8:
691 case DRM_FORMAT_RGBX8888_A8:
692 case DRM_FORMAT_BGRX8888_A8:
693 alpha_eba = drm_plane_state_to_eba(state, 1);
790cb4c7 694 num_bursts = 0;
f6b50ef1
PZ		 695
696 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
697 eba, alpha_eba, state->src.x1 >> 16, state->src.y1 >> 16);
698
699 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
700
701 ipu_cpmem_zero(ipu_plane->alpha_ch);
702 ipu_cpmem_set_resolution(ipu_plane->alpha_ch,
703 drm_rect_width(&state->src) >> 16,
704 drm_rect_height(&state->src) >> 16);
705 ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
706 ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
707 ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
58dff399 708 ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
f6b50ef1
PZ		 709 ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
710 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
711 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
712 break;
3fd8b292
PZ		 713 default:
714 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
03ee3da8 715 eba, state->src.x1 >> 16, state->src.y1 >> 16);
3fd8b292
PZ		 716 break;
717 }
718 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
719 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
790cb4c7 720 ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
33f14235 721 ipu_plane_enable(ipu_plane);
b8d181e4
PZ		 722}
723
33f14235 724static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
bd106353 725 .prepare_fb = drm_gem_fb_prepare_fb,
33f14235
LY		 726 .atomic_check = ipu_plane_atomic_check,
727 .atomic_disable = ipu_plane_atomic_disable,
728 .atomic_update = ipu_plane_atomic_update,
b8d181e4
PZ		 729};
730
00514e85
LS		 731int ipu_planes_assign_pre(struct drm_device *dev,
732 struct drm_atomic_state *state)
733{
9222f768 734 struct drm_crtc_state *old_crtc_state, *crtc_state;
00514e85 735 struct drm_plane_state *plane_state;
9222f768
LS		 736 struct ipu_plane_state *ipu_state;
737 struct ipu_plane *ipu_plane;
00514e85 738 struct drm_plane *plane;
9222f768 739 struct drm_crtc *crtc;
00514e85 740 int available_pres = ipu_prg_max_active_channels();
9222f768 741 int ret, i;
00514e85 742
9222f768
LS		 743 for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
744 ret = drm_atomic_add_affected_planes(state, crtc);
745 if (ret)
746 return ret;
747 }
00514e85 748
9222f768
LS		 749 /*
750 * We are going over the planes in 2 passes: first we assign PREs to
751 * planes with a tiling modifier, which need the PREs to resolve into
752 * linear. Any failure to assign a PRE there is fatal. In the second
753 * pass we try to assign PREs to linear FBs, to improve memory access
754 * patterns for them. Failure at this point is non-fatal, as we can
755 * scan out linear FBs without a PRE.
756 */
30ea7521 757 for_each_new_plane_in_state(state, plane, plane_state, i) {
9222f768
LS		 758 ipu_state = to_ipu_plane_state(plane_state);
759 ipu_plane = to_ipu_plane(plane);
760
761 if (!plane_state->fb) {
762 ipu_state->use_pre = false;
763 continue;
764 }
765
766 if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
767 plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
768 continue;
769
770 if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
771 return -EINVAL;
772
773 if (!ipu_prg_format_supported(ipu_plane->ipu,
774 plane_state->fb->format->format,
775 plane_state->fb->modifier))
776 return -EINVAL;
777
778 ipu_state->use_pre = true;
779 available_pres--;
780 }
781
782 for_each_new_plane_in_state(state, plane, plane_state, i) {
783 ipu_state = to_ipu_plane_state(plane_state);
784 ipu_plane = to_ipu_plane(plane);
785
786 if (!plane_state->fb) {
787 ipu_state->use_pre = false;
788 continue;
789 }
790
791 if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
792 plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
793 continue;
794
795 /* make sure that modifier is initialized */
796 plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
00514e85
LS		 797
798 if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
00514e85
LS		 799 ipu_prg_format_supported(ipu_plane->ipu,
800 plane_state->fb->format->format,
801 plane_state->fb->modifier)) {
802 ipu_state->use_pre = true;
803 available_pres--;
804 } else {
805 ipu_state->use_pre = false;
806 }
807 }
808
809 return 0;
810}
811EXPORT_SYMBOL_GPL(ipu_planes_assign_pre);
812
b8d181e4
PZ		 813struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
814 int dma, int dp, unsigned int possible_crtcs,
43895599 815 enum drm_plane_type type)
b8d181e4
PZ		 816{
817 struct ipu_plane *ipu_plane;
37aca51b 818 const uint64_t *modifiers = ipu_format_modifiers;
b8d181e4
PZ		 819 int ret;
820
821 DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
822 dma, dp, possible_crtcs);
823
824 ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
825 if (!ipu_plane) {
826 DRM_ERROR("failed to allocate plane\n");
827 return ERR_PTR(-ENOMEM);
828 }
829
830 ipu_plane->ipu = ipu;
831 ipu_plane->dma = dma;
832 ipu_plane->dp_flow = dp;
833
37aca51b
LS		 834 if (ipu_prg_present(ipu))
835 modifiers = pre_format_modifiers;
836
43895599
PZ		 837 ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
838 &ipu_plane_funcs, ipu_plane_formats,
e6fc3b68 839 ARRAY_SIZE(ipu_plane_formats),
37aca51b 840 modifiers, type, NULL);
b8d181e4
PZ		 841 if (ret) {
842 DRM_ERROR("failed to initialize plane\n");
843 kfree(ipu_plane);
844 return ERR_PTR(ret);
845 }
846
33f14235
LY		 847 drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
848
b8d181e4
PZ		 849 return ipu_plane;
850}
Linux 6.x block layer and io_uring tree(s)