drm/i915: Add intel_ prefix to struct ip_version
[linux-block.git] / drivers / gpu / drm / i915 / intel_step.c
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1// SPDX-License-Identifier: MIT
2/*
3 * Copyright © 2020,2021 Intel Corporation
4 */
5
6#include "i915_drv.h"
7#include "intel_step.h"
8
9/*
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10 * Some platforms have unusual ways of mapping PCI revision ID to GT/display
11 * steppings. E.g., in some cases a higher PCI revision may translate to a
12 * lower stepping of the GT and/or display IP. This file provides lookup
13 * tables to map the PCI revision into a standard set of stepping values that
14 * can be compared numerically.
15 *
16 * Also note that some revisions/steppings may have been set aside as
17 * placeholders but never materialized in real hardware; in those cases there
18 * may be jumps in the revision IDs or stepping values in the tables below.
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19 */
20
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21/*
22 * Some platforms always have the same stepping value for GT and display;
23 * use a macro to define these to make it easier to identify the platforms
24 * where the two steppings can deviate.
25 */
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26#define COMMON_STEP(x) .graphics_step = STEP_##x, .display_step = STEP_##x, .media_step = STEP_##x
27#define COMMON_GT_MEDIA_STEP(x) .graphics_step = STEP_##x, .media_step = STEP_##x
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28
29static const struct intel_step_info skl_revids[] = {
30 [0x6] = { COMMON_STEP(G0) },
31 [0x7] = { COMMON_STEP(H0) },
32 [0x9] = { COMMON_STEP(J0) },
33 [0xA] = { COMMON_STEP(I1) },
34};
ef47b7ab 35
5644dc0a 36static const struct intel_step_info kbl_revids[] = {
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37 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 },
38 [2] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 },
39 [3] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_B0 },
40 [4] = { COMMON_GT_MEDIA_STEP(F0), .display_step = STEP_C0 },
41 [5] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B1 },
42 [6] = { COMMON_GT_MEDIA_STEP(D1), .display_step = STEP_B1 },
43 [7] = { COMMON_GT_MEDIA_STEP(G0), .display_step = STEP_C0 },
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44};
45
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46static const struct intel_step_info bxt_revids[] = {
47 [0xA] = { COMMON_STEP(C0) },
48 [0xB] = { COMMON_STEP(C0) },
49 [0xC] = { COMMON_STEP(D0) },
50 [0xD] = { COMMON_STEP(E0) },
51};
52
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53static const struct intel_step_info glk_revids[] = {
54 [3] = { COMMON_STEP(B0) },
55};
56
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57static const struct intel_step_info icl_revids[] = {
58 [7] = { COMMON_STEP(D0) },
59};
60
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61static const struct intel_step_info jsl_ehl_revids[] = {
62 [0] = { COMMON_STEP(A0) },
63 [1] = { COMMON_STEP(B0) },
64};
65
db47fe72 66static const struct intel_step_info tgl_uy_revids[] = {
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67 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },
68 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 },
69 [2] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 },
70 [3] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 },
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71};
72
73/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
db47fe72 74static const struct intel_step_info tgl_revids[] = {
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75 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 },
76 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_D0 },
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77};
78
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79static const struct intel_step_info rkl_revids[] = {
80 [0] = { COMMON_STEP(A0) },
81 [1] = { COMMON_STEP(B0) },
82 [4] = { COMMON_STEP(C0) },
83};
84
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85static const struct intel_step_info dg1_revids[] = {
86 [0] = { COMMON_STEP(A0) },
87 [1] = { COMMON_STEP(B0) },
88};
89
db47fe72 90static const struct intel_step_info adls_revids[] = {
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91 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },
92 [0x1] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A2 },
93 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 },
94 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 },
95 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 },
7eb186bb 96};
ef47b7ab 97
db47fe72 98static const struct intel_step_info adlp_revids[] = {
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99 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },
100 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 },
101 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 },
102 [0xC] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 },
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103};
104
086df54e 105static const struct intel_step_info xehpsdv_revids[] = {
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106 [0x0] = { COMMON_GT_MEDIA_STEP(A0) },
107 [0x1] = { COMMON_GT_MEDIA_STEP(A1) },
108 [0x4] = { COMMON_GT_MEDIA_STEP(B0) },
109 [0x8] = { COMMON_GT_MEDIA_STEP(C0) },
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110};
111
9e22cfc5 112static const struct intel_step_info dg2_g10_revid_step_tbl[] = {
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113 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 },
114 [0x1] = { COMMON_GT_MEDIA_STEP(A1), .display_step = STEP_A0 },
115 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 },
116 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 },
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117};
118
119static const struct intel_step_info dg2_g11_revid_step_tbl[] = {
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120 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 },
121 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 },
122 [0x5] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 },
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123};
124
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125static const struct intel_step_info dg2_g12_revid_step_tbl[] = {
126 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_C0 },
127};
128
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129static const struct intel_step_info adls_rpls_revids[] = {
130 [0x4] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_D0 },
131 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 },
132};
133
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134static const struct intel_step_info adlp_n_revids[] = {
135 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_D0 },
136};
137
944ca7d8 138static u8 gmd_to_intel_step(struct drm_i915_private *i915,
ef7e222c 139 struct intel_ip_version *gmd)
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140{
141 u8 step = gmd->step + STEP_A0;
142
143 if (step >= STEP_FUTURE) {
144 drm_dbg(&i915->drm, "Using future steppings\n");
145 return STEP_FUTURE;
146 }
147
148 return step;
149}
150
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151static void pvc_step_init(struct drm_i915_private *i915, int pci_revid);
152
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153void intel_step_init(struct drm_i915_private *i915)
154{
5644dc0a 155 const struct intel_step_info *revids = NULL;
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156 int size = 0;
157 int revid = INTEL_REVID(i915);
5644dc0a 158 struct intel_step_info step = {};
ef47b7ab 159
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160 if (HAS_GMD_ID(i915)) {
161 step.graphics_step = gmd_to_intel_step(i915,
162 &RUNTIME_INFO(i915)->graphics.ip);
163 step.media_step = gmd_to_intel_step(i915,
164 &RUNTIME_INFO(i915)->media.ip);
165 step.display_step = gmd_to_intel_step(i915,
166 &RUNTIME_INFO(i915)->display.ip);
167 RUNTIME_INFO(i915)->step = step;
168
169 return;
170 }
171
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172 if (IS_PONTEVECCHIO(i915)) {
173 pvc_step_init(i915, revid);
174 return;
175 } else if (IS_DG2_G10(i915)) {
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176 revids = dg2_g10_revid_step_tbl;
177 size = ARRAY_SIZE(dg2_g10_revid_step_tbl);
178 } else if (IS_DG2_G11(i915)) {
179 revids = dg2_g11_revid_step_tbl;
180 size = ARRAY_SIZE(dg2_g11_revid_step_tbl);
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181 } else if (IS_DG2_G12(i915)) {
182 revids = dg2_g12_revid_step_tbl;
183 size = ARRAY_SIZE(dg2_g12_revid_step_tbl);
9e22cfc5 184 } else if (IS_XEHPSDV(i915)) {
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185 revids = xehpsdv_revids;
186 size = ARRAY_SIZE(xehpsdv_revids);
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187 } else if (IS_ADLP_N(i915)) {
188 revids = adlp_n_revids;
189 size = ARRAY_SIZE(adlp_n_revids);
086df54e 190 } else if (IS_ALDERLAKE_P(i915)) {
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191 revids = adlp_revids;
192 size = ARRAY_SIZE(adlp_revids);
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193 } else if (IS_ADLS_RPLS(i915)) {
194 revids = adls_rpls_revids;
195 size = ARRAY_SIZE(adls_rpls_revids);
b2c6eaf2 196 } else if (IS_ALDERLAKE_S(i915)) {
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197 revids = adls_revids;
198 size = ARRAY_SIZE(adls_revids);
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199 } else if (IS_DG1(i915)) {
200 revids = dg1_revids;
201 size = ARRAY_SIZE(dg1_revids);
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202 } else if (IS_ROCKETLAKE(i915)) {
203 revids = rkl_revids;
204 size = ARRAY_SIZE(rkl_revids);
b9ef8939 205 } else if (IS_TGL_UY(i915)) {
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206 revids = tgl_uy_revids;
207 size = ARRAY_SIZE(tgl_uy_revids);
34b7e27b 208 } else if (IS_TIGERLAKE(i915)) {
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209 revids = tgl_revids;
210 size = ARRAY_SIZE(tgl_revids);
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211 } else if (IS_JSL_EHL(i915)) {
212 revids = jsl_ehl_revids;
213 size = ARRAY_SIZE(jsl_ehl_revids);
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214 } else if (IS_ICELAKE(i915)) {
215 revids = icl_revids;
216 size = ARRAY_SIZE(icl_revids);
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217 } else if (IS_GEMINILAKE(i915)) {
218 revids = glk_revids;
219 size = ARRAY_SIZE(glk_revids);
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220 } else if (IS_BROXTON(i915)) {
221 revids = bxt_revids;
222 size = ARRAY_SIZE(bxt_revids);
34b7e27b 223 } else if (IS_KABYLAKE(i915)) {
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224 revids = kbl_revids;
225 size = ARRAY_SIZE(kbl_revids);
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226 } else if (IS_SKYLAKE(i915)) {
227 revids = skl_revids;
228 size = ARRAY_SIZE(skl_revids);
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229 }
230
231 /* Not using the stepping scheme for the platform yet. */
232 if (!revids)
233 return;
234
c1f110ee 235 if (revid < size && revids[revid].graphics_step != STEP_NONE) {
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236 step = revids[revid];
237 } else {
238 drm_warn(&i915->drm, "Unknown revid 0x%02x\n", revid);
239
240 /*
241 * If we hit a gap in the revid array, use the information for
242 * the next revid.
243 *
244 * This may be wrong in all sorts of ways, especially if the
245 * steppings in the array are not monotonically increasing, but
246 * it's better than defaulting to 0.
247 */
c1f110ee 248 while (revid < size && revids[revid].graphics_step == STEP_NONE)
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249 revid++;
250
251 if (revid < size) {
252 drm_dbg(&i915->drm, "Using steppings for revid 0x%02x\n",
253 revid);
254 step = revids[revid];
255 } else {
256 drm_dbg(&i915->drm, "Using future steppings\n");
c1f110ee 257 step.graphics_step = STEP_FUTURE;
26475ca9 258 step.display_step = STEP_FUTURE;
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259 }
260 }
261
c1f110ee 262 if (drm_WARN_ON(&i915->drm, step.graphics_step == STEP_NONE))
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263 return;
264
265 RUNTIME_INFO(i915)->step = step;
266}
e631a440 267
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268#define PVC_BD_REVID GENMASK(5, 3)
269#define PVC_CT_REVID GENMASK(2, 0)
270
271static const int pvc_bd_subids[] = {
272 [0x0] = STEP_A0,
273 [0x3] = STEP_B0,
274 [0x4] = STEP_B1,
275 [0x5] = STEP_B3,
276};
277
278static const int pvc_ct_subids[] = {
279 [0x3] = STEP_A0,
280 [0x5] = STEP_B0,
281 [0x6] = STEP_B1,
282 [0x7] = STEP_C0,
283};
284
285static int
286pvc_step_lookup(struct drm_i915_private *i915, const char *type,
287 const int *table, int size, int subid)
288{
289 if (subid < size && table[subid] != STEP_NONE)
290 return table[subid];
291
292 drm_warn(&i915->drm, "Unknown %s id 0x%02x\n", type, subid);
293
294 /*
295 * As on other platforms, try to use the next higher ID if we land on a
296 * gap in the table.
297 */
298 while (subid < size && table[subid] == STEP_NONE)
299 subid++;
300
301 if (subid < size) {
302 drm_dbg(&i915->drm, "Using steppings for %s id 0x%02x\n",
303 type, subid);
304 return table[subid];
305 }
306
307 drm_dbg(&i915->drm, "Using future steppings\n");
308 return STEP_FUTURE;
309}
310
311/*
312 * PVC needs special handling since we don't lookup the
313 * revid in a table, but rather specific bitfields within
314 * the revid for various components.
315 */
316static void pvc_step_init(struct drm_i915_private *i915, int pci_revid)
317{
318 int ct_subid, bd_subid;
319
320 bd_subid = FIELD_GET(PVC_BD_REVID, pci_revid);
321 ct_subid = FIELD_GET(PVC_CT_REVID, pci_revid);
322
323 RUNTIME_INFO(i915)->step.basedie_step =
324 pvc_step_lookup(i915, "Base Die", pvc_bd_subids,
325 ARRAY_SIZE(pvc_bd_subids), bd_subid);
326 RUNTIME_INFO(i915)->step.graphics_step =
327 pvc_step_lookup(i915, "Compute Tile", pvc_ct_subids,
328 ARRAY_SIZE(pvc_ct_subids), ct_subid);
329}
330
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AS
331#define STEP_NAME_CASE(name) \
332 case STEP_##name: \
333 return #name;
334
335const char *intel_step_name(enum intel_step step)
336{
337 switch (step) {
338 STEP_NAME_LIST(STEP_NAME_CASE);
339
340 default:
341 return "**";
342 }
343}