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drm/i915: Free wa_batchbuffer when freeing error state
[linux-2.6-block.git] / drivers / gpu / drm / i915 / intel_panel.c
CommitLineData
1d8e1c75
CW		 1/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
a70491cc
JP		 31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
f766093e 33#include <linux/kernel.h>
7bd90909 34#include <linux/moduleparam.h>
1d8e1c75
CW		 35#include "intel_drv.h"
36
37void
4c6df4b4 38intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
1d8e1c75
CW		 39 struct drm_display_mode *adjusted_mode)
40{
4c6df4b4 41 drm_mode_copy(adjusted_mode, fixed_mode);
a52690e4
ID		 42
43 drm_mode_set_crtcinfo(adjusted_mode, 0);
1d8e1c75
CW		 44}
45
525997e0
JN		 46/**
47 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
48 * @dev: drm device
49 * @fixed_mode : panel native mode
50 * @connector: LVDS/eDP connector
51 *
52 * Return downclock_avail
53 * Find the reduced downclock for LVDS/eDP in EDID.
54 */
55struct drm_display_mode *
56intel_find_panel_downclock(struct drm_device *dev,
57 struct drm_display_mode *fixed_mode,
58 struct drm_connector *connector)
59{
60 struct drm_display_mode *scan, *tmp_mode;
61 int temp_downclock;
62
63 temp_downclock = fixed_mode->clock;
64 tmp_mode = NULL;
65
66 list_for_each_entry(scan, &connector->probed_modes, head) {
67 /*
68 * If one mode has the same resolution with the fixed_panel
69 * mode while they have the different refresh rate, it means
70 * that the reduced downclock is found. In such
71 * case we can set the different FPx0/1 to dynamically select
72 * between low and high frequency.
73 */
74 if (scan->hdisplay == fixed_mode->hdisplay &&
75 scan->hsync_start == fixed_mode->hsync_start &&
76 scan->hsync_end == fixed_mode->hsync_end &&
77 scan->htotal == fixed_mode->htotal &&
78 scan->vdisplay == fixed_mode->vdisplay &&
79 scan->vsync_start == fixed_mode->vsync_start &&
80 scan->vsync_end == fixed_mode->vsync_end &&
81 scan->vtotal == fixed_mode->vtotal) {
82 if (scan->clock < temp_downclock) {
83 /*
84 * The downclock is already found. But we
85 * expect to find the lower downclock.
86 */
87 temp_downclock = scan->clock;
88 tmp_mode = scan;
89 }
90 }
91 }
92
93 if (temp_downclock < fixed_mode->clock)
94 return drm_mode_duplicate(dev, tmp_mode);
95 else
96 return NULL;
97}
98
1d8e1c75
CW		 99/* adjusted_mode has been preset to be the panel's fixed mode */
100void
b074cec8 101intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
5cec258b 102 struct intel_crtc_state *pipe_config,
b074cec8 103 int fitting_mode)
1d8e1c75 104{
37327abd 105 struct drm_display_mode *adjusted_mode;
1d8e1c75
CW		 106 int x, y, width, height;
107
2d112de7 108 adjusted_mode = &pipe_config->base.adjusted_mode;
b074cec8 109
1d8e1c75
CW		 110 x = y = width = height = 0;
111
112 /* Native modes don't need fitting */
37327abd
VS		 113 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
114 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
1d8e1c75
CW		 115 goto done;
116
117 switch (fitting_mode) {
118 case DRM_MODE_SCALE_CENTER:
37327abd
VS		 119 width = pipe_config->pipe_src_w;
120 height = pipe_config->pipe_src_h;
1d8e1c75
CW		 121 x = (adjusted_mode->hdisplay - width + 1)/2;
122 y = (adjusted_mode->vdisplay - height + 1)/2;
123 break;
124
125 case DRM_MODE_SCALE_ASPECT:
126 /* Scale but preserve the aspect ratio */
127 {
9084e7d2
DV		 128 u32 scaled_width = adjusted_mode->hdisplay
129 * pipe_config->pipe_src_h;
130 u32 scaled_height = pipe_config->pipe_src_w
131 * adjusted_mode->vdisplay;
1d8e1c75 132 if (scaled_width > scaled_height) { /* pillar */
37327abd 133 width = scaled_height / pipe_config->pipe_src_h;
302983e9 134 if (width & 1)
0206e353 135 width++;
1d8e1c75
CW		 136 x = (adjusted_mode->hdisplay - width + 1) / 2;
137 y = 0;
138 height = adjusted_mode->vdisplay;
139 } else if (scaled_width < scaled_height) { /* letter */
37327abd 140 height = scaled_width / pipe_config->pipe_src_w;
302983e9
AJ		 141 if (height & 1)
142 height++;
1d8e1c75
CW		 143 y = (adjusted_mode->vdisplay - height + 1) / 2;
144 x = 0;
145 width = adjusted_mode->hdisplay;
146 } else {
147 x = y = 0;
148 width = adjusted_mode->hdisplay;
149 height = adjusted_mode->vdisplay;
150 }
151 }
152 break;
153
1d8e1c75
CW		 154 case DRM_MODE_SCALE_FULLSCREEN:
155 x = y = 0;
156 width = adjusted_mode->hdisplay;
157 height = adjusted_mode->vdisplay;
158 break;
ab3e67f4
JB		 159
160 default:
161 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
162 return;
1d8e1c75
CW		 163 }
164
165done:
b074cec8
JB		 166 pipe_config->pch_pfit.pos = (x << 16) | y;
167 pipe_config->pch_pfit.size = (width << 16) | height;
fd4daa9c 168 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
1d8e1c75 169}
a9573556 170
2dd24552
JB		 171static void
172centre_horizontally(struct drm_display_mode *mode,
173 int width)
174{
175 u32 border, sync_pos, blank_width, sync_width;
176
177 /* keep the hsync and hblank widths constant */
178 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
179 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
180 sync_pos = (blank_width - sync_width + 1) / 2;
181
182 border = (mode->hdisplay - width + 1) / 2;
183 border += border & 1; /* make the border even */
184
185 mode->crtc_hdisplay = width;
186 mode->crtc_hblank_start = width + border;
187 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
188
189 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
190 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
191}
192
193static void
194centre_vertically(struct drm_display_mode *mode,
195 int height)
196{
197 u32 border, sync_pos, blank_width, sync_width;
198
199 /* keep the vsync and vblank widths constant */
200 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
201 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
202 sync_pos = (blank_width - sync_width + 1) / 2;
203
204 border = (mode->vdisplay - height + 1) / 2;
205
206 mode->crtc_vdisplay = height;
207 mode->crtc_vblank_start = height + border;
208 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
209
210 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
211 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
212}
213
214static inline u32 panel_fitter_scaling(u32 source, u32 target)
215{
216 /*
217 * Floating point operation is not supported. So the FACTOR
218 * is defined, which can avoid the floating point computation
219 * when calculating the panel ratio.
220 */
221#define ACCURACY 12
222#define FACTOR (1 << ACCURACY)
223 u32 ratio = source * FACTOR / target;
224 return (FACTOR * ratio + FACTOR/2) / FACTOR;
225}
226
5cec258b 227static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
9084e7d2
DV		 228 u32 *pfit_control)
229{
2d112de7 230 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
9084e7d2
DV		 231 u32 scaled_width = adjusted_mode->hdisplay *
232 pipe_config->pipe_src_h;
233 u32 scaled_height = pipe_config->pipe_src_w *
234 adjusted_mode->vdisplay;
235
236 /* 965+ is easy, it does everything in hw */
237 if (scaled_width > scaled_height)
238 *pfit_control |= PFIT_ENABLE |
239 PFIT_SCALING_PILLAR;
240 else if (scaled_width < scaled_height)
241 *pfit_control |= PFIT_ENABLE |
242 PFIT_SCALING_LETTER;
243 else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
244 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
245}
246
5cec258b 247static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
9084e7d2
DV		 248 u32 *pfit_control, u32 *pfit_pgm_ratios,
249 u32 *border)
250{
2d112de7 251 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
9084e7d2
DV		 252 u32 scaled_width = adjusted_mode->hdisplay *
253 pipe_config->pipe_src_h;
254 u32 scaled_height = pipe_config->pipe_src_w *
255 adjusted_mode->vdisplay;
256 u32 bits;
257
258 /*
259 * For earlier chips we have to calculate the scaling
260 * ratio by hand and program it into the
261 * PFIT_PGM_RATIO register
262 */
263 if (scaled_width > scaled_height) { /* pillar */
264 centre_horizontally(adjusted_mode,
265 scaled_height /
266 pipe_config->pipe_src_h);
267
268 *border = LVDS_BORDER_ENABLE;
269 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
270 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
271 adjusted_mode->vdisplay);
272
273 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
274 bits << PFIT_VERT_SCALE_SHIFT);
275 *pfit_control |= (PFIT_ENABLE |
276 VERT_INTERP_BILINEAR |
277 HORIZ_INTERP_BILINEAR);
278 }
279 } else if (scaled_width < scaled_height) { /* letter */
280 centre_vertically(adjusted_mode,
281 scaled_width /
282 pipe_config->pipe_src_w);
283
284 *border = LVDS_BORDER_ENABLE;
285 if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
286 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
287 adjusted_mode->hdisplay);
288
289 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
290 bits << PFIT_VERT_SCALE_SHIFT);
291 *pfit_control |= (PFIT_ENABLE |
292 VERT_INTERP_BILINEAR |
293 HORIZ_INTERP_BILINEAR);
294 }
295 } else {
296 /* Aspects match, Let hw scale both directions */
297 *pfit_control |= (PFIT_ENABLE |
298 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
299 VERT_INTERP_BILINEAR |
300 HORIZ_INTERP_BILINEAR);
301 }
302}
303
2dd24552 304void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
5cec258b 305 struct intel_crtc_state *pipe_config,
2dd24552
JB		 306 int fitting_mode)
307{
308 struct drm_device *dev = intel_crtc->base.dev;
2dd24552 309 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
37327abd 310 struct drm_display_mode *adjusted_mode;
2dd24552 311
2d112de7 312 adjusted_mode = &pipe_config->base.adjusted_mode;
2dd24552
JB		 313
314 /* Native modes don't need fitting */
37327abd
VS		 315 if (adjusted_mode->hdisplay == pipe_config->pipe_src_w &&
316 adjusted_mode->vdisplay == pipe_config->pipe_src_h)
2dd24552
JB		 317 goto out;
318
319 switch (fitting_mode) {
320 case DRM_MODE_SCALE_CENTER:
321 /*
322 * For centered modes, we have to calculate border widths &
323 * heights and modify the values programmed into the CRTC.
324 */
37327abd
VS		 325 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
326 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
2dd24552
JB		 327 border = LVDS_BORDER_ENABLE;
328 break;
329 case DRM_MODE_SCALE_ASPECT:
330 /* Scale but preserve the aspect ratio */
9084e7d2
DV		 331 if (INTEL_INFO(dev)->gen >= 4)
332 i965_scale_aspect(pipe_config, &pfit_control);
333 else
334 i9xx_scale_aspect(pipe_config, &pfit_control,
335 &pfit_pgm_ratios, &border);
2dd24552 336 break;
2dd24552
JB		 337 case DRM_MODE_SCALE_FULLSCREEN:
338 /*
339 * Full scaling, even if it changes the aspect ratio.
340 * Fortunately this is all done for us in hw.
341 */
37327abd
VS		 342 if (pipe_config->pipe_src_h != adjusted_mode->vdisplay ||
343 pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
2dd24552
JB		 344 pfit_control |= PFIT_ENABLE;
345 if (INTEL_INFO(dev)->gen >= 4)
346 pfit_control |= PFIT_SCALING_AUTO;
347 else
348 pfit_control |= (VERT_AUTO_SCALE |
349 VERT_INTERP_BILINEAR |
350 HORIZ_AUTO_SCALE |
351 HORIZ_INTERP_BILINEAR);
352 }
353 break;
ab3e67f4
JB		 354 default:
355 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
356 return;
2dd24552
JB		 357 }
358
359 /* 965+ wants fuzzy fitting */
360 /* FIXME: handle multiple panels by failing gracefully */
361 if (INTEL_INFO(dev)->gen >= 4)
362 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
363 PFIT_FILTER_FUZZY);
364
365out:
366 if ((pfit_control & PFIT_ENABLE) == 0) {
367 pfit_control = 0;
368 pfit_pgm_ratios = 0;
369 }
370
6b89cdde
DV		 371 /* Make sure pre-965 set dither correctly for 18bpp panels. */
372 if (INTEL_INFO(dev)->gen < 4 && pipe_config->pipe_bpp == 18)
373 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
374
2deefda5
DV		 375 pipe_config->gmch_pfit.control = pfit_control;
376 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
68fc8742 377 pipe_config->gmch_pfit.lvds_border_bits = border;
2dd24552
JB		 378}
379
525997e0
JN		 380enum drm_connector_status
381intel_panel_detect(struct drm_device *dev)
382{
383 struct drm_i915_private *dev_priv = dev->dev_private;
384
385 /* Assume that the BIOS does not lie through the OpRegion... */
386 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
387 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
388 connector_status_connected :
389 connector_status_disconnected;
390 }
391
392 switch (i915.panel_ignore_lid) {
393 case -2:
394 return connector_status_connected;
395 case -1:
396 return connector_status_disconnected;
397 default:
398 return connector_status_unknown;
399 }
400}
401
6dda730e
JN		 402/**
403 * scale - scale values from one range to another
404 *
405 * @source_val: value in range [@source_min..@source_max]
406 *
407 * Return @source_val in range [@source_min..@source_max] scaled to range
408 * [@target_min..@target_max].
409 */
410static uint32_t scale(uint32_t source_val,
411 uint32_t source_min, uint32_t source_max,
412 uint32_t target_min, uint32_t target_max)
413{
414 uint64_t target_val;
415
416 WARN_ON(source_min > source_max);
417 WARN_ON(target_min > target_max);
418
419 /* defensive */
420 source_val = clamp(source_val, source_min, source_max);
421
422 /* avoid overflows */
673e7bbd
AE		 423 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
424 (target_max - target_min), source_max - source_min);
6dda730e
JN		 425 target_val += target_min;
426
427 return target_val;
428}
429
430/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
431static inline u32 scale_user_to_hw(struct intel_connector *connector,
432 u32 user_level, u32 user_max)
433{
434 struct intel_panel *panel = &connector->panel;
435
436 return scale(user_level, 0, user_max,
437 panel->backlight.min, panel->backlight.max);
438}
439
440/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
441 * to [hw_min..hw_max]. */
442static inline u32 clamp_user_to_hw(struct intel_connector *connector,
443 u32 user_level, u32 user_max)
444{
445 struct intel_panel *panel = &connector->panel;
446 u32 hw_level;
447
448 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
449 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
450
451 return hw_level;
452}
453
454/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
455static inline u32 scale_hw_to_user(struct intel_connector *connector,
456 u32 hw_level, u32 user_max)
457{
458 struct intel_panel *panel = &connector->panel;
459
460 return scale(hw_level, panel->backlight.min, panel->backlight.max,
461 0, user_max);
462}
463
7bd688cd
JN		 464static u32 intel_panel_compute_brightness(struct intel_connector *connector,
465 u32 val)
7bd90909 466{
7bd688cd 467 struct drm_device *dev = connector->base.dev;
4dca20ef 468 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0
JN		 469 struct intel_panel *panel = &connector->panel;
470
471 WARN_ON(panel->backlight.max == 0);
4dca20ef 472
d330a953 473 if (i915.invert_brightness < 0)
4dca20ef
CE		 474 return val;
475
d330a953 476 if (i915.invert_brightness > 0 ||
d6540632 477 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
f91c15e0 478 return panel->backlight.max - val;
d6540632 479 }
7bd90909
CE		 480
481 return val;
482}
483
96ab4c70 484static u32 bdw_get_backlight(struct intel_connector *connector)
0b0b053a 485{
96ab4c70 486 struct drm_device *dev = connector->base.dev;
bfd7590d 487 struct drm_i915_private *dev_priv = dev->dev_private;
0b0b053a 488
96ab4c70
DV		 489 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
490}
07bf139b 491
7bd688cd 492static u32 pch_get_backlight(struct intel_connector *connector)
a9573556 493{
7bd688cd 494 struct drm_device *dev = connector->base.dev;
a9573556 495 struct drm_i915_private *dev_priv = dev->dev_private;
8ba2d185 496
7bd688cd
JN		 497 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
498}
a9573556 499
7bd688cd
JN		 500static u32 i9xx_get_backlight(struct intel_connector *connector)
501{
502 struct drm_device *dev = connector->base.dev;
503 struct drm_i915_private *dev_priv = dev->dev_private;
636baebf 504 struct intel_panel *panel = &connector->panel;
7bd688cd 505 u32 val;
07bf139b 506
7bd688cd
JN		 507 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
508 if (INTEL_INFO(dev)->gen < 4)
509 val >>= 1;
ba3820ad 510
636baebf 511 if (panel->backlight.combination_mode) {
7bd688cd 512 u8 lbpc;
ba3820ad 513
7bd688cd
JN		 514 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
515 val *= lbpc;
a9573556
CW		 516 }
517
7bd688cd
JN		 518 return val;
519}
520
521static u32 _vlv_get_backlight(struct drm_device *dev, enum pipe pipe)
522{
523 struct drm_i915_private *dev_priv = dev->dev_private;
524
23ec0a88
VS		 525 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
526 return 0;
527
7bd688cd
JN		 528 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
529}
530
531static u32 vlv_get_backlight(struct intel_connector *connector)
532{
533 struct drm_device *dev = connector->base.dev;
534 enum pipe pipe = intel_get_pipe_from_connector(connector);
535
536 return _vlv_get_backlight(dev, pipe);
537}
538
539static u32 intel_panel_get_backlight(struct intel_connector *connector)
540{
541 struct drm_device *dev = connector->base.dev;
542 struct drm_i915_private *dev_priv = dev->dev_private;
2d72f6c7
VS		 543 struct intel_panel *panel = &connector->panel;
544 u32 val = 0;
7bd688cd 545
07f11d49 546 mutex_lock(&dev_priv->backlight_lock);
7bd688cd 547
2d72f6c7
VS		 548 if (panel->backlight.enabled) {
549 val = dev_priv->display.get_backlight(connector);
550 val = intel_panel_compute_brightness(connector, val);
551 }
8ba2d185 552
07f11d49 553 mutex_unlock(&dev_priv->backlight_lock);
8ba2d185 554
a9573556
CW		 555 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
556 return val;
557}
558
96ab4c70 559static void bdw_set_backlight(struct intel_connector *connector, u32 level)
f8e10062 560{
96ab4c70 561 struct drm_device *dev = connector->base.dev;
f8e10062
BW		 562 struct drm_i915_private *dev_priv = dev->dev_private;
563 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
564 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
565}
566
7bd688cd 567static void pch_set_backlight(struct intel_connector *connector, u32 level)
a9573556 568{
7bd688cd 569 struct drm_device *dev = connector->base.dev;
a9573556 570 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd
JN		 571 u32 tmp;
572
573 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
574 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
a9573556
CW		 575}
576
7bd688cd 577static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
a9573556 578{
7bd688cd 579 struct drm_device *dev = connector->base.dev;
a9573556 580 struct drm_i915_private *dev_priv = dev->dev_private;
f91c15e0 581 struct intel_panel *panel = &connector->panel;
b329b328 582 u32 tmp, mask;
ba3820ad 583
f91c15e0
JN		 584 WARN_ON(panel->backlight.max == 0);
585
636baebf 586 if (panel->backlight.combination_mode) {
ba3820ad
TI		 587 u8 lbpc;
588
f91c15e0 589 lbpc = level * 0xfe / panel->backlight.max + 1;
ba3820ad
TI		 590 level /= lbpc;
591 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
592 }
593
b329b328
JN		 594 if (IS_GEN4(dev)) {
595 mask = BACKLIGHT_DUTY_CYCLE_MASK;
596 } else {
a9573556 597 level <<= 1;
b329b328
JN		 598 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
599 }
7bd688cd 600
b329b328 601 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
7bd688cd
JN		 602 I915_WRITE(BLC_PWM_CTL, tmp | level);
603}
604
605static void vlv_set_backlight(struct intel_connector *connector, u32 level)
606{
607 struct drm_device *dev = connector->base.dev;
608 struct drm_i915_private *dev_priv = dev->dev_private;
609 enum pipe pipe = intel_get_pipe_from_connector(connector);
610 u32 tmp;
611
23ec0a88
VS		 612 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
613 return;
614
7bd688cd
JN		 615 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
616 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
617}
618
619static void
620intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
621{
622 struct drm_device *dev = connector->base.dev;
623 struct drm_i915_private *dev_priv = dev->dev_private;
624
625 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
626
627 level = intel_panel_compute_brightness(connector, level);
628 dev_priv->display.set_backlight(connector, level);
a9573556 629}
47356eb6 630
6dda730e
JN		 631/* set backlight brightness to level in range [0..max], scaling wrt hw min */
632static void intel_panel_set_backlight(struct intel_connector *connector,
633 u32 user_level, u32 user_max)
47356eb6 634{
752aa88a 635 struct drm_device *dev = connector->base.dev;
47356eb6 636 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 637 struct intel_panel *panel = &connector->panel;
6dda730e 638 u32 hw_level;
8ba2d185 639
260d8f98 640 if (!panel->backlight.present)
752aa88a
JB		 641 return;
642
07f11d49 643 mutex_lock(&dev_priv->backlight_lock);
d6540632 644
f91c15e0 645 WARN_ON(panel->backlight.max == 0);
d6540632 646
6dda730e
JN		 647 hw_level = scale_user_to_hw(connector, user_level, user_max);
648 panel->backlight.level = hw_level;
649
650 if (panel->backlight.enabled)
651 intel_panel_actually_set_backlight(connector, hw_level);
652
07f11d49 653 mutex_unlock(&dev_priv->backlight_lock);
6dda730e
JN		 654}
655
656/* set backlight brightness to level in range [0..max], assuming hw min is
657 * respected.
658 */
659void intel_panel_set_backlight_acpi(struct intel_connector *connector,
660 u32 user_level, u32 user_max)
661{
662 struct drm_device *dev = connector->base.dev;
663 struct drm_i915_private *dev_priv = dev->dev_private;
664 struct intel_panel *panel = &connector->panel;
665 enum pipe pipe = intel_get_pipe_from_connector(connector);
666 u32 hw_level;
6dda730e 667
260d8f98
VS		 668 /*
669 * INVALID_PIPE may occur during driver init because
670 * connection_mutex isn't held across the entire backlight
671 * setup + modeset readout, and the BIOS can issue the
672 * requests at any time.
673 */
6dda730e
JN		 674 if (!panel->backlight.present || pipe == INVALID_PIPE)
675 return;
676
07f11d49 677 mutex_lock(&dev_priv->backlight_lock);
6dda730e
JN		 678
679 WARN_ON(panel->backlight.max == 0);
680
681 hw_level = clamp_user_to_hw(connector, user_level, user_max);
682 panel->backlight.level = hw_level;
47356eb6 683
58c68779 684 if (panel->backlight.device)
6dda730e
JN		 685 panel->backlight.device->props.brightness =
686 scale_hw_to_user(connector,
687 panel->backlight.level,
688 panel->backlight.device->props.max_brightness);
b6b3ba5b 689
58c68779 690 if (panel->backlight.enabled)
6dda730e 691 intel_panel_actually_set_backlight(connector, hw_level);
f91c15e0 692
07f11d49 693 mutex_unlock(&dev_priv->backlight_lock);
f52c619a
TI		 694}
695
7bd688cd
JN		 696static void pch_disable_backlight(struct intel_connector *connector)
697{
698 struct drm_device *dev = connector->base.dev;
699 struct drm_i915_private *dev_priv = dev->dev_private;
700 u32 tmp;
701
3bd712e5
JN		 702 intel_panel_actually_set_backlight(connector, 0);
703
7bd688cd
JN		 704 tmp = I915_READ(BLC_PWM_CPU_CTL2);
705 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
706
707 tmp = I915_READ(BLC_PWM_PCH_CTL1);
708 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
709}
710
3bd712e5
JN		 711static void i9xx_disable_backlight(struct intel_connector *connector)
712{
713 intel_panel_actually_set_backlight(connector, 0);
714}
715
7bd688cd
JN		 716static void i965_disable_backlight(struct intel_connector *connector)
717{
718 struct drm_device *dev = connector->base.dev;
719 struct drm_i915_private *dev_priv = dev->dev_private;
720 u32 tmp;
721
3bd712e5
JN		 722 intel_panel_actually_set_backlight(connector, 0);
723
7bd688cd
JN		 724 tmp = I915_READ(BLC_PWM_CTL2);
725 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
726}
727
728static void vlv_disable_backlight(struct intel_connector *connector)
729{
730 struct drm_device *dev = connector->base.dev;
731 struct drm_i915_private *dev_priv = dev->dev_private;
732 enum pipe pipe = intel_get_pipe_from_connector(connector);
733 u32 tmp;
734
23ec0a88
VS		 735 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
736 return;
737
3bd712e5
JN		 738 intel_panel_actually_set_backlight(connector, 0);
739
7bd688cd
JN		 740 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
741 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
742}
743
752aa88a 744void intel_panel_disable_backlight(struct intel_connector *connector)
f52c619a 745{
752aa88a 746 struct drm_device *dev = connector->base.dev;
f52c619a 747 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 748 struct intel_panel *panel = &connector->panel;
8ba2d185 749
260d8f98 750 if (!panel->backlight.present)
752aa88a
JB		 751 return;
752
3f577573
JN		 753 /*
754 * Do not disable backlight on the vgaswitcheroo path. When switching
755 * away from i915, the other client may depend on i915 to handle the
756 * backlight. This will leave the backlight on unnecessarily when
757 * another client is not activated.
758 */
759 if (dev->switch_power_state == DRM_SWITCH_POWER_CHANGING) {
760 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
761 return;
762 }
763
07f11d49 764 mutex_lock(&dev_priv->backlight_lock);
47356eb6 765
ab656bb9
JN		 766 if (panel->backlight.device)
767 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
58c68779 768 panel->backlight.enabled = false;
3bd712e5 769 dev_priv->display.disable_backlight(connector);
24ded204 770
07f11d49 771 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd 772}
24ded204 773
96ab4c70
DV		 774static void bdw_enable_backlight(struct intel_connector *connector)
775{
776 struct drm_device *dev = connector->base.dev;
777 struct drm_i915_private *dev_priv = dev->dev_private;
778 struct intel_panel *panel = &connector->panel;
779 u32 pch_ctl1, pch_ctl2;
780
781 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
782 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
783 DRM_DEBUG_KMS("pch backlight already enabled\n");
784 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
785 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
786 }
24ded204 787
96ab4c70
DV		 788 pch_ctl2 = panel->backlight.max << 16;
789 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
a4f32fc3 790
96ab4c70
DV		 791 pch_ctl1 = 0;
792 if (panel->backlight.active_low_pwm)
793 pch_ctl1 |= BLM_PCH_POLARITY;
8ba2d185 794
e6b2627c
JN		 795 /* After LPT, override is the default. */
796 if (HAS_PCH_LPT(dev_priv))
797 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
96ab4c70
DV		 798
799 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
800 POSTING_READ(BLC_PWM_PCH_CTL1);
801 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
802
803 /* This won't stick until the above enable. */
804 intel_panel_actually_set_backlight(connector, panel->backlight.level);
47356eb6
CW		 805}
806
7bd688cd
JN		 807static void pch_enable_backlight(struct intel_connector *connector)
808{
809 struct drm_device *dev = connector->base.dev;
810 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 811 struct intel_panel *panel = &connector->panel;
7bd688cd
JN		 812 enum pipe pipe = intel_get_pipe_from_connector(connector);
813 enum transcoder cpu_transcoder =
814 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
b35684b8 815 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
7bd688cd 816
b35684b8
JN		 817 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
818 if (cpu_ctl2 & BLM_PWM_ENABLE) {
813008cd 819 DRM_DEBUG_KMS("cpu backlight already enabled\n");
b35684b8
JN		 820 cpu_ctl2 &= ~BLM_PWM_ENABLE;
821 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
822 }
7bd688cd 823
b35684b8
JN		 824 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
825 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
826 DRM_DEBUG_KMS("pch backlight already enabled\n");
827 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
828 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
829 }
7bd688cd
JN		 830
831 if (cpu_transcoder == TRANSCODER_EDP)
b35684b8 832 cpu_ctl2 = BLM_TRANSCODER_EDP;
7bd688cd 833 else
b35684b8
JN		 834 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
835 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
7bd688cd 836 POSTING_READ(BLC_PWM_CPU_CTL2);
b35684b8 837 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
3bd712e5 838
b35684b8 839 /* This won't stick until the above enable. */
3bd712e5 840 intel_panel_actually_set_backlight(connector, panel->backlight.level);
b35684b8
JN		 841
842 pch_ctl2 = panel->backlight.max << 16;
843 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
844
b35684b8
JN		 845 pch_ctl1 = 0;
846 if (panel->backlight.active_low_pwm)
847 pch_ctl1 |= BLM_PCH_POLARITY;
96ab4c70 848
b35684b8
JN		 849 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
850 POSTING_READ(BLC_PWM_PCH_CTL1);
851 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
3bd712e5
JN		 852}
853
854static void i9xx_enable_backlight(struct intel_connector *connector)
855{
b35684b8
JN		 856 struct drm_device *dev = connector->base.dev;
857 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 858 struct intel_panel *panel = &connector->panel;
b35684b8
JN		 859 u32 ctl, freq;
860
861 ctl = I915_READ(BLC_PWM_CTL);
862 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
813008cd 863 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 864 I915_WRITE(BLC_PWM_CTL, 0);
865 }
3bd712e5 866
b35684b8
JN		 867 freq = panel->backlight.max;
868 if (panel->backlight.combination_mode)
869 freq /= 0xff;
870
871 ctl = freq << 17;
b6ab66aa 872 if (panel->backlight.combination_mode)
b35684b8
JN		 873 ctl |= BLM_LEGACY_MODE;
874 if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm)
875 ctl |= BLM_POLARITY_PNV;
876
877 I915_WRITE(BLC_PWM_CTL, ctl);
878 POSTING_READ(BLC_PWM_CTL);
879
880 /* XXX: combine this into above write? */
3bd712e5 881 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 882}
8ba2d185 883
7bd688cd
JN		 884static void i965_enable_backlight(struct intel_connector *connector)
885{
886 struct drm_device *dev = connector->base.dev;
887 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 888 struct intel_panel *panel = &connector->panel;
7bd688cd 889 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 890 u32 ctl, ctl2, freq;
7bd688cd 891
b35684b8
JN		 892 ctl2 = I915_READ(BLC_PWM_CTL2);
893 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 894 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 895 ctl2 &= ~BLM_PWM_ENABLE;
896 I915_WRITE(BLC_PWM_CTL2, ctl2);
897 }
7bd688cd 898
b35684b8
JN		 899 freq = panel->backlight.max;
900 if (panel->backlight.combination_mode)
901 freq /= 0xff;
7bd688cd 902
b35684b8
JN		 903 ctl = freq << 16;
904 I915_WRITE(BLC_PWM_CTL, ctl);
3bd712e5 905
b35684b8
JN		 906 ctl2 = BLM_PIPE(pipe);
907 if (panel->backlight.combination_mode)
908 ctl2 |= BLM_COMBINATION_MODE;
909 if (panel->backlight.active_low_pwm)
910 ctl2 |= BLM_POLARITY_I965;
911 I915_WRITE(BLC_PWM_CTL2, ctl2);
912 POSTING_READ(BLC_PWM_CTL2);
913 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
2e7eeeb5
JN		 914
915 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd
JN		 916}
917
918static void vlv_enable_backlight(struct intel_connector *connector)
919{
920 struct drm_device *dev = connector->base.dev;
921 struct drm_i915_private *dev_priv = dev->dev_private;
3bd712e5 922 struct intel_panel *panel = &connector->panel;
7bd688cd 923 enum pipe pipe = intel_get_pipe_from_connector(connector);
b35684b8 924 u32 ctl, ctl2;
7bd688cd 925
23ec0a88
VS		 926 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
927 return;
928
b35684b8
JN		 929 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
930 if (ctl2 & BLM_PWM_ENABLE) {
813008cd 931 DRM_DEBUG_KMS("backlight already enabled\n");
b35684b8
JN		 932 ctl2 &= ~BLM_PWM_ENABLE;
933 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
934 }
7bd688cd 935
b35684b8
JN		 936 ctl = panel->backlight.max << 16;
937 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
7bd688cd 938
b35684b8
JN		 939 /* XXX: combine this into above write? */
940 intel_panel_actually_set_backlight(connector, panel->backlight.level);
7bd688cd 941
b35684b8
JN		 942 ctl2 = 0;
943 if (panel->backlight.active_low_pwm)
944 ctl2 |= BLM_POLARITY_I965;
945 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
7bd688cd 946 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
b35684b8 947 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
47356eb6
CW		 948}
949
752aa88a 950void intel_panel_enable_backlight(struct intel_connector *connector)
47356eb6 951{
752aa88a 952 struct drm_device *dev = connector->base.dev;
47356eb6 953 struct drm_i915_private *dev_priv = dev->dev_private;
58c68779 954 struct intel_panel *panel = &connector->panel;
752aa88a 955 enum pipe pipe = intel_get_pipe_from_connector(connector);
8ba2d185 956
260d8f98 957 if (!panel->backlight.present)
752aa88a
JB		 958 return;
959
6f2bcceb 960 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
540b5d02 961
07f11d49 962 mutex_lock(&dev_priv->backlight_lock);
47356eb6 963
f91c15e0
JN		 964 WARN_ON(panel->backlight.max == 0);
965
13f3fbe8 966 if (panel->backlight.level <= panel->backlight.min) {
f91c15e0 967 panel->backlight.level = panel->backlight.max;
58c68779
JN		 968 if (panel->backlight.device)
969 panel->backlight.device->props.brightness =
6dda730e
JN		 970 scale_hw_to_user(connector,
971 panel->backlight.level,
972 panel->backlight.device->props.max_brightness);
b6b3ba5b 973 }
47356eb6 974
3bd712e5 975 dev_priv->display.enable_backlight(connector);
58c68779 976 panel->backlight.enabled = true;
ab656bb9
JN		 977 if (panel->backlight.device)
978 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
8ba2d185 979
07f11d49 980 mutex_unlock(&dev_priv->backlight_lock);
47356eb6
CW		 981}
982
912e8b12 983#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
db31af1d 984static int intel_backlight_device_update_status(struct backlight_device *bd)
aaa6fd2a 985{
752aa88a 986 struct intel_connector *connector = bl_get_data(bd);
ab656bb9 987 struct intel_panel *panel = &connector->panel;
752aa88a
JB		 988 struct drm_device *dev = connector->base.dev;
989
51fd371b 990 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
540b5d02
CW		 991 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
992 bd->props.brightness, bd->props.max_brightness);
752aa88a 993 intel_panel_set_backlight(connector, bd->props.brightness,
d6540632 994 bd->props.max_brightness);
ab656bb9
JN		 995
996 /*
997 * Allow flipping bl_power as a sub-state of enabled. Sadly the
998 * backlight class device does not make it easy to to differentiate
999 * between callbacks for brightness and bl_power, so our backlight_power
1000 * callback needs to take this into account.
1001 */
1002 if (panel->backlight.enabled) {
1003 if (panel->backlight_power) {
e6755fb7
JN		 1004 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1005 bd->props.brightness != 0;
ab656bb9
JN		 1006 panel->backlight_power(connector, enable);
1007 }
1008 } else {
1009 bd->props.power = FB_BLANK_POWERDOWN;
1010 }
1011
51fd371b 1012 drm_modeset_unlock(&dev->mode_config.connection_mutex);
aaa6fd2a
MG		 1013 return 0;
1014}
1015
db31af1d 1016static int intel_backlight_device_get_brightness(struct backlight_device *bd)
aaa6fd2a 1017{
752aa88a
JB		 1018 struct intel_connector *connector = bl_get_data(bd);
1019 struct drm_device *dev = connector->base.dev;
c8c8fb33 1020 struct drm_i915_private *dev_priv = dev->dev_private;
6dda730e 1021 u32 hw_level;
7bd688cd 1022 int ret;
752aa88a 1023
c8c8fb33 1024 intel_runtime_pm_get(dev_priv);
51fd371b 1025 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
6dda730e
JN		 1026
1027 hw_level = intel_panel_get_backlight(connector);
1028 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1029
51fd371b 1030 drm_modeset_unlock(&dev->mode_config.connection_mutex);
c8c8fb33 1031 intel_runtime_pm_put(dev_priv);
752aa88a 1032
7bd688cd 1033 return ret;
aaa6fd2a
MG		 1034}
1035
db31af1d
JN		 1036static const struct backlight_ops intel_backlight_device_ops = {
1037 .update_status = intel_backlight_device_update_status,
1038 .get_brightness = intel_backlight_device_get_brightness,
aaa6fd2a
MG		 1039};
1040
db31af1d 1041static int intel_backlight_device_register(struct intel_connector *connector)
aaa6fd2a 1042{
58c68779 1043 struct intel_panel *panel = &connector->panel;
aaa6fd2a 1044 struct backlight_properties props;
aaa6fd2a 1045
58c68779 1046 if (WARN_ON(panel->backlight.device))
dc652f90
JN		 1047 return -ENODEV;
1048
0962c3c9
VS		 1049 if (!panel->backlight.present)
1050 return 0;
1051
6dda730e 1052 WARN_ON(panel->backlight.max == 0);
7bd688cd 1053
af437cfd 1054 memset(&props, 0, sizeof(props));
aaa6fd2a 1055 props.type = BACKLIGHT_RAW;
6dda730e
JN		 1056
1057 /*
1058 * Note: Everything should work even if the backlight device max
1059 * presented to the userspace is arbitrarily chosen.
1060 */
7bd688cd 1061 props.max_brightness = panel->backlight.max;
6dda730e
JN		 1062 props.brightness = scale_hw_to_user(connector,
1063 panel->backlight.level,
1064 props.max_brightness);
58c68779 1065
ab656bb9
JN		 1066 if (panel->backlight.enabled)
1067 props.power = FB_BLANK_UNBLANK;
1068 else
1069 props.power = FB_BLANK_POWERDOWN;
1070
58c68779
JN		 1071 /*
1072 * Note: using the same name independent of the connector prevents
1073 * registration of multiple backlight devices in the driver.
1074 */
1075 panel->backlight.device =
aaa6fd2a 1076 backlight_device_register("intel_backlight",
db31af1d
JN		 1077 connector->base.kdev,
1078 connector,
1079 &intel_backlight_device_ops, &props);
aaa6fd2a 1080
58c68779 1081 if (IS_ERR(panel->backlight.device)) {
aaa6fd2a 1082 DRM_ERROR("Failed to register backlight: %ld\n",
58c68779
JN		 1083 PTR_ERR(panel->backlight.device));
1084 panel->backlight.device = NULL;
aaa6fd2a
MG		 1085 return -ENODEV;
1086 }
0962c3c9
VS		 1087
1088 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1089 connector->base.name);
1090
aaa6fd2a
MG		 1091 return 0;
1092}
1093
db31af1d 1094static void intel_backlight_device_unregister(struct intel_connector *connector)
aaa6fd2a 1095{
58c68779
JN		 1096 struct intel_panel *panel = &connector->panel;
1097
1098 if (panel->backlight.device) {
1099 backlight_device_unregister(panel->backlight.device);
1100 panel->backlight.device = NULL;
dc652f90 1101 }
aaa6fd2a 1102}
db31af1d
JN		 1103#else /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1104static int intel_backlight_device_register(struct intel_connector *connector)
1105{
1106 return 0;
1107}
1108static void intel_backlight_device_unregister(struct intel_connector *connector)
1109{
1110}
1111#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1112
f91c15e0
JN		 1113/*
1114 * Note: The setup hooks can't assume pipe is set!
1115 *
1116 * XXX: Query mode clock or hardware clock and program PWM modulation frequency
1117 * appropriately when it's 0. Use VBT and/or sane defaults.
1118 */
6dda730e
JN		 1119static u32 get_backlight_min_vbt(struct intel_connector *connector)
1120{
1121 struct drm_device *dev = connector->base.dev;
1122 struct drm_i915_private *dev_priv = dev->dev_private;
1123 struct intel_panel *panel = &connector->panel;
e1c412e7 1124 int min;
6dda730e
JN		 1125
1126 WARN_ON(panel->backlight.max == 0);
1127
e1c412e7
JN		 1128 /*
1129 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1130 * to problems. There are such machines out there. Either our
1131 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1132 * against this by letting the minimum be at most (arbitrarily chosen)
1133 * 25% of the max.
1134 */
1135 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1136 if (min != dev_priv->vbt.backlight.min_brightness) {
1137 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1138 dev_priv->vbt.backlight.min_brightness, min);
1139 }
1140
6dda730e 1141 /* vbt value is a coefficient in range [0..255] */
e1c412e7 1142 return scale(min, 0, 255, 0, panel->backlight.max);
6dda730e
JN		 1143}
1144
6517d273 1145static int bdw_setup_backlight(struct intel_connector *connector, enum pipe unused)
aaa6fd2a 1146{
96ab4c70 1147 struct drm_device *dev = connector->base.dev;
aaa6fd2a 1148 struct drm_i915_private *dev_priv = dev->dev_private;
96ab4c70
DV		 1149 struct intel_panel *panel = &connector->panel;
1150 u32 pch_ctl1, pch_ctl2, val;
1151
1152 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1153 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1154
1155 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1156 panel->backlight.max = pch_ctl2 >> 16;
1157 if (!panel->backlight.max)
1158 return -ENODEV;
1159
6dda730e
JN		 1160 panel->backlight.min = get_backlight_min_vbt(connector);
1161
96ab4c70
DV		 1162 val = bdw_get_backlight(connector);
1163 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1164
1165 panel->backlight.enabled = (pch_ctl1 & BLM_PCH_PWM_ENABLE) &&
1166 panel->backlight.level != 0;
1167
1168 return 0;
1169}
1170
6517d273 1171static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1172{
636baebf
JN		 1173 struct drm_device *dev = connector->base.dev;
1174 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1175 struct intel_panel *panel = &connector->panel;
636baebf 1176 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
7bd688cd 1177
636baebf
JN		 1178 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1179 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1180
1181 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1182 panel->backlight.max = pch_ctl2 >> 16;
7bd688cd
JN		 1183 if (!panel->backlight.max)
1184 return -ENODEV;
1185
6dda730e
JN		 1186 panel->backlight.min = get_backlight_min_vbt(connector);
1187
7bd688cd
JN		 1188 val = pch_get_backlight(connector);
1189 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1190
636baebf
JN		 1191 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1192 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1193 (pch_ctl1 & BLM_PCH_PWM_ENABLE) && panel->backlight.level != 0;
1194
7bd688cd
JN		 1195 return 0;
1196}
1197
6517d273 1198static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1199{
636baebf
JN		 1200 struct drm_device *dev = connector->base.dev;
1201 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1202 struct intel_panel *panel = &connector->panel;
636baebf
JN		 1203 u32 ctl, val;
1204
1205 ctl = I915_READ(BLC_PWM_CTL);
1206
b6ab66aa 1207 if (IS_GEN2(dev) || IS_I915GM(dev) || IS_I945GM(dev))
636baebf
JN		 1208 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1209
1210 if (IS_PINEVIEW(dev))
1211 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1212
1213 panel->backlight.max = ctl >> 17;
1214 if (panel->backlight.combination_mode)
1215 panel->backlight.max *= 0xff;
7bd688cd 1216
7bd688cd
JN		 1217 if (!panel->backlight.max)
1218 return -ENODEV;
1219
6dda730e
JN		 1220 panel->backlight.min = get_backlight_min_vbt(connector);
1221
7bd688cd
JN		 1222 val = i9xx_get_backlight(connector);
1223 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1224
636baebf
JN		 1225 panel->backlight.enabled = panel->backlight.level != 0;
1226
7bd688cd
JN		 1227 return 0;
1228}
1229
6517d273 1230static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
7bd688cd 1231{
636baebf
JN		 1232 struct drm_device *dev = connector->base.dev;
1233 struct drm_i915_private *dev_priv = dev->dev_private;
7bd688cd 1234 struct intel_panel *panel = &connector->panel;
636baebf
JN		 1235 u32 ctl, ctl2, val;
1236
1237 ctl2 = I915_READ(BLC_PWM_CTL2);
1238 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1239 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1240
1241 ctl = I915_READ(BLC_PWM_CTL);
1242 panel->backlight.max = ctl >> 16;
1243 if (panel->backlight.combination_mode)
1244 panel->backlight.max *= 0xff;
7bd688cd 1245
7bd688cd
JN		 1246 if (!panel->backlight.max)
1247 return -ENODEV;
1248
6dda730e
JN		 1249 panel->backlight.min = get_backlight_min_vbt(connector);
1250
7bd688cd
JN		 1251 val = i9xx_get_backlight(connector);
1252 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1253
636baebf
JN		 1254 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1255 panel->backlight.level != 0;
1256
7bd688cd
JN		 1257 return 0;
1258}
1259
6517d273 1260static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
7bd688cd
JN		 1261{
1262 struct drm_device *dev = connector->base.dev;
1263 struct drm_i915_private *dev_priv = dev->dev_private;
1264 struct intel_panel *panel = &connector->panel;
6517d273 1265 enum pipe p;
636baebf 1266 u32 ctl, ctl2, val;
7bd688cd 1267
6517d273
VS		 1268 for_each_pipe(dev_priv, p) {
1269 u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(p));
7bd688cd
JN		 1270
1271 /* Skip if the modulation freq is already set */
1272 if (cur_val & ~BACKLIGHT_DUTY_CYCLE_MASK)
1273 continue;
1274
1275 cur_val &= BACKLIGHT_DUTY_CYCLE_MASK;
6517d273 1276 I915_WRITE(VLV_BLC_PWM_CTL(p), (0xf42 << 16) |
7bd688cd
JN		 1277 cur_val);
1278 }
1279
6517d273
VS		 1280 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1281 return -ENODEV;
1282
1283 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
636baebf
JN		 1284 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1285
6517d273 1286 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
636baebf 1287 panel->backlight.max = ctl >> 16;
7bd688cd
JN		 1288 if (!panel->backlight.max)
1289 return -ENODEV;
1290
6dda730e
JN		 1291 panel->backlight.min = get_backlight_min_vbt(connector);
1292
6517d273 1293 val = _vlv_get_backlight(dev, pipe);
7bd688cd
JN		 1294 panel->backlight.level = intel_panel_compute_brightness(connector, val);
1295
636baebf
JN		 1296 panel->backlight.enabled = (ctl2 & BLM_PWM_ENABLE) &&
1297 panel->backlight.level != 0;
1298
7bd688cd
JN		 1299 return 0;
1300}
1301
6517d273 1302int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
aaa6fd2a 1303{
db31af1d 1304 struct drm_device *dev = connector->dev;
7bd688cd 1305 struct drm_i915_private *dev_priv = dev->dev_private;
db31af1d 1306 struct intel_connector *intel_connector = to_intel_connector(connector);
58c68779 1307 struct intel_panel *panel = &intel_connector->panel;
7bd688cd 1308 int ret;
db31af1d 1309
c675949e 1310 if (!dev_priv->vbt.backlight.present) {
9c72cc6f
SD		 1311 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1312 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1313 } else {
1314 DRM_DEBUG_KMS("no backlight present per VBT\n");
1315 return 0;
1316 }
c675949e
JN		 1317 }
1318
7bd688cd 1319 /* set level and max in panel struct */
07f11d49 1320 mutex_lock(&dev_priv->backlight_lock);
6517d273 1321 ret = dev_priv->display.setup_backlight(intel_connector, pipe);
07f11d49 1322 mutex_unlock(&dev_priv->backlight_lock);
7bd688cd
JN		 1323
1324 if (ret) {
1325 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
c23cc417 1326 connector->name);
7bd688cd
JN		 1327 return ret;
1328 }
db31af1d 1329
c91c9f32
JN		 1330 panel->backlight.present = true;
1331
0962c3c9
VS		 1332 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1333 connector->name,
c445b3b1 1334 panel->backlight.enabled ? "enabled" : "disabled",
0962c3c9 1335 panel->backlight.level, panel->backlight.max);
c445b3b1 1336
aaa6fd2a
MG		 1337 return 0;
1338}
1339
db31af1d 1340void intel_panel_destroy_backlight(struct drm_connector *connector)
aaa6fd2a 1341{
db31af1d 1342 struct intel_connector *intel_connector = to_intel_connector(connector);
c91c9f32 1343 struct intel_panel *panel = &intel_connector->panel;
db31af1d 1344
c91c9f32 1345 panel->backlight.present = false;
aaa6fd2a 1346}
1d508706 1347
7bd688cd
JN		 1348/* Set up chip specific backlight functions */
1349void intel_panel_init_backlight_funcs(struct drm_device *dev)
1350{
1351 struct drm_i915_private *dev_priv = dev->dev_private;
1352
7879a7eb 1353 if (IS_BROADWELL(dev) || (INTEL_INFO(dev)->gen >= 9)) {
96ab4c70
DV		 1354 dev_priv->display.setup_backlight = bdw_setup_backlight;
1355 dev_priv->display.enable_backlight = bdw_enable_backlight;
1356 dev_priv->display.disable_backlight = pch_disable_backlight;
1357 dev_priv->display.set_backlight = bdw_set_backlight;
1358 dev_priv->display.get_backlight = bdw_get_backlight;
1359 } else if (HAS_PCH_SPLIT(dev)) {
7bd688cd
JN		 1360 dev_priv->display.setup_backlight = pch_setup_backlight;
1361 dev_priv->display.enable_backlight = pch_enable_backlight;
1362 dev_priv->display.disable_backlight = pch_disable_backlight;
1363 dev_priv->display.set_backlight = pch_set_backlight;
1364 dev_priv->display.get_backlight = pch_get_backlight;
7bd688cd
JN		 1365 } else if (IS_VALLEYVIEW(dev)) {
1366 dev_priv->display.setup_backlight = vlv_setup_backlight;
1367 dev_priv->display.enable_backlight = vlv_enable_backlight;
1368 dev_priv->display.disable_backlight = vlv_disable_backlight;
1369 dev_priv->display.set_backlight = vlv_set_backlight;
1370 dev_priv->display.get_backlight = vlv_get_backlight;
7bd688cd
JN		 1371 } else if (IS_GEN4(dev)) {
1372 dev_priv->display.setup_backlight = i965_setup_backlight;
1373 dev_priv->display.enable_backlight = i965_enable_backlight;
1374 dev_priv->display.disable_backlight = i965_disable_backlight;
1375 dev_priv->display.set_backlight = i9xx_set_backlight;
1376 dev_priv->display.get_backlight = i9xx_get_backlight;
7bd688cd
JN		 1377 } else {
1378 dev_priv->display.setup_backlight = i9xx_setup_backlight;
3bd712e5
JN		 1379 dev_priv->display.enable_backlight = i9xx_enable_backlight;
1380 dev_priv->display.disable_backlight = i9xx_disable_backlight;
7bd688cd
JN		 1381 dev_priv->display.set_backlight = i9xx_set_backlight;
1382 dev_priv->display.get_backlight = i9xx_get_backlight;
7bd688cd
JN		 1383 }
1384}
1385
dd06f90e 1386int intel_panel_init(struct intel_panel *panel,
4b6ed685
VK		 1387 struct drm_display_mode *fixed_mode,
1388 struct drm_display_mode *downclock_mode)
1d508706 1389{
dd06f90e 1390 panel->fixed_mode = fixed_mode;
4b6ed685 1391 panel->downclock_mode = downclock_mode;
dd06f90e 1392
1d508706
JN		 1393 return 0;
1394}
1395
1396void intel_panel_fini(struct intel_panel *panel)
1397{
dd06f90e
JN		 1398 struct intel_connector *intel_connector =
1399 container_of(panel, struct intel_connector, panel);
1400
1401 if (panel->fixed_mode)
1402 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
ec9ed197
VK		 1403
1404 if (panel->downclock_mode)
1405 drm_mode_destroy(intel_connector->base.dev,
1406 panel->downclock_mode);
1d508706 1407}
0962c3c9
VS		 1408
1409void intel_backlight_register(struct drm_device *dev)
1410{
1411 struct intel_connector *connector;
1412
1413 list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
1414 intel_backlight_device_register(connector);
1415}
1416
1417void intel_backlight_unregister(struct drm_device *dev)
1418{
1419 struct intel_connector *connector;
1420
1421 list_for_each_entry(connector, &dev->mode_config.connector_list, base.head)
1422 intel_backlight_device_unregister(connector);
1423}
Linux 6.x block layer and io_uring tree(s)