Commit | Line | Data |
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b20385f1 OM |
1 | /* |
2 | * Copyright © 2014 Intel Corporation | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
21 | * DEALINGS IN THE SOFTWARE. | |
22 | */ | |
23 | ||
24 | #ifndef _INTEL_LRC_H_ | |
25 | #define _INTEL_LRC_H_ | |
26 | ||
dcb4c12a OM |
27 | #define GEN8_LR_CONTEXT_ALIGN 4096 |
28 | ||
4ba70e44 OM |
29 | /* Execlists regs */ |
30 | #define RING_ELSP(ring) ((ring)->mmio_base+0x230) | |
31 | #define RING_EXECLIST_STATUS(ring) ((ring)->mmio_base+0x234) | |
32 | #define RING_CONTEXT_CONTROL(ring) ((ring)->mmio_base+0x244) | |
5baa22c5 ZW |
33 | #define CTX_CTRL_INHIBIT_SYN_CTX_SWITCH (1 << 3) |
34 | #define CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT (1 << 0) | |
4ba70e44 OM |
35 | #define RING_CONTEXT_STATUS_BUF(ring) ((ring)->mmio_base+0x370) |
36 | #define RING_CONTEXT_STATUS_PTR(ring) ((ring)->mmio_base+0x3a0) | |
37 | ||
454afebd OM |
38 | /* Logical Rings */ |
39 | void intel_logical_ring_stop(struct intel_engine_cs *ring); | |
40 | void intel_logical_ring_cleanup(struct intel_engine_cs *ring); | |
41 | int intel_logical_rings_init(struct drm_device *dev); | |
42 | ||
21076372 NH |
43 | int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf, |
44 | struct intel_context *ctx); | |
73e4d07f OM |
45 | /** |
46 | * intel_logical_ring_advance() - advance the ringbuffer tail | |
47 | * @ringbuf: Ringbuffer to advance. | |
48 | * | |
49 | * The tail is only updated in our logical ringbuffer struct. | |
50 | */ | |
82e104cc OM |
51 | static inline void intel_logical_ring_advance(struct intel_ringbuffer *ringbuf) |
52 | { | |
53 | ringbuf->tail &= ringbuf->size - 1; | |
54 | } | |
73e4d07f OM |
55 | /** |
56 | * intel_logical_ring_emit() - write a DWORD to the ringbuffer. | |
57 | * @ringbuf: Ringbuffer to write to. | |
58 | * @data: DWORD to write. | |
59 | */ | |
82e104cc OM |
60 | static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf, |
61 | u32 data) | |
62 | { | |
63 | iowrite32(data, ringbuf->virtual_start + ringbuf->tail); | |
64 | ringbuf->tail += 4; | |
65 | } | |
21076372 NH |
66 | int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, |
67 | struct intel_context *ctx, | |
68 | int num_dwords); | |
82e104cc | 69 | |
ede7d42b OM |
70 | /* Logical Ring Contexts */ |
71 | void intel_lr_context_free(struct intel_context *ctx); | |
72 | int intel_lr_context_deferred_create(struct intel_context *ctx, | |
73 | struct intel_engine_cs *ring); | |
dcb4c12a OM |
74 | void intel_lr_context_unpin(struct intel_engine_cs *ring, |
75 | struct intel_context *ctx); | |
ede7d42b | 76 | |
127f1003 OM |
77 | /* Execlists */ |
78 | int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists); | |
454afebd OM |
79 | int intel_execlists_submission(struct drm_device *dev, struct drm_file *file, |
80 | struct intel_engine_cs *ring, | |
81 | struct intel_context *ctx, | |
82 | struct drm_i915_gem_execbuffer2 *args, | |
83 | struct list_head *vmas, | |
84 | struct drm_i915_gem_object *batch_obj, | |
85 | u64 exec_start, u32 flags); | |
84b790f8 | 86 | u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj); |
127f1003 | 87 | |
3f7531c3 | 88 | void intel_lrc_irq_handler(struct intel_engine_cs *ring); |
c86ee3a9 | 89 | void intel_execlists_retire_requests(struct intel_engine_cs *ring); |
e981e7b1 | 90 | |
b20385f1 | 91 | #endif /* _INTEL_LRC_H_ */ |