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7d57382e EA |
1 | /* |
2 | * Copyright 2006 Dave Airlie <airlied@linux.ie> | |
3 | * Copyright © 2006-2009 Intel Corporation | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
22 | * DEALINGS IN THE SOFTWARE. | |
23 | * | |
24 | * Authors: | |
25 | * Eric Anholt <eric@anholt.net> | |
26 | * Jesse Barnes <jesse.barnes@intel.com> | |
27 | */ | |
28 | ||
29 | #include <linux/i2c.h> | |
5a0e3ad6 | 30 | #include <linux/slab.h> |
7d57382e EA |
31 | #include <linux/delay.h> |
32 | #include "drmP.h" | |
33 | #include "drm.h" | |
34 | #include "drm_crtc.h" | |
aa93d632 | 35 | #include "drm_edid.h" |
7d57382e EA |
36 | #include "intel_drv.h" |
37 | #include "i915_drm.h" | |
38 | #include "i915_drv.h" | |
39 | ||
40 | struct intel_hdmi_priv { | |
41 | u32 sdvox_reg; | |
42 | u32 save_SDVOX; | |
9dff6af8 | 43 | bool has_hdmi_sink; |
7d57382e EA |
44 | }; |
45 | ||
46 | static void intel_hdmi_mode_set(struct drm_encoder *encoder, | |
47 | struct drm_display_mode *mode, | |
48 | struct drm_display_mode *adjusted_mode) | |
49 | { | |
50 | struct drm_device *dev = encoder->dev; | |
51 | struct drm_i915_private *dev_priv = dev->dev_private; | |
52 | struct drm_crtc *crtc = encoder->crtc; | |
53 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | |
54 | struct intel_output *intel_output = enc_to_intel_output(encoder); | |
55 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | |
56 | u32 sdvox; | |
57 | ||
58 | sdvox = SDVO_ENCODING_HDMI | | |
59 | SDVO_BORDER_ENABLE | | |
60 | SDVO_VSYNC_ACTIVE_HIGH | | |
56d21b07 | 61 | SDVO_HSYNC_ACTIVE_HIGH; |
7d57382e EA |
62 | |
63 | if (hdmi_priv->has_hdmi_sink) | |
64 | sdvox |= SDVO_AUDIO_ENABLE; | |
65 | ||
66 | if (intel_crtc->pipe == 1) | |
67 | sdvox |= SDVO_PIPE_B_SELECT; | |
68 | ||
69 | I915_WRITE(hdmi_priv->sdvox_reg, sdvox); | |
70 | POSTING_READ(hdmi_priv->sdvox_reg); | |
71 | } | |
72 | ||
73 | static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode) | |
74 | { | |
75 | struct drm_device *dev = encoder->dev; | |
76 | struct drm_i915_private *dev_priv = dev->dev_private; | |
77 | struct intel_output *intel_output = enc_to_intel_output(encoder); | |
78 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | |
79 | u32 temp; | |
80 | ||
d8a2d0e0 ZW |
81 | temp = I915_READ(hdmi_priv->sdvox_reg); |
82 | ||
83 | /* HW workaround, need to toggle enable bit off and on for 12bpc, but | |
84 | * we do this anyway which shows more stable in testing. | |
85 | */ | |
c619eed4 | 86 | if (HAS_PCH_SPLIT(dev)) { |
7d57382e | 87 | I915_WRITE(hdmi_priv->sdvox_reg, temp & ~SDVO_ENABLE); |
d8a2d0e0 ZW |
88 | POSTING_READ(hdmi_priv->sdvox_reg); |
89 | } | |
90 | ||
91 | if (mode != DRM_MODE_DPMS_ON) { | |
92 | temp &= ~SDVO_ENABLE; | |
7d57382e | 93 | } else { |
d8a2d0e0 | 94 | temp |= SDVO_ENABLE; |
7d57382e | 95 | } |
d8a2d0e0 ZW |
96 | |
97 | I915_WRITE(hdmi_priv->sdvox_reg, temp); | |
7d57382e | 98 | POSTING_READ(hdmi_priv->sdvox_reg); |
d8a2d0e0 ZW |
99 | |
100 | /* HW workaround, need to write this twice for issue that may result | |
101 | * in first write getting masked. | |
102 | */ | |
c619eed4 | 103 | if (HAS_PCH_SPLIT(dev)) { |
d8a2d0e0 ZW |
104 | I915_WRITE(hdmi_priv->sdvox_reg, temp); |
105 | POSTING_READ(hdmi_priv->sdvox_reg); | |
106 | } | |
7d57382e EA |
107 | } |
108 | ||
109 | static void intel_hdmi_save(struct drm_connector *connector) | |
110 | { | |
111 | struct drm_device *dev = connector->dev; | |
112 | struct drm_i915_private *dev_priv = dev->dev_private; | |
113 | struct intel_output *intel_output = to_intel_output(connector); | |
114 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | |
115 | ||
116 | hdmi_priv->save_SDVOX = I915_READ(hdmi_priv->sdvox_reg); | |
117 | } | |
118 | ||
119 | static void intel_hdmi_restore(struct drm_connector *connector) | |
120 | { | |
121 | struct drm_device *dev = connector->dev; | |
122 | struct drm_i915_private *dev_priv = dev->dev_private; | |
123 | struct intel_output *intel_output = to_intel_output(connector); | |
124 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | |
125 | ||
126 | I915_WRITE(hdmi_priv->sdvox_reg, hdmi_priv->save_SDVOX); | |
127 | POSTING_READ(hdmi_priv->sdvox_reg); | |
128 | } | |
129 | ||
130 | static int intel_hdmi_mode_valid(struct drm_connector *connector, | |
131 | struct drm_display_mode *mode) | |
132 | { | |
133 | if (mode->clock > 165000) | |
134 | return MODE_CLOCK_HIGH; | |
135 | if (mode->clock < 20000) | |
136 | return MODE_CLOCK_HIGH; | |
137 | ||
138 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | |
139 | return MODE_NO_DBLESCAN; | |
140 | ||
141 | return MODE_OK; | |
142 | } | |
143 | ||
144 | static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder, | |
145 | struct drm_display_mode *mode, | |
146 | struct drm_display_mode *adjusted_mode) | |
147 | { | |
148 | return true; | |
149 | } | |
150 | ||
aa93d632 | 151 | static enum drm_connector_status |
2ded9e27 | 152 | intel_hdmi_detect(struct drm_connector *connector) |
9dff6af8 ML |
153 | { |
154 | struct intel_output *intel_output = to_intel_output(connector); | |
155 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | |
156 | struct edid *edid = NULL; | |
aa93d632 | 157 | enum drm_connector_status status = connector_status_disconnected; |
9dff6af8 | 158 | |
2ded9e27 | 159 | hdmi_priv->has_hdmi_sink = false; |
9dff6af8 | 160 | edid = drm_get_edid(&intel_output->base, |
f9c10a9b | 161 | intel_output->ddc_bus); |
2ded9e27 | 162 | |
aa93d632 | 163 | if (edid) { |
be9f1c4f | 164 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { |
aa93d632 KP |
165 | status = connector_status_connected; |
166 | hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid); | |
167 | } | |
9dff6af8 | 168 | intel_output->base.display_info.raw_edid = NULL; |
aa93d632 | 169 | kfree(edid); |
9dff6af8 | 170 | } |
30ad48b7 | 171 | |
2ded9e27 | 172 | return status; |
7d57382e EA |
173 | } |
174 | ||
175 | static int intel_hdmi_get_modes(struct drm_connector *connector) | |
176 | { | |
177 | struct intel_output *intel_output = to_intel_output(connector); | |
178 | ||
179 | /* We should parse the EDID data and find out if it's an HDMI sink so | |
180 | * we can send audio to it. | |
181 | */ | |
182 | ||
183 | return intel_ddc_get_modes(intel_output); | |
184 | } | |
185 | ||
186 | static void intel_hdmi_destroy(struct drm_connector *connector) | |
187 | { | |
188 | struct intel_output *intel_output = to_intel_output(connector); | |
189 | ||
190 | if (intel_output->i2c_bus) | |
191 | intel_i2c_destroy(intel_output->i2c_bus); | |
192 | drm_sysfs_connector_remove(connector); | |
193 | drm_connector_cleanup(connector); | |
194 | kfree(intel_output); | |
195 | } | |
196 | ||
197 | static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = { | |
198 | .dpms = intel_hdmi_dpms, | |
199 | .mode_fixup = intel_hdmi_mode_fixup, | |
200 | .prepare = intel_encoder_prepare, | |
201 | .mode_set = intel_hdmi_mode_set, | |
202 | .commit = intel_encoder_commit, | |
203 | }; | |
204 | ||
205 | static const struct drm_connector_funcs intel_hdmi_connector_funcs = { | |
c9fb15f6 | 206 | .dpms = drm_helper_connector_dpms, |
7d57382e EA |
207 | .save = intel_hdmi_save, |
208 | .restore = intel_hdmi_restore, | |
209 | .detect = intel_hdmi_detect, | |
210 | .fill_modes = drm_helper_probe_single_connector_modes, | |
211 | .destroy = intel_hdmi_destroy, | |
212 | }; | |
213 | ||
214 | static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = { | |
215 | .get_modes = intel_hdmi_get_modes, | |
216 | .mode_valid = intel_hdmi_mode_valid, | |
217 | .best_encoder = intel_best_encoder, | |
218 | }; | |
219 | ||
220 | static void intel_hdmi_enc_destroy(struct drm_encoder *encoder) | |
221 | { | |
222 | drm_encoder_cleanup(encoder); | |
223 | } | |
224 | ||
225 | static const struct drm_encoder_funcs intel_hdmi_enc_funcs = { | |
226 | .destroy = intel_hdmi_enc_destroy, | |
227 | }; | |
228 | ||
7d57382e EA |
229 | void intel_hdmi_init(struct drm_device *dev, int sdvox_reg) |
230 | { | |
231 | struct drm_i915_private *dev_priv = dev->dev_private; | |
232 | struct drm_connector *connector; | |
233 | struct intel_output *intel_output; | |
234 | struct intel_hdmi_priv *hdmi_priv; | |
235 | ||
236 | intel_output = kcalloc(sizeof(struct intel_output) + | |
237 | sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL); | |
238 | if (!intel_output) | |
239 | return; | |
240 | hdmi_priv = (struct intel_hdmi_priv *)(intel_output + 1); | |
241 | ||
242 | connector = &intel_output->base; | |
243 | drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, | |
8d91104a | 244 | DRM_MODE_CONNECTOR_HDMIA); |
7d57382e EA |
245 | drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs); |
246 | ||
247 | intel_output->type = INTEL_OUTPUT_HDMI; | |
248 | ||
249 | connector->interlace_allowed = 0; | |
250 | connector->doublescan_allowed = 0; | |
f8aed700 | 251 | intel_output->crtc_mask = (1 << 0) | (1 << 1); |
7d57382e EA |
252 | |
253 | /* Set up the DDC bus. */ | |
f8aed700 ML |
254 | if (sdvox_reg == SDVOB) { |
255 | intel_output->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT); | |
7d57382e | 256 | intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB"); |
b01f2c3a | 257 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; |
f8aed700 ML |
258 | } else if (sdvox_reg == SDVOC) { |
259 | intel_output->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT); | |
7d57382e | 260 | intel_output->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC"); |
b01f2c3a | 261 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; |
f8aed700 ML |
262 | } else if (sdvox_reg == HDMIB) { |
263 | intel_output->clone_mask = (1 << INTEL_HDMID_CLONE_BIT); | |
30ad48b7 ZW |
264 | intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOE, |
265 | "HDMIB"); | |
b01f2c3a | 266 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; |
f8aed700 ML |
267 | } else if (sdvox_reg == HDMIC) { |
268 | intel_output->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT); | |
30ad48b7 ZW |
269 | intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOD, |
270 | "HDMIC"); | |
b01f2c3a | 271 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; |
f8aed700 ML |
272 | } else if (sdvox_reg == HDMID) { |
273 | intel_output->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT); | |
30ad48b7 ZW |
274 | intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOF, |
275 | "HDMID"); | |
b01f2c3a | 276 | dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS; |
f8aed700 | 277 | } |
7d57382e EA |
278 | if (!intel_output->ddc_bus) |
279 | goto err_connector; | |
280 | ||
281 | hdmi_priv->sdvox_reg = sdvox_reg; | |
282 | intel_output->dev_priv = hdmi_priv; | |
283 | ||
284 | drm_encoder_init(dev, &intel_output->enc, &intel_hdmi_enc_funcs, | |
285 | DRM_MODE_ENCODER_TMDS); | |
286 | drm_encoder_helper_add(&intel_output->enc, &intel_hdmi_helper_funcs); | |
287 | ||
288 | drm_mode_connector_attach_encoder(&intel_output->base, | |
289 | &intel_output->enc); | |
290 | drm_sysfs_connector_add(connector); | |
291 | ||
292 | /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written | |
293 | * 0xd. Failure to do so will result in spurious interrupts being | |
294 | * generated on the port when a cable is not attached. | |
295 | */ | |
296 | if (IS_G4X(dev) && !IS_GM45(dev)) { | |
297 | u32 temp = I915_READ(PEG_BAND_GAP_DATA); | |
298 | I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd); | |
299 | } | |
300 | ||
301 | return; | |
302 | ||
303 | err_connector: | |
304 | drm_connector_cleanup(connector); | |
305 | kfree(intel_output); | |
306 | ||
307 | return; | |
308 | } |