Commit | Line | Data |
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0e32b39c DA |
1 | /* |
2 | * Copyright © 2008 Intel Corporation | |
3 | * 2014 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
22 | * IN THE SOFTWARE. | |
23 | * | |
24 | */ | |
25 | ||
26 | #include <drm/drmP.h> | |
27 | #include "i915_drv.h" | |
28 | #include "intel_drv.h" | |
c6f95f27 | 29 | #include <drm/drm_atomic_helper.h> |
0e32b39c DA |
30 | #include <drm/drm_crtc_helper.h> |
31 | #include <drm/drm_edid.h> | |
32 | ||
33 | static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, | |
5cec258b | 34 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
35 | { |
36 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
37 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
38 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
e75f4771 ACO |
39 | struct drm_atomic_state *state; |
40 | int bpp, i; | |
ed4e9c1d | 41 | int lane_count, slots, rate; |
2d112de7 | 42 | struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
da3ced29 ACO |
43 | struct drm_connector *drm_connector; |
44 | struct intel_connector *connector, *found = NULL; | |
45 | struct drm_connector_state *connector_state; | |
0e32b39c DA |
46 | int mst_pbn; |
47 | ||
48 | pipe_config->dp_encoder_is_mst = true; | |
49 | pipe_config->has_pch_encoder = false; | |
50 | pipe_config->has_dp_encoder = true; | |
51 | bpp = 24; | |
52 | /* | |
53 | * for MST we always configure max link bw - the spec doesn't | |
54 | * seem to suggest we should do otherwise. | |
55 | */ | |
56 | lane_count = drm_dp_max_lane_count(intel_dp->dpcd); | |
ed4e9c1d VS |
57 | |
58 | rate = intel_dp_max_link_rate(intel_dp); | |
59 | ||
94ca719e | 60 | if (intel_dp->num_sink_rates) { |
ed4e9c1d VS |
61 | intel_dp->link_bw = 0; |
62 | intel_dp->rate_select = intel_dp_rate_select(intel_dp, rate); | |
63 | } else { | |
64 | intel_dp->link_bw = drm_dp_link_rate_to_bw_code(rate); | |
65 | intel_dp->rate_select = 0; | |
66 | } | |
67 | ||
0e32b39c DA |
68 | intel_dp->lane_count = lane_count; |
69 | ||
70 | pipe_config->pipe_bpp = 24; | |
ed4e9c1d | 71 | pipe_config->port_clock = rate; |
0e32b39c | 72 | |
e75f4771 ACO |
73 | state = pipe_config->base.state; |
74 | ||
da3ced29 ACO |
75 | for_each_connector_in_state(state, drm_connector, connector_state, i) { |
76 | connector = to_intel_connector(drm_connector); | |
e75f4771 | 77 | |
da3ced29 ACO |
78 | if (connector_state->best_encoder == &encoder->base) { |
79 | found = connector; | |
0e32b39c DA |
80 | break; |
81 | } | |
82 | } | |
83 | ||
84 | if (!found) { | |
85 | DRM_ERROR("can't find connector\n"); | |
86 | return false; | |
87 | } | |
88 | ||
89 | mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); | |
90 | ||
91 | pipe_config->pbn = mst_pbn; | |
92 | slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); | |
93 | ||
94 | intel_link_compute_m_n(bpp, lane_count, | |
95 | adjusted_mode->crtc_clock, | |
96 | pipe_config->port_clock, | |
97 | &pipe_config->dp_m_n); | |
98 | ||
99 | pipe_config->dp_m_n.tu = slots; | |
100 | return true; | |
101 | ||
102 | } | |
103 | ||
104 | static void intel_mst_disable_dp(struct intel_encoder *encoder) | |
105 | { | |
106 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
107 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
108 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
109 | int ret; | |
110 | ||
111 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
112 | ||
113 | drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port); | |
114 | ||
115 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
116 | if (ret) { | |
117 | DRM_ERROR("failed to update payload %d\n", ret); | |
118 | } | |
119 | } | |
120 | ||
121 | static void intel_mst_post_disable_dp(struct intel_encoder *encoder) | |
122 | { | |
123 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
124 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
125 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
126 | ||
127 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
128 | ||
129 | /* this can fail */ | |
130 | drm_dp_check_act_status(&intel_dp->mst_mgr); | |
131 | /* and this can also fail */ | |
132 | drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
133 | ||
134 | drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port); | |
135 | ||
136 | intel_dp->active_mst_links--; | |
137 | intel_mst->port = NULL; | |
138 | if (intel_dp->active_mst_links == 0) { | |
139 | intel_dig_port->base.post_disable(&intel_dig_port->base); | |
140 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); | |
141 | } | |
142 | } | |
143 | ||
144 | static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) | |
145 | { | |
146 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
147 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
148 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
149 | struct drm_device *dev = encoder->base.dev; | |
150 | struct drm_i915_private *dev_priv = dev->dev_private; | |
151 | enum port port = intel_dig_port->port; | |
152 | int ret; | |
153 | uint32_t temp; | |
9b4fd8f2 | 154 | struct intel_connector *found = NULL, *connector; |
0e32b39c DA |
155 | int slots; |
156 | struct drm_crtc *crtc = encoder->base.crtc; | |
157 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | |
158 | ||
9b4fd8f2 ACO |
159 | for_each_intel_connector(dev, connector) { |
160 | if (connector->base.state->best_encoder == &encoder->base) { | |
161 | found = connector; | |
0e32b39c DA |
162 | break; |
163 | } | |
164 | } | |
165 | ||
166 | if (!found) { | |
167 | DRM_ERROR("can't find connector\n"); | |
168 | return; | |
169 | } | |
170 | ||
171 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
172 | intel_mst->port = found->port; | |
173 | ||
174 | if (intel_dp->active_mst_links == 0) { | |
175 | enum port port = intel_ddi_get_encoder_port(encoder); | |
176 | ||
1ab23380 S |
177 | /* FIXME: add support for SKL */ |
178 | if (INTEL_INFO(dev)->gen < 9) | |
179 | I915_WRITE(PORT_CLK_SEL(port), | |
180 | intel_crtc->config->ddi_pll_sel); | |
0e32b39c DA |
181 | |
182 | intel_ddi_init_dp_buf_reg(&intel_dig_port->base); | |
183 | ||
184 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); | |
185 | ||
186 | ||
187 | intel_dp_start_link_train(intel_dp); | |
188 | intel_dp_complete_link_train(intel_dp); | |
189 | intel_dp_stop_link_train(intel_dp); | |
190 | } | |
191 | ||
192 | ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, | |
6e3c9717 ACO |
193 | intel_mst->port, |
194 | intel_crtc->config->pbn, &slots); | |
0e32b39c DA |
195 | if (ret == false) { |
196 | DRM_ERROR("failed to allocate vcpi\n"); | |
197 | return; | |
198 | } | |
199 | ||
200 | ||
201 | intel_dp->active_mst_links++; | |
202 | temp = I915_READ(DP_TP_STATUS(port)); | |
203 | I915_WRITE(DP_TP_STATUS(port), temp); | |
204 | ||
205 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
206 | } | |
207 | ||
208 | static void intel_mst_enable_dp(struct intel_encoder *encoder) | |
209 | { | |
210 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
211 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
212 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
213 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
214 | struct drm_i915_private *dev_priv = dev->dev_private; | |
215 | enum port port = intel_dig_port->port; | |
216 | int ret; | |
217 | ||
218 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
219 | ||
220 | if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT), | |
221 | 1)) | |
222 | DRM_ERROR("Timed out waiting for ACT sent\n"); | |
223 | ||
224 | ret = drm_dp_check_act_status(&intel_dp->mst_mgr); | |
225 | ||
226 | ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
227 | } | |
228 | ||
229 | static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, | |
230 | enum pipe *pipe) | |
231 | { | |
232 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
233 | *pipe = intel_mst->pipe; | |
234 | if (intel_mst->port) | |
235 | return true; | |
236 | return false; | |
237 | } | |
238 | ||
239 | static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, | |
5cec258b | 240 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
241 | { |
242 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
243 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
244 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | |
245 | struct drm_device *dev = encoder->base.dev; | |
246 | struct drm_i915_private *dev_priv = dev->dev_private; | |
0cb09a97 | 247 | enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; |
0e32b39c DA |
248 | u32 temp, flags = 0; |
249 | ||
250 | pipe_config->has_dp_encoder = true; | |
251 | ||
252 | temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); | |
253 | if (temp & TRANS_DDI_PHSYNC) | |
254 | flags |= DRM_MODE_FLAG_PHSYNC; | |
255 | else | |
256 | flags |= DRM_MODE_FLAG_NHSYNC; | |
257 | if (temp & TRANS_DDI_PVSYNC) | |
258 | flags |= DRM_MODE_FLAG_PVSYNC; | |
259 | else | |
260 | flags |= DRM_MODE_FLAG_NVSYNC; | |
261 | ||
262 | switch (temp & TRANS_DDI_BPC_MASK) { | |
263 | case TRANS_DDI_BPC_6: | |
264 | pipe_config->pipe_bpp = 18; | |
265 | break; | |
266 | case TRANS_DDI_BPC_8: | |
267 | pipe_config->pipe_bpp = 24; | |
268 | break; | |
269 | case TRANS_DDI_BPC_10: | |
270 | pipe_config->pipe_bpp = 30; | |
271 | break; | |
272 | case TRANS_DDI_BPC_12: | |
273 | pipe_config->pipe_bpp = 36; | |
274 | break; | |
275 | default: | |
276 | break; | |
277 | } | |
2d112de7 | 278 | pipe_config->base.adjusted_mode.flags |= flags; |
0e32b39c DA |
279 | intel_dp_get_m_n(crtc, pipe_config); |
280 | ||
281 | intel_ddi_clock_get(&intel_dig_port->base, pipe_config); | |
282 | } | |
283 | ||
284 | static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) | |
285 | { | |
286 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
287 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
288 | struct edid *edid; | |
289 | int ret; | |
290 | ||
291 | edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); | |
292 | if (!edid) | |
293 | return 0; | |
294 | ||
295 | ret = intel_connector_update_modes(connector, edid); | |
296 | kfree(edid); | |
297 | ||
298 | return ret; | |
299 | } | |
300 | ||
301 | static enum drm_connector_status | |
f7f3d48a | 302 | intel_dp_mst_detect(struct drm_connector *connector, bool force) |
0e32b39c DA |
303 | { |
304 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
305 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
306 | ||
c6a0aed4 | 307 | return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); |
0e32b39c DA |
308 | } |
309 | ||
0e32b39c DA |
310 | static int |
311 | intel_dp_mst_set_property(struct drm_connector *connector, | |
312 | struct drm_property *property, | |
313 | uint64_t val) | |
314 | { | |
315 | return 0; | |
316 | } | |
317 | ||
318 | static void | |
319 | intel_dp_mst_connector_destroy(struct drm_connector *connector) | |
320 | { | |
321 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
322 | ||
323 | if (!IS_ERR_OR_NULL(intel_connector->edid)) | |
324 | kfree(intel_connector->edid); | |
325 | ||
326 | drm_connector_cleanup(connector); | |
327 | kfree(connector); | |
328 | } | |
329 | ||
330 | static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { | |
331 | .dpms = intel_connector_dpms, | |
332 | .detect = intel_dp_mst_detect, | |
333 | .fill_modes = drm_helper_probe_single_connector_modes, | |
334 | .set_property = intel_dp_mst_set_property, | |
2545e4a6 | 335 | .atomic_get_property = intel_connector_atomic_get_property, |
0e32b39c | 336 | .destroy = intel_dp_mst_connector_destroy, |
c6f95f27 | 337 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
98969725 | 338 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, |
0e32b39c DA |
339 | }; |
340 | ||
341 | static int intel_dp_mst_get_modes(struct drm_connector *connector) | |
342 | { | |
343 | return intel_dp_mst_get_ddc_modes(connector); | |
344 | } | |
345 | ||
346 | static enum drm_mode_status | |
347 | intel_dp_mst_mode_valid(struct drm_connector *connector, | |
348 | struct drm_display_mode *mode) | |
349 | { | |
350 | /* TODO - validate mode against available PBN for link */ | |
351 | if (mode->clock < 10000) | |
352 | return MODE_CLOCK_LOW; | |
353 | ||
354 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) | |
355 | return MODE_H_ILLEGAL; | |
356 | ||
357 | return MODE_OK; | |
358 | } | |
359 | ||
360 | static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) | |
361 | { | |
362 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
363 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
364 | return &intel_dp->mst_encoders[0]->base.base; | |
365 | } | |
366 | ||
367 | static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { | |
368 | .get_modes = intel_dp_mst_get_modes, | |
369 | .mode_valid = intel_dp_mst_mode_valid, | |
370 | .best_encoder = intel_mst_best_encoder, | |
371 | }; | |
372 | ||
373 | static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) | |
374 | { | |
375 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); | |
376 | ||
377 | drm_encoder_cleanup(encoder); | |
378 | kfree(intel_mst); | |
379 | } | |
380 | ||
381 | static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { | |
382 | .destroy = intel_dp_mst_encoder_destroy, | |
383 | }; | |
384 | ||
385 | static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) | |
386 | { | |
387 | if (connector->encoder) { | |
388 | enum pipe pipe; | |
389 | if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) | |
390 | return false; | |
391 | return true; | |
392 | } | |
393 | return false; | |
394 | } | |
395 | ||
7296c849 CW |
396 | static void intel_connector_add_to_fbdev(struct intel_connector *connector) |
397 | { | |
398 | #ifdef CONFIG_DRM_I915_FBDEV | |
399 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
400 | drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); | |
401 | #endif | |
402 | } | |
403 | ||
404 | static void intel_connector_remove_from_fbdev(struct intel_connector *connector) | |
405 | { | |
406 | #ifdef CONFIG_DRM_I915_FBDEV | |
407 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
408 | drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); | |
409 | #endif | |
410 | } | |
411 | ||
12e6cecd | 412 | static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) |
0e32b39c DA |
413 | { |
414 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
415 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
416 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
0e32b39c DA |
417 | struct intel_connector *intel_connector; |
418 | struct drm_connector *connector; | |
419 | int i; | |
420 | ||
9bdbd0b9 | 421 | intel_connector = intel_connector_alloc(); |
0e32b39c DA |
422 | if (!intel_connector) |
423 | return NULL; | |
424 | ||
425 | connector = &intel_connector->base; | |
426 | drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); | |
427 | drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); | |
428 | ||
429 | intel_connector->unregister = intel_connector_unregister; | |
430 | intel_connector->get_hw_state = intel_dp_mst_get_hw_state; | |
431 | intel_connector->mst_port = intel_dp; | |
432 | intel_connector->port = port; | |
433 | ||
434 | for (i = PIPE_A; i <= PIPE_C; i++) { | |
435 | drm_mode_connector_attach_encoder(&intel_connector->base, | |
436 | &intel_dp->mst_encoders[i]->base.base); | |
437 | } | |
438 | intel_dp_add_properties(intel_dp, connector); | |
439 | ||
440 | drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); | |
6f134d7b DA |
441 | drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); |
442 | ||
0e32b39c | 443 | drm_mode_connector_set_path_property(connector, pathprop); |
8bb4da1d | 444 | drm_modeset_lock_all(dev); |
7296c849 | 445 | intel_connector_add_to_fbdev(intel_connector); |
8bb4da1d | 446 | drm_modeset_unlock_all(dev); |
0e32b39c DA |
447 | drm_connector_register(&intel_connector->base); |
448 | return connector; | |
449 | } | |
450 | ||
451 | static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, | |
452 | struct drm_connector *connector) | |
453 | { | |
454 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
455 | struct drm_device *dev = connector->dev; | |
0e32b39c | 456 | /* need to nuke the connector */ |
8bb4da1d | 457 | drm_modeset_lock_all(dev); |
0e32b39c | 458 | intel_connector_dpms(connector, DRM_MODE_DPMS_OFF); |
8bb4da1d | 459 | drm_modeset_unlock_all(dev); |
0e32b39c DA |
460 | |
461 | intel_connector->unregister(intel_connector); | |
462 | ||
8bb4da1d | 463 | drm_modeset_lock_all(dev); |
7296c849 | 464 | intel_connector_remove_from_fbdev(intel_connector); |
0e32b39c | 465 | drm_connector_cleanup(connector); |
8bb4da1d | 466 | drm_modeset_unlock_all(dev); |
0e32b39c | 467 | |
0e32b39c DA |
468 | kfree(intel_connector); |
469 | DRM_DEBUG_KMS("\n"); | |
470 | } | |
471 | ||
472 | static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) | |
473 | { | |
474 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
475 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
476 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
477 | ||
478 | drm_kms_helper_hotplug_event(dev); | |
479 | } | |
480 | ||
481 | static struct drm_dp_mst_topology_cbs mst_cbs = { | |
482 | .add_connector = intel_dp_add_mst_connector, | |
483 | .destroy_connector = intel_dp_destroy_mst_connector, | |
484 | .hotplug = intel_dp_mst_hotplug, | |
485 | }; | |
486 | ||
487 | static struct intel_dp_mst_encoder * | |
488 | intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) | |
489 | { | |
490 | struct intel_dp_mst_encoder *intel_mst; | |
491 | struct intel_encoder *intel_encoder; | |
492 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
493 | ||
494 | intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); | |
495 | ||
496 | if (!intel_mst) | |
497 | return NULL; | |
498 | ||
499 | intel_mst->pipe = pipe; | |
500 | intel_encoder = &intel_mst->base; | |
501 | intel_mst->primary = intel_dig_port; | |
502 | ||
503 | drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, | |
504 | DRM_MODE_ENCODER_DPMST); | |
505 | ||
506 | intel_encoder->type = INTEL_OUTPUT_DP_MST; | |
507 | intel_encoder->crtc_mask = 0x7; | |
508 | intel_encoder->cloneable = 0; | |
509 | ||
510 | intel_encoder->compute_config = intel_dp_mst_compute_config; | |
511 | intel_encoder->disable = intel_mst_disable_dp; | |
512 | intel_encoder->post_disable = intel_mst_post_disable_dp; | |
513 | intel_encoder->pre_enable = intel_mst_pre_enable_dp; | |
514 | intel_encoder->enable = intel_mst_enable_dp; | |
515 | intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; | |
516 | intel_encoder->get_config = intel_dp_mst_enc_get_config; | |
517 | ||
518 | return intel_mst; | |
519 | ||
520 | } | |
521 | ||
522 | static bool | |
523 | intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) | |
524 | { | |
525 | int i; | |
526 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
527 | ||
528 | for (i = PIPE_A; i <= PIPE_C; i++) | |
529 | intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); | |
530 | return true; | |
531 | } | |
532 | ||
533 | int | |
534 | intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) | |
535 | { | |
536 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
537 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
538 | int ret; | |
539 | ||
540 | intel_dp->can_mst = true; | |
541 | intel_dp->mst_mgr.cbs = &mst_cbs; | |
542 | ||
543 | /* create encoders */ | |
544 | intel_dp_create_fake_mst_encoders(intel_dig_port); | |
545 | ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); | |
546 | if (ret) { | |
547 | intel_dp->can_mst = false; | |
548 | return ret; | |
549 | } | |
550 | return 0; | |
551 | } | |
552 | ||
553 | void | |
554 | intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) | |
555 | { | |
556 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
557 | ||
558 | if (!intel_dp->can_mst) | |
559 | return; | |
560 | ||
561 | drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); | |
562 | /* encoders will get killed by normal cleanup */ | |
563 | } |