Commit | Line | Data |
---|---|---|
0e32b39c DA |
1 | /* |
2 | * Copyright © 2008 Intel Corporation | |
3 | * 2014 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
22 | * IN THE SOFTWARE. | |
23 | * | |
24 | */ | |
25 | ||
26 | #include <drm/drmP.h> | |
27 | #include "i915_drv.h" | |
28 | #include "intel_drv.h" | |
c6f95f27 | 29 | #include <drm/drm_atomic_helper.h> |
0e32b39c DA |
30 | #include <drm/drm_crtc_helper.h> |
31 | #include <drm/drm_edid.h> | |
32 | ||
33 | static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, | |
5cec258b | 34 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
35 | { |
36 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
37 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
38 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
e75f4771 ACO |
39 | struct drm_atomic_state *state; |
40 | int bpp, i; | |
ed4e9c1d | 41 | int lane_count, slots, rate; |
2d112de7 | 42 | struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
e75f4771 | 43 | struct intel_connector *found = NULL; |
0e32b39c DA |
44 | int mst_pbn; |
45 | ||
46 | pipe_config->dp_encoder_is_mst = true; | |
47 | pipe_config->has_pch_encoder = false; | |
48 | pipe_config->has_dp_encoder = true; | |
49 | bpp = 24; | |
50 | /* | |
51 | * for MST we always configure max link bw - the spec doesn't | |
52 | * seem to suggest we should do otherwise. | |
53 | */ | |
54 | lane_count = drm_dp_max_lane_count(intel_dp->dpcd); | |
ed4e9c1d VS |
55 | |
56 | rate = intel_dp_max_link_rate(intel_dp); | |
57 | ||
94ca719e | 58 | if (intel_dp->num_sink_rates) { |
ed4e9c1d VS |
59 | intel_dp->link_bw = 0; |
60 | intel_dp->rate_select = intel_dp_rate_select(intel_dp, rate); | |
61 | } else { | |
62 | intel_dp->link_bw = drm_dp_link_rate_to_bw_code(rate); | |
63 | intel_dp->rate_select = 0; | |
64 | } | |
65 | ||
0e32b39c DA |
66 | intel_dp->lane_count = lane_count; |
67 | ||
68 | pipe_config->pipe_bpp = 24; | |
ed4e9c1d | 69 | pipe_config->port_clock = rate; |
0e32b39c | 70 | |
e75f4771 ACO |
71 | state = pipe_config->base.state; |
72 | ||
73 | for (i = 0; i < state->num_connector; i++) { | |
74 | if (!state->connectors[i]) | |
75 | continue; | |
76 | ||
77 | if (state->connector_states[i]->best_encoder == &encoder->base) { | |
78 | found = to_intel_connector(state->connectors[i]); | |
0e32b39c DA |
79 | break; |
80 | } | |
81 | } | |
82 | ||
83 | if (!found) { | |
84 | DRM_ERROR("can't find connector\n"); | |
85 | return false; | |
86 | } | |
87 | ||
88 | mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp); | |
89 | ||
90 | pipe_config->pbn = mst_pbn; | |
91 | slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); | |
92 | ||
93 | intel_link_compute_m_n(bpp, lane_count, | |
94 | adjusted_mode->crtc_clock, | |
95 | pipe_config->port_clock, | |
96 | &pipe_config->dp_m_n); | |
97 | ||
98 | pipe_config->dp_m_n.tu = slots; | |
99 | return true; | |
100 | ||
101 | } | |
102 | ||
103 | static void intel_mst_disable_dp(struct intel_encoder *encoder) | |
104 | { | |
105 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
106 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
107 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
108 | int ret; | |
109 | ||
110 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
111 | ||
112 | drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port); | |
113 | ||
114 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
115 | if (ret) { | |
116 | DRM_ERROR("failed to update payload %d\n", ret); | |
117 | } | |
118 | } | |
119 | ||
120 | static void intel_mst_post_disable_dp(struct intel_encoder *encoder) | |
121 | { | |
122 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
123 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
124 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
125 | ||
126 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
127 | ||
128 | /* this can fail */ | |
129 | drm_dp_check_act_status(&intel_dp->mst_mgr); | |
130 | /* and this can also fail */ | |
131 | drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
132 | ||
133 | drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port); | |
134 | ||
135 | intel_dp->active_mst_links--; | |
136 | intel_mst->port = NULL; | |
137 | if (intel_dp->active_mst_links == 0) { | |
138 | intel_dig_port->base.post_disable(&intel_dig_port->base); | |
139 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); | |
140 | } | |
141 | } | |
142 | ||
143 | static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) | |
144 | { | |
145 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
146 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
147 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
148 | struct drm_device *dev = encoder->base.dev; | |
149 | struct drm_i915_private *dev_priv = dev->dev_private; | |
150 | enum port port = intel_dig_port->port; | |
151 | int ret; | |
152 | uint32_t temp; | |
9b4fd8f2 | 153 | struct intel_connector *found = NULL, *connector; |
0e32b39c DA |
154 | int slots; |
155 | struct drm_crtc *crtc = encoder->base.crtc; | |
156 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | |
157 | ||
9b4fd8f2 ACO |
158 | for_each_intel_connector(dev, connector) { |
159 | if (connector->base.state->best_encoder == &encoder->base) { | |
160 | found = connector; | |
0e32b39c DA |
161 | break; |
162 | } | |
163 | } | |
164 | ||
165 | if (!found) { | |
166 | DRM_ERROR("can't find connector\n"); | |
167 | return; | |
168 | } | |
169 | ||
170 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
171 | intel_mst->port = found->port; | |
172 | ||
173 | if (intel_dp->active_mst_links == 0) { | |
174 | enum port port = intel_ddi_get_encoder_port(encoder); | |
175 | ||
6e3c9717 ACO |
176 | I915_WRITE(PORT_CLK_SEL(port), |
177 | intel_crtc->config->ddi_pll_sel); | |
0e32b39c DA |
178 | |
179 | intel_ddi_init_dp_buf_reg(&intel_dig_port->base); | |
180 | ||
181 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); | |
182 | ||
183 | ||
184 | intel_dp_start_link_train(intel_dp); | |
185 | intel_dp_complete_link_train(intel_dp); | |
186 | intel_dp_stop_link_train(intel_dp); | |
187 | } | |
188 | ||
189 | ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, | |
6e3c9717 ACO |
190 | intel_mst->port, |
191 | intel_crtc->config->pbn, &slots); | |
0e32b39c DA |
192 | if (ret == false) { |
193 | DRM_ERROR("failed to allocate vcpi\n"); | |
194 | return; | |
195 | } | |
196 | ||
197 | ||
198 | intel_dp->active_mst_links++; | |
199 | temp = I915_READ(DP_TP_STATUS(port)); | |
200 | I915_WRITE(DP_TP_STATUS(port), temp); | |
201 | ||
202 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
203 | } | |
204 | ||
205 | static void intel_mst_enable_dp(struct intel_encoder *encoder) | |
206 | { | |
207 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
208 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
209 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
210 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
211 | struct drm_i915_private *dev_priv = dev->dev_private; | |
212 | enum port port = intel_dig_port->port; | |
213 | int ret; | |
214 | ||
215 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
216 | ||
217 | if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT), | |
218 | 1)) | |
219 | DRM_ERROR("Timed out waiting for ACT sent\n"); | |
220 | ||
221 | ret = drm_dp_check_act_status(&intel_dp->mst_mgr); | |
222 | ||
223 | ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
224 | } | |
225 | ||
226 | static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, | |
227 | enum pipe *pipe) | |
228 | { | |
229 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
230 | *pipe = intel_mst->pipe; | |
231 | if (intel_mst->port) | |
232 | return true; | |
233 | return false; | |
234 | } | |
235 | ||
236 | static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, | |
5cec258b | 237 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
238 | { |
239 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
240 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
241 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | |
242 | struct drm_device *dev = encoder->base.dev; | |
243 | struct drm_i915_private *dev_priv = dev->dev_private; | |
0cb09a97 | 244 | enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; |
0e32b39c DA |
245 | u32 temp, flags = 0; |
246 | ||
247 | pipe_config->has_dp_encoder = true; | |
248 | ||
249 | temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); | |
250 | if (temp & TRANS_DDI_PHSYNC) | |
251 | flags |= DRM_MODE_FLAG_PHSYNC; | |
252 | else | |
253 | flags |= DRM_MODE_FLAG_NHSYNC; | |
254 | if (temp & TRANS_DDI_PVSYNC) | |
255 | flags |= DRM_MODE_FLAG_PVSYNC; | |
256 | else | |
257 | flags |= DRM_MODE_FLAG_NVSYNC; | |
258 | ||
259 | switch (temp & TRANS_DDI_BPC_MASK) { | |
260 | case TRANS_DDI_BPC_6: | |
261 | pipe_config->pipe_bpp = 18; | |
262 | break; | |
263 | case TRANS_DDI_BPC_8: | |
264 | pipe_config->pipe_bpp = 24; | |
265 | break; | |
266 | case TRANS_DDI_BPC_10: | |
267 | pipe_config->pipe_bpp = 30; | |
268 | break; | |
269 | case TRANS_DDI_BPC_12: | |
270 | pipe_config->pipe_bpp = 36; | |
271 | break; | |
272 | default: | |
273 | break; | |
274 | } | |
2d112de7 | 275 | pipe_config->base.adjusted_mode.flags |= flags; |
0e32b39c DA |
276 | intel_dp_get_m_n(crtc, pipe_config); |
277 | ||
278 | intel_ddi_clock_get(&intel_dig_port->base, pipe_config); | |
279 | } | |
280 | ||
281 | static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) | |
282 | { | |
283 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
284 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
285 | struct edid *edid; | |
286 | int ret; | |
287 | ||
288 | edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); | |
289 | if (!edid) | |
290 | return 0; | |
291 | ||
292 | ret = intel_connector_update_modes(connector, edid); | |
293 | kfree(edid); | |
294 | ||
295 | return ret; | |
296 | } | |
297 | ||
298 | static enum drm_connector_status | |
f7f3d48a | 299 | intel_dp_mst_detect(struct drm_connector *connector, bool force) |
0e32b39c DA |
300 | { |
301 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
302 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
303 | ||
c6a0aed4 | 304 | return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); |
0e32b39c DA |
305 | } |
306 | ||
0e32b39c DA |
307 | static int |
308 | intel_dp_mst_set_property(struct drm_connector *connector, | |
309 | struct drm_property *property, | |
310 | uint64_t val) | |
311 | { | |
312 | return 0; | |
313 | } | |
314 | ||
315 | static void | |
316 | intel_dp_mst_connector_destroy(struct drm_connector *connector) | |
317 | { | |
318 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
319 | ||
320 | if (!IS_ERR_OR_NULL(intel_connector->edid)) | |
321 | kfree(intel_connector->edid); | |
322 | ||
323 | drm_connector_cleanup(connector); | |
324 | kfree(connector); | |
325 | } | |
326 | ||
327 | static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { | |
328 | .dpms = intel_connector_dpms, | |
329 | .detect = intel_dp_mst_detect, | |
330 | .fill_modes = drm_helper_probe_single_connector_modes, | |
331 | .set_property = intel_dp_mst_set_property, | |
2545e4a6 | 332 | .atomic_get_property = intel_connector_atomic_get_property, |
0e32b39c | 333 | .destroy = intel_dp_mst_connector_destroy, |
c6f95f27 | 334 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
98969725 | 335 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, |
0e32b39c DA |
336 | }; |
337 | ||
338 | static int intel_dp_mst_get_modes(struct drm_connector *connector) | |
339 | { | |
340 | return intel_dp_mst_get_ddc_modes(connector); | |
341 | } | |
342 | ||
343 | static enum drm_mode_status | |
344 | intel_dp_mst_mode_valid(struct drm_connector *connector, | |
345 | struct drm_display_mode *mode) | |
346 | { | |
347 | /* TODO - validate mode against available PBN for link */ | |
348 | if (mode->clock < 10000) | |
349 | return MODE_CLOCK_LOW; | |
350 | ||
351 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) | |
352 | return MODE_H_ILLEGAL; | |
353 | ||
354 | return MODE_OK; | |
355 | } | |
356 | ||
357 | static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) | |
358 | { | |
359 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
360 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
361 | return &intel_dp->mst_encoders[0]->base.base; | |
362 | } | |
363 | ||
364 | static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { | |
365 | .get_modes = intel_dp_mst_get_modes, | |
366 | .mode_valid = intel_dp_mst_mode_valid, | |
367 | .best_encoder = intel_mst_best_encoder, | |
368 | }; | |
369 | ||
370 | static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) | |
371 | { | |
372 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); | |
373 | ||
374 | drm_encoder_cleanup(encoder); | |
375 | kfree(intel_mst); | |
376 | } | |
377 | ||
378 | static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { | |
379 | .destroy = intel_dp_mst_encoder_destroy, | |
380 | }; | |
381 | ||
382 | static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) | |
383 | { | |
384 | if (connector->encoder) { | |
385 | enum pipe pipe; | |
386 | if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) | |
387 | return false; | |
388 | return true; | |
389 | } | |
390 | return false; | |
391 | } | |
392 | ||
7296c849 CW |
393 | static void intel_connector_add_to_fbdev(struct intel_connector *connector) |
394 | { | |
395 | #ifdef CONFIG_DRM_I915_FBDEV | |
396 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
397 | drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); | |
398 | #endif | |
399 | } | |
400 | ||
401 | static void intel_connector_remove_from_fbdev(struct intel_connector *connector) | |
402 | { | |
403 | #ifdef CONFIG_DRM_I915_FBDEV | |
404 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); | |
405 | drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); | |
406 | #endif | |
407 | } | |
408 | ||
12e6cecd | 409 | static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) |
0e32b39c DA |
410 | { |
411 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
412 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
413 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
0e32b39c DA |
414 | struct intel_connector *intel_connector; |
415 | struct drm_connector *connector; | |
416 | int i; | |
417 | ||
9bdbd0b9 | 418 | intel_connector = intel_connector_alloc(); |
0e32b39c DA |
419 | if (!intel_connector) |
420 | return NULL; | |
421 | ||
422 | connector = &intel_connector->base; | |
423 | drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); | |
424 | drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); | |
425 | ||
426 | intel_connector->unregister = intel_connector_unregister; | |
427 | intel_connector->get_hw_state = intel_dp_mst_get_hw_state; | |
428 | intel_connector->mst_port = intel_dp; | |
429 | intel_connector->port = port; | |
430 | ||
431 | for (i = PIPE_A; i <= PIPE_C; i++) { | |
432 | drm_mode_connector_attach_encoder(&intel_connector->base, | |
433 | &intel_dp->mst_encoders[i]->base.base); | |
434 | } | |
435 | intel_dp_add_properties(intel_dp, connector); | |
436 | ||
437 | drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); | |
6f134d7b DA |
438 | drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); |
439 | ||
0e32b39c DA |
440 | drm_mode_connector_set_path_property(connector, pathprop); |
441 | drm_reinit_primary_mode_group(dev); | |
442 | mutex_lock(&dev->mode_config.mutex); | |
7296c849 | 443 | intel_connector_add_to_fbdev(intel_connector); |
0e32b39c DA |
444 | mutex_unlock(&dev->mode_config.mutex); |
445 | drm_connector_register(&intel_connector->base); | |
446 | return connector; | |
447 | } | |
448 | ||
449 | static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, | |
450 | struct drm_connector *connector) | |
451 | { | |
452 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
453 | struct drm_device *dev = connector->dev; | |
0e32b39c DA |
454 | /* need to nuke the connector */ |
455 | mutex_lock(&dev->mode_config.mutex); | |
456 | intel_connector_dpms(connector, DRM_MODE_DPMS_OFF); | |
457 | mutex_unlock(&dev->mode_config.mutex); | |
458 | ||
459 | intel_connector->unregister(intel_connector); | |
460 | ||
461 | mutex_lock(&dev->mode_config.mutex); | |
7296c849 | 462 | intel_connector_remove_from_fbdev(intel_connector); |
0e32b39c DA |
463 | drm_connector_cleanup(connector); |
464 | mutex_unlock(&dev->mode_config.mutex); | |
465 | ||
466 | drm_reinit_primary_mode_group(dev); | |
467 | ||
468 | kfree(intel_connector); | |
469 | DRM_DEBUG_KMS("\n"); | |
470 | } | |
471 | ||
472 | static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) | |
473 | { | |
474 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
475 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
476 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
477 | ||
478 | drm_kms_helper_hotplug_event(dev); | |
479 | } | |
480 | ||
481 | static struct drm_dp_mst_topology_cbs mst_cbs = { | |
482 | .add_connector = intel_dp_add_mst_connector, | |
483 | .destroy_connector = intel_dp_destroy_mst_connector, | |
484 | .hotplug = intel_dp_mst_hotplug, | |
485 | }; | |
486 | ||
487 | static struct intel_dp_mst_encoder * | |
488 | intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) | |
489 | { | |
490 | struct intel_dp_mst_encoder *intel_mst; | |
491 | struct intel_encoder *intel_encoder; | |
492 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
493 | ||
494 | intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); | |
495 | ||
496 | if (!intel_mst) | |
497 | return NULL; | |
498 | ||
499 | intel_mst->pipe = pipe; | |
500 | intel_encoder = &intel_mst->base; | |
501 | intel_mst->primary = intel_dig_port; | |
502 | ||
503 | drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, | |
504 | DRM_MODE_ENCODER_DPMST); | |
505 | ||
506 | intel_encoder->type = INTEL_OUTPUT_DP_MST; | |
507 | intel_encoder->crtc_mask = 0x7; | |
508 | intel_encoder->cloneable = 0; | |
509 | ||
510 | intel_encoder->compute_config = intel_dp_mst_compute_config; | |
511 | intel_encoder->disable = intel_mst_disable_dp; | |
512 | intel_encoder->post_disable = intel_mst_post_disable_dp; | |
513 | intel_encoder->pre_enable = intel_mst_pre_enable_dp; | |
514 | intel_encoder->enable = intel_mst_enable_dp; | |
515 | intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; | |
516 | intel_encoder->get_config = intel_dp_mst_enc_get_config; | |
517 | ||
518 | return intel_mst; | |
519 | ||
520 | } | |
521 | ||
522 | static bool | |
523 | intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) | |
524 | { | |
525 | int i; | |
526 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
527 | ||
528 | for (i = PIPE_A; i <= PIPE_C; i++) | |
529 | intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); | |
530 | return true; | |
531 | } | |
532 | ||
533 | int | |
534 | intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) | |
535 | { | |
536 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
537 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
538 | int ret; | |
539 | ||
540 | intel_dp->can_mst = true; | |
541 | intel_dp->mst_mgr.cbs = &mst_cbs; | |
542 | ||
543 | /* create encoders */ | |
544 | intel_dp_create_fake_mst_encoders(intel_dig_port); | |
545 | ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); | |
546 | if (ret) { | |
547 | intel_dp->can_mst = false; | |
548 | return ret; | |
549 | } | |
550 | return 0; | |
551 | } | |
552 | ||
553 | void | |
554 | intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) | |
555 | { | |
556 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
557 | ||
558 | if (!intel_dp->can_mst) | |
559 | return; | |
560 | ||
561 | drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); | |
562 | /* encoders will get killed by normal cleanup */ | |
563 | } |