Commit | Line | Data |
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0e32b39c DA |
1 | /* |
2 | * Copyright © 2008 Intel Corporation | |
3 | * 2014 Red Hat Inc. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining a | |
6 | * copy of this software and associated documentation files (the "Software"), | |
7 | * to deal in the Software without restriction, including without limitation | |
8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
9 | * and/or sell copies of the Software, and to permit persons to whom the | |
10 | * Software is furnished to do so, subject to the following conditions: | |
11 | * | |
12 | * The above copyright notice and this permission notice (including the next | |
13 | * paragraph) shall be included in all copies or substantial portions of the | |
14 | * Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
22 | * IN THE SOFTWARE. | |
23 | * | |
24 | */ | |
25 | ||
26 | #include <drm/drmP.h> | |
27 | #include "i915_drv.h" | |
28 | #include "intel_drv.h" | |
c6f95f27 | 29 | #include <drm/drm_atomic_helper.h> |
0e32b39c DA |
30 | #include <drm/drm_crtc_helper.h> |
31 | #include <drm/drm_edid.h> | |
32 | ||
33 | static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, | |
5cec258b | 34 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
35 | { |
36 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
37 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
38 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
e75f4771 ACO |
39 | struct drm_atomic_state *state; |
40 | int bpp, i; | |
04a60f9f | 41 | int lane_count, slots; |
7c5f93b0 | 42 | const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode; |
da3ced29 ACO |
43 | struct drm_connector *drm_connector; |
44 | struct intel_connector *connector, *found = NULL; | |
45 | struct drm_connector_state *connector_state; | |
0e32b39c DA |
46 | int mst_pbn; |
47 | ||
48 | pipe_config->dp_encoder_is_mst = true; | |
49 | pipe_config->has_pch_encoder = false; | |
50 | pipe_config->has_dp_encoder = true; | |
51 | bpp = 24; | |
52 | /* | |
53 | * for MST we always configure max link bw - the spec doesn't | |
54 | * seem to suggest we should do otherwise. | |
55 | */ | |
56 | lane_count = drm_dp_max_lane_count(intel_dp->dpcd); | |
ed4e9c1d | 57 | |
ed4e9c1d | 58 | |
90a6b7b0 | 59 | pipe_config->lane_count = lane_count; |
0e32b39c DA |
60 | |
61 | pipe_config->pipe_bpp = 24; | |
04a60f9f | 62 | pipe_config->port_clock = intel_dp_max_link_rate(intel_dp); |
0e32b39c | 63 | |
e75f4771 ACO |
64 | state = pipe_config->base.state; |
65 | ||
da3ced29 ACO |
66 | for_each_connector_in_state(state, drm_connector, connector_state, i) { |
67 | connector = to_intel_connector(drm_connector); | |
e75f4771 | 68 | |
da3ced29 ACO |
69 | if (connector_state->best_encoder == &encoder->base) { |
70 | found = connector; | |
0e32b39c DA |
71 | break; |
72 | } | |
73 | } | |
74 | ||
75 | if (!found) { | |
76 | DRM_ERROR("can't find connector\n"); | |
77 | return false; | |
78 | } | |
79 | ||
aad941d5 | 80 | mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp); |
0e32b39c DA |
81 | |
82 | pipe_config->pbn = mst_pbn; | |
83 | slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn); | |
84 | ||
85 | intel_link_compute_m_n(bpp, lane_count, | |
86 | adjusted_mode->crtc_clock, | |
87 | pipe_config->port_clock, | |
88 | &pipe_config->dp_m_n); | |
89 | ||
90 | pipe_config->dp_m_n.tu = slots; | |
6fa2d197 | 91 | |
0e32b39c DA |
92 | return true; |
93 | ||
94 | } | |
95 | ||
96 | static void intel_mst_disable_dp(struct intel_encoder *encoder) | |
97 | { | |
98 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
99 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
100 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
101 | int ret; | |
102 | ||
103 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
104 | ||
0552f765 | 105 | drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->connector->port); |
0e32b39c DA |
106 | |
107 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
108 | if (ret) { | |
109 | DRM_ERROR("failed to update payload %d\n", ret); | |
110 | } | |
111 | } | |
112 | ||
113 | static void intel_mst_post_disable_dp(struct intel_encoder *encoder) | |
114 | { | |
115 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
116 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
117 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
118 | ||
119 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
120 | ||
121 | /* this can fail */ | |
122 | drm_dp_check_act_status(&intel_dp->mst_mgr); | |
123 | /* and this can also fail */ | |
124 | drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
125 | ||
0552f765 | 126 | drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->connector->port); |
0e32b39c DA |
127 | |
128 | intel_dp->active_mst_links--; | |
0552f765 DA |
129 | |
130 | intel_mst->connector = NULL; | |
0e32b39c DA |
131 | if (intel_dp->active_mst_links == 0) { |
132 | intel_dig_port->base.post_disable(&intel_dig_port->base); | |
133 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); | |
134 | } | |
135 | } | |
136 | ||
137 | static void intel_mst_pre_enable_dp(struct intel_encoder *encoder) | |
138 | { | |
139 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
140 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
141 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
142 | struct drm_device *dev = encoder->base.dev; | |
143 | struct drm_i915_private *dev_priv = dev->dev_private; | |
144 | enum port port = intel_dig_port->port; | |
145 | int ret; | |
146 | uint32_t temp; | |
9b4fd8f2 | 147 | struct intel_connector *found = NULL, *connector; |
0e32b39c DA |
148 | int slots; |
149 | struct drm_crtc *crtc = encoder->base.crtc; | |
150 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | |
151 | ||
9b4fd8f2 ACO |
152 | for_each_intel_connector(dev, connector) { |
153 | if (connector->base.state->best_encoder == &encoder->base) { | |
154 | found = connector; | |
0e32b39c DA |
155 | break; |
156 | } | |
157 | } | |
158 | ||
159 | if (!found) { | |
160 | DRM_ERROR("can't find connector\n"); | |
161 | return; | |
162 | } | |
163 | ||
e85376cb ML |
164 | /* MST encoders are bound to a crtc, not to a connector, |
165 | * force the mapping here for get_hw_state. | |
166 | */ | |
167 | found->encoder = encoder; | |
168 | ||
0e32b39c | 169 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); |
0552f765 DA |
170 | |
171 | intel_mst->connector = found; | |
0e32b39c DA |
172 | |
173 | if (intel_dp->active_mst_links == 0) { | |
6a7e4f99 VS |
174 | intel_prepare_ddi_buffer(&intel_dig_port->base); |
175 | ||
d919161b | 176 | intel_ddi_clk_select(&intel_dig_port->base, intel_crtc->config); |
0e32b39c | 177 | |
901c2daf VS |
178 | intel_dp_set_link_params(intel_dp, intel_crtc->config); |
179 | ||
0e32b39c DA |
180 | intel_ddi_init_dp_buf_reg(&intel_dig_port->base); |
181 | ||
182 | intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); | |
183 | ||
0e32b39c | 184 | intel_dp_start_link_train(intel_dp); |
0e32b39c DA |
185 | intel_dp_stop_link_train(intel_dp); |
186 | } | |
187 | ||
188 | ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr, | |
0552f765 | 189 | intel_mst->connector->port, |
6e3c9717 | 190 | intel_crtc->config->pbn, &slots); |
0e32b39c DA |
191 | if (ret == false) { |
192 | DRM_ERROR("failed to allocate vcpi\n"); | |
193 | return; | |
194 | } | |
195 | ||
196 | ||
197 | intel_dp->active_mst_links++; | |
198 | temp = I915_READ(DP_TP_STATUS(port)); | |
199 | I915_WRITE(DP_TP_STATUS(port), temp); | |
200 | ||
201 | ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr); | |
202 | } | |
203 | ||
204 | static void intel_mst_enable_dp(struct intel_encoder *encoder) | |
205 | { | |
206 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
207 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
208 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
209 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
210 | struct drm_i915_private *dev_priv = dev->dev_private; | |
211 | enum port port = intel_dig_port->port; | |
212 | int ret; | |
213 | ||
214 | DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links); | |
215 | ||
216 | if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT), | |
217 | 1)) | |
218 | DRM_ERROR("Timed out waiting for ACT sent\n"); | |
219 | ||
220 | ret = drm_dp_check_act_status(&intel_dp->mst_mgr); | |
221 | ||
222 | ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr); | |
223 | } | |
224 | ||
225 | static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder, | |
226 | enum pipe *pipe) | |
227 | { | |
228 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
229 | *pipe = intel_mst->pipe; | |
0552f765 | 230 | if (intel_mst->connector) |
0e32b39c DA |
231 | return true; |
232 | return false; | |
233 | } | |
234 | ||
235 | static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder, | |
5cec258b | 236 | struct intel_crtc_state *pipe_config) |
0e32b39c DA |
237 | { |
238 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base); | |
239 | struct intel_digital_port *intel_dig_port = intel_mst->primary; | |
240 | struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); | |
241 | struct drm_device *dev = encoder->base.dev; | |
242 | struct drm_i915_private *dev_priv = dev->dev_private; | |
0cb09a97 | 243 | enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; |
0e32b39c DA |
244 | u32 temp, flags = 0; |
245 | ||
246 | pipe_config->has_dp_encoder = true; | |
247 | ||
248 | temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder)); | |
249 | if (temp & TRANS_DDI_PHSYNC) | |
250 | flags |= DRM_MODE_FLAG_PHSYNC; | |
251 | else | |
252 | flags |= DRM_MODE_FLAG_NHSYNC; | |
253 | if (temp & TRANS_DDI_PVSYNC) | |
254 | flags |= DRM_MODE_FLAG_PVSYNC; | |
255 | else | |
256 | flags |= DRM_MODE_FLAG_NVSYNC; | |
257 | ||
258 | switch (temp & TRANS_DDI_BPC_MASK) { | |
259 | case TRANS_DDI_BPC_6: | |
260 | pipe_config->pipe_bpp = 18; | |
261 | break; | |
262 | case TRANS_DDI_BPC_8: | |
263 | pipe_config->pipe_bpp = 24; | |
264 | break; | |
265 | case TRANS_DDI_BPC_10: | |
266 | pipe_config->pipe_bpp = 30; | |
267 | break; | |
268 | case TRANS_DDI_BPC_12: | |
269 | pipe_config->pipe_bpp = 36; | |
270 | break; | |
271 | default: | |
272 | break; | |
273 | } | |
2d112de7 | 274 | pipe_config->base.adjusted_mode.flags |= flags; |
90a6b7b0 VS |
275 | |
276 | pipe_config->lane_count = | |
277 | ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1; | |
278 | ||
0e32b39c DA |
279 | intel_dp_get_m_n(crtc, pipe_config); |
280 | ||
281 | intel_ddi_clock_get(&intel_dig_port->base, pipe_config); | |
282 | } | |
283 | ||
284 | static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector) | |
285 | { | |
286 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
287 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
288 | struct edid *edid; | |
289 | int ret; | |
290 | ||
0552f765 DA |
291 | if (!intel_dp) { |
292 | return intel_connector_update_modes(connector, NULL); | |
293 | } | |
0e32b39c | 294 | |
0552f765 | 295 | edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port); |
0e32b39c DA |
296 | ret = intel_connector_update_modes(connector, edid); |
297 | kfree(edid); | |
298 | ||
299 | return ret; | |
300 | } | |
301 | ||
302 | static enum drm_connector_status | |
f7f3d48a | 303 | intel_dp_mst_detect(struct drm_connector *connector, bool force) |
0e32b39c DA |
304 | { |
305 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
306 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
307 | ||
0552f765 DA |
308 | if (!intel_dp) |
309 | return connector_status_disconnected; | |
c6a0aed4 | 310 | return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port); |
0e32b39c DA |
311 | } |
312 | ||
0e32b39c DA |
313 | static int |
314 | intel_dp_mst_set_property(struct drm_connector *connector, | |
315 | struct drm_property *property, | |
316 | uint64_t val) | |
317 | { | |
318 | return 0; | |
319 | } | |
320 | ||
321 | static void | |
322 | intel_dp_mst_connector_destroy(struct drm_connector *connector) | |
323 | { | |
324 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
325 | ||
326 | if (!IS_ERR_OR_NULL(intel_connector->edid)) | |
327 | kfree(intel_connector->edid); | |
328 | ||
329 | drm_connector_cleanup(connector); | |
330 | kfree(connector); | |
331 | } | |
332 | ||
333 | static const struct drm_connector_funcs intel_dp_mst_connector_funcs = { | |
4d688a2a | 334 | .dpms = drm_atomic_helper_connector_dpms, |
0e32b39c DA |
335 | .detect = intel_dp_mst_detect, |
336 | .fill_modes = drm_helper_probe_single_connector_modes, | |
337 | .set_property = intel_dp_mst_set_property, | |
2545e4a6 | 338 | .atomic_get_property = intel_connector_atomic_get_property, |
c191eca1 | 339 | .early_unregister = intel_connector_unregister, |
0e32b39c | 340 | .destroy = intel_dp_mst_connector_destroy, |
c6f95f27 | 341 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
98969725 | 342 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, |
0e32b39c DA |
343 | }; |
344 | ||
345 | static int intel_dp_mst_get_modes(struct drm_connector *connector) | |
346 | { | |
347 | return intel_dp_mst_get_ddc_modes(connector); | |
348 | } | |
349 | ||
350 | static enum drm_mode_status | |
351 | intel_dp_mst_mode_valid(struct drm_connector *connector, | |
352 | struct drm_display_mode *mode) | |
353 | { | |
832d5bfd MK |
354 | int max_dotclk = to_i915(connector->dev)->max_dotclk_freq; |
355 | ||
0e32b39c DA |
356 | /* TODO - validate mode against available PBN for link */ |
357 | if (mode->clock < 10000) | |
358 | return MODE_CLOCK_LOW; | |
359 | ||
360 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) | |
361 | return MODE_H_ILLEGAL; | |
362 | ||
832d5bfd MK |
363 | if (mode->clock > max_dotclk) |
364 | return MODE_CLOCK_HIGH; | |
365 | ||
0e32b39c DA |
366 | return MODE_OK; |
367 | } | |
368 | ||
459485ad DV |
369 | static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector, |
370 | struct drm_connector_state *state) | |
371 | { | |
372 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
373 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
374 | struct intel_crtc *crtc = to_intel_crtc(state->crtc); | |
375 | ||
0552f765 DA |
376 | if (!intel_dp) |
377 | return NULL; | |
459485ad DV |
378 | return &intel_dp->mst_encoders[crtc->pipe]->base.base; |
379 | } | |
380 | ||
0e32b39c DA |
381 | static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector) |
382 | { | |
383 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
384 | struct intel_dp *intel_dp = intel_connector->mst_port; | |
0552f765 DA |
385 | if (!intel_dp) |
386 | return NULL; | |
0e32b39c DA |
387 | return &intel_dp->mst_encoders[0]->base.base; |
388 | } | |
389 | ||
390 | static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = { | |
391 | .get_modes = intel_dp_mst_get_modes, | |
392 | .mode_valid = intel_dp_mst_mode_valid, | |
459485ad | 393 | .atomic_best_encoder = intel_mst_atomic_best_encoder, |
0e32b39c DA |
394 | .best_encoder = intel_mst_best_encoder, |
395 | }; | |
396 | ||
397 | static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder) | |
398 | { | |
399 | struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); | |
400 | ||
401 | drm_encoder_cleanup(encoder); | |
402 | kfree(intel_mst); | |
403 | } | |
404 | ||
405 | static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = { | |
406 | .destroy = intel_dp_mst_encoder_destroy, | |
407 | }; | |
408 | ||
409 | static bool intel_dp_mst_get_hw_state(struct intel_connector *connector) | |
410 | { | |
e85376cb | 411 | if (connector->encoder && connector->base.state->crtc) { |
0e32b39c DA |
412 | enum pipe pipe; |
413 | if (!connector->encoder->get_hw_state(connector->encoder, &pipe)) | |
414 | return false; | |
415 | return true; | |
416 | } | |
417 | return false; | |
418 | } | |
419 | ||
7296c849 CW |
420 | static void intel_connector_add_to_fbdev(struct intel_connector *connector) |
421 | { | |
0695726e | 422 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
7296c849 | 423 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
54632abe LW |
424 | |
425 | if (dev_priv->fbdev) | |
426 | drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, | |
427 | &connector->base); | |
7296c849 CW |
428 | #endif |
429 | } | |
430 | ||
431 | static void intel_connector_remove_from_fbdev(struct intel_connector *connector) | |
432 | { | |
0695726e | 433 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
7296c849 | 434 | struct drm_i915_private *dev_priv = to_i915(connector->base.dev); |
54632abe LW |
435 | |
436 | if (dev_priv->fbdev) | |
437 | drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, | |
438 | &connector->base); | |
7296c849 CW |
439 | #endif |
440 | } | |
441 | ||
12e6cecd | 442 | static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) |
0e32b39c DA |
443 | { |
444 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
445 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
446 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
0e32b39c DA |
447 | struct intel_connector *intel_connector; |
448 | struct drm_connector *connector; | |
449 | int i; | |
450 | ||
9bdbd0b9 | 451 | intel_connector = intel_connector_alloc(); |
0e32b39c DA |
452 | if (!intel_connector) |
453 | return NULL; | |
454 | ||
455 | connector = &intel_connector->base; | |
456 | drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort); | |
457 | drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs); | |
458 | ||
0e32b39c DA |
459 | intel_connector->get_hw_state = intel_dp_mst_get_hw_state; |
460 | intel_connector->mst_port = intel_dp; | |
461 | intel_connector->port = port; | |
462 | ||
463 | for (i = PIPE_A; i <= PIPE_C; i++) { | |
464 | drm_mode_connector_attach_encoder(&intel_connector->base, | |
465 | &intel_dp->mst_encoders[i]->base.base); | |
466 | } | |
467 | intel_dp_add_properties(intel_dp, connector); | |
468 | ||
469 | drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0); | |
6f134d7b DA |
470 | drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0); |
471 | ||
0e32b39c | 472 | drm_mode_connector_set_path_property(connector, pathprop); |
d9515c5e DA |
473 | return connector; |
474 | } | |
475 | ||
476 | static void intel_dp_register_mst_connector(struct drm_connector *connector) | |
477 | { | |
478 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
479 | struct drm_device *dev = connector->dev; | |
7a418e34 | 480 | |
8bb4da1d | 481 | drm_modeset_lock_all(dev); |
7296c849 | 482 | intel_connector_add_to_fbdev(intel_connector); |
8bb4da1d | 483 | drm_modeset_unlock_all(dev); |
7a418e34 | 484 | |
0e32b39c | 485 | drm_connector_register(&intel_connector->base); |
0e32b39c DA |
486 | } |
487 | ||
488 | static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, | |
489 | struct drm_connector *connector) | |
490 | { | |
491 | struct intel_connector *intel_connector = to_intel_connector(connector); | |
492 | struct drm_device *dev = connector->dev; | |
20fae983 | 493 | |
c191eca1 | 494 | drm_connector_unregister(connector); |
1f771755 | 495 | |
0e32b39c | 496 | /* need to nuke the connector */ |
8bb4da1d | 497 | drm_modeset_lock_all(dev); |
7296c849 | 498 | intel_connector_remove_from_fbdev(intel_connector); |
0552f765 | 499 | intel_connector->mst_port = NULL; |
8bb4da1d | 500 | drm_modeset_unlock_all(dev); |
0e32b39c | 501 | |
0552f765 | 502 | drm_connector_unreference(&intel_connector->base); |
0e32b39c DA |
503 | DRM_DEBUG_KMS("\n"); |
504 | } | |
505 | ||
506 | static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) | |
507 | { | |
508 | struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr); | |
509 | struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
510 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
511 | ||
512 | drm_kms_helper_hotplug_event(dev); | |
513 | } | |
514 | ||
69a0f89c | 515 | static const struct drm_dp_mst_topology_cbs mst_cbs = { |
0e32b39c | 516 | .add_connector = intel_dp_add_mst_connector, |
d9515c5e | 517 | .register_connector = intel_dp_register_mst_connector, |
0e32b39c DA |
518 | .destroy_connector = intel_dp_destroy_mst_connector, |
519 | .hotplug = intel_dp_mst_hotplug, | |
520 | }; | |
521 | ||
522 | static struct intel_dp_mst_encoder * | |
523 | intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe) | |
524 | { | |
525 | struct intel_dp_mst_encoder *intel_mst; | |
526 | struct intel_encoder *intel_encoder; | |
527 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
528 | ||
529 | intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL); | |
530 | ||
531 | if (!intel_mst) | |
532 | return NULL; | |
533 | ||
534 | intel_mst->pipe = pipe; | |
535 | intel_encoder = &intel_mst->base; | |
536 | intel_mst->primary = intel_dig_port; | |
537 | ||
538 | drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs, | |
580d8ed5 | 539 | DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe)); |
0e32b39c DA |
540 | |
541 | intel_encoder->type = INTEL_OUTPUT_DP_MST; | |
542 | intel_encoder->crtc_mask = 0x7; | |
543 | intel_encoder->cloneable = 0; | |
544 | ||
545 | intel_encoder->compute_config = intel_dp_mst_compute_config; | |
546 | intel_encoder->disable = intel_mst_disable_dp; | |
547 | intel_encoder->post_disable = intel_mst_post_disable_dp; | |
548 | intel_encoder->pre_enable = intel_mst_pre_enable_dp; | |
549 | intel_encoder->enable = intel_mst_enable_dp; | |
550 | intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state; | |
551 | intel_encoder->get_config = intel_dp_mst_enc_get_config; | |
552 | ||
553 | return intel_mst; | |
554 | ||
555 | } | |
556 | ||
557 | static bool | |
558 | intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port) | |
559 | { | |
560 | int i; | |
561 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
562 | ||
563 | for (i = PIPE_A; i <= PIPE_C; i++) | |
564 | intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i); | |
565 | return true; | |
566 | } | |
567 | ||
568 | int | |
569 | intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id) | |
570 | { | |
571 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
572 | struct drm_device *dev = intel_dig_port->base.base.dev; | |
573 | int ret; | |
574 | ||
575 | intel_dp->can_mst = true; | |
576 | intel_dp->mst_mgr.cbs = &mst_cbs; | |
577 | ||
578 | /* create encoders */ | |
579 | intel_dp_create_fake_mst_encoders(intel_dig_port); | |
580 | ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id); | |
581 | if (ret) { | |
582 | intel_dp->can_mst = false; | |
583 | return ret; | |
584 | } | |
585 | return 0; | |
586 | } | |
587 | ||
588 | void | |
589 | intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port) | |
590 | { | |
591 | struct intel_dp *intel_dp = &intel_dig_port->dp; | |
592 | ||
593 | if (!intel_dp->can_mst) | |
594 | return; | |
595 | ||
596 | drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr); | |
597 | /* encoders will get killed by normal cleanup */ | |
598 | } |