Merge branch 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-block.git] / drivers / gpu / drm / i915 / intel_bios.c
CommitLineData
79e53945 1/*
39507259 2 * Copyright © 2006 Intel Corporation
79e53945
JB
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
b30581a4 27
9f0e7ff4 28#include <drm/drm_dp_helper.h>
760285e7
DH
29#include <drm/drmP.h>
30#include <drm/i915_drm.h>
79e53945 31#include "i915_drv.h"
72341af4
JN
32
33#define _INTEL_BIOS_PRIVATE
34#include "intel_vbt_defs.h"
79e53945 35
dd97950a
JN
36/**
37 * DOC: Video BIOS Table (VBT)
38 *
39 * The Video BIOS Table, or VBT, provides platform and board specific
40 * configuration information to the driver that is not discoverable or available
41 * through other means. The configuration is mostly related to display
42 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
43 * the PCI ROM.
44 *
45 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
46 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
47 * contain the actual configuration information. The VBT Header, and thus the
48 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
49 * BDB Header. The data blocks are concatenated after the BDB Header. The data
50 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
51 * data. (Block 53, the MIPI Sequence Block is an exception.)
52 *
53 * The driver parses the VBT during load. The relevant information is stored in
54 * driver private data for ease of use, and the actual VBT is not read after
55 * that.
56 */
57
9b9d172d 58#define SLAVE_ADDR1 0x70
59#define SLAVE_ADDR2 0x72
79e53945 60
08c0888b
JN
61/* Get BDB block size given a pointer to Block ID. */
62static u32 _get_blocksize(const u8 *block_base)
63{
64 /* The MIPI Sequence Block v3+ has a separate size field. */
65 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
66 return *((const u32 *)(block_base + 4));
67 else
68 return *((const u16 *)(block_base + 1));
69}
70
71/* Get BDB block size give a pointer to data after Block ID and Block Size. */
72static u32 get_blocksize(const void *block_data)
73{
74 return _get_blocksize(block_data - 3);
75}
76
e8ef3b4c
JN
77static const void *
78find_section(const void *_bdb, int section_id)
79e53945 79{
e8ef3b4c
JN
80 const struct bdb_header *bdb = _bdb;
81 const u8 *base = _bdb;
79e53945 82 int index = 0;
cd67d226 83 u32 total, current_size;
79e53945
JB
84 u8 current_id;
85
86 /* skip to first section */
87 index += bdb->header_size;
88 total = bdb->bdb_size;
89
90 /* walk the sections looking for section_id */
d1f13fd2 91 while (index + 3 < total) {
79e53945 92 current_id = *(base + index);
08c0888b
JN
93 current_size = _get_blocksize(base + index);
94 index += 3;
cd67d226 95
d1f13fd2
CW
96 if (index + current_size > total)
97 return NULL;
98
79e53945
JB
99 if (current_id == section_id)
100 return base + index;
d1f13fd2 101
79e53945
JB
102 index += current_size;
103 }
104
105 return NULL;
106}
107
79e53945 108static void
88631706 109fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
99834ea4 110 const struct lvds_dvo_timing *dvo_timing)
88631706
ML
111{
112 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
113 dvo_timing->hactive_lo;
114 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
115 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
116 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
117 dvo_timing->hsync_pulse_width;
118 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
119 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
120
121 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
122 dvo_timing->vactive_lo;
123 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
124 dvo_timing->vsync_off;
125 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
126 dvo_timing->vsync_pulse_width;
127 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
128 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
129 panel_fixed_mode->clock = dvo_timing->clock * 10;
130 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
131
9bc35499
AJ
132 if (dvo_timing->hsync_positive)
133 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
134 else
135 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
136
137 if (dvo_timing->vsync_positive)
138 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
139 else
140 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
141
356d27bb
VS
142 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
143 dvo_timing->himage_lo;
144 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
145 dvo_timing->vimage_lo;
146
88631706
ML
147 /* Some VBTs have bogus h/vtotal values */
148 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
149 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
150 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
151 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
152
153 drm_mode_set_name(panel_fixed_mode);
154}
155
99834ea4
CW
156static const struct lvds_dvo_timing *
157get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
158 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
159 int index)
160{
161 /*
162 * the size of fp_timing varies on the different platform.
163 * So calculate the DVO timing relative offset in LVDS data
164 * entry to get the DVO timing entry
165 */
166
167 int lfp_data_size =
168 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
169 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
170 int dvo_timing_offset =
171 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
172 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
173 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
174
175 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
176}
177
b0354385
TI
178/* get lvds_fp_timing entry
179 * this function may return NULL if the corresponding entry is invalid
180 */
181static const struct lvds_fp_timing *
182get_lvds_fp_timing(const struct bdb_header *bdb,
183 const struct bdb_lvds_lfp_data *data,
184 const struct bdb_lvds_lfp_data_ptrs *ptrs,
185 int index)
186{
187 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
188 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
189 size_t ofs;
190
191 if (index >= ARRAY_SIZE(ptrs->ptr))
192 return NULL;
193 ofs = ptrs->ptr[index].fp_timing_offset;
194 if (ofs < data_ofs ||
195 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
196 return NULL;
197 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
198}
199
88631706
ML
200/* Try to find integrated panel data */
201static void
202parse_lfp_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 203 const struct bdb_header *bdb)
79e53945 204{
99834ea4
CW
205 const struct bdb_lvds_options *lvds_options;
206 const struct bdb_lvds_lfp_data *lvds_lfp_data;
207 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
208 const struct lvds_dvo_timing *panel_dvo_timing;
b0354385 209 const struct lvds_fp_timing *fp_timing;
79e53945 210 struct drm_display_mode *panel_fixed_mode;
3e845c7a 211 int panel_type;
c329a4ec 212 int drrs_mode;
a0562819 213 int ret;
79e53945 214
79e53945
JB
215 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
216 if (!lvds_options)
217 return;
218
41aa3448 219 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
a0562819
VS
220
221 ret = intel_opregion_get_panel_type(dev_priv->dev);
222 if (ret >= 0) {
223 WARN_ON(ret > 0xf);
224 panel_type = ret;
225 DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type);
226 } else {
227 if (lvds_options->panel_type > 0xf) {
228 DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n",
229 lvds_options->panel_type);
230 return;
231 }
232 panel_type = lvds_options->panel_type;
233 DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type);
eeeebea6 234 }
6a04002b 235
3e845c7a 236 dev_priv->vbt.panel_type = panel_type;
79e53945 237
83a7280e
PB
238 drrs_mode = (lvds_options->dps_panel_type_bits
239 >> (panel_type * 2)) & MODE_MASK;
240 /*
241 * VBT has static DRRS = 0 and seamless DRRS = 2.
242 * The below piece of code is required to adjust vbt.drrs_type
243 * to match the enum drrs_support_type.
244 */
245 switch (drrs_mode) {
246 case 0:
247 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
248 DRM_DEBUG_KMS("DRRS supported mode is static\n");
249 break;
250 case 2:
251 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
252 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
253 break;
254 default:
255 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
256 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
257 break;
258 }
259
79e53945
JB
260 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
261 if (!lvds_lfp_data)
262 return;
263
1b16de0b
JB
264 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
265 if (!lvds_lfp_data_ptrs)
266 return;
267
41aa3448 268 dev_priv->vbt.lvds_vbt = 1;
79e53945 269
99834ea4
CW
270 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
271 lvds_lfp_data_ptrs,
3e845c7a 272 panel_type);
79e53945 273
9a298b2a 274 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
6edc3242
CW
275 if (!panel_fixed_mode)
276 return;
79e53945 277
99834ea4 278 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
79e53945 279
41aa3448 280 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
79e53945 281
28c97730 282 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
88631706 283 drm_mode_debug_printmodeline(panel_fixed_mode);
37df9673 284
b0354385
TI
285 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
286 lvds_lfp_data_ptrs,
3e845c7a 287 panel_type);
b0354385
TI
288 if (fp_timing) {
289 /* check the resolution, just to be sure */
290 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
291 fp_timing->y_res == panel_fixed_mode->vdisplay) {
41aa3448 292 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
b0354385 293 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
41aa3448 294 dev_priv->vbt.bios_lvds_val);
b0354385
TI
295 }
296 }
88631706
ML
297}
298
f00076d2 299static void
dcb58a40
JN
300parse_lfp_backlight(struct drm_i915_private *dev_priv,
301 const struct bdb_header *bdb)
f00076d2
JN
302{
303 const struct bdb_lfp_backlight_data *backlight_data;
304 const struct bdb_lfp_backlight_data_entry *entry;
3e845c7a 305 int panel_type = dev_priv->vbt.panel_type;
f00076d2
JN
306
307 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
308 if (!backlight_data)
309 return;
310
311 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
312 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
313 backlight_data->entry_size);
314 return;
315 }
316
317 entry = &backlight_data->data[panel_type];
318
39fbc9c8
JN
319 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
320 if (!dev_priv->vbt.backlight.present) {
321 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
322 entry->type);
323 return;
324 }
325
f00076d2
JN
326 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
327 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
1de6068e 328 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
f00076d2
JN
329 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
330 "active %s, min brightness %u, level %u\n",
331 dev_priv->vbt.backlight.pwm_freq_hz,
332 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
1de6068e 333 dev_priv->vbt.backlight.min_brightness,
f00076d2
JN
334 backlight_data->level[panel_type]);
335}
336
88631706
ML
337/* Try to find sdvo panel data */
338static void
339parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
dcb58a40 340 const struct bdb_header *bdb)
88631706 341{
e8ef3b4c 342 const struct lvds_dvo_timing *dvo_timing;
88631706 343 struct drm_display_mode *panel_fixed_mode;
5a1e5b6c 344 int index;
79e53945 345
d330a953 346 index = i915.vbt_sdvo_panel_type;
c10e408a
MF
347 if (index == -2) {
348 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
349 return;
350 }
351
5a1e5b6c 352 if (index == -1) {
e8ef3b4c 353 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
5a1e5b6c
CW
354
355 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
356 if (!sdvo_lvds_options)
357 return;
358
359 index = sdvo_lvds_options->panel_type;
360 }
88631706
ML
361
362 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
363 if (!dvo_timing)
364 return;
365
9a298b2a 366 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
88631706
ML
367 if (!panel_fixed_mode)
368 return;
369
5a1e5b6c 370 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
88631706 371
41aa3448 372 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
79e53945 373
5a1e5b6c
CW
374 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
375 drm_mode_debug_printmodeline(panel_fixed_mode);
79e53945
JB
376}
377
98f3a1dc 378static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
9a4114ff
BF
379 bool alternate)
380{
98f3a1dc 381 switch (INTEL_INFO(dev_priv)->gen) {
9a4114ff 382 case 2:
e91e941b 383 return alternate ? 66667 : 48000;
9a4114ff
BF
384 case 3:
385 case 4:
e91e941b 386 return alternate ? 100000 : 96000;
9a4114ff 387 default:
e91e941b 388 return alternate ? 100000 : 120000;
9a4114ff
BF
389 }
390}
391
79e53945
JB
392static void
393parse_general_features(struct drm_i915_private *dev_priv,
dcb58a40 394 const struct bdb_header *bdb)
79e53945 395{
e8ef3b4c 396 const struct bdb_general_features *general;
79e53945 397
79e53945 398 general = find_section(bdb, BDB_GENERAL_FEATURES);
34957e8c
JN
399 if (!general)
400 return;
401
402 dev_priv->vbt.int_tv_support = general->int_tv_support;
403 /* int_crt_support can't be trusted on earlier platforms */
404 if (bdb->version >= 155 &&
405 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
406 dev_priv->vbt.int_crt_support = general->int_crt_support;
407 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
408 dev_priv->vbt.lvds_ssc_freq =
409 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
410 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
411 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
412 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
413 dev_priv->vbt.int_tv_support,
414 dev_priv->vbt.int_crt_support,
415 dev_priv->vbt.lvds_use_ssc,
416 dev_priv->vbt.lvds_ssc_freq,
417 dev_priv->vbt.display_clock_mode,
418 dev_priv->vbt.fdi_rx_polarity_inverted);
79e53945
JB
419}
420
db545019
DMEA
421static void
422parse_general_definitions(struct drm_i915_private *dev_priv,
dcb58a40 423 const struct bdb_header *bdb)
db545019 424{
e8ef3b4c 425 const struct bdb_general_definitions *general;
db545019 426
db545019
DMEA
427 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
428 if (general) {
429 u16 block_size = get_blocksize(general);
430 if (block_size >= sizeof(*general)) {
431 int bus_pin = general->crt_ddc_gmbus_pin;
28c97730 432 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
88ac7939 433 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
41aa3448 434 dev_priv->vbt.crt_ddc_pin = bus_pin;
db545019 435 } else {
28c97730 436 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
3bd7d909 437 block_size);
db545019
DMEA
438 }
439 }
440}
441
e8ef3b4c
JN
442static const union child_device_config *
443child_device_ptr(const struct bdb_general_definitions *p_defs, int i)
90e4f159 444{
e8ef3b4c 445 return (const void *) &p_defs->devices[i * p_defs->child_dev_size];
90e4f159
VS
446}
447
9b9d172d 448static void
449parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 450 const struct bdb_header *bdb)
9b9d172d 451{
452 struct sdvo_device_mapping *p_mapping;
e8ef3b4c 453 const struct bdb_general_definitions *p_defs;
6cc38aca 454 const struct old_child_dev_config *child; /* legacy */
9b9d172d 455 int i, child_device_num, count;
db545019 456 u16 block_size;
9b9d172d 457
458 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
459 if (!p_defs) {
44834a67 460 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
9b9d172d 461 return;
462 }
6cc38aca
JN
463
464 /*
465 * Only parse SDVO mappings when the general definitions block child
466 * device size matches that of the *legacy* child device config
467 * struct. Thus, SDVO mapping will be skipped for newer VBT.
9b9d172d 468 */
6cc38aca
JN
469 if (p_defs->child_dev_size != sizeof(*child)) {
470 DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n");
9b9d172d 471 return;
472 }
473 /* get the block size of general definitions */
db545019 474 block_size = get_blocksize(p_defs);
9b9d172d 475 /* get the number of child device */
476 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 477 p_defs->child_dev_size;
9b9d172d 478 count = 0;
479 for (i = 0; i < child_device_num; i++) {
6cc38aca
JN
480 child = &child_device_ptr(p_defs, i)->old;
481 if (!child->device_type) {
9b9d172d 482 /* skip the device block if device type is invalid */
483 continue;
484 }
6cc38aca
JN
485 if (child->slave_addr != SLAVE_ADDR1 &&
486 child->slave_addr != SLAVE_ADDR2) {
9b9d172d 487 /*
488 * If the slave address is neither 0x70 nor 0x72,
489 * it is not a SDVO device. Skip it.
490 */
491 continue;
492 }
6cc38aca
JN
493 if (child->dvo_port != DEVICE_PORT_DVOB &&
494 child->dvo_port != DEVICE_PORT_DVOC) {
9b9d172d 495 /* skip the incorrect SDVO port */
0206e353 496 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
9b9d172d 497 continue;
498 }
28c97730 499 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
6cc38aca
JN
500 " %s port\n",
501 child->slave_addr,
502 (child->dvo_port == DEVICE_PORT_DVOB) ?
503 "SDVOB" : "SDVOC");
9d6c875d 504 p_mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
9b9d172d 505 if (!p_mapping->initialized) {
6cc38aca
JN
506 p_mapping->dvo_port = child->dvo_port;
507 p_mapping->slave_addr = child->slave_addr;
508 p_mapping->dvo_wiring = child->dvo_wiring;
509 p_mapping->ddc_pin = child->ddc_pin;
510 p_mapping->i2c_pin = child->i2c_pin;
9b9d172d 511 p_mapping->initialized = 1;
46eb3036 512 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
e957d772
CW
513 p_mapping->dvo_port,
514 p_mapping->slave_addr,
515 p_mapping->dvo_wiring,
516 p_mapping->ddc_pin,
46eb3036 517 p_mapping->i2c_pin);
9b9d172d 518 } else {
28c97730 519 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
9b9d172d 520 "two SDVO device.\n");
521 }
6cc38aca 522 if (child->slave2_addr) {
9b9d172d 523 /* Maybe this is a SDVO device with multiple inputs */
524 /* And the mapping info is not added */
28c97730
ZY
525 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
526 " is a SDVO device with multiple inputs.\n");
9b9d172d 527 }
528 count++;
529 }
530
531 if (!count) {
532 /* No SDVO device info is found */
28c97730 533 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
9b9d172d 534 }
535 return;
536}
32f9d658
ZW
537
538static void
539parse_driver_features(struct drm_i915_private *dev_priv,
dcb58a40 540 const struct bdb_header *bdb)
32f9d658 541{
e8ef3b4c 542 const struct bdb_driver_features *driver;
32f9d658 543
32f9d658 544 driver = find_section(bdb, BDB_DRIVER_FEATURES);
652c393a
JB
545 if (!driver)
546 return;
547
6fca55b1 548 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
6aa23e65 549 dev_priv->vbt.edp.support = 1;
652c393a 550
83a7280e
PB
551 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
552 /*
553 * If DRRS is not supported, drrs_type has to be set to 0.
554 * This is because, VBT is configured in such a way that
555 * static DRRS is 0 and DRRS not supported is represented by
556 * driver->drrs_enabled=false
557 */
558 if (!driver->drrs_enabled)
559 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
32f9d658
ZW
560}
561
500a8cc4 562static void
dcb58a40 563parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
500a8cc4 564{
e8ef3b4c
JN
565 const struct bdb_edp *edp;
566 const struct edp_power_seq *edp_pps;
567 const struct edp_link_params *edp_link_params;
3e845c7a 568 int panel_type = dev_priv->vbt.panel_type;
500a8cc4
ZW
569
570 edp = find_section(bdb, BDB_EDP);
571 if (!edp) {
6aa23e65 572 if (dev_priv->vbt.edp.support)
9a30a61f 573 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
500a8cc4
ZW
574 return;
575 }
576
577 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
578 case EDP_18BPP:
6aa23e65 579 dev_priv->vbt.edp.bpp = 18;
500a8cc4
ZW
580 break;
581 case EDP_24BPP:
6aa23e65 582 dev_priv->vbt.edp.bpp = 24;
500a8cc4
ZW
583 break;
584 case EDP_30BPP:
6aa23e65 585 dev_priv->vbt.edp.bpp = 30;
500a8cc4
ZW
586 break;
587 }
5ceb0f9b 588
9f0e7ff4
JB
589 /* Get the eDP sequencing and link info */
590 edp_pps = &edp->power_seqs[panel_type];
591 edp_link_params = &edp->link_params[panel_type];
5ceb0f9b 592
6aa23e65 593 dev_priv->vbt.edp.pps = *edp_pps;
5ceb0f9b 594
e13e2b2c
JN
595 switch (edp_link_params->rate) {
596 case EDP_RATE_1_62:
6aa23e65 597 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
e13e2b2c
JN
598 break;
599 case EDP_RATE_2_7:
6aa23e65 600 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
e13e2b2c
JN
601 break;
602 default:
603 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
604 edp_link_params->rate);
605 break;
606 }
607
9f0e7ff4 608 switch (edp_link_params->lanes) {
e13e2b2c 609 case EDP_LANE_1:
6aa23e65 610 dev_priv->vbt.edp.lanes = 1;
9f0e7ff4 611 break;
e13e2b2c 612 case EDP_LANE_2:
6aa23e65 613 dev_priv->vbt.edp.lanes = 2;
9f0e7ff4 614 break;
e13e2b2c 615 case EDP_LANE_4:
6aa23e65 616 dev_priv->vbt.edp.lanes = 4;
9f0e7ff4 617 break;
e13e2b2c
JN
618 default:
619 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
620 edp_link_params->lanes);
621 break;
9f0e7ff4 622 }
e13e2b2c 623
9f0e7ff4 624 switch (edp_link_params->preemphasis) {
e13e2b2c 625 case EDP_PREEMPHASIS_NONE:
6aa23e65 626 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
9f0e7ff4 627 break;
e13e2b2c 628 case EDP_PREEMPHASIS_3_5dB:
6aa23e65 629 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
9f0e7ff4 630 break;
e13e2b2c 631 case EDP_PREEMPHASIS_6dB:
6aa23e65 632 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
9f0e7ff4 633 break;
e13e2b2c 634 case EDP_PREEMPHASIS_9_5dB:
6aa23e65 635 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
9f0e7ff4 636 break;
e13e2b2c
JN
637 default:
638 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
639 edp_link_params->preemphasis);
640 break;
9f0e7ff4 641 }
e13e2b2c 642
9f0e7ff4 643 switch (edp_link_params->vswing) {
e13e2b2c 644 case EDP_VSWING_0_4V:
6aa23e65 645 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
9f0e7ff4 646 break;
e13e2b2c 647 case EDP_VSWING_0_6V:
6aa23e65 648 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
9f0e7ff4 649 break;
e13e2b2c 650 case EDP_VSWING_0_8V:
6aa23e65 651 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
9f0e7ff4 652 break;
e13e2b2c 653 case EDP_VSWING_1_2V:
6aa23e65 654 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
9f0e7ff4 655 break;
e13e2b2c
JN
656 default:
657 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
658 edp_link_params->vswing);
659 break;
9f0e7ff4 660 }
9a57f5bb
SJ
661
662 if (bdb->version >= 173) {
663 uint8_t vswing;
664
9e458034
SJ
665 /* Don't read from VBT if module parameter has valid value*/
666 if (i915.edp_vswing) {
06411f08 667 dev_priv->vbt.edp.low_vswing = i915.edp_vswing == 1;
9e458034
SJ
668 } else {
669 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
06411f08 670 dev_priv->vbt.edp.low_vswing = vswing == 0;
9e458034 671 }
9a57f5bb 672 }
500a8cc4
ZW
673}
674
bfd7ebda 675static void
dcb58a40 676parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
bfd7ebda 677{
e8ef3b4c
JN
678 const struct bdb_psr *psr;
679 const struct psr_table *psr_table;
3e845c7a 680 int panel_type = dev_priv->vbt.panel_type;
bfd7ebda
RV
681
682 psr = find_section(bdb, BDB_PSR);
683 if (!psr) {
684 DRM_DEBUG_KMS("No PSR BDB found.\n");
685 return;
686 }
687
688 psr_table = &psr->psr_table[panel_type];
689
690 dev_priv->vbt.psr.full_link = psr_table->full_link;
691 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
692
693 /* Allowed VBT values goes from 0 to 15 */
694 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
695 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
696
697 switch (psr_table->lines_to_wait) {
698 case 0:
699 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
700 break;
701 case 1:
702 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
703 break;
704 case 2:
705 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
706 break;
707 case 3:
708 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
709 break;
710 default:
711 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
712 psr_table->lines_to_wait);
713 break;
714 }
715
716 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
717 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
718}
719
d17c5443 720static void
0f8689f5
JN
721parse_mipi_config(struct drm_i915_private *dev_priv,
722 const struct bdb_header *bdb)
d17c5443 723{
e8ef3b4c 724 const struct bdb_mipi_config *start;
e8ef3b4c
JN
725 const struct mipi_config *config;
726 const struct mipi_pps_data *pps;
3e845c7a 727 int panel_type = dev_priv->vbt.panel_type;
d3b542fc 728
3e6bd011 729 /* parse MIPI blocks only if LFP type is MIPI */
7caaef33 730 if (!intel_bios_is_dsi_present(dev_priv, NULL))
3e6bd011
SK
731 return;
732
d3b542fc
SK
733 /* Initialize this to undefined indicating no generic MIPI support */
734 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
735
736 /* Block #40 is already parsed and panel_fixed_mode is
737 * stored in dev_priv->lfp_lvds_vbt_mode
738 * resuse this when needed
739 */
d17c5443 740
d3b542fc
SK
741 /* Parse #52 for panel index used from panel_type already
742 * parsed
743 */
744 start = find_section(bdb, BDB_MIPI_CONFIG);
745 if (!start) {
746 DRM_DEBUG_KMS("No MIPI config BDB found");
d17c5443
SK
747 return;
748 }
749
d3b542fc
SK
750 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
751 panel_type);
752
753 /*
754 * get hold of the correct configuration block and pps data as per
755 * the panel_type as index
756 */
757 config = &start->config[panel_type];
758 pps = &start->pps[panel_type];
759
760 /* store as of now full data. Trim when we realise all is not needed */
761 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
762 if (!dev_priv->vbt.dsi.config)
763 return;
764
765 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
766 if (!dev_priv->vbt.dsi.pps) {
767 kfree(dev_priv->vbt.dsi.config);
768 return;
769 }
770
771 /* We have mandatory mipi config blocks. Initialize as generic panel */
ea9a6baf 772 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
0f8689f5
JN
773}
774
5db72099
JN
775/* Find the sequence block and size for the given panel. */
776static const u8 *
777find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
2a33d934 778 u16 panel_id, u32 *seq_size)
5db72099
JN
779{
780 u32 total = get_blocksize(sequence);
781 const u8 *data = &sequence->data[0];
782 u8 current_id;
2a33d934
JN
783 u32 current_size;
784 int header_size = sequence->version >= 3 ? 5 : 3;
5db72099
JN
785 int index = 0;
786 int i;
787
2a33d934
JN
788 /* skip new block size */
789 if (sequence->version >= 3)
790 data += 4;
791
792 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
793 if (index + header_size > total) {
794 DRM_ERROR("Invalid sequence block (header)\n");
795 return NULL;
796 }
797
5db72099 798 current_id = *(data + index);
2a33d934
JN
799 if (sequence->version >= 3)
800 current_size = *((const u32 *)(data + index + 1));
801 else
802 current_size = *((const u16 *)(data + index + 1));
5db72099 803
2a33d934 804 index += header_size;
5db72099
JN
805
806 if (index + current_size > total) {
807 DRM_ERROR("Invalid sequence block\n");
808 return NULL;
809 }
810
811 if (current_id == panel_id) {
812 *seq_size = current_size;
813 return data + index;
814 }
815
816 index += current_size;
817 }
818
819 DRM_ERROR("Sequence block detected but no valid configuration\n");
820
821 return NULL;
822}
823
8d3ed2f3
JN
824static int goto_next_sequence(const u8 *data, int index, int total)
825{
826 u16 len;
827
828 /* Skip Sequence Byte. */
829 for (index = index + 1; index < total; index += len) {
830 u8 operation_byte = *(data + index);
831 index++;
832
833 switch (operation_byte) {
834 case MIPI_SEQ_ELEM_END:
835 return index;
836 case MIPI_SEQ_ELEM_SEND_PKT:
837 if (index + 4 > total)
838 return 0;
839
840 len = *((const u16 *)(data + index + 2)) + 4;
841 break;
842 case MIPI_SEQ_ELEM_DELAY:
843 len = 4;
844 break;
845 case MIPI_SEQ_ELEM_GPIO:
846 len = 2;
847 break;
f4d64936
JN
848 case MIPI_SEQ_ELEM_I2C:
849 if (index + 7 > total)
850 return 0;
851 len = *(data + index + 6) + 7;
852 break;
8d3ed2f3
JN
853 default:
854 DRM_ERROR("Unknown operation byte\n");
855 return 0;
856 }
857 }
858
859 return 0;
860}
861
2a33d934
JN
862static int goto_next_sequence_v3(const u8 *data, int index, int total)
863{
864 int seq_end;
865 u16 len;
6765bd6d 866 u32 size_of_sequence;
2a33d934
JN
867
868 /*
869 * Could skip sequence based on Size of Sequence alone, but also do some
870 * checking on the structure.
871 */
872 if (total < 5) {
873 DRM_ERROR("Too small sequence size\n");
874 return 0;
875 }
876
6765bd6d
JN
877 /* Skip Sequence Byte. */
878 index++;
879
880 /*
881 * Size of Sequence. Excludes the Sequence Byte and the size itself,
882 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
883 * byte.
884 */
885 size_of_sequence = *((const uint32_t *)(data + index));
886 index += 4;
887
888 seq_end = index + size_of_sequence;
2a33d934
JN
889 if (seq_end > total) {
890 DRM_ERROR("Invalid sequence size\n");
891 return 0;
892 }
893
6765bd6d 894 for (; index < total; index += len) {
2a33d934
JN
895 u8 operation_byte = *(data + index);
896 index++;
897
898 if (operation_byte == MIPI_SEQ_ELEM_END) {
899 if (index != seq_end) {
900 DRM_ERROR("Invalid element structure\n");
901 return 0;
902 }
903 return index;
904 }
905
906 len = *(data + index);
907 index++;
908
909 /*
910 * FIXME: Would be nice to check elements like for v1/v2 in
911 * goto_next_sequence() above.
912 */
913 switch (operation_byte) {
914 case MIPI_SEQ_ELEM_SEND_PKT:
915 case MIPI_SEQ_ELEM_DELAY:
916 case MIPI_SEQ_ELEM_GPIO:
917 case MIPI_SEQ_ELEM_I2C:
918 case MIPI_SEQ_ELEM_SPI:
919 case MIPI_SEQ_ELEM_PMIC:
920 break;
921 default:
922 DRM_ERROR("Unknown operation byte %u\n",
923 operation_byte);
924 break;
925 }
926 }
927
928 return 0;
929}
930
0f8689f5
JN
931static void
932parse_mipi_sequence(struct drm_i915_private *dev_priv,
933 const struct bdb_header *bdb)
934{
3e845c7a 935 int panel_type = dev_priv->vbt.panel_type;
0f8689f5
JN
936 const struct bdb_mipi_sequence *sequence;
937 const u8 *seq_data;
2a33d934 938 u32 seq_size;
0f8689f5 939 u8 *data;
8d3ed2f3 940 int index = 0;
0f8689f5
JN
941
942 /* Only our generic panel driver uses the sequence block. */
943 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
944 return;
d3b542fc 945
d3b542fc
SK
946 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
947 if (!sequence) {
948 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
949 return;
950 }
951
cd67d226 952 /* Fail gracefully for forward incompatible sequence block. */
2a33d934
JN
953 if (sequence->version >= 4) {
954 DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n",
955 sequence->version);
cd67d226
JN
956 return;
957 }
958
2a33d934 959 DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version);
d3b542fc 960
5db72099
JN
961 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
962 if (!seq_data)
d3b542fc 963 return;
d3b542fc 964
8d3ed2f3
JN
965 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
966 if (!data)
d3b542fc
SK
967 return;
968
8d3ed2f3
JN
969 /* Parse the sequences, store pointers to each sequence. */
970 for (;;) {
971 u8 seq_id = *(data + index);
972 if (seq_id == MIPI_SEQ_END)
973 break;
d3b542fc 974
8d3ed2f3
JN
975 if (seq_id >= MIPI_SEQ_MAX) {
976 DRM_ERROR("Unknown sequence %u\n", seq_id);
d3b542fc
SK
977 goto err;
978 }
979
8d3ed2f3 980 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
d3b542fc 981
2a33d934
JN
982 if (sequence->version >= 3)
983 index = goto_next_sequence_v3(data, index, seq_size);
984 else
985 index = goto_next_sequence(data, index, seq_size);
8d3ed2f3
JN
986 if (!index) {
987 DRM_ERROR("Invalid sequence %u\n", seq_id);
d3b542fc
SK
988 goto err;
989 }
d3b542fc
SK
990 }
991
8d3ed2f3
JN
992 dev_priv->vbt.dsi.data = data;
993 dev_priv->vbt.dsi.size = seq_size;
994 dev_priv->vbt.dsi.seq_version = sequence->version;
995
996 DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n");
d3b542fc 997 return;
d3b542fc 998
8d3ed2f3
JN
999err:
1000 kfree(data);
ed3b6679 1001 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
d17c5443
SK
1002}
1003
75067dde
AK
1004static u8 translate_iboost(u8 val)
1005{
1006 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1007
1008 if (val >= ARRAY_SIZE(mapping)) {
1009 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1010 return 0;
1011 }
1012 return mapping[val];
1013}
1014
6acab15a 1015static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
dcb58a40 1016 const struct bdb_header *bdb)
6acab15a
PZ
1017{
1018 union child_device_config *it, *child = NULL;
1019 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1020 uint8_t hdmi_level_shift;
1021 int i, j;
554d6af5 1022 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
11c1b657 1023 uint8_t aux_channel, ddc_pin;
6acab15a
PZ
1024 /* Each DDI port can have more than one value on the "DVO Port" field,
1025 * so look for all the possible values for each port and abort if more
1026 * than one is found. */
2800e4c2
RV
1027 int dvo_ports[][3] = {
1028 {DVO_PORT_HDMIA, DVO_PORT_DPA, -1},
1029 {DVO_PORT_HDMIB, DVO_PORT_DPB, -1},
1030 {DVO_PORT_HDMIC, DVO_PORT_DPC, -1},
1031 {DVO_PORT_HDMID, DVO_PORT_DPD, -1},
1032 {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE},
6acab15a
PZ
1033 };
1034
1035 /* Find the child device to use, abort if more than one found. */
1036 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1037 it = dev_priv->vbt.child_dev + i;
1038
2800e4c2 1039 for (j = 0; j < 3; j++) {
6acab15a
PZ
1040 if (dvo_ports[port][j] == -1)
1041 break;
1042
1043 if (it->common.dvo_port == dvo_ports[port][j]) {
1044 if (child) {
1045 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
1046 port_name(port));
1047 return;
1048 }
1049 child = it;
1050 }
1051 }
1052 }
1053 if (!child)
1054 return;
1055
6bf19e7c 1056 aux_channel = child->raw[25];
11c1b657 1057 ddc_pin = child->common.ddc_pin;
6bf19e7c 1058
78eb06c3
VS
1059 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1060 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1061 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1062 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1063 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
554d6af5 1064
311a2094
PZ
1065 info->supports_dvi = is_dvi;
1066 info->supports_hdmi = is_hdmi;
1067 info->supports_dp = is_dp;
1068
554d6af5
PZ
1069 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
1070 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
1071
1072 if (is_edp && is_dvi)
1073 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
1074 port_name(port));
1075 if (is_crt && port != PORT_E)
1076 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
1077 if (is_crt && (is_dvi || is_dp))
1078 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
1079 port_name(port));
1080 if (is_dvi && (port == PORT_A || port == PORT_E))
9b13494c 1081 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
554d6af5
PZ
1082 if (!is_dvi && !is_dp && !is_crt)
1083 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
1084 port_name(port));
1085 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
1086 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
6bf19e7c
PZ
1087
1088 if (is_dvi) {
11c1b657
XZ
1089 if (port == PORT_E) {
1090 info->alternate_ddc_pin = ddc_pin;
1091 /* if DDIE share ddc pin with other port, then
1092 * dvi/hdmi couldn't exist on the shared port.
1093 * Otherwise they share the same ddc bin and system
1094 * couldn't communicate with them seperately. */
1095 if (ddc_pin == DDC_PIN_B) {
1096 dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0;
1097 dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0;
1098 } else if (ddc_pin == DDC_PIN_C) {
1099 dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0;
1100 dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0;
1101 } else if (ddc_pin == DDC_PIN_D) {
1102 dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0;
1103 dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0;
1104 }
1105 } else if (ddc_pin == DDC_PIN_B && port != PORT_B)
6bf19e7c 1106 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
11c1b657 1107 else if (ddc_pin == DDC_PIN_C && port != PORT_C)
6bf19e7c 1108 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
11c1b657 1109 else if (ddc_pin == DDC_PIN_D && port != PORT_D)
6bf19e7c
PZ
1110 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
1111 }
1112
1113 if (is_dp) {
500ea70d
RV
1114 if (port == PORT_E) {
1115 info->alternate_aux_channel = aux_channel;
1116 /* if DDIE share aux channel with other port, then
1117 * DP couldn't exist on the shared port. Otherwise
1118 * they share the same aux channel and system
1119 * couldn't communicate with them seperately. */
1120 if (aux_channel == DP_AUX_A)
1121 dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0;
1122 else if (aux_channel == DP_AUX_B)
1123 dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0;
1124 else if (aux_channel == DP_AUX_C)
1125 dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0;
1126 else if (aux_channel == DP_AUX_D)
1127 dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0;
1128 }
1129 else if (aux_channel == DP_AUX_A && port != PORT_A)
6bf19e7c 1130 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
500ea70d 1131 else if (aux_channel == DP_AUX_B && port != PORT_B)
6bf19e7c 1132 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
500ea70d 1133 else if (aux_channel == DP_AUX_C && port != PORT_C)
6bf19e7c 1134 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
500ea70d 1135 else if (aux_channel == DP_AUX_D && port != PORT_D)
6bf19e7c
PZ
1136 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
1137 }
1138
6acab15a
PZ
1139 if (bdb->version >= 158) {
1140 /* The VBT HDMI level shift values match the table we have. */
1141 hdmi_level_shift = child->raw[7] & 0xF;
ce4dd49e
DL
1142 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1143 port_name(port),
1144 hdmi_level_shift);
1145 info->hdmi_level_shift = hdmi_level_shift;
6acab15a 1146 }
75067dde
AK
1147
1148 /* Parse the I_boost config for SKL and above */
4e27bd50 1149 if (bdb->version >= 196 && child->common.iboost) {
75067dde
AK
1150 info->dp_boost_level = translate_iboost(child->common.iboost_level & 0xF);
1151 DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n",
1152 port_name(port), info->dp_boost_level);
1153 info->hdmi_boost_level = translate_iboost(child->common.iboost_level >> 4);
1154 DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n",
1155 port_name(port), info->hdmi_boost_level);
1156 }
6acab15a
PZ
1157}
1158
1159static void parse_ddi_ports(struct drm_i915_private *dev_priv,
dcb58a40 1160 const struct bdb_header *bdb)
6acab15a 1161{
6acab15a
PZ
1162 enum port port;
1163
98f3a1dc 1164 if (!HAS_DDI(dev_priv))
6acab15a
PZ
1165 return;
1166
1167 if (!dev_priv->vbt.child_dev_num)
1168 return;
1169
1170 if (bdb->version < 155)
1171 return;
1172
1173 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1174 parse_ddi_port(dev_priv, port, bdb);
1175}
1176
6363ee6f
ZY
1177static void
1178parse_device_mapping(struct drm_i915_private *dev_priv,
dcb58a40 1179 const struct bdb_header *bdb)
6363ee6f 1180{
e8ef3b4c
JN
1181 const struct bdb_general_definitions *p_defs;
1182 const union child_device_config *p_child;
1183 union child_device_config *child_dev_ptr;
6363ee6f 1184 int i, child_device_num, count;
e2d6cf7f
DW
1185 u8 expected_size;
1186 u16 block_size;
6363ee6f
ZY
1187
1188 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1189 if (!p_defs) {
44834a67 1190 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
6363ee6f
ZY
1191 return;
1192 }
7244f309
VS
1193 if (bdb->version < 106) {
1194 expected_size = 22;
36a5fc5c 1195 } else if (bdb->version < 111) {
52b69c84
VS
1196 expected_size = 27;
1197 } else if (bdb->version < 195) {
1198 BUILD_BUG_ON(sizeof(struct old_child_dev_config) != 33);
e2d6cf7f
DW
1199 expected_size = sizeof(struct old_child_dev_config);
1200 } else if (bdb->version == 195) {
1201 expected_size = 37;
1202 } else if (bdb->version <= 197) {
1203 expected_size = 38;
1204 } else {
1205 expected_size = 38;
1206 BUILD_BUG_ON(sizeof(*p_child) < 38);
1207 DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n",
1208 bdb->version, expected_size);
1209 }
1210
e2d6cf7f
DW
1211 /* Flag an error for unexpected size, but continue anyway. */
1212 if (p_defs->child_dev_size != expected_size)
1213 DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n",
1214 p_defs->child_dev_size, expected_size, bdb->version);
1215
52b69c84
VS
1216 /* The legacy sized child device config is the minimum we need. */
1217 if (p_defs->child_dev_size < sizeof(struct old_child_dev_config)) {
1218 DRM_DEBUG_KMS("Child device config size %u is too small.\n",
1219 p_defs->child_dev_size);
1220 return;
1221 }
1222
6363ee6f
ZY
1223 /* get the block size of general definitions */
1224 block_size = get_blocksize(p_defs);
1225 /* get the number of child device */
1226 child_device_num = (block_size - sizeof(*p_defs)) /
90e4f159 1227 p_defs->child_dev_size;
6363ee6f
ZY
1228 count = 0;
1229 /* get the number of child device that is present */
1230 for (i = 0; i < child_device_num; i++) {
90e4f159 1231 p_child = child_device_ptr(p_defs, i);
768f69c9 1232 if (!p_child->common.device_type) {
6363ee6f
ZY
1233 /* skip the device block if device type is invalid */
1234 continue;
1235 }
1236 count++;
1237 }
1238 if (!count) {
0206e353 1239 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
6363ee6f
ZY
1240 return;
1241 }
41aa3448
RV
1242 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1243 if (!dev_priv->vbt.child_dev) {
6363ee6f
ZY
1244 DRM_DEBUG_KMS("No memory space for child device\n");
1245 return;
1246 }
1247
41aa3448 1248 dev_priv->vbt.child_dev_num = count;
6363ee6f
ZY
1249 count = 0;
1250 for (i = 0; i < child_device_num; i++) {
90e4f159 1251 p_child = child_device_ptr(p_defs, i);
768f69c9 1252 if (!p_child->common.device_type) {
6363ee6f
ZY
1253 /* skip the device block if device type is invalid */
1254 continue;
1255 }
3e6bd011 1256
41aa3448 1257 child_dev_ptr = dev_priv->vbt.child_dev + count;
6363ee6f 1258 count++;
e2d6cf7f
DW
1259
1260 /*
1261 * Copy as much as we know (sizeof) and is available
1262 * (child_dev_size) of the child device. Accessing the data must
1263 * depend on VBT version.
1264 */
1265 memcpy(child_dev_ptr, p_child,
1266 min_t(size_t, p_defs->child_dev_size, sizeof(*p_child)));
4e27bd50
SS
1267
1268 /*
1269 * copied full block, now init values when they are not
1270 * available in current version
1271 */
1272 if (bdb->version < 196) {
1273 /* Set default values for bits added from v196 */
1274 child_dev_ptr->common.iboost = 0;
1275 child_dev_ptr->common.hpd_invert = 0;
1276 }
1277
1278 if (bdb->version < 192)
1279 child_dev_ptr->common.lspcon = 0;
6363ee6f
ZY
1280 }
1281 return;
1282}
44834a67 1283
6a04002b
SQ
1284static void
1285init_vbt_defaults(struct drm_i915_private *dev_priv)
1286{
6acab15a 1287 enum port port;
9a4114ff 1288
988c7015 1289 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
6a04002b 1290
56c4b63a
JN
1291 /* Default to having backlight */
1292 dev_priv->vbt.backlight.present = true;
1293
6a04002b 1294 /* LFP panel data */
41aa3448
RV
1295 dev_priv->vbt.lvds_dither = 1;
1296 dev_priv->vbt.lvds_vbt = 0;
6a04002b
SQ
1297
1298 /* SDVO panel data */
41aa3448 1299 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
6a04002b
SQ
1300
1301 /* general features */
41aa3448
RV
1302 dev_priv->vbt.int_tv_support = 1;
1303 dev_priv->vbt.int_crt_support = 1;
9a4114ff
BF
1304
1305 /* Default to using SSC */
41aa3448 1306 dev_priv->vbt.lvds_use_ssc = 1;
f69e5156
DL
1307 /*
1308 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1309 * clock for LVDS.
1310 */
98f3a1dc
JN
1311 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1312 !HAS_PCH_SPLIT(dev_priv));
e91e941b 1313 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
6acab15a
PZ
1314
1315 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
311a2094
PZ
1316 struct ddi_vbt_port_info *info =
1317 &dev_priv->vbt.ddi_port_info[port];
1318
ce4dd49e 1319 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
311a2094
PZ
1320
1321 info->supports_dvi = (port != PORT_A && port != PORT_E);
1322 info->supports_hdmi = info->supports_dvi;
1323 info->supports_dp = (port != PORT_E);
6acab15a 1324 }
6a04002b
SQ
1325}
1326
caf37fa4
JN
1327static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
1328{
1329 const void *_vbt = vbt;
1330
1331 return _vbt + vbt->bdb_offset;
1332}
1333
f0067a31
JN
1334/**
1335 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
1336 * @buf: pointer to a buffer to validate
1337 * @size: size of the buffer
1338 *
1339 * Returns true on valid VBT.
1340 */
1341bool intel_bios_is_valid_vbt(const void *buf, size_t size)
3dd4e846 1342{
f0067a31 1343 const struct vbt_header *vbt = buf;
dcb58a40 1344 const struct bdb_header *bdb;
3dd4e846 1345
caf37fa4 1346 if (!vbt)
f0067a31 1347 return false;
caf37fa4 1348
f0067a31 1349 if (sizeof(struct vbt_header) > size) {
3dd4e846 1350 DRM_DEBUG_DRIVER("VBT header incomplete\n");
f0067a31 1351 return false;
3dd4e846
CW
1352 }
1353
1354 if (memcmp(vbt->signature, "$VBT", 4)) {
1355 DRM_DEBUG_DRIVER("VBT invalid signature\n");
f0067a31 1356 return false;
3dd4e846
CW
1357 }
1358
f0067a31 1359 if (vbt->bdb_offset + sizeof(struct bdb_header) > size) {
3dd4e846 1360 DRM_DEBUG_DRIVER("BDB header incomplete\n");
f0067a31 1361 return false;
3dd4e846
CW
1362 }
1363
caf37fa4 1364 bdb = get_bdb_header(vbt);
f0067a31 1365 if (vbt->bdb_offset + bdb->bdb_size > size) {
3dd4e846 1366 DRM_DEBUG_DRIVER("BDB incomplete\n");
f0067a31 1367 return false;
3dd4e846
CW
1368 }
1369
caf37fa4 1370 return vbt;
3dd4e846
CW
1371}
1372
caf37fa4 1373static const struct vbt_header *find_vbt(void __iomem *bios, size_t size)
b34a991a 1374{
b34a991a
JN
1375 size_t i;
1376
1377 /* Scour memory looking for the VBT signature. */
1378 for (i = 0; i + 4 < size; i++) {
f0067a31 1379 void *vbt;
115719fc 1380
f0067a31
JN
1381 if (ioread32(bios + i) != *((const u32 *) "$VBT"))
1382 continue;
1383
1384 /*
1385 * This is the one place where we explicitly discard the address
1386 * space (__iomem) of the BIOS/VBT.
1387 */
1388 vbt = (void __force *) bios + i;
1389 if (intel_bios_is_valid_vbt(vbt, size - i))
1390 return vbt;
1391
1392 break;
b34a991a
JN
1393 }
1394
f0067a31 1395 return NULL;
b34a991a
JN
1396}
1397
79e53945 1398/**
8b8e1a89 1399 * intel_bios_init - find VBT and initialize settings from the BIOS
dd97950a 1400 * @dev_priv: i915 device instance
79e53945
JB
1401 *
1402 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
1403 * to appropriate values.
1404 *
79e53945
JB
1405 * Returns 0 on success, nonzero on failure.
1406 */
0317c6ce 1407int
98f3a1dc 1408intel_bios_init(struct drm_i915_private *dev_priv)
79e53945 1409{
98f3a1dc 1410 struct pci_dev *pdev = dev_priv->dev->pdev;
f0067a31 1411 const struct vbt_header *vbt = dev_priv->opregion.vbt;
caf37fa4 1412 const struct bdb_header *bdb;
44834a67
CW
1413 u8 __iomem *bios = NULL;
1414
98f3a1dc 1415 if (HAS_PCH_NOP(dev_priv))
ab5c608b
BW
1416 return -ENODEV;
1417
6a04002b 1418 init_vbt_defaults(dev_priv);
f899fc64 1419
f0067a31 1420 if (!vbt) {
b34a991a 1421 size_t size;
79e53945 1422
44834a67
CW
1423 bios = pci_map_rom(pdev, &size);
1424 if (!bios)
1425 return -1;
1426
caf37fa4
JN
1427 vbt = find_vbt(bios, size);
1428 if (!vbt) {
44834a67
CW
1429 pci_unmap_rom(pdev, bios);
1430 return -1;
1431 }
e2051c44
JN
1432
1433 DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n");
44834a67 1434 }
79e53945 1435
caf37fa4
JN
1436 bdb = get_bdb_header(vbt);
1437
3556dd40
JN
1438 DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n",
1439 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
e2051c44 1440
79e53945
JB
1441 /* Grab useful general definitions */
1442 parse_general_features(dev_priv, bdb);
db545019 1443 parse_general_definitions(dev_priv, bdb);
88631706 1444 parse_lfp_panel_data(dev_priv, bdb);
f00076d2 1445 parse_lfp_backlight(dev_priv, bdb);
88631706 1446 parse_sdvo_panel_data(dev_priv, bdb);
9b9d172d 1447 parse_sdvo_device_mapping(dev_priv, bdb);
6363ee6f 1448 parse_device_mapping(dev_priv, bdb);
32f9d658 1449 parse_driver_features(dev_priv, bdb);
500a8cc4 1450 parse_edp(dev_priv, bdb);
bfd7ebda 1451 parse_psr(dev_priv, bdb);
0f8689f5
JN
1452 parse_mipi_config(dev_priv, bdb);
1453 parse_mipi_sequence(dev_priv, bdb);
6acab15a 1454 parse_ddi_ports(dev_priv, bdb);
32f9d658 1455
44834a67
CW
1456 if (bios)
1457 pci_unmap_rom(pdev, bios);
79e53945
JB
1458
1459 return 0;
1460}
3bdd14d5
JN
1461
1462/**
1463 * intel_bios_is_tv_present - is integrated TV present in VBT
1464 * @dev_priv: i915 device instance
1465 *
1466 * Return true if TV is present. If no child devices were parsed from VBT,
1467 * assume TV is present.
1468 */
1469bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
1470{
1471 union child_device_config *p_child;
1472 int i;
1473
1474 if (!dev_priv->vbt.int_tv_support)
1475 return false;
1476
1477 if (!dev_priv->vbt.child_dev_num)
1478 return true;
1479
1480 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1481 p_child = dev_priv->vbt.child_dev + i;
1482 /*
1483 * If the device type is not TV, continue.
1484 */
1485 switch (p_child->old.device_type) {
1486 case DEVICE_TYPE_INT_TV:
1487 case DEVICE_TYPE_TV:
1488 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
1489 break;
1490 default:
1491 continue;
1492 }
1493 /* Only when the addin_offset is non-zero, it is regarded
1494 * as present.
1495 */
1496 if (p_child->old.addin_offset)
1497 return true;
1498 }
1499
1500 return false;
1501}
5a69d13d
JN
1502
1503/**
1504 * intel_bios_is_lvds_present - is LVDS present in VBT
1505 * @dev_priv: i915 device instance
1506 * @i2c_pin: i2c pin for LVDS if present
1507 *
1508 * Return true if LVDS is present. If no child devices were parsed from VBT,
1509 * assume LVDS is present.
1510 */
1511bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
1512{
1513 int i;
1514
1515 if (!dev_priv->vbt.child_dev_num)
1516 return true;
1517
1518 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1519 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
1520 struct old_child_dev_config *child = &uchild->old;
1521
1522 /* If the device type is not LFP, continue.
1523 * We have to check both the new identifiers as well as the
1524 * old for compatibility with some BIOSes.
1525 */
1526 if (child->device_type != DEVICE_TYPE_INT_LFP &&
1527 child->device_type != DEVICE_TYPE_LFP)
1528 continue;
1529
1530 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
1531 *i2c_pin = child->i2c_pin;
1532
1533 /* However, we cannot trust the BIOS writers to populate
1534 * the VBT correctly. Since LVDS requires additional
1535 * information from AIM blocks, a non-zero addin offset is
1536 * a good indicator that the LVDS is actually present.
1537 */
1538 if (child->addin_offset)
1539 return true;
1540
1541 /* But even then some BIOS writers perform some black magic
1542 * and instantiate the device without reference to any
1543 * additional data. Trust that if the VBT was written into
1544 * the OpRegion then they have validated the LVDS's existence.
1545 */
1546 if (dev_priv->opregion.vbt)
1547 return true;
1548 }
1549
1550 return false;
1551}
951d9efe 1552
a5aac5ab
VS
1553/**
1554 * intel_bios_is_port_present - is the specified digital port present
1555 * @dev_priv: i915 device instance
1556 * @port: port to check
1557 *
1558 * Return true if the device in %port is present.
1559 */
1560bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
1561{
1562 static const struct {
1563 u16 dp, hdmi;
1564 } port_mapping[] = {
1565 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1566 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1567 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1568 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1569 };
1570 int i;
1571
1572 /* FIXME maybe deal with port A as well? */
1573 if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
1574 return false;
1575
1576 if (!dev_priv->vbt.child_dev_num)
1577 return false;
1578
1579 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1580 const union child_device_config *p_child =
1581 &dev_priv->vbt.child_dev[i];
1582 if ((p_child->common.dvo_port == port_mapping[port].dp ||
1583 p_child->common.dvo_port == port_mapping[port].hdmi) &&
1584 (p_child->common.device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
1585 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
1586 return true;
1587 }
1588
1589 return false;
1590}
1591
951d9efe
JN
1592/**
1593 * intel_bios_is_port_edp - is the device in given port eDP
1594 * @dev_priv: i915 device instance
1595 * @port: port to check
1596 *
1597 * Return true if the device in %port is eDP.
1598 */
1599bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
1600{
1601 union child_device_config *p_child;
1602 static const short port_mapping[] = {
1603 [PORT_B] = DVO_PORT_DPB,
1604 [PORT_C] = DVO_PORT_DPC,
1605 [PORT_D] = DVO_PORT_DPD,
1606 [PORT_E] = DVO_PORT_DPE,
1607 };
1608 int i;
1609
1610 if (!dev_priv->vbt.child_dev_num)
1611 return false;
1612
1613 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1614 p_child = dev_priv->vbt.child_dev + i;
1615
1616 if (p_child->common.dvo_port == port_mapping[port] &&
1617 (p_child->common.device_type & DEVICE_TYPE_eDP_BITS) ==
1618 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
1619 return true;
1620 }
1621
1622 return false;
1623}
7137aec1 1624
55d7f30e
VS
1625bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port)
1626{
1627 static const struct {
1628 u16 dp, hdmi;
1629 } port_mapping[] = {
1630 /*
1631 * Buggy VBTs may declare DP ports as having
1632 * HDMI type dvo_port :( So let's check both.
1633 */
1634 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
1635 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
1636 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
1637 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
1638 };
1639 int i;
1640
1641 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
1642 return false;
1643
1644 if (!dev_priv->vbt.child_dev_num)
1645 return false;
1646
1647 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1648 const union child_device_config *p_child =
1649 &dev_priv->vbt.child_dev[i];
1650
1651 if ((p_child->common.dvo_port == port_mapping[port].dp ||
1652 p_child->common.dvo_port == port_mapping[port].hdmi) &&
1653 (p_child->common.device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) ==
1654 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
1655 return true;
1656 }
1657
1658 return false;
1659}
1660
7137aec1
JN
1661/**
1662 * intel_bios_is_dsi_present - is DSI present in VBT
1663 * @dev_priv: i915 device instance
1664 * @port: port for DSI if present
1665 *
1666 * Return true if DSI is present, and return the port in %port.
1667 */
1668bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
1669 enum port *port)
1670{
1671 union child_device_config *p_child;
1672 u8 dvo_port;
1673 int i;
1674
1675 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1676 p_child = dev_priv->vbt.child_dev + i;
1677
1678 if (!(p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT))
1679 continue;
1680
1681 dvo_port = p_child->common.dvo_port;
1682
1683 switch (dvo_port) {
1684 case DVO_PORT_MIPIA:
1685 case DVO_PORT_MIPIC:
7caaef33
JN
1686 if (port)
1687 *port = dvo_port - DVO_PORT_MIPIA;
7137aec1
JN
1688 return true;
1689 case DVO_PORT_MIPIB:
1690 case DVO_PORT_MIPID:
1691 DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n",
1692 port_name(dvo_port - DVO_PORT_MIPIA));
1693 break;
1694 }
1695 }
1696
1697 return false;
1698}
d252bf68
SS
1699
1700/**
1701 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
1702 * @dev_priv: i915 device instance
1703 * @port: port to check
1704 *
1705 * Return true if HPD should be inverted for %port.
1706 */
1707bool
1708intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,
1709 enum port port)
1710{
1711 int i;
1712
1713 if (WARN_ON_ONCE(!IS_BROXTON(dev_priv)))
1714 return false;
1715
1716 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
1717 if (!dev_priv->vbt.child_dev[i].common.hpd_invert)
1718 continue;
1719
1720 switch (dev_priv->vbt.child_dev[i].common.dvo_port) {
1721 case DVO_PORT_DPA:
1722 case DVO_PORT_HDMIA:
1723 if (port == PORT_A)
1724 return true;
1725 break;
1726 case DVO_PORT_DPB:
1727 case DVO_PORT_HDMIB:
1728 if (port == PORT_B)
1729 return true;
1730 break;
1731 case DVO_PORT_DPC:
1732 case DVO_PORT_HDMIC:
1733 if (port == PORT_C)
1734 return true;
1735 break;
1736 default:
1737 break;
1738 }
1739 }
1740
1741 return false;
1742}