Commit | Line | Data |
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79e53945 | 1 | /* |
39507259 | 2 | * Copyright © 2006 Intel Corporation |
79e53945 JB |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
21 | * SOFTWARE. | |
22 | * | |
23 | * Authors: | |
24 | * Eric Anholt <eric@anholt.net> | |
25 | * | |
26 | */ | |
b30581a4 | 27 | |
9f0e7ff4 | 28 | #include <drm/drm_dp_helper.h> |
760285e7 DH |
29 | #include <drm/drmP.h> |
30 | #include <drm/i915_drm.h> | |
79e53945 | 31 | #include "i915_drv.h" |
72341af4 JN |
32 | |
33 | #define _INTEL_BIOS_PRIVATE | |
34 | #include "intel_vbt_defs.h" | |
79e53945 | 35 | |
dd97950a JN |
36 | /** |
37 | * DOC: Video BIOS Table (VBT) | |
38 | * | |
39 | * The Video BIOS Table, or VBT, provides platform and board specific | |
40 | * configuration information to the driver that is not discoverable or available | |
41 | * through other means. The configuration is mostly related to display | |
42 | * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in | |
43 | * the PCI ROM. | |
44 | * | |
45 | * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB | |
46 | * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that | |
47 | * contain the actual configuration information. The VBT Header, and thus the | |
48 | * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the | |
49 | * BDB Header. The data blocks are concatenated after the BDB Header. The data | |
50 | * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of | |
51 | * data. (Block 53, the MIPI Sequence Block is an exception.) | |
52 | * | |
53 | * The driver parses the VBT during load. The relevant information is stored in | |
54 | * driver private data for ease of use, and the actual VBT is not read after | |
55 | * that. | |
56 | */ | |
57 | ||
9b9d172d | 58 | #define SLAVE_ADDR1 0x70 |
59 | #define SLAVE_ADDR2 0x72 | |
79e53945 | 60 | |
08c0888b JN |
61 | /* Get BDB block size given a pointer to Block ID. */ |
62 | static u32 _get_blocksize(const u8 *block_base) | |
63 | { | |
64 | /* The MIPI Sequence Block v3+ has a separate size field. */ | |
65 | if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3) | |
66 | return *((const u32 *)(block_base + 4)); | |
67 | else | |
68 | return *((const u16 *)(block_base + 1)); | |
69 | } | |
70 | ||
71 | /* Get BDB block size give a pointer to data after Block ID and Block Size. */ | |
72 | static u32 get_blocksize(const void *block_data) | |
73 | { | |
74 | return _get_blocksize(block_data - 3); | |
75 | } | |
76 | ||
e8ef3b4c JN |
77 | static const void * |
78 | find_section(const void *_bdb, int section_id) | |
79e53945 | 79 | { |
e8ef3b4c JN |
80 | const struct bdb_header *bdb = _bdb; |
81 | const u8 *base = _bdb; | |
79e53945 | 82 | int index = 0; |
cd67d226 | 83 | u32 total, current_size; |
79e53945 JB |
84 | u8 current_id; |
85 | ||
86 | /* skip to first section */ | |
87 | index += bdb->header_size; | |
88 | total = bdb->bdb_size; | |
89 | ||
90 | /* walk the sections looking for section_id */ | |
d1f13fd2 | 91 | while (index + 3 < total) { |
79e53945 | 92 | current_id = *(base + index); |
08c0888b JN |
93 | current_size = _get_blocksize(base + index); |
94 | index += 3; | |
cd67d226 | 95 | |
d1f13fd2 CW |
96 | if (index + current_size > total) |
97 | return NULL; | |
98 | ||
79e53945 JB |
99 | if (current_id == section_id) |
100 | return base + index; | |
d1f13fd2 | 101 | |
79e53945 JB |
102 | index += current_size; |
103 | } | |
104 | ||
105 | return NULL; | |
106 | } | |
107 | ||
79e53945 | 108 | static void |
88631706 | 109 | fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, |
99834ea4 | 110 | const struct lvds_dvo_timing *dvo_timing) |
88631706 ML |
111 | { |
112 | panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | | |
113 | dvo_timing->hactive_lo; | |
114 | panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + | |
115 | ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo); | |
116 | panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + | |
ce2e87b4 VT |
117 | ((dvo_timing->hsync_pulse_width_hi << 8) | |
118 | dvo_timing->hsync_pulse_width_lo); | |
88631706 ML |
119 | panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + |
120 | ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo); | |
121 | ||
122 | panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) | | |
123 | dvo_timing->vactive_lo; | |
124 | panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay + | |
ce2e87b4 | 125 | ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo); |
88631706 | 126 | panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start + |
ce2e87b4 VT |
127 | ((dvo_timing->vsync_pulse_width_hi << 4) | |
128 | dvo_timing->vsync_pulse_width_lo); | |
88631706 ML |
129 | panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay + |
130 | ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo); | |
131 | panel_fixed_mode->clock = dvo_timing->clock * 10; | |
132 | panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED; | |
133 | ||
9bc35499 AJ |
134 | if (dvo_timing->hsync_positive) |
135 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC; | |
136 | else | |
137 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC; | |
138 | ||
139 | if (dvo_timing->vsync_positive) | |
140 | panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC; | |
141 | else | |
142 | panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC; | |
143 | ||
df457245 VS |
144 | panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) | |
145 | dvo_timing->himage_lo; | |
146 | panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) | | |
147 | dvo_timing->vimage_lo; | |
148 | ||
88631706 ML |
149 | /* Some VBTs have bogus h/vtotal values */ |
150 | if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) | |
151 | panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; | |
152 | if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal) | |
153 | panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1; | |
154 | ||
155 | drm_mode_set_name(panel_fixed_mode); | |
156 | } | |
157 | ||
99834ea4 CW |
158 | static const struct lvds_dvo_timing * |
159 | get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data, | |
160 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs, | |
161 | int index) | |
162 | { | |
163 | /* | |
164 | * the size of fp_timing varies on the different platform. | |
165 | * So calculate the DVO timing relative offset in LVDS data | |
166 | * entry to get the DVO timing entry | |
167 | */ | |
168 | ||
169 | int lfp_data_size = | |
170 | lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset - | |
171 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset; | |
172 | int dvo_timing_offset = | |
173 | lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset - | |
174 | lvds_lfp_data_ptrs->ptr[0].fp_timing_offset; | |
175 | char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index; | |
176 | ||
177 | return (struct lvds_dvo_timing *)(entry + dvo_timing_offset); | |
178 | } | |
179 | ||
b0354385 TI |
180 | /* get lvds_fp_timing entry |
181 | * this function may return NULL if the corresponding entry is invalid | |
182 | */ | |
183 | static const struct lvds_fp_timing * | |
184 | get_lvds_fp_timing(const struct bdb_header *bdb, | |
185 | const struct bdb_lvds_lfp_data *data, | |
186 | const struct bdb_lvds_lfp_data_ptrs *ptrs, | |
187 | int index) | |
188 | { | |
189 | size_t data_ofs = (const u8 *)data - (const u8 *)bdb; | |
190 | u16 data_size = ((const u16 *)data)[-1]; /* stored in header */ | |
191 | size_t ofs; | |
192 | ||
193 | if (index >= ARRAY_SIZE(ptrs->ptr)) | |
194 | return NULL; | |
195 | ofs = ptrs->ptr[index].fp_timing_offset; | |
196 | if (ofs < data_ofs || | |
197 | ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size) | |
198 | return NULL; | |
199 | return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs); | |
200 | } | |
201 | ||
88631706 ML |
202 | /* Try to find integrated panel data */ |
203 | static void | |
204 | parse_lfp_panel_data(struct drm_i915_private *dev_priv, | |
dcb58a40 | 205 | const struct bdb_header *bdb) |
79e53945 | 206 | { |
99834ea4 CW |
207 | const struct bdb_lvds_options *lvds_options; |
208 | const struct bdb_lvds_lfp_data *lvds_lfp_data; | |
209 | const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; | |
210 | const struct lvds_dvo_timing *panel_dvo_timing; | |
b0354385 | 211 | const struct lvds_fp_timing *fp_timing; |
79e53945 | 212 | struct drm_display_mode *panel_fixed_mode; |
3e845c7a | 213 | int panel_type; |
c329a4ec | 214 | int drrs_mode; |
a0562819 | 215 | int ret; |
79e53945 | 216 | |
79e53945 JB |
217 | lvds_options = find_section(bdb, BDB_LVDS_OPTIONS); |
218 | if (!lvds_options) | |
219 | return; | |
220 | ||
41aa3448 | 221 | dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; |
a0562819 | 222 | |
6f9f4b7a | 223 | ret = intel_opregion_get_panel_type(dev_priv); |
a0562819 VS |
224 | if (ret >= 0) { |
225 | WARN_ON(ret > 0xf); | |
226 | panel_type = ret; | |
227 | DRM_DEBUG_KMS("Panel type: %d (OpRegion)\n", panel_type); | |
228 | } else { | |
229 | if (lvds_options->panel_type > 0xf) { | |
230 | DRM_DEBUG_KMS("Invalid VBT panel type 0x%x\n", | |
231 | lvds_options->panel_type); | |
232 | return; | |
233 | } | |
234 | panel_type = lvds_options->panel_type; | |
235 | DRM_DEBUG_KMS("Panel type: %d (VBT)\n", panel_type); | |
eeeebea6 | 236 | } |
6a04002b | 237 | |
3e845c7a | 238 | dev_priv->vbt.panel_type = panel_type; |
79e53945 | 239 | |
83a7280e PB |
240 | drrs_mode = (lvds_options->dps_panel_type_bits |
241 | >> (panel_type * 2)) & MODE_MASK; | |
242 | /* | |
243 | * VBT has static DRRS = 0 and seamless DRRS = 2. | |
244 | * The below piece of code is required to adjust vbt.drrs_type | |
245 | * to match the enum drrs_support_type. | |
246 | */ | |
247 | switch (drrs_mode) { | |
248 | case 0: | |
249 | dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; | |
250 | DRM_DEBUG_KMS("DRRS supported mode is static\n"); | |
251 | break; | |
252 | case 2: | |
253 | dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; | |
254 | DRM_DEBUG_KMS("DRRS supported mode is seamless\n"); | |
255 | break; | |
256 | default: | |
257 | dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; | |
258 | DRM_DEBUG_KMS("DRRS not supported (VBT input)\n"); | |
259 | break; | |
260 | } | |
261 | ||
79e53945 JB |
262 | lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA); |
263 | if (!lvds_lfp_data) | |
264 | return; | |
265 | ||
1b16de0b JB |
266 | lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS); |
267 | if (!lvds_lfp_data_ptrs) | |
268 | return; | |
269 | ||
41aa3448 | 270 | dev_priv->vbt.lvds_vbt = 1; |
79e53945 | 271 | |
99834ea4 CW |
272 | panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data, |
273 | lvds_lfp_data_ptrs, | |
3e845c7a | 274 | panel_type); |
79e53945 | 275 | |
9a298b2a | 276 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
6edc3242 CW |
277 | if (!panel_fixed_mode) |
278 | return; | |
79e53945 | 279 | |
99834ea4 | 280 | fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing); |
79e53945 | 281 | |
41aa3448 | 282 | dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; |
79e53945 | 283 | |
28c97730 | 284 | DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n"); |
88631706 | 285 | drm_mode_debug_printmodeline(panel_fixed_mode); |
37df9673 | 286 | |
b0354385 TI |
287 | fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data, |
288 | lvds_lfp_data_ptrs, | |
3e845c7a | 289 | panel_type); |
b0354385 TI |
290 | if (fp_timing) { |
291 | /* check the resolution, just to be sure */ | |
292 | if (fp_timing->x_res == panel_fixed_mode->hdisplay && | |
293 | fp_timing->y_res == panel_fixed_mode->vdisplay) { | |
41aa3448 | 294 | dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; |
b0354385 | 295 | DRM_DEBUG_KMS("VBT initial LVDS value %x\n", |
41aa3448 | 296 | dev_priv->vbt.bios_lvds_val); |
b0354385 TI |
297 | } |
298 | } | |
88631706 ML |
299 | } |
300 | ||
f00076d2 | 301 | static void |
dcb58a40 JN |
302 | parse_lfp_backlight(struct drm_i915_private *dev_priv, |
303 | const struct bdb_header *bdb) | |
f00076d2 JN |
304 | { |
305 | const struct bdb_lfp_backlight_data *backlight_data; | |
306 | const struct bdb_lfp_backlight_data_entry *entry; | |
3e845c7a | 307 | int panel_type = dev_priv->vbt.panel_type; |
f00076d2 JN |
308 | |
309 | backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT); | |
310 | if (!backlight_data) | |
311 | return; | |
312 | ||
313 | if (backlight_data->entry_size != sizeof(backlight_data->data[0])) { | |
314 | DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n", | |
315 | backlight_data->entry_size); | |
316 | return; | |
317 | } | |
318 | ||
319 | entry = &backlight_data->data[panel_type]; | |
320 | ||
39fbc9c8 JN |
321 | dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM; |
322 | if (!dev_priv->vbt.backlight.present) { | |
323 | DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n", | |
324 | entry->type); | |
325 | return; | |
326 | } | |
327 | ||
9a41e17d D |
328 | dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI; |
329 | if (bdb->version >= 191 && | |
330 | get_blocksize(backlight_data) >= sizeof(*backlight_data)) { | |
331 | const struct bdb_lfp_backlight_control_method *method; | |
332 | ||
333 | method = &backlight_data->backlight_control[panel_type]; | |
334 | dev_priv->vbt.backlight.type = method->type; | |
add03379 | 335 | dev_priv->vbt.backlight.controller = method->controller; |
9a41e17d D |
336 | } |
337 | ||
f00076d2 JN |
338 | dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz; |
339 | dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm; | |
1de6068e | 340 | dev_priv->vbt.backlight.min_brightness = entry->min_brightness; |
f00076d2 | 341 | DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, " |
add03379 | 342 | "active %s, min brightness %u, level %u, controller %u\n", |
f00076d2 JN |
343 | dev_priv->vbt.backlight.pwm_freq_hz, |
344 | dev_priv->vbt.backlight.active_low_pwm ? "low" : "high", | |
1de6068e | 345 | dev_priv->vbt.backlight.min_brightness, |
add03379 VS |
346 | backlight_data->level[panel_type], |
347 | dev_priv->vbt.backlight.controller); | |
f00076d2 JN |
348 | } |
349 | ||
88631706 ML |
350 | /* Try to find sdvo panel data */ |
351 | static void | |
352 | parse_sdvo_panel_data(struct drm_i915_private *dev_priv, | |
dcb58a40 | 353 | const struct bdb_header *bdb) |
88631706 | 354 | { |
e8ef3b4c | 355 | const struct lvds_dvo_timing *dvo_timing; |
88631706 | 356 | struct drm_display_mode *panel_fixed_mode; |
5a1e5b6c | 357 | int index; |
79e53945 | 358 | |
d330a953 | 359 | index = i915.vbt_sdvo_panel_type; |
c10e408a MF |
360 | if (index == -2) { |
361 | DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n"); | |
362 | return; | |
363 | } | |
364 | ||
5a1e5b6c | 365 | if (index == -1) { |
e8ef3b4c | 366 | const struct bdb_sdvo_lvds_options *sdvo_lvds_options; |
5a1e5b6c CW |
367 | |
368 | sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS); | |
369 | if (!sdvo_lvds_options) | |
370 | return; | |
371 | ||
372 | index = sdvo_lvds_options->panel_type; | |
373 | } | |
88631706 ML |
374 | |
375 | dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS); | |
376 | if (!dvo_timing) | |
377 | return; | |
378 | ||
9a298b2a | 379 | panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); |
88631706 ML |
380 | if (!panel_fixed_mode) |
381 | return; | |
382 | ||
5a1e5b6c | 383 | fill_detail_timing_data(panel_fixed_mode, dvo_timing + index); |
88631706 | 384 | |
41aa3448 | 385 | dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode; |
79e53945 | 386 | |
5a1e5b6c CW |
387 | DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n"); |
388 | drm_mode_debug_printmodeline(panel_fixed_mode); | |
79e53945 JB |
389 | } |
390 | ||
98f3a1dc | 391 | static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv, |
9a4114ff BF |
392 | bool alternate) |
393 | { | |
98f3a1dc | 394 | switch (INTEL_INFO(dev_priv)->gen) { |
9a4114ff | 395 | case 2: |
e91e941b | 396 | return alternate ? 66667 : 48000; |
9a4114ff BF |
397 | case 3: |
398 | case 4: | |
e91e941b | 399 | return alternate ? 100000 : 96000; |
9a4114ff | 400 | default: |
e91e941b | 401 | return alternate ? 100000 : 120000; |
9a4114ff BF |
402 | } |
403 | } | |
404 | ||
79e53945 JB |
405 | static void |
406 | parse_general_features(struct drm_i915_private *dev_priv, | |
dcb58a40 | 407 | const struct bdb_header *bdb) |
79e53945 | 408 | { |
e8ef3b4c | 409 | const struct bdb_general_features *general; |
79e53945 | 410 | |
79e53945 | 411 | general = find_section(bdb, BDB_GENERAL_FEATURES); |
34957e8c JN |
412 | if (!general) |
413 | return; | |
414 | ||
415 | dev_priv->vbt.int_tv_support = general->int_tv_support; | |
416 | /* int_crt_support can't be trusted on earlier platforms */ | |
417 | if (bdb->version >= 155 && | |
418 | (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv))) | |
419 | dev_priv->vbt.int_crt_support = general->int_crt_support; | |
420 | dev_priv->vbt.lvds_use_ssc = general->enable_ssc; | |
421 | dev_priv->vbt.lvds_ssc_freq = | |
422 | intel_bios_ssc_frequency(dev_priv, general->ssc_freq); | |
423 | dev_priv->vbt.display_clock_mode = general->display_clock_mode; | |
424 | dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted; | |
425 | DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n", | |
426 | dev_priv->vbt.int_tv_support, | |
427 | dev_priv->vbt.int_crt_support, | |
428 | dev_priv->vbt.lvds_use_ssc, | |
429 | dev_priv->vbt.lvds_ssc_freq, | |
430 | dev_priv->vbt.display_clock_mode, | |
431 | dev_priv->vbt.fdi_rx_polarity_inverted); | |
79e53945 JB |
432 | } |
433 | ||
db545019 DMEA |
434 | static void |
435 | parse_general_definitions(struct drm_i915_private *dev_priv, | |
dcb58a40 | 436 | const struct bdb_header *bdb) |
db545019 | 437 | { |
e8ef3b4c | 438 | const struct bdb_general_definitions *general; |
db545019 | 439 | |
db545019 DMEA |
440 | general = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
441 | if (general) { | |
442 | u16 block_size = get_blocksize(general); | |
443 | if (block_size >= sizeof(*general)) { | |
444 | int bus_pin = general->crt_ddc_gmbus_pin; | |
28c97730 | 445 | DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin); |
88ac7939 | 446 | if (intel_gmbus_is_valid_pin(dev_priv, bus_pin)) |
41aa3448 | 447 | dev_priv->vbt.crt_ddc_pin = bus_pin; |
db545019 | 448 | } else { |
28c97730 | 449 | DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n", |
3bd7d909 | 450 | block_size); |
db545019 DMEA |
451 | } |
452 | } | |
453 | } | |
454 | ||
cc998589 | 455 | static const struct child_device_config * |
e192839e | 456 | child_device_ptr(const struct bdb_general_definitions *defs, int i) |
90e4f159 | 457 | { |
e192839e | 458 | return (const void *) &defs->devices[i * defs->child_dev_size]; |
90e4f159 VS |
459 | } |
460 | ||
9b9d172d | 461 | static void |
462 | parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, | |
dcb58a40 | 463 | const struct bdb_header *bdb) |
9b9d172d | 464 | { |
e192839e JN |
465 | struct sdvo_device_mapping *mapping; |
466 | const struct bdb_general_definitions *defs; | |
cc998589 | 467 | const struct child_device_config *child; |
9b9d172d | 468 | int i, child_device_num, count; |
db545019 | 469 | u16 block_size; |
9b9d172d | 470 | |
e192839e JN |
471 | defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
472 | if (!defs) { | |
44834a67 | 473 | DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n"); |
9b9d172d | 474 | return; |
475 | } | |
6cc38aca JN |
476 | |
477 | /* | |
478 | * Only parse SDVO mappings when the general definitions block child | |
479 | * device size matches that of the *legacy* child device config | |
480 | * struct. Thus, SDVO mapping will be skipped for newer VBT. | |
9b9d172d | 481 | */ |
e192839e | 482 | if (defs->child_dev_size != LEGACY_CHILD_DEVICE_CONFIG_SIZE) { |
6cc38aca | 483 | DRM_DEBUG_KMS("Unsupported child device size for SDVO mapping.\n"); |
9b9d172d | 484 | return; |
485 | } | |
486 | /* get the block size of general definitions */ | |
e192839e | 487 | block_size = get_blocksize(defs); |
9b9d172d | 488 | /* get the number of child device */ |
e192839e | 489 | child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; |
9b9d172d | 490 | count = 0; |
491 | for (i = 0; i < child_device_num; i++) { | |
e192839e | 492 | child = child_device_ptr(defs, i); |
6cc38aca | 493 | if (!child->device_type) { |
9b9d172d | 494 | /* skip the device block if device type is invalid */ |
495 | continue; | |
496 | } | |
6cc38aca JN |
497 | if (child->slave_addr != SLAVE_ADDR1 && |
498 | child->slave_addr != SLAVE_ADDR2) { | |
9b9d172d | 499 | /* |
500 | * If the slave address is neither 0x70 nor 0x72, | |
501 | * it is not a SDVO device. Skip it. | |
502 | */ | |
503 | continue; | |
504 | } | |
6cc38aca JN |
505 | if (child->dvo_port != DEVICE_PORT_DVOB && |
506 | child->dvo_port != DEVICE_PORT_DVOC) { | |
9b9d172d | 507 | /* skip the incorrect SDVO port */ |
0206e353 | 508 | DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n"); |
9b9d172d | 509 | continue; |
510 | } | |
28c97730 | 511 | DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on" |
6cc38aca JN |
512 | " %s port\n", |
513 | child->slave_addr, | |
514 | (child->dvo_port == DEVICE_PORT_DVOB) ? | |
515 | "SDVOB" : "SDVOC"); | |
e192839e JN |
516 | mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1]; |
517 | if (!mapping->initialized) { | |
518 | mapping->dvo_port = child->dvo_port; | |
519 | mapping->slave_addr = child->slave_addr; | |
520 | mapping->dvo_wiring = child->dvo_wiring; | |
521 | mapping->ddc_pin = child->ddc_pin; | |
522 | mapping->i2c_pin = child->i2c_pin; | |
523 | mapping->initialized = 1; | |
46eb3036 | 524 | DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n", |
e192839e JN |
525 | mapping->dvo_port, |
526 | mapping->slave_addr, | |
527 | mapping->dvo_wiring, | |
528 | mapping->ddc_pin, | |
529 | mapping->i2c_pin); | |
9b9d172d | 530 | } else { |
28c97730 | 531 | DRM_DEBUG_KMS("Maybe one SDVO port is shared by " |
9b9d172d | 532 | "two SDVO device.\n"); |
533 | } | |
6cc38aca | 534 | if (child->slave2_addr) { |
9b9d172d | 535 | /* Maybe this is a SDVO device with multiple inputs */ |
536 | /* And the mapping info is not added */ | |
28c97730 ZY |
537 | DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this" |
538 | " is a SDVO device with multiple inputs.\n"); | |
9b9d172d | 539 | } |
540 | count++; | |
541 | } | |
542 | ||
543 | if (!count) { | |
544 | /* No SDVO device info is found */ | |
28c97730 | 545 | DRM_DEBUG_KMS("No SDVO device info is found in VBT\n"); |
9b9d172d | 546 | } |
547 | return; | |
548 | } | |
32f9d658 ZW |
549 | |
550 | static void | |
551 | parse_driver_features(struct drm_i915_private *dev_priv, | |
dcb58a40 | 552 | const struct bdb_header *bdb) |
32f9d658 | 553 | { |
e8ef3b4c | 554 | const struct bdb_driver_features *driver; |
32f9d658 | 555 | |
32f9d658 | 556 | driver = find_section(bdb, BDB_DRIVER_FEATURES); |
652c393a JB |
557 | if (!driver) |
558 | return; | |
559 | ||
6fca55b1 | 560 | if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP) |
6aa23e65 | 561 | dev_priv->vbt.edp.support = 1; |
652c393a | 562 | |
83a7280e PB |
563 | DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled); |
564 | /* | |
565 | * If DRRS is not supported, drrs_type has to be set to 0. | |
566 | * This is because, VBT is configured in such a way that | |
567 | * static DRRS is 0 and DRRS not supported is represented by | |
568 | * driver->drrs_enabled=false | |
569 | */ | |
570 | if (!driver->drrs_enabled) | |
571 | dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; | |
32f9d658 ZW |
572 | } |
573 | ||
500a8cc4 | 574 | static void |
dcb58a40 | 575 | parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) |
500a8cc4 | 576 | { |
e8ef3b4c JN |
577 | const struct bdb_edp *edp; |
578 | const struct edp_power_seq *edp_pps; | |
579 | const struct edp_link_params *edp_link_params; | |
3e845c7a | 580 | int panel_type = dev_priv->vbt.panel_type; |
500a8cc4 ZW |
581 | |
582 | edp = find_section(bdb, BDB_EDP); | |
583 | if (!edp) { | |
6aa23e65 | 584 | if (dev_priv->vbt.edp.support) |
9a30a61f | 585 | DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n"); |
500a8cc4 ZW |
586 | return; |
587 | } | |
588 | ||
589 | switch ((edp->color_depth >> (panel_type * 2)) & 3) { | |
590 | case EDP_18BPP: | |
6aa23e65 | 591 | dev_priv->vbt.edp.bpp = 18; |
500a8cc4 ZW |
592 | break; |
593 | case EDP_24BPP: | |
6aa23e65 | 594 | dev_priv->vbt.edp.bpp = 24; |
500a8cc4 ZW |
595 | break; |
596 | case EDP_30BPP: | |
6aa23e65 | 597 | dev_priv->vbt.edp.bpp = 30; |
500a8cc4 ZW |
598 | break; |
599 | } | |
5ceb0f9b | 600 | |
9f0e7ff4 JB |
601 | /* Get the eDP sequencing and link info */ |
602 | edp_pps = &edp->power_seqs[panel_type]; | |
603 | edp_link_params = &edp->link_params[panel_type]; | |
5ceb0f9b | 604 | |
6aa23e65 | 605 | dev_priv->vbt.edp.pps = *edp_pps; |
5ceb0f9b | 606 | |
e13e2b2c JN |
607 | switch (edp_link_params->rate) { |
608 | case EDP_RATE_1_62: | |
6aa23e65 | 609 | dev_priv->vbt.edp.rate = DP_LINK_BW_1_62; |
e13e2b2c JN |
610 | break; |
611 | case EDP_RATE_2_7: | |
6aa23e65 | 612 | dev_priv->vbt.edp.rate = DP_LINK_BW_2_7; |
e13e2b2c JN |
613 | break; |
614 | default: | |
615 | DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n", | |
616 | edp_link_params->rate); | |
617 | break; | |
618 | } | |
619 | ||
9f0e7ff4 | 620 | switch (edp_link_params->lanes) { |
e13e2b2c | 621 | case EDP_LANE_1: |
6aa23e65 | 622 | dev_priv->vbt.edp.lanes = 1; |
9f0e7ff4 | 623 | break; |
e13e2b2c | 624 | case EDP_LANE_2: |
6aa23e65 | 625 | dev_priv->vbt.edp.lanes = 2; |
9f0e7ff4 | 626 | break; |
e13e2b2c | 627 | case EDP_LANE_4: |
6aa23e65 | 628 | dev_priv->vbt.edp.lanes = 4; |
9f0e7ff4 | 629 | break; |
e13e2b2c JN |
630 | default: |
631 | DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n", | |
632 | edp_link_params->lanes); | |
633 | break; | |
9f0e7ff4 | 634 | } |
e13e2b2c | 635 | |
9f0e7ff4 | 636 | switch (edp_link_params->preemphasis) { |
e13e2b2c | 637 | case EDP_PREEMPHASIS_NONE: |
6aa23e65 | 638 | dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0; |
9f0e7ff4 | 639 | break; |
e13e2b2c | 640 | case EDP_PREEMPHASIS_3_5dB: |
6aa23e65 | 641 | dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1; |
9f0e7ff4 | 642 | break; |
e13e2b2c | 643 | case EDP_PREEMPHASIS_6dB: |
6aa23e65 | 644 | dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2; |
9f0e7ff4 | 645 | break; |
e13e2b2c | 646 | case EDP_PREEMPHASIS_9_5dB: |
6aa23e65 | 647 | dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3; |
9f0e7ff4 | 648 | break; |
e13e2b2c JN |
649 | default: |
650 | DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n", | |
651 | edp_link_params->preemphasis); | |
652 | break; | |
9f0e7ff4 | 653 | } |
e13e2b2c | 654 | |
9f0e7ff4 | 655 | switch (edp_link_params->vswing) { |
e13e2b2c | 656 | case EDP_VSWING_0_4V: |
6aa23e65 | 657 | dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0; |
9f0e7ff4 | 658 | break; |
e13e2b2c | 659 | case EDP_VSWING_0_6V: |
6aa23e65 | 660 | dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1; |
9f0e7ff4 | 661 | break; |
e13e2b2c | 662 | case EDP_VSWING_0_8V: |
6aa23e65 | 663 | dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2; |
9f0e7ff4 | 664 | break; |
e13e2b2c | 665 | case EDP_VSWING_1_2V: |
6aa23e65 | 666 | dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3; |
9f0e7ff4 | 667 | break; |
e13e2b2c JN |
668 | default: |
669 | DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n", | |
670 | edp_link_params->vswing); | |
671 | break; | |
9f0e7ff4 | 672 | } |
9a57f5bb SJ |
673 | |
674 | if (bdb->version >= 173) { | |
675 | uint8_t vswing; | |
676 | ||
9e458034 SJ |
677 | /* Don't read from VBT if module parameter has valid value*/ |
678 | if (i915.edp_vswing) { | |
06411f08 | 679 | dev_priv->vbt.edp.low_vswing = i915.edp_vswing == 1; |
9e458034 SJ |
680 | } else { |
681 | vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF; | |
06411f08 | 682 | dev_priv->vbt.edp.low_vswing = vswing == 0; |
9e458034 | 683 | } |
9a57f5bb | 684 | } |
500a8cc4 ZW |
685 | } |
686 | ||
bfd7ebda | 687 | static void |
dcb58a40 | 688 | parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb) |
bfd7ebda | 689 | { |
e8ef3b4c JN |
690 | const struct bdb_psr *psr; |
691 | const struct psr_table *psr_table; | |
3e845c7a | 692 | int panel_type = dev_priv->vbt.panel_type; |
bfd7ebda RV |
693 | |
694 | psr = find_section(bdb, BDB_PSR); | |
695 | if (!psr) { | |
696 | DRM_DEBUG_KMS("No PSR BDB found.\n"); | |
697 | return; | |
698 | } | |
699 | ||
700 | psr_table = &psr->psr_table[panel_type]; | |
701 | ||
702 | dev_priv->vbt.psr.full_link = psr_table->full_link; | |
703 | dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup; | |
704 | ||
705 | /* Allowed VBT values goes from 0 to 15 */ | |
706 | dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 : | |
707 | psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames; | |
708 | ||
709 | switch (psr_table->lines_to_wait) { | |
710 | case 0: | |
711 | dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT; | |
712 | break; | |
713 | case 1: | |
714 | dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT; | |
715 | break; | |
716 | case 2: | |
717 | dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT; | |
718 | break; | |
719 | case 3: | |
720 | dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT; | |
721 | break; | |
722 | default: | |
723 | DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n", | |
724 | psr_table->lines_to_wait); | |
725 | break; | |
726 | } | |
727 | ||
728 | dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time; | |
729 | dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time; | |
730 | } | |
731 | ||
d17c5443 | 732 | static void |
0f8689f5 JN |
733 | parse_mipi_config(struct drm_i915_private *dev_priv, |
734 | const struct bdb_header *bdb) | |
d17c5443 | 735 | { |
e8ef3b4c | 736 | const struct bdb_mipi_config *start; |
e8ef3b4c JN |
737 | const struct mipi_config *config; |
738 | const struct mipi_pps_data *pps; | |
3e845c7a | 739 | int panel_type = dev_priv->vbt.panel_type; |
d3b542fc | 740 | |
3e6bd011 | 741 | /* parse MIPI blocks only if LFP type is MIPI */ |
7caaef33 | 742 | if (!intel_bios_is_dsi_present(dev_priv, NULL)) |
3e6bd011 SK |
743 | return; |
744 | ||
d3b542fc SK |
745 | /* Initialize this to undefined indicating no generic MIPI support */ |
746 | dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID; | |
747 | ||
748 | /* Block #40 is already parsed and panel_fixed_mode is | |
749 | * stored in dev_priv->lfp_lvds_vbt_mode | |
750 | * resuse this when needed | |
751 | */ | |
d17c5443 | 752 | |
d3b542fc SK |
753 | /* Parse #52 for panel index used from panel_type already |
754 | * parsed | |
755 | */ | |
756 | start = find_section(bdb, BDB_MIPI_CONFIG); | |
757 | if (!start) { | |
758 | DRM_DEBUG_KMS("No MIPI config BDB found"); | |
d17c5443 SK |
759 | return; |
760 | } | |
761 | ||
d3b542fc SK |
762 | DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n", |
763 | panel_type); | |
764 | ||
765 | /* | |
766 | * get hold of the correct configuration block and pps data as per | |
767 | * the panel_type as index | |
768 | */ | |
769 | config = &start->config[panel_type]; | |
770 | pps = &start->pps[panel_type]; | |
771 | ||
772 | /* store as of now full data. Trim when we realise all is not needed */ | |
773 | dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL); | |
774 | if (!dev_priv->vbt.dsi.config) | |
775 | return; | |
776 | ||
777 | dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL); | |
778 | if (!dev_priv->vbt.dsi.pps) { | |
779 | kfree(dev_priv->vbt.dsi.config); | |
780 | return; | |
781 | } | |
782 | ||
9f7c5b17 D |
783 | /* |
784 | * These fields are introduced from the VBT version 197 onwards, | |
785 | * so making sure that these bits are set zero in the previous | |
786 | * versions. | |
787 | */ | |
788 | if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) { | |
789 | dev_priv->vbt.dsi.config->dl_dcs_cabc_ports = 0; | |
790 | dev_priv->vbt.dsi.config->dl_dcs_backlight_ports = 0; | |
791 | } | |
792 | ||
d3b542fc | 793 | /* We have mandatory mipi config blocks. Initialize as generic panel */ |
ea9a6baf | 794 | dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID; |
0f8689f5 JN |
795 | } |
796 | ||
5db72099 JN |
797 | /* Find the sequence block and size for the given panel. */ |
798 | static const u8 * | |
799 | find_panel_sequence_block(const struct bdb_mipi_sequence *sequence, | |
2a33d934 | 800 | u16 panel_id, u32 *seq_size) |
5db72099 JN |
801 | { |
802 | u32 total = get_blocksize(sequence); | |
803 | const u8 *data = &sequence->data[0]; | |
804 | u8 current_id; | |
2a33d934 JN |
805 | u32 current_size; |
806 | int header_size = sequence->version >= 3 ? 5 : 3; | |
5db72099 JN |
807 | int index = 0; |
808 | int i; | |
809 | ||
2a33d934 JN |
810 | /* skip new block size */ |
811 | if (sequence->version >= 3) | |
812 | data += 4; | |
813 | ||
814 | for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) { | |
815 | if (index + header_size > total) { | |
816 | DRM_ERROR("Invalid sequence block (header)\n"); | |
817 | return NULL; | |
818 | } | |
819 | ||
5db72099 | 820 | current_id = *(data + index); |
2a33d934 JN |
821 | if (sequence->version >= 3) |
822 | current_size = *((const u32 *)(data + index + 1)); | |
823 | else | |
824 | current_size = *((const u16 *)(data + index + 1)); | |
5db72099 | 825 | |
2a33d934 | 826 | index += header_size; |
5db72099 JN |
827 | |
828 | if (index + current_size > total) { | |
829 | DRM_ERROR("Invalid sequence block\n"); | |
830 | return NULL; | |
831 | } | |
832 | ||
833 | if (current_id == panel_id) { | |
834 | *seq_size = current_size; | |
835 | return data + index; | |
836 | } | |
837 | ||
838 | index += current_size; | |
839 | } | |
840 | ||
841 | DRM_ERROR("Sequence block detected but no valid configuration\n"); | |
842 | ||
843 | return NULL; | |
844 | } | |
845 | ||
8d3ed2f3 JN |
846 | static int goto_next_sequence(const u8 *data, int index, int total) |
847 | { | |
848 | u16 len; | |
849 | ||
850 | /* Skip Sequence Byte. */ | |
851 | for (index = index + 1; index < total; index += len) { | |
852 | u8 operation_byte = *(data + index); | |
853 | index++; | |
854 | ||
855 | switch (operation_byte) { | |
856 | case MIPI_SEQ_ELEM_END: | |
857 | return index; | |
858 | case MIPI_SEQ_ELEM_SEND_PKT: | |
859 | if (index + 4 > total) | |
860 | return 0; | |
861 | ||
862 | len = *((const u16 *)(data + index + 2)) + 4; | |
863 | break; | |
864 | case MIPI_SEQ_ELEM_DELAY: | |
865 | len = 4; | |
866 | break; | |
867 | case MIPI_SEQ_ELEM_GPIO: | |
868 | len = 2; | |
869 | break; | |
f4d64936 JN |
870 | case MIPI_SEQ_ELEM_I2C: |
871 | if (index + 7 > total) | |
872 | return 0; | |
873 | len = *(data + index + 6) + 7; | |
874 | break; | |
8d3ed2f3 JN |
875 | default: |
876 | DRM_ERROR("Unknown operation byte\n"); | |
877 | return 0; | |
878 | } | |
879 | } | |
880 | ||
881 | return 0; | |
882 | } | |
883 | ||
2a33d934 JN |
884 | static int goto_next_sequence_v3(const u8 *data, int index, int total) |
885 | { | |
886 | int seq_end; | |
887 | u16 len; | |
6765bd6d | 888 | u32 size_of_sequence; |
2a33d934 JN |
889 | |
890 | /* | |
891 | * Could skip sequence based on Size of Sequence alone, but also do some | |
892 | * checking on the structure. | |
893 | */ | |
894 | if (total < 5) { | |
895 | DRM_ERROR("Too small sequence size\n"); | |
896 | return 0; | |
897 | } | |
898 | ||
6765bd6d JN |
899 | /* Skip Sequence Byte. */ |
900 | index++; | |
901 | ||
902 | /* | |
903 | * Size of Sequence. Excludes the Sequence Byte and the size itself, | |
904 | * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END | |
905 | * byte. | |
906 | */ | |
907 | size_of_sequence = *((const uint32_t *)(data + index)); | |
908 | index += 4; | |
909 | ||
910 | seq_end = index + size_of_sequence; | |
2a33d934 JN |
911 | if (seq_end > total) { |
912 | DRM_ERROR("Invalid sequence size\n"); | |
913 | return 0; | |
914 | } | |
915 | ||
6765bd6d | 916 | for (; index < total; index += len) { |
2a33d934 JN |
917 | u8 operation_byte = *(data + index); |
918 | index++; | |
919 | ||
920 | if (operation_byte == MIPI_SEQ_ELEM_END) { | |
921 | if (index != seq_end) { | |
922 | DRM_ERROR("Invalid element structure\n"); | |
923 | return 0; | |
924 | } | |
925 | return index; | |
926 | } | |
927 | ||
928 | len = *(data + index); | |
929 | index++; | |
930 | ||
931 | /* | |
932 | * FIXME: Would be nice to check elements like for v1/v2 in | |
933 | * goto_next_sequence() above. | |
934 | */ | |
935 | switch (operation_byte) { | |
936 | case MIPI_SEQ_ELEM_SEND_PKT: | |
937 | case MIPI_SEQ_ELEM_DELAY: | |
938 | case MIPI_SEQ_ELEM_GPIO: | |
939 | case MIPI_SEQ_ELEM_I2C: | |
940 | case MIPI_SEQ_ELEM_SPI: | |
941 | case MIPI_SEQ_ELEM_PMIC: | |
942 | break; | |
943 | default: | |
944 | DRM_ERROR("Unknown operation byte %u\n", | |
945 | operation_byte); | |
946 | break; | |
947 | } | |
948 | } | |
949 | ||
950 | return 0; | |
951 | } | |
952 | ||
0f8689f5 JN |
953 | static void |
954 | parse_mipi_sequence(struct drm_i915_private *dev_priv, | |
955 | const struct bdb_header *bdb) | |
956 | { | |
3e845c7a | 957 | int panel_type = dev_priv->vbt.panel_type; |
0f8689f5 JN |
958 | const struct bdb_mipi_sequence *sequence; |
959 | const u8 *seq_data; | |
2a33d934 | 960 | u32 seq_size; |
0f8689f5 | 961 | u8 *data; |
8d3ed2f3 | 962 | int index = 0; |
0f8689f5 JN |
963 | |
964 | /* Only our generic panel driver uses the sequence block. */ | |
965 | if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID) | |
966 | return; | |
d3b542fc | 967 | |
d3b542fc SK |
968 | sequence = find_section(bdb, BDB_MIPI_SEQUENCE); |
969 | if (!sequence) { | |
970 | DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n"); | |
971 | return; | |
972 | } | |
973 | ||
cd67d226 | 974 | /* Fail gracefully for forward incompatible sequence block. */ |
2a33d934 JN |
975 | if (sequence->version >= 4) { |
976 | DRM_ERROR("Unable to parse MIPI Sequence Block v%u\n", | |
977 | sequence->version); | |
cd67d226 JN |
978 | return; |
979 | } | |
980 | ||
2a33d934 | 981 | DRM_DEBUG_DRIVER("Found MIPI sequence block v%u\n", sequence->version); |
d3b542fc | 982 | |
5db72099 JN |
983 | seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size); |
984 | if (!seq_data) | |
d3b542fc | 985 | return; |
d3b542fc | 986 | |
8d3ed2f3 JN |
987 | data = kmemdup(seq_data, seq_size, GFP_KERNEL); |
988 | if (!data) | |
d3b542fc SK |
989 | return; |
990 | ||
8d3ed2f3 JN |
991 | /* Parse the sequences, store pointers to each sequence. */ |
992 | for (;;) { | |
993 | u8 seq_id = *(data + index); | |
994 | if (seq_id == MIPI_SEQ_END) | |
995 | break; | |
d3b542fc | 996 | |
8d3ed2f3 JN |
997 | if (seq_id >= MIPI_SEQ_MAX) { |
998 | DRM_ERROR("Unknown sequence %u\n", seq_id); | |
d3b542fc SK |
999 | goto err; |
1000 | } | |
1001 | ||
4b4f497e JN |
1002 | /* Log about presence of sequences we won't run. */ |
1003 | if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF) | |
1004 | DRM_DEBUG_KMS("Unsupported sequence %u\n", seq_id); | |
1005 | ||
8d3ed2f3 | 1006 | dev_priv->vbt.dsi.sequence[seq_id] = data + index; |
d3b542fc | 1007 | |
2a33d934 JN |
1008 | if (sequence->version >= 3) |
1009 | index = goto_next_sequence_v3(data, index, seq_size); | |
1010 | else | |
1011 | index = goto_next_sequence(data, index, seq_size); | |
8d3ed2f3 JN |
1012 | if (!index) { |
1013 | DRM_ERROR("Invalid sequence %u\n", seq_id); | |
d3b542fc SK |
1014 | goto err; |
1015 | } | |
d3b542fc SK |
1016 | } |
1017 | ||
8d3ed2f3 JN |
1018 | dev_priv->vbt.dsi.data = data; |
1019 | dev_priv->vbt.dsi.size = seq_size; | |
1020 | dev_priv->vbt.dsi.seq_version = sequence->version; | |
1021 | ||
1022 | DRM_DEBUG_DRIVER("MIPI related VBT parsing complete\n"); | |
d3b542fc | 1023 | return; |
d3b542fc | 1024 | |
8d3ed2f3 JN |
1025 | err: |
1026 | kfree(data); | |
ed3b6679 | 1027 | memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence)); |
d17c5443 SK |
1028 | } |
1029 | ||
75067dde AK |
1030 | static u8 translate_iboost(u8 val) |
1031 | { | |
1032 | static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */ | |
1033 | ||
1034 | if (val >= ARRAY_SIZE(mapping)) { | |
1035 | DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val); | |
1036 | return 0; | |
1037 | } | |
1038 | return mapping[val]; | |
1039 | } | |
1040 | ||
9454fa87 VS |
1041 | static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, |
1042 | enum port port) | |
1043 | { | |
1044 | const struct ddi_vbt_port_info *info = | |
1045 | &dev_priv->vbt.ddi_port_info[port]; | |
1046 | enum port p; | |
1047 | ||
1048 | if (!info->alternate_ddc_pin) | |
1049 | return; | |
1050 | ||
1051 | for_each_port_masked(p, (1 << port) - 1) { | |
1052 | struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p]; | |
1053 | ||
1054 | if (info->alternate_ddc_pin != i->alternate_ddc_pin) | |
1055 | continue; | |
1056 | ||
1057 | DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, " | |
1058 | "disabling port %c DVI/HDMI support\n", | |
1059 | port_name(p), i->alternate_ddc_pin, | |
1060 | port_name(port), port_name(p)); | |
1061 | ||
1062 | /* | |
1063 | * If we have multiple ports supposedly sharing the | |
1064 | * pin, then dvi/hdmi couldn't exist on the shared | |
1065 | * port. Otherwise they share the same ddc bin and | |
1066 | * system couldn't communicate with them separately. | |
1067 | * | |
1068 | * Due to parsing the ports in alphabetical order, | |
1069 | * a higher port will always clobber a lower one. | |
1070 | */ | |
1071 | i->supports_dvi = false; | |
1072 | i->supports_hdmi = false; | |
1073 | i->alternate_ddc_pin = 0; | |
1074 | } | |
1075 | } | |
1076 | ||
1077 | static void sanitize_aux_ch(struct drm_i915_private *dev_priv, | |
1078 | enum port port) | |
1079 | { | |
1080 | const struct ddi_vbt_port_info *info = | |
1081 | &dev_priv->vbt.ddi_port_info[port]; | |
1082 | enum port p; | |
1083 | ||
1084 | if (!info->alternate_aux_channel) | |
1085 | return; | |
1086 | ||
1087 | for_each_port_masked(p, (1 << port) - 1) { | |
1088 | struct ddi_vbt_port_info *i = &dev_priv->vbt.ddi_port_info[p]; | |
1089 | ||
1090 | if (info->alternate_aux_channel != i->alternate_aux_channel) | |
1091 | continue; | |
1092 | ||
1093 | DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, " | |
1094 | "disabling port %c DP support\n", | |
1095 | port_name(p), i->alternate_aux_channel, | |
1096 | port_name(port), port_name(p)); | |
1097 | ||
1098 | /* | |
1099 | * If we have multiple ports supposedlt sharing the | |
1100 | * aux channel, then DP couldn't exist on the shared | |
1101 | * port. Otherwise they share the same aux channel | |
1102 | * and system couldn't communicate with them separately. | |
1103 | * | |
1104 | * Due to parsing the ports in alphabetical order, | |
1105 | * a higher port will always clobber a lower one. | |
1106 | */ | |
1107 | i->supports_dp = false; | |
1108 | i->alternate_aux_channel = 0; | |
1109 | } | |
1110 | } | |
1111 | ||
6acab15a | 1112 | static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, |
dcb58a40 | 1113 | const struct bdb_header *bdb) |
6acab15a | 1114 | { |
cc998589 | 1115 | struct child_device_config *it, *child = NULL; |
6acab15a PZ |
1116 | struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port]; |
1117 | uint8_t hdmi_level_shift; | |
1118 | int i, j; | |
554d6af5 | 1119 | bool is_dvi, is_hdmi, is_dp, is_edp, is_crt; |
11c1b657 | 1120 | uint8_t aux_channel, ddc_pin; |
6acab15a | 1121 | /* Each DDI port can have more than one value on the "DVO Port" field, |
b5273d72 JN |
1122 | * so look for all the possible values for each port. |
1123 | */ | |
2800e4c2 RV |
1124 | int dvo_ports[][3] = { |
1125 | {DVO_PORT_HDMIA, DVO_PORT_DPA, -1}, | |
1126 | {DVO_PORT_HDMIB, DVO_PORT_DPB, -1}, | |
1127 | {DVO_PORT_HDMIC, DVO_PORT_DPC, -1}, | |
1128 | {DVO_PORT_HDMID, DVO_PORT_DPD, -1}, | |
1129 | {DVO_PORT_CRT, DVO_PORT_HDMIE, DVO_PORT_DPE}, | |
6acab15a PZ |
1130 | }; |
1131 | ||
b5273d72 JN |
1132 | /* |
1133 | * Find the first child device to reference the port, report if more | |
1134 | * than one found. | |
1135 | */ | |
6acab15a PZ |
1136 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { |
1137 | it = dev_priv->vbt.child_dev + i; | |
1138 | ||
2800e4c2 | 1139 | for (j = 0; j < 3; j++) { |
6acab15a PZ |
1140 | if (dvo_ports[port][j] == -1) |
1141 | break; | |
1142 | ||
cc998589 | 1143 | if (it->dvo_port == dvo_ports[port][j]) { |
6acab15a | 1144 | if (child) { |
b5273d72 | 1145 | DRM_DEBUG_KMS("More than one child device for port %c in VBT, using the first.\n", |
6acab15a | 1146 | port_name(port)); |
b5273d72 JN |
1147 | } else { |
1148 | child = it; | |
6acab15a | 1149 | } |
6acab15a PZ |
1150 | } |
1151 | } | |
1152 | } | |
1153 | if (!child) | |
1154 | return; | |
1155 | ||
cc998589 JN |
1156 | aux_channel = child->aux_channel; |
1157 | ddc_pin = child->ddc_pin; | |
6bf19e7c | 1158 | |
cc998589 JN |
1159 | is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING; |
1160 | is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT; | |
1161 | is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT; | |
1162 | is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0; | |
1163 | is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR); | |
554d6af5 | 1164 | |
311a2094 PZ |
1165 | info->supports_dvi = is_dvi; |
1166 | info->supports_hdmi = is_hdmi; | |
1167 | info->supports_dp = is_dp; | |
a98d9c1d | 1168 | info->supports_edp = is_edp; |
311a2094 | 1169 | |
554d6af5 PZ |
1170 | DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n", |
1171 | port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt); | |
1172 | ||
1173 | if (is_edp && is_dvi) | |
1174 | DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n", | |
1175 | port_name(port)); | |
1176 | if (is_crt && port != PORT_E) | |
1177 | DRM_DEBUG_KMS("Port %c is analog\n", port_name(port)); | |
1178 | if (is_crt && (is_dvi || is_dp)) | |
1179 | DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n", | |
1180 | port_name(port)); | |
1181 | if (is_dvi && (port == PORT_A || port == PORT_E)) | |
9b13494c | 1182 | DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port)); |
554d6af5 PZ |
1183 | if (!is_dvi && !is_dp && !is_crt) |
1184 | DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n", | |
1185 | port_name(port)); | |
1186 | if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E)) | |
1187 | DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port)); | |
6bf19e7c PZ |
1188 | |
1189 | if (is_dvi) { | |
9454fa87 VS |
1190 | info->alternate_ddc_pin = ddc_pin; |
1191 | ||
75be7756 RV |
1192 | /* |
1193 | * All VBTs that we got so far for B Stepping has this | |
1194 | * information wrong for Port D. So, let's just ignore for now. | |
1195 | */ | |
1196 | if (IS_CNL_REVID(dev_priv, CNL_REVID_B0, CNL_REVID_B0) && | |
1197 | port == PORT_D) { | |
1198 | info->alternate_ddc_pin = 0; | |
1199 | } | |
1200 | ||
9454fa87 | 1201 | sanitize_ddc_pin(dev_priv, port); |
6bf19e7c PZ |
1202 | } |
1203 | ||
1204 | if (is_dp) { | |
9454fa87 VS |
1205 | info->alternate_aux_channel = aux_channel; |
1206 | ||
1207 | sanitize_aux_ch(dev_priv, port); | |
6bf19e7c PZ |
1208 | } |
1209 | ||
6acab15a PZ |
1210 | if (bdb->version >= 158) { |
1211 | /* The VBT HDMI level shift values match the table we have. */ | |
cc998589 | 1212 | hdmi_level_shift = child->hdmi_level_shifter_value; |
ce4dd49e DL |
1213 | DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n", |
1214 | port_name(port), | |
1215 | hdmi_level_shift); | |
1216 | info->hdmi_level_shift = hdmi_level_shift; | |
6acab15a | 1217 | } |
75067dde AK |
1218 | |
1219 | /* Parse the I_boost config for SKL and above */ | |
cc998589 | 1220 | if (bdb->version >= 196 && child->iboost) { |
f22bb358 | 1221 | info->dp_boost_level = translate_iboost(child->dp_iboost_level); |
75067dde AK |
1222 | DRM_DEBUG_KMS("VBT (e)DP boost level for port %c: %d\n", |
1223 | port_name(port), info->dp_boost_level); | |
f22bb358 | 1224 | info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level); |
75067dde AK |
1225 | DRM_DEBUG_KMS("VBT HDMI boost level for port %c: %d\n", |
1226 | port_name(port), info->hdmi_boost_level); | |
1227 | } | |
6acab15a PZ |
1228 | } |
1229 | ||
1230 | static void parse_ddi_ports(struct drm_i915_private *dev_priv, | |
dcb58a40 | 1231 | const struct bdb_header *bdb) |
6acab15a | 1232 | { |
6acab15a PZ |
1233 | enum port port; |
1234 | ||
98f3a1dc | 1235 | if (!HAS_DDI(dev_priv)) |
6acab15a PZ |
1236 | return; |
1237 | ||
1238 | if (!dev_priv->vbt.child_dev_num) | |
1239 | return; | |
1240 | ||
1241 | if (bdb->version < 155) | |
1242 | return; | |
1243 | ||
1244 | for (port = PORT_A; port < I915_MAX_PORTS; port++) | |
1245 | parse_ddi_port(dev_priv, port, bdb); | |
1246 | } | |
1247 | ||
6363ee6f ZY |
1248 | static void |
1249 | parse_device_mapping(struct drm_i915_private *dev_priv, | |
dcb58a40 | 1250 | const struct bdb_header *bdb) |
6363ee6f | 1251 | { |
e192839e JN |
1252 | const struct bdb_general_definitions *defs; |
1253 | const struct child_device_config *child; | |
cc998589 | 1254 | struct child_device_config *child_dev_ptr; |
6363ee6f | 1255 | int i, child_device_num, count; |
e2d6cf7f DW |
1256 | u8 expected_size; |
1257 | u16 block_size; | |
6363ee6f | 1258 | |
e192839e JN |
1259 | defs = find_section(bdb, BDB_GENERAL_DEFINITIONS); |
1260 | if (!defs) { | |
44834a67 | 1261 | DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n"); |
6363ee6f ZY |
1262 | return; |
1263 | } | |
7244f309 VS |
1264 | if (bdb->version < 106) { |
1265 | expected_size = 22; | |
fa05178c | 1266 | } else if (bdb->version < 111) { |
52b69c84 VS |
1267 | expected_size = 27; |
1268 | } else if (bdb->version < 195) { | |
21907e72 | 1269 | expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE; |
e2d6cf7f DW |
1270 | } else if (bdb->version == 195) { |
1271 | expected_size = 37; | |
1272 | } else if (bdb->version <= 197) { | |
1273 | expected_size = 38; | |
1274 | } else { | |
1275 | expected_size = 38; | |
e192839e | 1276 | BUILD_BUG_ON(sizeof(*child) < 38); |
e2d6cf7f DW |
1277 | DRM_DEBUG_DRIVER("Expected child device config size for VBT version %u not known; assuming %u\n", |
1278 | bdb->version, expected_size); | |
1279 | } | |
1280 | ||
e2d6cf7f | 1281 | /* Flag an error for unexpected size, but continue anyway. */ |
e192839e | 1282 | if (defs->child_dev_size != expected_size) |
e2d6cf7f | 1283 | DRM_ERROR("Unexpected child device config size %u (expected %u for VBT version %u)\n", |
e192839e | 1284 | defs->child_dev_size, expected_size, bdb->version); |
e2d6cf7f | 1285 | |
52b69c84 | 1286 | /* The legacy sized child device config is the minimum we need. */ |
e192839e | 1287 | if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) { |
52b69c84 | 1288 | DRM_DEBUG_KMS("Child device config size %u is too small.\n", |
e192839e | 1289 | defs->child_dev_size); |
52b69c84 VS |
1290 | return; |
1291 | } | |
1292 | ||
6363ee6f | 1293 | /* get the block size of general definitions */ |
e192839e | 1294 | block_size = get_blocksize(defs); |
6363ee6f | 1295 | /* get the number of child device */ |
e192839e | 1296 | child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size; |
6363ee6f ZY |
1297 | count = 0; |
1298 | /* get the number of child device that is present */ | |
1299 | for (i = 0; i < child_device_num; i++) { | |
e192839e JN |
1300 | child = child_device_ptr(defs, i); |
1301 | if (!child->device_type) { | |
6363ee6f ZY |
1302 | /* skip the device block if device type is invalid */ |
1303 | continue; | |
1304 | } | |
1305 | count++; | |
1306 | } | |
1307 | if (!count) { | |
0206e353 | 1308 | DRM_DEBUG_KMS("no child dev is parsed from VBT\n"); |
6363ee6f ZY |
1309 | return; |
1310 | } | |
e192839e | 1311 | dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL); |
41aa3448 | 1312 | if (!dev_priv->vbt.child_dev) { |
6363ee6f ZY |
1313 | DRM_DEBUG_KMS("No memory space for child device\n"); |
1314 | return; | |
1315 | } | |
1316 | ||
41aa3448 | 1317 | dev_priv->vbt.child_dev_num = count; |
6363ee6f ZY |
1318 | count = 0; |
1319 | for (i = 0; i < child_device_num; i++) { | |
e192839e JN |
1320 | child = child_device_ptr(defs, i); |
1321 | if (!child->device_type) { | |
6363ee6f ZY |
1322 | /* skip the device block if device type is invalid */ |
1323 | continue; | |
1324 | } | |
3e6bd011 | 1325 | |
41aa3448 | 1326 | child_dev_ptr = dev_priv->vbt.child_dev + count; |
6363ee6f | 1327 | count++; |
e2d6cf7f DW |
1328 | |
1329 | /* | |
1330 | * Copy as much as we know (sizeof) and is available | |
1331 | * (child_dev_size) of the child device. Accessing the data must | |
1332 | * depend on VBT version. | |
1333 | */ | |
e192839e JN |
1334 | memcpy(child_dev_ptr, child, |
1335 | min_t(size_t, defs->child_dev_size, sizeof(*child))); | |
4e27bd50 SS |
1336 | |
1337 | /* | |
1338 | * copied full block, now init values when they are not | |
1339 | * available in current version | |
1340 | */ | |
1341 | if (bdb->version < 196) { | |
1342 | /* Set default values for bits added from v196 */ | |
cc998589 JN |
1343 | child_dev_ptr->iboost = 0; |
1344 | child_dev_ptr->hpd_invert = 0; | |
4e27bd50 SS |
1345 | } |
1346 | ||
1347 | if (bdb->version < 192) | |
cc998589 | 1348 | child_dev_ptr->lspcon = 0; |
6363ee6f ZY |
1349 | } |
1350 | return; | |
1351 | } | |
44834a67 | 1352 | |
bb1d1329 | 1353 | /* Common defaults which may be overridden by VBT. */ |
6a04002b SQ |
1354 | static void |
1355 | init_vbt_defaults(struct drm_i915_private *dev_priv) | |
1356 | { | |
6acab15a | 1357 | enum port port; |
9a4114ff | 1358 | |
988c7015 | 1359 | dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC; |
6a04002b | 1360 | |
56c4b63a JN |
1361 | /* Default to having backlight */ |
1362 | dev_priv->vbt.backlight.present = true; | |
1363 | ||
6a04002b | 1364 | /* LFP panel data */ |
41aa3448 RV |
1365 | dev_priv->vbt.lvds_dither = 1; |
1366 | dev_priv->vbt.lvds_vbt = 0; | |
6a04002b SQ |
1367 | |
1368 | /* SDVO panel data */ | |
41aa3448 | 1369 | dev_priv->vbt.sdvo_lvds_vbt_mode = NULL; |
6a04002b SQ |
1370 | |
1371 | /* general features */ | |
41aa3448 RV |
1372 | dev_priv->vbt.int_tv_support = 1; |
1373 | dev_priv->vbt.int_crt_support = 1; | |
9a4114ff BF |
1374 | |
1375 | /* Default to using SSC */ | |
41aa3448 | 1376 | dev_priv->vbt.lvds_use_ssc = 1; |
f69e5156 DL |
1377 | /* |
1378 | * Core/SandyBridge/IvyBridge use alternative (120MHz) reference | |
1379 | * clock for LVDS. | |
1380 | */ | |
98f3a1dc JN |
1381 | dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv, |
1382 | !HAS_PCH_SPLIT(dev_priv)); | |
e91e941b | 1383 | DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq); |
6acab15a PZ |
1384 | |
1385 | for (port = PORT_A; port < I915_MAX_PORTS; port++) { | |
311a2094 PZ |
1386 | struct ddi_vbt_port_info *info = |
1387 | &dev_priv->vbt.ddi_port_info[port]; | |
1388 | ||
ce4dd49e | 1389 | info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN; |
bb1d1329 JN |
1390 | } |
1391 | } | |
1392 | ||
1393 | /* Defaults to initialize only if there is no VBT. */ | |
1394 | static void | |
1395 | init_vbt_missing_defaults(struct drm_i915_private *dev_priv) | |
1396 | { | |
1397 | enum port port; | |
1398 | ||
1399 | for (port = PORT_A; port < I915_MAX_PORTS; port++) { | |
1400 | struct ddi_vbt_port_info *info = | |
1401 | &dev_priv->vbt.ddi_port_info[port]; | |
311a2094 PZ |
1402 | |
1403 | info->supports_dvi = (port != PORT_A && port != PORT_E); | |
1404 | info->supports_hdmi = info->supports_dvi; | |
1405 | info->supports_dp = (port != PORT_E); | |
6acab15a | 1406 | } |
6a04002b SQ |
1407 | } |
1408 | ||
caf37fa4 JN |
1409 | static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt) |
1410 | { | |
1411 | const void *_vbt = vbt; | |
1412 | ||
1413 | return _vbt + vbt->bdb_offset; | |
1414 | } | |
1415 | ||
f0067a31 JN |
1416 | /** |
1417 | * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT | |
1418 | * @buf: pointer to a buffer to validate | |
1419 | * @size: size of the buffer | |
1420 | * | |
1421 | * Returns true on valid VBT. | |
1422 | */ | |
1423 | bool intel_bios_is_valid_vbt(const void *buf, size_t size) | |
3dd4e846 | 1424 | { |
f0067a31 | 1425 | const struct vbt_header *vbt = buf; |
dcb58a40 | 1426 | const struct bdb_header *bdb; |
3dd4e846 | 1427 | |
caf37fa4 | 1428 | if (!vbt) |
f0067a31 | 1429 | return false; |
caf37fa4 | 1430 | |
f0067a31 | 1431 | if (sizeof(struct vbt_header) > size) { |
3dd4e846 | 1432 | DRM_DEBUG_DRIVER("VBT header incomplete\n"); |
f0067a31 | 1433 | return false; |
3dd4e846 CW |
1434 | } |
1435 | ||
1436 | if (memcmp(vbt->signature, "$VBT", 4)) { | |
1437 | DRM_DEBUG_DRIVER("VBT invalid signature\n"); | |
f0067a31 | 1438 | return false; |
3dd4e846 CW |
1439 | } |
1440 | ||
e8f9ae9b CW |
1441 | if (range_overflows_t(size_t, |
1442 | vbt->bdb_offset, | |
1443 | sizeof(struct bdb_header), | |
1444 | size)) { | |
3dd4e846 | 1445 | DRM_DEBUG_DRIVER("BDB header incomplete\n"); |
f0067a31 | 1446 | return false; |
3dd4e846 CW |
1447 | } |
1448 | ||
caf37fa4 | 1449 | bdb = get_bdb_header(vbt); |
e8f9ae9b | 1450 | if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) { |
3dd4e846 | 1451 | DRM_DEBUG_DRIVER("BDB incomplete\n"); |
f0067a31 | 1452 | return false; |
3dd4e846 CW |
1453 | } |
1454 | ||
caf37fa4 | 1455 | return vbt; |
3dd4e846 CW |
1456 | } |
1457 | ||
caf37fa4 | 1458 | static const struct vbt_header *find_vbt(void __iomem *bios, size_t size) |
b34a991a | 1459 | { |
b34a991a JN |
1460 | size_t i; |
1461 | ||
1462 | /* Scour memory looking for the VBT signature. */ | |
1463 | for (i = 0; i + 4 < size; i++) { | |
f0067a31 | 1464 | void *vbt; |
115719fc | 1465 | |
f0067a31 JN |
1466 | if (ioread32(bios + i) != *((const u32 *) "$VBT")) |
1467 | continue; | |
1468 | ||
1469 | /* | |
1470 | * This is the one place where we explicitly discard the address | |
1471 | * space (__iomem) of the BIOS/VBT. | |
1472 | */ | |
1473 | vbt = (void __force *) bios + i; | |
1474 | if (intel_bios_is_valid_vbt(vbt, size - i)) | |
1475 | return vbt; | |
1476 | ||
1477 | break; | |
b34a991a JN |
1478 | } |
1479 | ||
f0067a31 | 1480 | return NULL; |
b34a991a JN |
1481 | } |
1482 | ||
79e53945 | 1483 | /** |
8b8e1a89 | 1484 | * intel_bios_init - find VBT and initialize settings from the BIOS |
dd97950a | 1485 | * @dev_priv: i915 device instance |
79e53945 | 1486 | * |
66578857 JN |
1487 | * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT |
1488 | * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also | |
1489 | * initialize some defaults if the VBT is not present at all. | |
79e53945 | 1490 | */ |
66578857 | 1491 | void intel_bios_init(struct drm_i915_private *dev_priv) |
79e53945 | 1492 | { |
91c8a326 | 1493 | struct pci_dev *pdev = dev_priv->drm.pdev; |
f0067a31 | 1494 | const struct vbt_header *vbt = dev_priv->opregion.vbt; |
caf37fa4 | 1495 | const struct bdb_header *bdb; |
44834a67 CW |
1496 | u8 __iomem *bios = NULL; |
1497 | ||
66578857 JN |
1498 | if (HAS_PCH_NOP(dev_priv)) { |
1499 | DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n"); | |
1500 | return; | |
1501 | } | |
ab5c608b | 1502 | |
6a04002b | 1503 | init_vbt_defaults(dev_priv); |
f899fc64 | 1504 | |
66578857 | 1505 | /* If the OpRegion does not have VBT, look in PCI ROM. */ |
f0067a31 | 1506 | if (!vbt) { |
b34a991a | 1507 | size_t size; |
79e53945 | 1508 | |
44834a67 CW |
1509 | bios = pci_map_rom(pdev, &size); |
1510 | if (!bios) | |
66578857 | 1511 | goto out; |
44834a67 | 1512 | |
caf37fa4 | 1513 | vbt = find_vbt(bios, size); |
66578857 JN |
1514 | if (!vbt) |
1515 | goto out; | |
e2051c44 JN |
1516 | |
1517 | DRM_DEBUG_KMS("Found valid VBT in PCI ROM\n"); | |
44834a67 | 1518 | } |
79e53945 | 1519 | |
caf37fa4 JN |
1520 | bdb = get_bdb_header(vbt); |
1521 | ||
3556dd40 JN |
1522 | DRM_DEBUG_KMS("VBT signature \"%.*s\", BDB version %d\n", |
1523 | (int)sizeof(vbt->signature), vbt->signature, bdb->version); | |
e2051c44 | 1524 | |
79e53945 JB |
1525 | /* Grab useful general definitions */ |
1526 | parse_general_features(dev_priv, bdb); | |
db545019 | 1527 | parse_general_definitions(dev_priv, bdb); |
88631706 | 1528 | parse_lfp_panel_data(dev_priv, bdb); |
f00076d2 | 1529 | parse_lfp_backlight(dev_priv, bdb); |
88631706 | 1530 | parse_sdvo_panel_data(dev_priv, bdb); |
9b9d172d | 1531 | parse_sdvo_device_mapping(dev_priv, bdb); |
6363ee6f | 1532 | parse_device_mapping(dev_priv, bdb); |
32f9d658 | 1533 | parse_driver_features(dev_priv, bdb); |
500a8cc4 | 1534 | parse_edp(dev_priv, bdb); |
bfd7ebda | 1535 | parse_psr(dev_priv, bdb); |
0f8689f5 JN |
1536 | parse_mipi_config(dev_priv, bdb); |
1537 | parse_mipi_sequence(dev_priv, bdb); | |
6acab15a | 1538 | parse_ddi_ports(dev_priv, bdb); |
32f9d658 | 1539 | |
66578857 | 1540 | out: |
bb1d1329 | 1541 | if (!vbt) { |
66578857 | 1542 | DRM_INFO("Failed to find VBIOS tables (VBT)\n"); |
bb1d1329 JN |
1543 | init_vbt_missing_defaults(dev_priv); |
1544 | } | |
66578857 | 1545 | |
44834a67 CW |
1546 | if (bios) |
1547 | pci_unmap_rom(pdev, bios); | |
79e53945 | 1548 | } |
3bdd14d5 JN |
1549 | |
1550 | /** | |
1551 | * intel_bios_is_tv_present - is integrated TV present in VBT | |
1552 | * @dev_priv: i915 device instance | |
1553 | * | |
1554 | * Return true if TV is present. If no child devices were parsed from VBT, | |
1555 | * assume TV is present. | |
1556 | */ | |
1557 | bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv) | |
1558 | { | |
cc998589 | 1559 | const struct child_device_config *child; |
3bdd14d5 JN |
1560 | int i; |
1561 | ||
1562 | if (!dev_priv->vbt.int_tv_support) | |
1563 | return false; | |
1564 | ||
1565 | if (!dev_priv->vbt.child_dev_num) | |
1566 | return true; | |
1567 | ||
1568 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { | |
cc998589 | 1569 | child = dev_priv->vbt.child_dev + i; |
3bdd14d5 JN |
1570 | /* |
1571 | * If the device type is not TV, continue. | |
1572 | */ | |
cc998589 | 1573 | switch (child->device_type) { |
3bdd14d5 JN |
1574 | case DEVICE_TYPE_INT_TV: |
1575 | case DEVICE_TYPE_TV: | |
1576 | case DEVICE_TYPE_TV_SVIDEO_COMPOSITE: | |
1577 | break; | |
1578 | default: | |
1579 | continue; | |
1580 | } | |
1581 | /* Only when the addin_offset is non-zero, it is regarded | |
1582 | * as present. | |
1583 | */ | |
cc998589 | 1584 | if (child->addin_offset) |
3bdd14d5 JN |
1585 | return true; |
1586 | } | |
1587 | ||
1588 | return false; | |
1589 | } | |
5a69d13d JN |
1590 | |
1591 | /** | |
1592 | * intel_bios_is_lvds_present - is LVDS present in VBT | |
1593 | * @dev_priv: i915 device instance | |
1594 | * @i2c_pin: i2c pin for LVDS if present | |
1595 | * | |
1596 | * Return true if LVDS is present. If no child devices were parsed from VBT, | |
1597 | * assume LVDS is present. | |
1598 | */ | |
1599 | bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin) | |
1600 | { | |
cc998589 | 1601 | const struct child_device_config *child; |
5a69d13d JN |
1602 | int i; |
1603 | ||
1604 | if (!dev_priv->vbt.child_dev_num) | |
1605 | return true; | |
1606 | ||
1607 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { | |
cc998589 | 1608 | child = dev_priv->vbt.child_dev + i; |
5a69d13d JN |
1609 | |
1610 | /* If the device type is not LFP, continue. | |
1611 | * We have to check both the new identifiers as well as the | |
1612 | * old for compatibility with some BIOSes. | |
1613 | */ | |
1614 | if (child->device_type != DEVICE_TYPE_INT_LFP && | |
1615 | child->device_type != DEVICE_TYPE_LFP) | |
1616 | continue; | |
1617 | ||
1618 | if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin)) | |
1619 | *i2c_pin = child->i2c_pin; | |
1620 | ||
1621 | /* However, we cannot trust the BIOS writers to populate | |
1622 | * the VBT correctly. Since LVDS requires additional | |
1623 | * information from AIM blocks, a non-zero addin offset is | |
1624 | * a good indicator that the LVDS is actually present. | |
1625 | */ | |
1626 | if (child->addin_offset) | |
1627 | return true; | |
1628 | ||
1629 | /* But even then some BIOS writers perform some black magic | |
1630 | * and instantiate the device without reference to any | |
1631 | * additional data. Trust that if the VBT was written into | |
1632 | * the OpRegion then they have validated the LVDS's existence. | |
1633 | */ | |
1634 | if (dev_priv->opregion.vbt) | |
1635 | return true; | |
1636 | } | |
1637 | ||
1638 | return false; | |
1639 | } | |
951d9efe | 1640 | |
22f35042 VS |
1641 | /** |
1642 | * intel_bios_is_port_present - is the specified digital port present | |
1643 | * @dev_priv: i915 device instance | |
1644 | * @port: port to check | |
1645 | * | |
1646 | * Return true if the device in %port is present. | |
1647 | */ | |
1648 | bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port) | |
1649 | { | |
cc998589 | 1650 | const struct child_device_config *child; |
22f35042 VS |
1651 | static const struct { |
1652 | u16 dp, hdmi; | |
1653 | } port_mapping[] = { | |
1654 | [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, | |
1655 | [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, | |
1656 | [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, | |
1657 | [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, | |
1658 | }; | |
1659 | int i; | |
1660 | ||
1661 | /* FIXME maybe deal with port A as well? */ | |
1662 | if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping)) | |
1663 | return false; | |
1664 | ||
1665 | if (!dev_priv->vbt.child_dev_num) | |
1666 | return false; | |
1667 | ||
1668 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { | |
cc998589 JN |
1669 | child = dev_priv->vbt.child_dev + i; |
1670 | ||
1671 | if ((child->dvo_port == port_mapping[port].dp || | |
1672 | child->dvo_port == port_mapping[port].hdmi) && | |
1673 | (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING | | |
1674 | DEVICE_TYPE_DISPLAYPORT_OUTPUT))) | |
22f35042 VS |
1675 | return true; |
1676 | } | |
1677 | ||
1678 | return false; | |
1679 | } | |
1680 | ||
951d9efe JN |
1681 | /** |
1682 | * intel_bios_is_port_edp - is the device in given port eDP | |
1683 | * @dev_priv: i915 device instance | |
1684 | * @port: port to check | |
1685 | * | |
1686 | * Return true if the device in %port is eDP. | |
1687 | */ | |
1688 | bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port) | |
1689 | { | |
cc998589 | 1690 | const struct child_device_config *child; |
951d9efe JN |
1691 | static const short port_mapping[] = { |
1692 | [PORT_B] = DVO_PORT_DPB, | |
1693 | [PORT_C] = DVO_PORT_DPC, | |
1694 | [PORT_D] = DVO_PORT_DPD, | |
1695 | [PORT_E] = DVO_PORT_DPE, | |
1696 | }; | |
1697 | int i; | |
1698 | ||
a98d9c1d ID |
1699 | if (HAS_DDI(dev_priv)) |
1700 | return dev_priv->vbt.ddi_port_info[port].supports_edp; | |
1701 | ||
951d9efe JN |
1702 | if (!dev_priv->vbt.child_dev_num) |
1703 | return false; | |
1704 | ||
1705 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { | |
cc998589 | 1706 | child = dev_priv->vbt.child_dev + i; |
951d9efe | 1707 | |
cc998589 JN |
1708 | if (child->dvo_port == port_mapping[port] && |
1709 | (child->device_type & DEVICE_TYPE_eDP_BITS) == | |
951d9efe JN |
1710 | (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS)) |
1711 | return true; | |
1712 | } | |
1713 | ||
1714 | return false; | |
1715 | } | |
7137aec1 | 1716 | |
cc998589 | 1717 | static bool child_dev_is_dp_dual_mode(const struct child_device_config *child, |
7a17995a | 1718 | enum port port) |
d6199256 VS |
1719 | { |
1720 | static const struct { | |
1721 | u16 dp, hdmi; | |
1722 | } port_mapping[] = { | |
1723 | /* | |
1724 | * Buggy VBTs may declare DP ports as having | |
1725 | * HDMI type dvo_port :( So let's check both. | |
1726 | */ | |
1727 | [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, }, | |
1728 | [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, }, | |
1729 | [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, }, | |
1730 | [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, }, | |
1731 | }; | |
d6199256 VS |
1732 | |
1733 | if (port == PORT_A || port >= ARRAY_SIZE(port_mapping)) | |
1734 | return false; | |
1735 | ||
cc998589 | 1736 | if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) != |
7a17995a | 1737 | (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS)) |
d6199256 VS |
1738 | return false; |
1739 | ||
cc998589 | 1740 | if (child->dvo_port == port_mapping[port].dp) |
7a17995a VS |
1741 | return true; |
1742 | ||
1743 | /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */ | |
cc998589 JN |
1744 | if (child->dvo_port == port_mapping[port].hdmi && |
1745 | child->aux_channel != 0) | |
7a17995a VS |
1746 | return true; |
1747 | ||
1748 | return false; | |
1749 | } | |
1750 | ||
1751 | bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, | |
1752 | enum port port) | |
1753 | { | |
cc998589 | 1754 | const struct child_device_config *child; |
7a17995a VS |
1755 | int i; |
1756 | ||
d6199256 | 1757 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { |
cc998589 | 1758 | child = dev_priv->vbt.child_dev + i; |
d6199256 | 1759 | |
cc998589 | 1760 | if (child_dev_is_dp_dual_mode(child, port)) |
d6199256 VS |
1761 | return true; |
1762 | } | |
1763 | ||
1764 | return false; | |
1765 | } | |
1766 | ||
7137aec1 JN |
1767 | /** |
1768 | * intel_bios_is_dsi_present - is DSI present in VBT | |
1769 | * @dev_priv: i915 device instance | |
1770 | * @port: port for DSI if present | |
1771 | * | |
1772 | * Return true if DSI is present, and return the port in %port. | |
1773 | */ | |
1774 | bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, | |
1775 | enum port *port) | |
1776 | { | |
cc998589 | 1777 | const struct child_device_config *child; |
7137aec1 JN |
1778 | u8 dvo_port; |
1779 | int i; | |
1780 | ||
1781 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { | |
cc998589 | 1782 | child = dev_priv->vbt.child_dev + i; |
7137aec1 | 1783 | |
cc998589 | 1784 | if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT)) |
7137aec1 JN |
1785 | continue; |
1786 | ||
cc998589 | 1787 | dvo_port = child->dvo_port; |
7137aec1 JN |
1788 | |
1789 | switch (dvo_port) { | |
1790 | case DVO_PORT_MIPIA: | |
1791 | case DVO_PORT_MIPIC: | |
7caaef33 JN |
1792 | if (port) |
1793 | *port = dvo_port - DVO_PORT_MIPIA; | |
7137aec1 JN |
1794 | return true; |
1795 | case DVO_PORT_MIPIB: | |
1796 | case DVO_PORT_MIPID: | |
1797 | DRM_DEBUG_KMS("VBT has unsupported DSI port %c\n", | |
1798 | port_name(dvo_port - DVO_PORT_MIPIA)); | |
1799 | break; | |
1800 | } | |
1801 | } | |
1802 | ||
1803 | return false; | |
1804 | } | |
d252bf68 SS |
1805 | |
1806 | /** | |
1807 | * intel_bios_is_port_hpd_inverted - is HPD inverted for %port | |
1808 | * @dev_priv: i915 device instance | |
1809 | * @port: port to check | |
1810 | * | |
1811 | * Return true if HPD should be inverted for %port. | |
1812 | */ | |
1813 | bool | |
1814 | intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv, | |
1815 | enum port port) | |
1816 | { | |
cc998589 | 1817 | const struct child_device_config *child; |
d252bf68 SS |
1818 | int i; |
1819 | ||
cc3f90f0 | 1820 | if (WARN_ON_ONCE(!IS_GEN9_LP(dev_priv))) |
d252bf68 SS |
1821 | return false; |
1822 | ||
1823 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { | |
cc998589 JN |
1824 | child = dev_priv->vbt.child_dev + i; |
1825 | ||
1826 | if (!child->hpd_invert) | |
d252bf68 SS |
1827 | continue; |
1828 | ||
cc998589 | 1829 | switch (child->dvo_port) { |
d252bf68 SS |
1830 | case DVO_PORT_DPA: |
1831 | case DVO_PORT_HDMIA: | |
1832 | if (port == PORT_A) | |
1833 | return true; | |
1834 | break; | |
1835 | case DVO_PORT_DPB: | |
1836 | case DVO_PORT_HDMIB: | |
1837 | if (port == PORT_B) | |
1838 | return true; | |
1839 | break; | |
1840 | case DVO_PORT_DPC: | |
1841 | case DVO_PORT_HDMIC: | |
1842 | if (port == PORT_C) | |
1843 | return true; | |
1844 | break; | |
1845 | default: | |
1846 | break; | |
1847 | } | |
1848 | } | |
1849 | ||
1850 | return false; | |
1851 | } | |
6389dd83 SS |
1852 | |
1853 | /** | |
1854 | * intel_bios_is_lspcon_present - if LSPCON is attached on %port | |
1855 | * @dev_priv: i915 device instance | |
1856 | * @port: port to check | |
1857 | * | |
1858 | * Return true if LSPCON is present on this port | |
1859 | */ | |
1860 | bool | |
1861 | intel_bios_is_lspcon_present(struct drm_i915_private *dev_priv, | |
1862 | enum port port) | |
1863 | { | |
cc998589 | 1864 | const struct child_device_config *child; |
6389dd83 SS |
1865 | int i; |
1866 | ||
1867 | if (!HAS_LSPCON(dev_priv)) | |
1868 | return false; | |
1869 | ||
1870 | for (i = 0; i < dev_priv->vbt.child_dev_num; i++) { | |
cc998589 JN |
1871 | child = dev_priv->vbt.child_dev + i; |
1872 | ||
1873 | if (!child->lspcon) | |
6389dd83 SS |
1874 | continue; |
1875 | ||
cc998589 | 1876 | switch (child->dvo_port) { |
6389dd83 SS |
1877 | case DVO_PORT_DPA: |
1878 | case DVO_PORT_HDMIA: | |
1879 | if (port == PORT_A) | |
1880 | return true; | |
1881 | break; | |
1882 | case DVO_PORT_DPB: | |
1883 | case DVO_PORT_HDMIB: | |
1884 | if (port == PORT_B) | |
1885 | return true; | |
1886 | break; | |
1887 | case DVO_PORT_DPC: | |
1888 | case DVO_PORT_HDMIC: | |
1889 | if (port == PORT_C) | |
1890 | return true; | |
1891 | break; | |
1892 | case DVO_PORT_DPD: | |
1893 | case DVO_PORT_HDMID: | |
1894 | if (port == PORT_D) | |
1895 | return true; | |
1896 | break; | |
1897 | default: | |
1898 | break; | |
1899 | } | |
1900 | } | |
1901 | ||
1902 | return false; | |
1903 | } |