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ea2c67bb MR |
1 | /* |
2 | * Copyright © 2014 Intel Corporation | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
21 | * DEALINGS IN THE SOFTWARE. | |
22 | */ | |
23 | ||
24 | /** | |
cd524719 | 25 | * DOC: atomic plane helpers |
ea2c67bb MR |
26 | * |
27 | * The functions here are used by the atomic plane helper functions to | |
28 | * implement legacy plane updates (i.e., drm_plane->update_plane() and | |
29 | * drm_plane->disable_plane()). This allows plane updates to use the | |
30 | * atomic state infrastructure and perform plane updates as separate | |
31 | * prepare/check/commit/cleanup steps. | |
32 | */ | |
33 | ||
34 | #include <drm/drmP.h> | |
35 | #include <drm/drm_atomic_helper.h> | |
36 | #include <drm/drm_plane_helper.h> | |
37 | #include "intel_drv.h" | |
38 | ||
8e7d688b MR |
39 | /** |
40 | * intel_create_plane_state - create plane state object | |
41 | * @plane: drm plane | |
42 | * | |
43 | * Allocates a fresh plane state for the given plane and sets some of | |
44 | * the state values to sensible initial values. | |
45 | * | |
46 | * Returns: A newly allocated plane state, or NULL on failure | |
47 | */ | |
48 | struct intel_plane_state * | |
49 | intel_create_plane_state(struct drm_plane *plane) | |
50 | { | |
51 | struct intel_plane_state *state; | |
52 | ||
53 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
54 | if (!state) | |
55 | return NULL; | |
56 | ||
57 | state->base.plane = plane; | |
31ad61e4 | 58 | state->base.rotation = DRM_ROTATE_0; |
818ed961 | 59 | state->ckey.flags = I915_SET_COLORKEY_NONE; |
8e7d688b MR |
60 | |
61 | return state; | |
62 | } | |
63 | ||
ea2c67bb MR |
64 | /** |
65 | * intel_plane_duplicate_state - duplicate plane state | |
66 | * @plane: drm plane | |
67 | * | |
68 | * Allocates and returns a copy of the plane state (both common and | |
69 | * Intel-specific) for the specified plane. | |
70 | * | |
8e7d688b | 71 | * Returns: The newly allocated plane state, or NULL on failure. |
ea2c67bb MR |
72 | */ |
73 | struct drm_plane_state * | |
74 | intel_plane_duplicate_state(struct drm_plane *plane) | |
75 | { | |
8e7d688b MR |
76 | struct drm_plane_state *state; |
77 | struct intel_plane_state *intel_state; | |
ea2c67bb | 78 | |
bca8013e | 79 | intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL); |
ea2c67bb | 80 | |
8e7d688b | 81 | if (!intel_state) |
ea2c67bb MR |
82 | return NULL; |
83 | ||
8e7d688b | 84 | state = &intel_state->base; |
f0c60574 ACO |
85 | |
86 | __drm_atomic_helper_plane_duplicate_state(plane, state); | |
ea2c67bb | 87 | |
be1e3415 CW |
88 | intel_state->vma = NULL; |
89 | ||
8e7d688b | 90 | return state; |
ea2c67bb MR |
91 | } |
92 | ||
93 | /** | |
94 | * intel_plane_destroy_state - destroy plane state | |
95 | * @plane: drm plane | |
cd524719 | 96 | * @state: state object to destroy |
ea2c67bb MR |
97 | * |
98 | * Destroys the plane state (both common and Intel-specific) for the | |
99 | * specified plane. | |
100 | */ | |
101 | void | |
102 | intel_plane_destroy_state(struct drm_plane *plane, | |
103 | struct drm_plane_state *state) | |
104 | { | |
be1e3415 CW |
105 | struct i915_vma *vma; |
106 | ||
107 | vma = fetch_and_zero(&to_intel_plane_state(state)->vma); | |
108 | ||
109 | /* | |
110 | * FIXME: Normally intel_cleanup_plane_fb handles destruction of vma. | |
111 | * We currently don't clear all planes during driver unload, so we have | |
112 | * to be able to unpin vma here for now. | |
113 | * | |
114 | * Normally this can only happen during unload when kmscon is disabled | |
115 | * and userspace doesn't attempt to set a framebuffer at all. | |
116 | */ | |
117 | if (vma) { | |
118 | mutex_lock(&plane->dev->struct_mutex); | |
119 | intel_unpin_fb_vma(vma); | |
120 | mutex_unlock(&plane->dev->struct_mutex); | |
121 | } | |
122 | ||
ea2c67bb MR |
123 | drm_atomic_helper_plane_destroy_state(plane, state); |
124 | } | |
125 | ||
f79f2692 ML |
126 | int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state, |
127 | struct intel_plane_state *intel_state) | |
ea2c67bb | 128 | { |
f79f2692 | 129 | struct drm_plane *plane = intel_state->base.plane; |
4ea7be2b | 130 | struct drm_i915_private *dev_priv = to_i915(plane->dev); |
f79f2692 | 131 | struct drm_plane_state *state = &intel_state->base; |
ea2c67bb | 132 | struct intel_plane *intel_plane = to_intel_plane(plane); |
da20eabd | 133 | int ret; |
ea2c67bb | 134 | |
c196e1d6 MR |
135 | /* |
136 | * Both crtc and plane->crtc could be NULL if we're updating a | |
137 | * property while the plane is disabled. We don't actually have | |
138 | * anything driver-specific we need to test in that case, so | |
139 | * just return success. | |
140 | */ | |
f79f2692 | 141 | if (!intel_state->base.crtc && !plane->state->crtc) |
c196e1d6 MR |
142 | return 0; |
143 | ||
ea2c67bb MR |
144 | /* Clip all planes to CRTC size, or 0x0 if CRTC is disabled */ |
145 | intel_state->clip.x1 = 0; | |
146 | intel_state->clip.y1 = 0; | |
147 | intel_state->clip.x2 = | |
35c08f43 | 148 | crtc_state->base.enable ? crtc_state->pipe_src_w : 0; |
ea2c67bb | 149 | intel_state->clip.y2 = |
35c08f43 | 150 | crtc_state->base.enable ? crtc_state->pipe_src_h : 0; |
ea2c67bb | 151 | |
bd2ef25d | 152 | if (state->fb && drm_rotation_90_or_270(state->rotation)) { |
b3c11ac2 | 153 | struct drm_format_name_buf format_name; |
bd2ef25d | 154 | |
bae781b2 VS |
155 | if (state->fb->modifier != I915_FORMAT_MOD_Y_TILED && |
156 | state->fb->modifier != I915_FORMAT_MOD_Yf_TILED) { | |
3b7a5119 SJ |
157 | DRM_DEBUG_KMS("Y/Yf tiling required for 90/270!\n"); |
158 | return -EINVAL; | |
159 | } | |
160 | ||
161 | /* | |
162 | * 90/270 is not allowed with RGB64 16:16:16:16, | |
163 | * RGB 16-bit 5:6:5, and Indexed 8-bit. | |
164 | * TBD: Add RGB64 case once its added in supported format list. | |
165 | */ | |
438b74a5 | 166 | switch (state->fb->format->format) { |
3b7a5119 SJ |
167 | case DRM_FORMAT_C8: |
168 | case DRM_FORMAT_RGB565: | |
b3c11ac2 | 169 | DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n", |
438b74a5 | 170 | drm_get_format_name(state->fb->format->format, |
b3c11ac2 | 171 | &format_name)); |
3b7a5119 SJ |
172 | return -EINVAL; |
173 | ||
174 | default: | |
175 | break; | |
176 | } | |
177 | } | |
178 | ||
4ea7be2b VS |
179 | /* CHV ignores the mirror bit when the rotate bit is set :( */ |
180 | if (IS_CHERRYVIEW(dev_priv) && | |
181 | state->rotation & DRM_ROTATE_180 && | |
182 | state->rotation & DRM_REFLECT_X) { | |
183 | DRM_DEBUG_KMS("Cannot rotate and reflect at the same time\n"); | |
184 | return -EINVAL; | |
185 | } | |
186 | ||
936e71e3 | 187 | intel_state->base.visible = false; |
061e4b8d | 188 | ret = intel_plane->check_plane(plane, crtc_state, intel_state); |
c389c9c4 | 189 | if (ret) |
da20eabd ML |
190 | return ret; |
191 | ||
e9728bd8 VS |
192 | /* FIXME pre-g4x don't work like this */ |
193 | if (intel_state->base.visible) | |
194 | crtc_state->active_planes |= BIT(intel_plane->id); | |
195 | else | |
196 | crtc_state->active_planes &= ~BIT(intel_plane->id); | |
197 | ||
da20eabd | 198 | return intel_plane_atomic_calc_changes(&crtc_state->base, state); |
ea2c67bb MR |
199 | } |
200 | ||
f79f2692 ML |
201 | static int intel_plane_atomic_check(struct drm_plane *plane, |
202 | struct drm_plane_state *state) | |
203 | { | |
204 | struct drm_crtc *crtc = state->crtc; | |
205 | struct drm_crtc_state *drm_crtc_state; | |
206 | ||
207 | crtc = crtc ? crtc : plane->state->crtc; | |
208 | ||
209 | /* | |
210 | * Both crtc and plane->crtc could be NULL if we're updating a | |
211 | * property while the plane is disabled. We don't actually have | |
212 | * anything driver-specific we need to test in that case, so | |
213 | * just return success. | |
214 | */ | |
215 | if (!crtc) | |
216 | return 0; | |
217 | ||
218 | drm_crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc); | |
219 | if (WARN_ON(!drm_crtc_state)) | |
220 | return -EINVAL; | |
221 | ||
222 | return intel_plane_atomic_check_with_state(to_intel_crtc_state(drm_crtc_state), | |
223 | to_intel_plane_state(state)); | |
224 | } | |
225 | ||
ea2c67bb MR |
226 | static void intel_plane_atomic_update(struct drm_plane *plane, |
227 | struct drm_plane_state *old_state) | |
228 | { | |
229 | struct intel_plane *intel_plane = to_intel_plane(plane); | |
230 | struct intel_plane_state *intel_state = | |
231 | to_intel_plane_state(plane->state); | |
a758e684 | 232 | struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc; |
a758e684 | 233 | |
72259536 VS |
234 | if (intel_state->base.visible) { |
235 | trace_intel_update_plane(plane, | |
236 | to_intel_crtc(crtc)); | |
237 | ||
a758e684 | 238 | intel_plane->update_plane(plane, |
9f6151c9 | 239 | to_intel_crtc_state(crtc->state), |
a758e684 | 240 | intel_state); |
72259536 VS |
241 | } else { |
242 | trace_intel_disable_plane(plane, | |
243 | to_intel_crtc(crtc)); | |
244 | ||
a758e684 | 245 | intel_plane->disable_plane(plane, crtc); |
72259536 | 246 | } |
ea2c67bb MR |
247 | } |
248 | ||
249 | const struct drm_plane_helper_funcs intel_plane_helper_funcs = { | |
250 | .prepare_fb = intel_prepare_plane_fb, | |
251 | .cleanup_fb = intel_cleanup_plane_fb, | |
252 | .atomic_check = intel_plane_atomic_check, | |
253 | .atomic_update = intel_plane_atomic_update, | |
254 | }; | |
255 | ||
a98b3431 MR |
256 | /** |
257 | * intel_plane_atomic_get_property - fetch plane property value | |
258 | * @plane: plane to fetch property for | |
259 | * @state: state containing the property value | |
260 | * @property: property to look up | |
261 | * @val: pointer to write property value into | |
262 | * | |
263 | * The DRM core does not store shadow copies of properties for | |
264 | * atomic-capable drivers. This entrypoint is used to fetch | |
265 | * the current value of a driver-specific plane property. | |
266 | */ | |
267 | int | |
268 | intel_plane_atomic_get_property(struct drm_plane *plane, | |
269 | const struct drm_plane_state *state, | |
270 | struct drm_property *property, | |
271 | uint64_t *val) | |
272 | { | |
aaed1aa5 TU |
273 | DRM_DEBUG_KMS("Unknown plane property '%s'\n", property->name); |
274 | return -EINVAL; | |
a98b3431 MR |
275 | } |
276 | ||
277 | /** | |
278 | * intel_plane_atomic_set_property - set plane property value | |
279 | * @plane: plane to set property for | |
280 | * @state: state to update property value in | |
281 | * @property: property to set | |
282 | * @val: value to set property to | |
283 | * | |
284 | * Writes the specified property value for a plane into the provided atomic | |
285 | * state object. | |
286 | * | |
287 | * Returns 0 on success, -EINVAL on unrecognized properties | |
288 | */ | |
289 | int | |
290 | intel_plane_atomic_set_property(struct drm_plane *plane, | |
291 | struct drm_plane_state *state, | |
292 | struct drm_property *property, | |
293 | uint64_t val) | |
294 | { | |
aaed1aa5 TU |
295 | DRM_DEBUG_KMS("Unknown plane property '%s'\n", property->name); |
296 | return -EINVAL; | |
a98b3431 | 297 | } |