Merge drm/drm-next into drm-intel-gt-next
[linux-block.git] / drivers / gpu / drm / i915 / i915_suspend.c
CommitLineData
317c35d1
JB
1/*
2 *
3 * Copyright 2008 (c) Intel Corporation
4 * Jesse Barnes <jbarnes@virtuousgeek.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26
77895af2 27#include "display/intel_de.h"
379bc100 28#include "display/intel_gmbus.h"
4fb87831 29#include "display/intel_vga.h"
379bc100 30
6da4a2c4 31#include "i915_drv.h"
5e5b7fa2 32#include "i915_reg.h"
bdd1510c 33#include "i915_suspend.h"
7e470f10 34#include "intel_pci_config.h"
317c35d1 35
0f8d2a2b 36static void intel_save_swf(struct drm_i915_private *dev_priv)
1341d655 37{
1341d655
BG
38 int i;
39
1341d655 40 /* Scratch space */
651e7d48 41 if (GRAPHICS_VER(dev_priv) == 2 && IS_MOBILE(dev_priv)) {
85fa792b 42 for (i = 0; i < 7; i++) {
77895af2
JN
43 dev_priv->regfile.saveSWF0[i] = intel_de_read(dev_priv, SWF0(i));
44 dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i));
85fa792b
VS
45 }
46 for (i = 0; i < 3; i++)
77895af2 47 dev_priv->regfile.saveSWF3[i] = intel_de_read(dev_priv, SWF3(i));
651e7d48 48 } else if (GRAPHICS_VER(dev_priv) == 2) {
85fa792b 49 for (i = 0; i < 7; i++)
77895af2 50 dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i));
b2ae318a 51 } else if (HAS_GMCH(dev_priv)) {
85fa792b 52 for (i = 0; i < 16; i++) {
77895af2
JN
53 dev_priv->regfile.saveSWF0[i] = intel_de_read(dev_priv, SWF0(i));
54 dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i));
85fa792b
VS
55 }
56 for (i = 0; i < 3; i++)
77895af2 57 dev_priv->regfile.saveSWF3[i] = intel_de_read(dev_priv, SWF3(i));
1341d655 58 }
1341d655
BG
59}
60
0f8d2a2b 61static void intel_restore_swf(struct drm_i915_private *dev_priv)
1341d655 62{
1341d655
BG
63 int i;
64
85fa792b 65 /* Scratch space */
651e7d48 66 if (GRAPHICS_VER(dev_priv) == 2 && IS_MOBILE(dev_priv)) {
85fa792b 67 for (i = 0; i < 7; i++) {
77895af2
JN
68 intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]);
69 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]);
85fa792b
VS
70 }
71 for (i = 0; i < 3; i++)
77895af2 72 intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]);
651e7d48 73 } else if (GRAPHICS_VER(dev_priv) == 2) {
85fa792b 74 for (i = 0; i < 7; i++)
77895af2 75 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]);
b2ae318a 76 } else if (HAS_GMCH(dev_priv)) {
85fa792b 77 for (i = 0; i < 16; i++) {
77895af2
JN
78 intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]);
79 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]);
85fa792b
VS
80 }
81 for (i = 0; i < 3; i++)
77895af2 82 intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]);
317c35d1 83 }
0f8d2a2b
VS
84}
85
86void i915_save_display(struct drm_i915_private *dev_priv)
87{
8ff5446a 88 struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
0f8d2a2b 89
5df7bd13
JRS
90 if (!HAS_DISPLAY(dev_priv))
91 return;
92
0f8d2a2b 93 /* Display arbitration control */
651e7d48 94 if (GRAPHICS_VER(dev_priv) <= 4)
77895af2 95 dev_priv->regfile.saveDSPARB = intel_de_read(dev_priv, DSPARB);
317c35d1 96
651e7d48 97 if (GRAPHICS_VER(dev_priv) == 4)
0f8d2a2b
VS
98 pci_read_config_word(pdev, GCDGMBUS,
99 &dev_priv->regfile.saveGCDGMBUS);
100
101 intel_save_swf(dev_priv);
102}
103
104void i915_restore_display(struct drm_i915_private *dev_priv)
105{
8ff5446a 106 struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
0f8d2a2b 107
5df7bd13
JRS
108 if (!HAS_DISPLAY(dev_priv))
109 return;
110
0f8d2a2b
VS
111 intel_restore_swf(dev_priv);
112
651e7d48 113 if (GRAPHICS_VER(dev_priv) == 4)
0f8d2a2b
VS
114 pci_write_config_word(pdev, GCDGMBUS,
115 dev_priv->regfile.saveGCDGMBUS);
116
117 /* Display arbitration */
651e7d48 118 if (GRAPHICS_VER(dev_priv) <= 4)
77895af2 119 intel_de_write(dev_priv, DSPARB, dev_priv->regfile.saveDSPARB);
0f8d2a2b 120
0f8d2a2b
VS
121 intel_vga_redisable(dev_priv);
122
123 intel_gmbus_reset(dev_priv);
317c35d1 124}