[linux-2.6-block.git] / drivers / gpu / drm / i915 / i915_params.c

/*
 * Copyright © 2014 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 */

#include <linux/string_helpers.h>

#include <drm/drm_print.h>

#include "i915_params.h"
#include "i915_drv.h"

DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
			"DRM_UT_CORE",
			"DRM_UT_DRIVER",
			"DRM_UT_KMS",
			"DRM_UT_PRIME",
			"DRM_UT_ATOMIC",
			"DRM_UT_VBL",
			"DRM_UT_STATE",
			"DRM_UT_LEASE",
			"DRM_UT_DP",
			"DRM_UT_DRMRES");

#define i915_param_named(name, T, perm, desc) \
	module_param_named(name, i915_modparams.name, T, perm); \
	MODULE_PARM_DESC(name, desc)
#define i915_param_named_unsafe(name, T, perm, desc) \
	module_param_named_unsafe(name, i915_modparams.name, T, perm); \
	MODULE_PARM_DESC(name, desc)

struct i915_params i915_modparams __read_mostly = {
#define MEMBER(T, member, value, ...) .member = (value),
	I915_PARAMS_FOR_EACH(MEMBER)
#undef MEMBER
};

/*
 * Note: As a rule, keep module parameter sysfs permissions read-only
 * 0400. Runtime changes are only supported through i915 debugfs.
 *
 * For any exceptions requiring write access and runtime changes through module
 * parameter sysfs, prevent debugfs file creation by setting the parameter's
 * debugfs mode to 0.
 */

i915_param_named(modeset, int, 0400,
	"Use kernel modesetting [KMS] (0=disable, "
	"1=on, -1=force vga console preference [default])");

i915_param_named_unsafe(enable_dc, int, 0400,
	"Enable power-saving display C-states. "
	"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
	"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");

i915_param_named_unsafe(enable_fbc, int, 0400,
	"Enable frame buffer compression for power savings "
	"(default: -1 (use per-chip default))");

i915_param_named_unsafe(lvds_channel_mode, int, 0400,
	 "Specify LVDS channel mode "
	 "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");

i915_param_named_unsafe(panel_use_ssc, int, 0400,
	"Use Spread Spectrum Clock with panels [LVDS/eDP] "
	"(default: auto from VBT)");

i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
	"Override/Ignore selection of SDVO panel mode in the VBT "
	"(-2=ignore, -1=auto [default], index in VBT BIOS table)");

i915_param_named_unsafe(reset, uint, 0400,
	"Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])");

i915_param_named_unsafe(vbt_firmware, charp, 0400,
	"Load VBT from specified file under /lib/firmware");

#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
i915_param_named(error_capture, bool, 0400,
	"Record the GPU state following a hang. "
	"This information in /sys/class/drm/card<N>/error is vital for "
	"triaging and debugging hangs.");
#endif

i915_param_named_unsafe(enable_hangcheck, bool, 0400,
	"Periodically check GPU activity for detecting hangs. "
	"WARNING: Disabling this can cause system wide hangs. "
	"(default: true)");

i915_param_named_unsafe(enable_psr, int, 0400,
	"Enable PSR "
	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
	"Default: -1 (use per-chip default)");

i915_param_named(psr_safest_params, bool, 0400,
	"Replace PSR VBT parameters by the safest and not optimal ones. This "
	"is helpful to detect if PSR issues are related to bad values set in "
	" VBT. (0=use VBT parameters, 1=use safest parameters)");

i915_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
	"Enable PSR2 selective fetch "
	"(0=disabled, 1=enabled) "
	"Default: 0");

i915_param_named_unsafe(enable_sagv, bool, 0600,
	"Enable system agent voltage/frequency scaling (SAGV) (default: true)");

i915_param_named_unsafe(force_probe, charp, 0400,
	"Force probe options for specified supported devices. "
	"See CONFIG_DRM_I915_FORCE_PROBE for details.");

i915_param_named_unsafe(disable_power_well, int, 0400,
	"Disable display power wells when possible "
	"(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");

i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");

i915_param_named_unsafe(enable_dpt, bool, 0400,
	"Enable display page table (DPT) (default: true)");

i915_param_named(fastboot, int, 0400,
	"Try to skip unnecessary mode sets at boot time "
	"(0=disabled, 1=enabled) "
	"Default: -1 (use per-chip default)");

i915_param_named_unsafe(load_detect_test, bool, 0400,
	"Force-enable the VGA load detect code for testing (default:false). "
	"For developers only.");

i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
	"Force a modeset during gpu reset for testing (default:false). "
	"For developers only.");

i915_param_named_unsafe(invert_brightness, int, 0400,
	"Invert backlight brightness "
	"(-1 force normal, 0 machine defaults, 1 force inversion), please "
	"report PCI device ID, subsystem vendor and subsystem device ID "
	"to dri-devel@lists.freedesktop.org, if your machine needs it. "
	"It will then be included in an upcoming module version.");

i915_param_named(disable_display, bool, 0400,
	"Disable display (default: false)");

i915_param_named(memtest, bool, 0400,
	"Perform a read/write test of all device memory on module load (default: off)");

i915_param_named(mmio_debug, int, 0400,
	"Enable the MMIO debug code for the first N failures (default: off). "
	"This may negatively affect performance.");

/* Special case writable file */
i915_param_named(verbose_state_checks, bool, 0600,
	"Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");

i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
	"Force enable atomic functionality on platforms that don't have full support yet.");

/* WA to get away with the default setting in VBT for early platforms.Will be removed */
i915_param_named_unsafe(edp_vswing, int, 0400,
	"Ignore/Override vswing pre-emph table selection from VBT "
	"(0=use value from vbt [default], 1=low power swing(200mV),"
	"2=default swing(400mV))");

i915_param_named_unsafe(enable_guc, int, 0400,
	"Enable GuC load for GuC submission and/or HuC load. "
	"Required functionality can be selected using bitmask values. "
	"(-1=auto [default], 0=disable, 1=GuC submission, 2=HuC load)");

i915_param_named(guc_log_level, int, 0400,
	"GuC firmware logging level. Requires GuC to be loaded. "
	"(-1=auto [default], 0=disable, 1..4=enable with verbosity min..max)");

i915_param_named_unsafe(guc_firmware_path, charp, 0400,
	"GuC firmware path to use instead of the default one");

i915_param_named_unsafe(huc_firmware_path, charp, 0400,
	"HuC firmware path to use instead of the default one");

i915_param_named_unsafe(dmc_firmware_path, charp, 0400,
	"DMC firmware path to use instead of the default one");

i915_param_named_unsafe(gsc_firmware_path, charp, 0400,
	"GSC firmware path to use instead of the default one");

i915_param_named_unsafe(enable_dp_mst, bool, 0400,
	"Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)");

#if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
i915_param_named_unsafe(inject_probe_failure, uint, 0400,
	"Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)");
#endif

i915_param_named(enable_dpcd_backlight, int, 0400,
	"Enable support for DPCD backlight control"
	"(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");

#if IS_ENABLED(CONFIG_DRM_I915_GVT)
i915_param_named(enable_gvt, bool, 0400,
	"Enable support for Intel GVT-g graphics virtualization host support(default:false)");
#endif

#if CONFIG_DRM_I915_REQUEST_TIMEOUT
i915_param_named_unsafe(request_timeout_ms, uint, 0600,
			"Default request/fence/batch buffer expiration timeout.");
#endif

i915_param_named_unsafe(lmem_size, uint, 0400,
			"Set the lmem size(in MiB) for each region. (default: 0, all memory)");
i915_param_named_unsafe(lmem_bar_size, uint, 0400,
			"Set the lmem bar size(in MiB).");

static void _param_print_bool(struct drm_printer *p, const char *name,
			      bool val)
{
	drm_printf(p, "i915.%s=%s\n", name, str_yes_no(val));
}

static void _param_print_int(struct drm_printer *p, const char *name,
			     int val)
{
	drm_printf(p, "i915.%s=%d\n", name, val);
}

static void _param_print_uint(struct drm_printer *p, const char *name,
			      unsigned int val)
{
	drm_printf(p, "i915.%s=%u\n", name, val);
}

static void _param_print_ulong(struct drm_printer *p, const char *name,
			       unsigned long val)
{
	drm_printf(p, "i915.%s=%lu\n", name, val);
}

static void _param_print_charp(struct drm_printer *p, const char *name,
			       const char *val)
{
	drm_printf(p, "i915.%s=%s\n", name, val);
}

#define _param_print(p, name, val)				\
	_Generic(val,						\
		 bool: _param_print_bool,			\
		 int: _param_print_int,				\
		 unsigned int: _param_print_uint,		\
		 unsigned long: _param_print_ulong,		\
		 char *: _param_print_charp)(p, name, val)

/**
 * i915_params_dump - dump i915 modparams
 * @params: i915 modparams
 * @p: the &drm_printer
 *
 * Pretty printer for i915 modparams.
 */
void i915_params_dump(const struct i915_params *params, struct drm_printer *p)
{
#define PRINT(T, x, ...) _param_print(p, #x, params->x);
	I915_PARAMS_FOR_EACH(PRINT);
#undef PRINT
}

static void _param_dup_charp(char **valp)
{
	*valp = kstrdup(*valp, GFP_ATOMIC);
}

static void _param_nop(void *valp)
{
}

#define _param_dup(valp)				\
	_Generic(valp,					\
		 char **: _param_dup_charp,		\
		 default: _param_nop)(valp)

void i915_params_copy(struct i915_params *dest, const struct i915_params *src)
{
	*dest = *src;
#define DUP(T, x, ...) _param_dup(&dest->x);
	I915_PARAMS_FOR_EACH(DUP);
#undef DUP
}

static void _param_free_charp(char **valp)
{
	kfree(*valp);
	*valp = NULL;
}

#define _param_free(valp)				\
	_Generic(valp,					\
		 char **: _param_free_charp,		\
		 default: _param_nop)(valp)

/* free the allocated members, *not* the passed in params itself */
void i915_params_free(struct i915_params *params)
{
#define FREE(T, x, ...) _param_free(&params->x);
	I915_PARAMS_FOR_EACH(FREE);
#undef FREE
}
Commit	Line	Data
d330a953 JN	1	/*
	2	* Copyright © 2014 Intel Corporation
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the
	6	* "Software"), to deal in the Software without restriction, including
	7	* without limitation the rights to use, copy, modify, merge, publish,
	8	* distribute, sub license, and/or sell copies of the Software, and to
	9	* permit persons to whom the Software is furnished to do so, subject to
	10	* the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the
	13	* next paragraph) shall be included in all copies or substantial portions
	14	* of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
	22	* IN THE SOFTWARE.
	23	*/
	24
01fabda8 LDM	25	#include <linux/string_helpers.h>
01fabda8 LDM	26
acfb9973 MW	27	#include <drm/drm_print.h>
acfb9973 MW	28
c838d719	29	#include "i915_params.h"
d330a953 JN	30	#include "i915_drv.h"
d330a953 JN	31
f158936b JC	32	DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
	33	"DRM_UT_CORE",
	34	"DRM_UT_DRIVER",
	35	"DRM_UT_KMS",
	36	"DRM_UT_PRIME",
	37	"DRM_UT_ATOMIC",
	38	"DRM_UT_VBL",
	39	"DRM_UT_STATE",
	40	"DRM_UT_LEASE",
	41	"DRM_UT_DP",
	42	"DRM_UT_DRMRES");
	43
3dcf4f20	44	#define i915_param_named(name, T, perm, desc) \
4f044a88	45	module_param_named(name, i915_modparams.name, T, perm); \
3dcf4f20 MW	46	MODULE_PARM_DESC(name, desc)
3dcf4f20 MW	47	#define i915_param_named_unsafe(name, T, perm, desc) \
4f044a88	48	module_param_named_unsafe(name, i915_modparams.name, T, perm); \
3dcf4f20	49	MODULE_PARM_DESC(name, desc)
c9546932	50
4f044a88	51	struct i915_params i915_modparams __read_mostly = {
c43c5a88	52	#define MEMBER(T, member, value, ...) .member = (value),
7075cb85 MW	53	I915_PARAMS_FOR_EACH(MEMBER)
7075cb85 MW	54	#undef MEMBER
d330a953 JN	55	};
d330a953 JN	56
db80066c JN	57	/*
	58	* Note: As a rule, keep module parameter sysfs permissions read-only
	59	* 0400. Runtime changes are only supported through i915 debugfs.
	60	*
	61	* For any exceptions requiring write access and runtime changes through module
	62	* parameter sysfs, prevent debugfs file creation by setting the parameter's
	63	* debugfs mode to 0.
	64	*/
	65
3dcf4f20	66	i915_param_named(modeset, int, 0400,
bf13af56	67	"Use kernel modesetting [KMS] (0=disable, "
d330a953 JN	68	"1=on, -1=force vga console preference [default])");
d330a953 JN	69
3dcf4f20	70	i915_param_named_unsafe(enable_dc, int, 0400,
443646c7	71	"Enable power-saving display C-states. "
19c79ff8 AG	72	"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
19c79ff8 AG	73	"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
443646c7	74
db80066c	75	i915_param_named_unsafe(enable_fbc, int, 0400,
d330a953 JN	76	"Enable frame buffer compression for power savings "
	77	"(default: -1 (use per-chip default))");
	78
3dcf4f20	79	i915_param_named_unsafe(lvds_channel_mode, int, 0400,
d330a953 JN	80	"Specify LVDS channel mode "
	81	"(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
	82
db80066c	83	i915_param_named_unsafe(panel_use_ssc, int, 0400,
d330a953 JN	84	"Use Spread Spectrum Clock with panels [LVDS/eDP] "
	85	"(default: auto from VBT)");
	86
3dcf4f20	87	i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
d330a953 JN	88	"Override/Ignore selection of SDVO panel mode in the VBT "
	89	"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
	90
34becfdb	91	i915_param_named_unsafe(reset, uint, 0400,
3dcf4f20	92	"Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])");
d330a953	93
3dcf4f20 MW	94	i915_param_named_unsafe(vbt_firmware, charp, 0400,
3dcf4f20 MW	95	"Load VBT from specified file under /lib/firmware");
ab3595bc	96
98a2f411	97	#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
db80066c	98	i915_param_named(error_capture, bool, 0400,
98a2f411 CW	99	"Record the GPU state following a hang. "
	100	"This information in /sys/class/drm/card<N>/error is vital for "
	101	"triaging and debugging hangs.");
	102	#endif
	103
db80066c	104	i915_param_named_unsafe(enable_hangcheck, bool, 0400,
d330a953 JN	105	"Periodically check GPU activity for detecting hangs. "
	106	"WARNING: Disabling this can cause system wide hangs. "
	107	"(default: true)");
	108
db80066c	109	i915_param_named_unsafe(enable_psr, int, 0400,
3dcf4f20	110	"Enable PSR "
9c95f963	111	"(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
3dcf4f20	112	"Default: -1 (use per-chip default)");
d330a953	113
2d387995 JRS	114	i915_param_named(psr_safest_params, bool, 0400,
2d387995 JRS	115	"Replace PSR VBT parameters by the safest and not optimal ones. This "
0e2feab5 CIK	116	"is helpful to detect if PSR issues are related to bad values set in "
0e2feab5 CIK	117	" VBT. (0=use VBT parameters, 1=use safest parameters)");
2d387995	118
6e43e276 JRS	119	i915_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
	120	"Enable PSR2 selective fetch "
	121	"(0=disabled, 1=enabled) "
	122	"Default: 0");
	123
419e505d VS	124	i915_param_named_unsafe(enable_sagv, bool, 0600,
	125	"Enable system agent voltage/frequency scaling (SAGV) (default: true)");
	126
7ef5ef5c	127	i915_param_named_unsafe(force_probe, charp, 0400,
157821fb	128	"Force probe options for specified supported devices. "
7ef5ef5c JN	129	"See CONFIG_DRM_I915_FORCE_PROBE for details.");
7ef5ef5c JN	130
3dcf4f20	131	i915_param_named_unsafe(disable_power_well, int, 0400,
1b0e3a04 ID	132	"Disable display power wells when possible "
1b0e3a04 ID	133	"(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
d330a953	134
db80066c	135	i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
d330a953	136
c5de2484 VS	137	i915_param_named_unsafe(enable_dpt, bool, 0400,
	138	"Enable display page table (DPT) (default: true)");
	139
db80066c	140	i915_param_named(fastboot, int, 0400,
3d6535cb HG	141	"Try to skip unnecessary mode sets at boot time "
	142	"(0=disabled, 1=enabled) "
	143	"Default: -1 (use per-chip default)");
73831236	144
db80066c	145	i915_param_named_unsafe(load_detect_test, bool, 0400,
5bedeb2d DV	146	"Force-enable the VGA load detect code for testing (default:false). "
	147	"For developers only.");
	148
db80066c	149	i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
522a63de ML	150	"Force a modeset during gpu reset for testing (default:false). "
	151	"For developers only.");
	152
db80066c	153	i915_param_named_unsafe(invert_brightness, int, 0400,
d330a953 JN	154	"Invert backlight brightness "
	155	"(-1 force normal, 0 machine defaults, 1 force inversion), please "
	156	"report PCI device ID, subsystem vendor and subsystem device ID "
	157	"to dri-devel@lists.freedesktop.org, if your machine needs it. "
	158	"It will then be included in an upcoming module version.");
a0bae57f	159
3dcf4f20 MW	160	i915_param_named(disable_display, bool, 0400,
3dcf4f20 MW	161	"Disable display (default: false)");
351e3db2	162
bd56c63c CW	163	i915_param_named(memtest, bool, 0400,
	164	"Perform a read/write test of all device memory on module load (default: off)");
	165
db80066c	166	i915_param_named(mmio_debug, int, 0400,
48572edd CW	167	"Enable the MMIO debug code for the first N failures (default: off). "
48572edd CW	168	"This may negatively affect performance.");
e2c719b7	169
db80066c	170	/* Special case writable file */
3dcf4f20	171	i915_param_named(verbose_state_checks, bool, 0600,
e2c719b7	172	"Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
b2e7723b	173
3dcf4f20 MW	174	i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
3dcf4f20 MW	175	"Force enable atomic functionality on platforms that don't have full support yet.");
c5b852f3	176
9e458034	177	/* WA to get away with the default setting in VBT for early platforms.Will be removed */
3dcf4f20 MW	178	i915_param_named_unsafe(edp_vswing, int, 0400,
	179	"Ignore/Override vswing pre-emph table selection from VBT "
	180	"(0=use value from vbt [default], 1=low power swing(200mV),"
	181	"2=default swing(400mV))");
	182
121981fa MW	183	i915_param_named_unsafe(enable_guc, int, 0400,
	184	"Enable GuC load for GuC submission and/or HuC load. "
	185	"Required functionality can be selected using bitmask values. "
47c65b38	186	"(-1=auto [default], 0=disable, 1=GuC submission, 2=HuC load)");
3dcf4f20 MW	187
3dcf4f20 MW	188	i915_param_named(guc_log_level, int, 0400,
0ed87953 MW	189	"GuC firmware logging level. Requires GuC to be loaded. "
0ed87953 MW	190	"(-1=auto [default], 0=disable, 1..4=enable with verbosity min..max)");
7cc96139	191
3dcf4f20	192	i915_param_named_unsafe(guc_firmware_path, charp, 0400,
b3420dde AH	193	"GuC firmware path to use instead of the default one");
b3420dde AH	194
3dcf4f20	195	i915_param_named_unsafe(huc_firmware_path, charp, 0400,
b3420dde AH	196	"HuC firmware path to use instead of the default one");
b3420dde AH	197
f425d08b JN	198	i915_param_named_unsafe(dmc_firmware_path, charp, 0400,
	199	"DMC firmware path to use instead of the default one");
	200
242c4b91 DCS	201	i915_param_named_unsafe(gsc_firmware_path, charp, 0400,
	202	"GSC firmware path to use instead of the default one");
	203
db80066c	204	i915_param_named_unsafe(enable_dp_mst, bool, 0400,
7cc96139	205	"Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)");
3dcf4f20	206
fae919f0	207	#if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
4ec37538	208	i915_param_named_unsafe(inject_probe_failure, uint, 0400,
4fec15d1	209	"Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)");
fae919f0	210	#endif
3dcf4f20	211
db80066c	212	i915_param_named(enable_dpcd_backlight, int, 0400,
5ccf2027	213	"Enable support for DPCD backlight control"
2227816e	214	"(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
0ad35fed	215
31579ba2	216	#if IS_ENABLED(CONFIG_DRM_I915_GVT)
3dcf4f20	217	i915_param_named(enable_gvt, bool, 0400,
0ad35fed	218	"Enable support for Intel GVT-g graphics virtualization host support(default:false)");
31579ba2	219	#endif
acfb9973	220
54d4e9f5 TU	221	#if CONFIG_DRM_I915_REQUEST_TIMEOUT
	222	i915_param_named_unsafe(request_timeout_ms, uint, 0600,
	223	"Default request/fence/batch buffer expiration timeout.");
	224	#endif
	225
be658e70 CT	226	i915_param_named_unsafe(lmem_size, uint, 0400,
be658e70 CT	227	"Set the lmem size(in MiB) for each region. (default: 0, all memory)");
17cd10a4 PD	228	i915_param_named_unsafe(lmem_bar_size, uint, 0400,
17cd10a4 PD	229	"Set the lmem bar size(in MiB).");
be658e70	230
bfe7586b JN	231	static void _param_print_bool(struct drm_printer p, const char name,
bfe7586b JN	232	bool val)
acfb9973	233	{
bfe7586b	234	drm_printf(p, "i915.%s=%s\n", name, str_yes_no(val));
acfb9973 MW	235	}
acfb9973 MW	236
bfe7586b JN	237	static void _param_print_int(struct drm_printer p, const char name,
	238	int val)
	239	{
	240	drm_printf(p, "i915.%s=%d\n", name, val);
	241	}
	242
	243	static void _param_print_uint(struct drm_printer p, const char name,
	244	unsigned int val)
	245	{
	246	drm_printf(p, "i915.%s=%u\n", name, val);
	247	}
	248
	249	static void _param_print_ulong(struct drm_printer p, const char name,
	250	unsigned long val)
	251	{
	252	drm_printf(p, "i915.%s=%lu\n", name, val);
	253	}
	254
	255	static void _param_print_charp(struct drm_printer p, const char name,
	256	const char *val)
	257	{
	258	drm_printf(p, "i915.%s=%s\n", name, val);
	259	}
	260
	261	#define _param_print(p, name, val) \
	262	_Generic(val, \
	263	bool: _param_print_bool, \
	264	int: _param_print_int, \
	265	unsigned int: _param_print_uint, \
	266	unsigned long: _param_print_ulong, \
	267	char *: _param_print_charp)(p, name, val)
	268
acfb9973 MW	269	/**
	270	* i915_params_dump - dump i915 modparams
	271	* @params: i915 modparams
	272	* @p: the &drm_printer
	273	*
	274	* Pretty printer for i915 modparams.
	275	*/
	276	void i915_params_dump(const struct i915_params params, struct drm_printer p)
	277	{
bfe7586b	278	#define PRINT(T, x, ...) _param_print(p, #x, params->x);
acfb9973 MW	279	I915_PARAMS_FOR_EACH(PRINT);
	280	#undef PRINT
	281	}
4081cef9	282
7ce59bcf	283	static void _param_dup_charp(char **valp)
4081cef9	284	{
7ce59bcf	285	valp = kstrdup(valp, GFP_ATOMIC);
4081cef9 JN	286	}
4081cef9 JN	287
7ce59bcf JN	288	static void _param_nop(void *valp)
	289	{
	290	}
	291
	292	#define _param_dup(valp) \
	293	_Generic(valp, \
	294	char **: _param_dup_charp, \
	295	default: _param_nop)(valp)
	296
4081cef9 JN	297	void i915_params_copy(struct i915_params dest, const struct i915_params src)
	298	{
	299	dest = src;
7ce59bcf	300	#define DUP(T, x, ...) _param_dup(&dest->x);
4081cef9 JN	301	I915_PARAMS_FOR_EACH(DUP);
	302	#undef DUP
	303	}
16cabb12	304
7448d336	305	static void _param_free_charp(char **valp)
16cabb12	306	{
7448d336 JN	307	kfree(*valp);
7448d336 JN	308	*valp = NULL;
16cabb12 JN	309	}
16cabb12 JN	310
7448d336 JN	311	#define _param_free(valp) \
	312	_Generic(valp, \
	313	char **: _param_free_charp, \
	314	default: _param_nop)(valp)
	315
16cabb12 JN	316	/* free the allocated members, not the passed in params itself */
	317	void i915_params_free(struct i915_params *params)
	318	{
7448d336	319	#define FREE(T, x, ...) _param_free(&params->x);
16cabb12 JN	320	I915_PARAMS_FOR_EACH(FREE);
	321	#undef FREE
	322	}