Commit | Line | Data |
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4407eaa9 | 1 | /* |
816c3715 | 2 | * SPDX-License-Identifier: MIT |
4407eaa9 | 3 | * |
816c3715 | 4 | * Copyright © 2018 Intel Corporation |
4407eaa9 | 5 | * |
816c3715 LL |
6 | * Autogenerated file by GPU Top : https://github.com/rib/gputop |
7 | * DO NOT EDIT manually! | |
4407eaa9 LL |
8 | */ |
9 | ||
10 | #include <linux/sysfs.h> | |
11 | ||
12 | #include "i915_drv.h" | |
13 | #include "i915_oa_cflgt3.h" | |
14 | ||
15 | static const struct i915_oa_reg b_counter_config_test_oa[] = { | |
16 | { _MMIO(0x2740), 0x00000000 }, | |
17 | { _MMIO(0x2744), 0x00800000 }, | |
18 | { _MMIO(0x2714), 0xf0800000 }, | |
19 | { _MMIO(0x2710), 0x00000000 }, | |
20 | { _MMIO(0x2724), 0xf0800000 }, | |
21 | { _MMIO(0x2720), 0x00000000 }, | |
22 | { _MMIO(0x2770), 0x00000004 }, | |
23 | { _MMIO(0x2774), 0x00000000 }, | |
24 | { _MMIO(0x2778), 0x00000003 }, | |
25 | { _MMIO(0x277c), 0x00000000 }, | |
26 | { _MMIO(0x2780), 0x00000007 }, | |
27 | { _MMIO(0x2784), 0x00000000 }, | |
28 | { _MMIO(0x2788), 0x00100002 }, | |
29 | { _MMIO(0x278c), 0x0000fff7 }, | |
30 | { _MMIO(0x2790), 0x00100002 }, | |
31 | { _MMIO(0x2794), 0x0000ffcf }, | |
32 | { _MMIO(0x2798), 0x00100082 }, | |
33 | { _MMIO(0x279c), 0x0000ffef }, | |
34 | { _MMIO(0x27a0), 0x001000c2 }, | |
35 | { _MMIO(0x27a4), 0x0000ffe7 }, | |
36 | { _MMIO(0x27a8), 0x00100001 }, | |
37 | { _MMIO(0x27ac), 0x0000ffe7 }, | |
38 | }; | |
39 | ||
40 | static const struct i915_oa_reg flex_eu_config_test_oa[] = { | |
41 | }; | |
42 | ||
43 | static const struct i915_oa_reg mux_config_test_oa[] = { | |
44 | { _MMIO(0x9840), 0x00000080 }, | |
45 | { _MMIO(0x9888), 0x11810000 }, | |
46 | { _MMIO(0x9888), 0x07810013 }, | |
47 | { _MMIO(0x9888), 0x1f810000 }, | |
48 | { _MMIO(0x9888), 0x1d810000 }, | |
49 | { _MMIO(0x9888), 0x1b930040 }, | |
50 | { _MMIO(0x9888), 0x07e54000 }, | |
51 | { _MMIO(0x9888), 0x1f908000 }, | |
52 | { _MMIO(0x9888), 0x11900000 }, | |
53 | { _MMIO(0x9888), 0x37900000 }, | |
54 | { _MMIO(0x9888), 0x53900000 }, | |
55 | { _MMIO(0x9888), 0x45900000 }, | |
56 | { _MMIO(0x9888), 0x33900000 }, | |
57 | }; | |
58 | ||
59 | static ssize_t | |
60 | show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf) | |
61 | { | |
62 | return sprintf(buf, "1\n"); | |
63 | } | |
64 | ||
65 | void | |
66 | i915_perf_load_test_config_cflgt3(struct drm_i915_private *dev_priv) | |
67 | { | |
43df81d3 | 68 | strlcpy(dev_priv->perf.oa.test_config.uuid, |
4407eaa9 | 69 | "577e8e2c-3fa0-4875-8743-3538d585e3b0", |
43df81d3 | 70 | sizeof(dev_priv->perf.oa.test_config.uuid)); |
4407eaa9 LL |
71 | dev_priv->perf.oa.test_config.id = 1; |
72 | ||
73 | dev_priv->perf.oa.test_config.mux_regs = mux_config_test_oa; | |
74 | dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa); | |
75 | ||
76 | dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_test_oa; | |
77 | dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa); | |
78 | ||
79 | dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_test_oa; | |
80 | dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa); | |
81 | ||
82 | dev_priv->perf.oa.test_config.sysfs_metric.name = "577e8e2c-3fa0-4875-8743-3538d585e3b0"; | |
83 | dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs; | |
84 | ||
85 | dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr; | |
86 | ||
87 | dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id"; | |
88 | dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444; | |
89 | dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_test_oa_id; | |
90 | } |