[linux-2.6-block.git] / drivers / gpu / drm / i915 / i915_gem_gtt.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2010 Daniel Vetter
 * Copyright © 2020 Intel Corporation
 */

#include <linux/slab.h> /* fault-inject.h is not standalone! */

#include <linux/fault-inject.h>
#include <linux/log2.h>
#include <linux/random.h>
#include <linux/seq_file.h>
#include <linux/stop_machine.h>

#include <asm/set_memory.h>
#include <asm/smp.h>

#include "gt/intel_gt.h"
#include "gt/intel_gt_requests.h"

#include "i915_drv.h"
#include "i915_gem_evict.h"
#include "i915_scatterlist.h"
#include "i915_trace.h"
#include "i915_vgpu.h"

int i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj,
			       struct sg_table *pages)
{
	do {
		if (dma_map_sg_attrs(obj->base.dev->dev,
				     pages->sgl, pages->nents,
				     DMA_BIDIRECTIONAL,
				     DMA_ATTR_SKIP_CPU_SYNC |
				     DMA_ATTR_NO_KERNEL_MAPPING |
				     DMA_ATTR_NO_WARN))
			return 0;

		/*
		 * If the DMA remap fails, one cause can be that we have
		 * too many objects pinned in a small remapping table,
		 * such as swiotlb. Incrementally purge all other objects and
		 * try again - if there are no more pages to remove from
		 * the DMA remapper, i915_gem_shrink will return 0.
		 */
		GEM_BUG_ON(obj->mm.pages == pages);
	} while (i915_gem_shrink(NULL, to_i915(obj->base.dev),
				 obj->base.size >> PAGE_SHIFT, NULL,
				 I915_SHRINK_BOUND |
				 I915_SHRINK_UNBOUND));

	return -ENOSPC;
}

void i915_gem_gtt_finish_pages(struct drm_i915_gem_object *obj,
			       struct sg_table *pages)
{
	struct drm_i915_private *i915 = to_i915(obj->base.dev);
	struct i915_ggtt *ggtt = to_gt(i915)->ggtt;

	/* XXX This does not prevent more requests being submitted! */
	if (unlikely(ggtt->do_idle_maps))
		/* Wait a bit, in the hope it avoids the hang */
		usleep_range(100, 250);

	dma_unmap_sg(i915->drm.dev, pages->sgl, pages->nents,
		     DMA_BIDIRECTIONAL);
}

/**
 * i915_gem_gtt_reserve - reserve a node in an address_space (GTT)
 * @vm: the &struct i915_address_space
 * @ww: An optional struct i915_gem_ww_ctx.
 * @node: the &struct drm_mm_node (typically i915_vma.mode)
 * @size: how much space to allocate inside the GTT,
 *        must be #I915_GTT_PAGE_SIZE aligned
 * @offset: where to insert inside the GTT,
 *          must be #I915_GTT_MIN_ALIGNMENT aligned, and the node
 *          (@offset + @size) must fit within the address space
 * @color: color to apply to node, if this node is not from a VMA,
 *         color must be #I915_COLOR_UNEVICTABLE
 * @flags: control search and eviction behaviour
 *
 * i915_gem_gtt_reserve() tries to insert the @node at the exact @offset inside
 * the address space (using @size and @color). If the @node does not fit, it
 * tries to evict any overlapping nodes from the GTT, including any
 * neighbouring nodes if the colors do not match (to ensure guard pages between
 * differing domains). See i915_gem_evict_for_node() for the gory details
 * on the eviction algorithm. #PIN_NONBLOCK may used to prevent waiting on
 * evicting active overlapping objects, and any overlapping node that is pinned
 * or marked as unevictable will also result in failure.
 *
 * Returns: 0 on success, -ENOSPC if no suitable hole is found, -EINTR if
 * asked to wait for eviction and interrupted.
 */
int i915_gem_gtt_reserve(struct i915_address_space *vm,
			 struct i915_gem_ww_ctx *ww,
			 struct drm_mm_node *node,
			 u64 size, u64 offset, unsigned long color,
			 unsigned int flags)
{
	int err;

	GEM_BUG_ON(!size);
	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
	GEM_BUG_ON(!IS_ALIGNED(offset, I915_GTT_MIN_ALIGNMENT));
	GEM_BUG_ON(range_overflows(offset, size, vm->total));
	GEM_BUG_ON(vm == &to_gt(vm->i915)->ggtt->alias->vm);
	GEM_BUG_ON(drm_mm_node_allocated(node));

	node->size = size;
	node->start = offset;
	node->color = color;

	err = drm_mm_reserve_node(&vm->mm, node);
	if (err != -ENOSPC)
		return err;

	if (flags & PIN_NOEVICT)
		return -ENOSPC;

	err = i915_gem_evict_for_node(vm, ww, node, flags);
	if (err == 0)
		err = drm_mm_reserve_node(&vm->mm, node);

	return err;
}

static u64 random_offset(u64 start, u64 end, u64 len, u64 align)
{
	u64 range, addr;

	GEM_BUG_ON(range_overflows(start, len, end));
	GEM_BUG_ON(round_up(start, align) > round_down(end - len, align));

	range = round_down(end - len, align) - round_up(start, align);
	if (range) {
		if (sizeof(unsigned long) == sizeof(u64)) {
			addr = get_random_u64();
		} else {
			addr = get_random_u32();
			if (range > U32_MAX) {
				addr <<= 32;
				addr |= get_random_u32();
			}
		}
		div64_u64_rem(addr, range, &addr);
		start += addr;
	}

	return round_up(start, align);
}

/**
 * i915_gem_gtt_insert - insert a node into an address_space (GTT)
 * @vm: the &struct i915_address_space
 * @ww: An optional struct i915_gem_ww_ctx.
 * @node: the &struct drm_mm_node (typically i915_vma.node)
 * @size: how much space to allocate inside the GTT,
 *        must be #I915_GTT_PAGE_SIZE aligned
 * @alignment: required alignment of starting offset, may be 0 but
 *             if specified, this must be a power-of-two and at least
 *             #I915_GTT_MIN_ALIGNMENT
 * @color: color to apply to node
 * @start: start of any range restriction inside GTT (0 for all),
 *         must be #I915_GTT_PAGE_SIZE aligned
 * @end: end of any range restriction inside GTT (U64_MAX for all),
 *       must be #I915_GTT_PAGE_SIZE aligned if not U64_MAX
 * @flags: control search and eviction behaviour
 *
 * i915_gem_gtt_insert() first searches for an available hole into which
 * is can insert the node. The hole address is aligned to @alignment and
 * its @size must then fit entirely within the [@start, @end] bounds. The
 * nodes on either side of the hole must match @color, or else a guard page
 * will be inserted between the two nodes (or the node evicted). If no
 * suitable hole is found, first a victim is randomly selected and tested
 * for eviction, otherwise then the LRU list of objects within the GTT
 * is scanned to find the first set of replacement nodes to create the hole.
 * Those old overlapping nodes are evicted from the GTT (and so must be
 * rebound before any future use). Any node that is currently pinned cannot
 * be evicted (see i915_vma_pin()). Similar if the node's VMA is currently
 * active and #PIN_NONBLOCK is specified, that node is also skipped when
 * searching for an eviction candidate. See i915_gem_evict_something() for
 * the gory details on the eviction algorithm.
 *
 * Returns: 0 on success, -ENOSPC if no suitable hole is found, -EINTR if
 * asked to wait for eviction and interrupted.
 */
int i915_gem_gtt_insert(struct i915_address_space *vm,
			struct i915_gem_ww_ctx *ww,
			struct drm_mm_node *node,
			u64 size, u64 alignment, unsigned long color,
			u64 start, u64 end, unsigned int flags)
{
	enum drm_mm_insert_mode mode;
	u64 offset;
	int err;

	lockdep_assert_held(&vm->mutex);

	GEM_BUG_ON(!size);
	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
	GEM_BUG_ON(alignment && !is_power_of_2(alignment));
	GEM_BUG_ON(alignment && !IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT));
	GEM_BUG_ON(start >= end);
	GEM_BUG_ON(start > 0  && !IS_ALIGNED(start, I915_GTT_PAGE_SIZE));
	GEM_BUG_ON(end < U64_MAX && !IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
	GEM_BUG_ON(vm == &to_gt(vm->i915)->ggtt->alias->vm);
	GEM_BUG_ON(drm_mm_node_allocated(node));

	if (unlikely(range_overflows(start, size, end)))
		return -ENOSPC;

	if (unlikely(round_up(start, alignment) > round_down(end - size, alignment)))
		return -ENOSPC;

	mode = DRM_MM_INSERT_BEST;
	if (flags & PIN_HIGH)
		mode = DRM_MM_INSERT_HIGHEST;
	if (flags & PIN_MAPPABLE)
		mode = DRM_MM_INSERT_LOW;

	/* We only allocate in PAGE_SIZE/GTT_PAGE_SIZE (4096) chunks,
	 * so we know that we always have a minimum alignment of 4096.
	 * The drm_mm range manager is optimised to return results
	 * with zero alignment, so where possible use the optimal
	 * path.
	 */
	BUILD_BUG_ON(I915_GTT_MIN_ALIGNMENT > I915_GTT_PAGE_SIZE);
	if (alignment <= I915_GTT_MIN_ALIGNMENT)
		alignment = 0;

	err = drm_mm_insert_node_in_range(&vm->mm, node,
					  size, alignment, color,
					  start, end, mode);
	if (err != -ENOSPC)
		return err;

	if (mode & DRM_MM_INSERT_ONCE) {
		err = drm_mm_insert_node_in_range(&vm->mm, node,
						  size, alignment, color,
						  start, end,
						  DRM_MM_INSERT_BEST);
		if (err != -ENOSPC)
			return err;
	}

	if (flags & PIN_NOEVICT)
		return -ENOSPC;

	/*
	 * No free space, pick a slot at random.
	 *
	 * There is a pathological case here using a GTT shared between
	 * mmap and GPU (i.e. ggtt/aliasing_ppgtt but not full-ppgtt):
	 *
	 *    |<-- 256 MiB aperture -->||<-- 1792 MiB unmappable -->|
	 *         (64k objects)             (448k objects)
	 *
	 * Now imagine that the eviction LRU is ordered top-down (just because
	 * pathology meets real life), and that we need to evict an object to
	 * make room inside the aperture. The eviction scan then has to walk
	 * the 448k list before it finds one within range. And now imagine that
	 * it has to search for a new hole between every byte inside the memcpy,
	 * for several simultaneous clients.
	 *
	 * On a full-ppgtt system, if we have run out of available space, there
	 * will be lots and lots of objects in the eviction list! Again,
	 * searching that LRU list may be slow if we are also applying any
	 * range restrictions (e.g. restriction to low 4GiB) and so, for
	 * simplicity and similarilty between different GTT, try the single
	 * random replacement first.
	 */
	offset = random_offset(start, end,
			       size, alignment ?: I915_GTT_MIN_ALIGNMENT);
	err = i915_gem_gtt_reserve(vm, ww, node, size, offset, color, flags);
	if (err != -ENOSPC)
		return err;

	if (flags & PIN_NOSEARCH)
		return -ENOSPC;

	/* Randomly selected placement is pinned, do a search */
	err = i915_gem_evict_something(vm, ww, size, alignment, color,
				       start, end, flags);
	if (err)
		return err;

	return drm_mm_insert_node_in_range(&vm->mm, node,
					   size, alignment, color,
					   start, end, DRM_MM_INSERT_EVICT);
}

#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftests/i915_gem_gtt.c"
#endif
Commit	Line	Data
2c86e55d	1	// SPDX-License-Identifier: MIT
76aaf220 DV	2	/*
76aaf220 DV	3	* Copyright © 2010 Daniel Vetter
2c86e55d	4	* Copyright © 2020 Intel Corporation
76aaf220 DV	5	*/
76aaf220 DV	6
aae4a3d8 CW	7	#include <linux/slab.h> /* fault-inject.h is not standalone! */
	8
	9	#include <linux/fault-inject.h>
e007b19d	10	#include <linux/log2.h>
606fec95	11	#include <linux/random.h>
0e46ce2e	12	#include <linux/seq_file.h>
5bab6f60	13	#include <linux/stop_machine.h>
e007b19d	14
ed3ba079	15	#include <asm/set_memory.h>
78387745	16	#include <asm/smp.h>
ed3ba079	17
eaf522f6	18	#include "gt/intel_gt.h"
66101975	19	#include "gt/intel_gt_requests.h"
df0566a6	20
76aaf220	21	#include "i915_drv.h"
2ef97818	22	#include "i915_gem_evict.h"
37d63f8f	23	#include "i915_scatterlist.h"
76aaf220	24	#include "i915_trace.h"
37d63f8f	25	#include "i915_vgpu.h"
76aaf220	26
2c86e55d MA	27	int i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj,
2c86e55d MA	28	struct sg_table *pages)
678d96fb	29	{
66df1014	30	do {
8ff5446a	31	if (dma_map_sg_attrs(obj->base.dev->dev,
2c86e55d	32	pages->sgl, pages->nents,
c4f61203	33	DMA_BIDIRECTIONAL,
a3a40284 CW	34	DMA_ATTR_SKIP_CPU_SYNC \|
a3a40284 CW	35	DMA_ATTR_NO_KERNEL_MAPPING \|
2c86e55d MA	36	DMA_ATTR_NO_WARN))
2c86e55d MA	37	return 0;
66df1014	38
63fd659f	39	/*
2c86e55d MA	40	* If the DMA remap fails, one cause can be that we have
	41	* too many objects pinned in a small remapping table,
	42	* such as swiotlb. Incrementally purge all other objects and
	43	* try again - if there are no more pages to remove from
	44	* the DMA remapper, i915_gem_shrink will return 0.
63fd659f	45	*/
2c86e55d	46	GEM_BUG_ON(obj->mm.pages == pages);
cf41a8f1	47	} while (i915_gem_shrink(NULL, to_i915(obj->base.dev),
2c86e55d MA	48	obj->base.size >> PAGE_SHIFT, NULL,
	49	I915_SHRINK_BOUND \|
	50	I915_SHRINK_UNBOUND));
d1c54acd	51
2c86e55d	52	return -ENOSPC;
d1c54acd MK	53	}
d1c54acd MK	54
2c86e55d MA	55	void i915_gem_gtt_finish_pages(struct drm_i915_gem_object *obj,
2c86e55d MA	56	struct sg_table *pages)
4ad2af1e	57	{
63de1da1	58	struct drm_i915_private *i915 = to_i915(obj->base.dev);
204129a2	59	struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
66df1014	60
63de1da1 CW	61	/* XXX This does not prevent more requests being submitted! */
	62	if (unlikely(ggtt->do_idle_maps))
	63	/* Wait a bit, in the hope it avoids the hang */
	64	usleep_range(100, 250);
66df1014	65
8ff5446a	66	dma_unmap_sg(i915->drm.dev, pages->sgl, pages->nents,
c4f61203	67	DMA_BIDIRECTIONAL);
fe14d5f4 TU	68	}
fe14d5f4 TU	69
625d988a CW	70	/**
625d988a CW	71	* i915_gem_gtt_reserve - reserve a node in an address_space (GTT)
a4dbf7cf	72	* @vm: the &struct i915_address_space
7e00897b	73	* @ww: An optional struct i915_gem_ww_ctx.
a4dbf7cf CW	74	* @node: the &struct drm_mm_node (typically i915_vma.mode)
	75	* @size: how much space to allocate inside the GTT,
	76	* must be #I915_GTT_PAGE_SIZE aligned
	77	* @offset: where to insert inside the GTT,
	78	* must be #I915_GTT_MIN_ALIGNMENT aligned, and the node
	79	* (@offset + @size) must fit within the address space
	80	* @color: color to apply to node, if this node is not from a VMA,
	81	* color must be #I915_COLOR_UNEVICTABLE
	82	* @flags: control search and eviction behaviour
625d988a CW	83	*
	84	* i915_gem_gtt_reserve() tries to insert the @node at the exact @offset inside
	85	* the address space (using @size and @color). If the @node does not fit, it
	86	* tries to evict any overlapping nodes from the GTT, including any
	87	* neighbouring nodes if the colors do not match (to ensure guard pages between
	88	* differing domains). See i915_gem_evict_for_node() for the gory details
	89	* on the eviction algorithm. #PIN_NONBLOCK may used to prevent waiting on
	90	* evicting active overlapping objects, and any overlapping node that is pinned
	91	* or marked as unevictable will also result in failure.
	92	*
	93	* Returns: 0 on success, -ENOSPC if no suitable hole is found, -EINTR if
	94	* asked to wait for eviction and interrupted.
	95	*/
	96	int i915_gem_gtt_reserve(struct i915_address_space *vm,
7e00897b	97	struct i915_gem_ww_ctx *ww,
625d988a CW	98	struct drm_mm_node *node,
	99	u64 size, u64 offset, unsigned long color,
	100	unsigned int flags)
	101	{
	102	int err;
	103
	104	GEM_BUG_ON(!size);
	105	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
	106	GEM_BUG_ON(!IS_ALIGNED(offset, I915_GTT_MIN_ALIGNMENT));
	107	GEM_BUG_ON(range_overflows(offset, size, vm->total));
204129a2	108	GEM_BUG_ON(vm == &to_gt(vm->i915)->ggtt->alias->vm);
9734ad13	109	GEM_BUG_ON(drm_mm_node_allocated(node));
625d988a CW	110
	111	node->size = size;
	112	node->start = offset;
	113	node->color = color;
	114
	115	err = drm_mm_reserve_node(&vm->mm, node);
	116	if (err != -ENOSPC)
	117	return err;
	118
616d9cee CW	119	if (flags & PIN_NOEVICT)
	120	return -ENOSPC;
	121
7e00897b	122	err = i915_gem_evict_for_node(vm, ww, node, flags);
625d988a CW	123	if (err == 0)
	124	err = drm_mm_reserve_node(&vm->mm, node);
	125
	126	return err;
	127	}
	128
606fec95 CW	129	static u64 random_offset(u64 start, u64 end, u64 len, u64 align)
	130	{
	131	u64 range, addr;
	132
	133	GEM_BUG_ON(range_overflows(start, len, end));
	134	GEM_BUG_ON(round_up(start, align) > round_down(end - len, align));
	135
	136	range = round_down(end - len, align) - round_up(start, align);
	137	if (range) {
	138	if (sizeof(unsigned long) == sizeof(u64)) {
a251c17a	139	addr = get_random_u64();
606fec95	140	} else {
a251c17a	141	addr = get_random_u32();
606fec95 CW	142	if (range > U32_MAX) {
606fec95 CW	143	addr <<= 32;
a251c17a	144	addr \|= get_random_u32();
606fec95 CW	145	}
	146	}
	147	div64_u64_rem(addr, range, &addr);
	148	start += addr;
	149	}
	150
	151	return round_up(start, align);
	152	}
	153
e007b19d CW	154	/**
e007b19d CW	155	* i915_gem_gtt_insert - insert a node into an address_space (GTT)
a4dbf7cf	156	* @vm: the &struct i915_address_space
7e00897b	157	* @ww: An optional struct i915_gem_ww_ctx.
a4dbf7cf CW	158	* @node: the &struct drm_mm_node (typically i915_vma.node)
	159	* @size: how much space to allocate inside the GTT,
	160	* must be #I915_GTT_PAGE_SIZE aligned
	161	* @alignment: required alignment of starting offset, may be 0 but
	162	* if specified, this must be a power-of-two and at least
	163	* #I915_GTT_MIN_ALIGNMENT
	164	* @color: color to apply to node
	165	* @start: start of any range restriction inside GTT (0 for all),
e007b19d	166	* must be #I915_GTT_PAGE_SIZE aligned
a4dbf7cf CW	167	* @end: end of any range restriction inside GTT (U64_MAX for all),
	168	* must be #I915_GTT_PAGE_SIZE aligned if not U64_MAX
	169	* @flags: control search and eviction behaviour
e007b19d CW	170	*
	171	* i915_gem_gtt_insert() first searches for an available hole into which
	172	* is can insert the node. The hole address is aligned to @alignment and
	173	* its @size must then fit entirely within the [@start, @end] bounds. The
	174	* nodes on either side of the hole must match @color, or else a guard page
	175	* will be inserted between the two nodes (or the node evicted). If no
606fec95 CW	176	* suitable hole is found, first a victim is randomly selected and tested
606fec95 CW	177	* for eviction, otherwise then the LRU list of objects within the GTT
e007b19d CW	178	* is scanned to find the first set of replacement nodes to create the hole.
	179	* Those old overlapping nodes are evicted from the GTT (and so must be
	180	* rebound before any future use). Any node that is currently pinned cannot
	181	* be evicted (see i915_vma_pin()). Similar if the node's VMA is currently
	182	* active and #PIN_NONBLOCK is specified, that node is also skipped when
	183	* searching for an eviction candidate. See i915_gem_evict_something() for
	184	* the gory details on the eviction algorithm.
	185	*
	186	* Returns: 0 on success, -ENOSPC if no suitable hole is found, -EINTR if
	187	* asked to wait for eviction and interrupted.
	188	*/
	189	int i915_gem_gtt_insert(struct i915_address_space *vm,
7e00897b	190	struct i915_gem_ww_ctx *ww,
e007b19d CW	191	struct drm_mm_node *node,
	192	u64 size, u64 alignment, unsigned long color,
	193	u64 start, u64 end, unsigned int flags)
	194	{
4e64e553	195	enum drm_mm_insert_mode mode;
606fec95	196	u64 offset;
e007b19d CW	197	int err;
e007b19d CW	198
2850748e CW	199	lockdep_assert_held(&vm->mutex);
2850748e CW	200
e007b19d CW	201	GEM_BUG_ON(!size);
	202	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
	203	GEM_BUG_ON(alignment && !is_power_of_2(alignment));
	204	GEM_BUG_ON(alignment && !IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT));
	205	GEM_BUG_ON(start >= end);
	206	GEM_BUG_ON(start > 0 && !IS_ALIGNED(start, I915_GTT_PAGE_SIZE));
	207	GEM_BUG_ON(end < U64_MAX && !IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
204129a2	208	GEM_BUG_ON(vm == &to_gt(vm->i915)->ggtt->alias->vm);
9734ad13	209	GEM_BUG_ON(drm_mm_node_allocated(node));
e007b19d CW	210
	211	if (unlikely(range_overflows(start, size, end)))
	212	return -ENOSPC;
	213
	214	if (unlikely(round_up(start, alignment) > round_down(end - size, alignment)))
	215	return -ENOSPC;
	216
4e64e553 CW	217	mode = DRM_MM_INSERT_BEST;
4e64e553 CW	218	if (flags & PIN_HIGH)
eb479f86	219	mode = DRM_MM_INSERT_HIGHEST;
4e64e553 CW	220	if (flags & PIN_MAPPABLE)
4e64e553 CW	221	mode = DRM_MM_INSERT_LOW;
e007b19d CW	222
	223	/* We only allocate in PAGE_SIZE/GTT_PAGE_SIZE (4096) chunks,
	224	* so we know that we always have a minimum alignment of 4096.
	225	* The drm_mm range manager is optimised to return results
	226	* with zero alignment, so where possible use the optimal
	227	* path.
	228	*/
	229	BUILD_BUG_ON(I915_GTT_MIN_ALIGNMENT > I915_GTT_PAGE_SIZE);
	230	if (alignment <= I915_GTT_MIN_ALIGNMENT)
	231	alignment = 0;
	232
4e64e553 CW	233	err = drm_mm_insert_node_in_range(&vm->mm, node,
	234	size, alignment, color,
	235	start, end, mode);
e007b19d CW	236	if (err != -ENOSPC)
	237	return err;
	238
eb479f86 CW	239	if (mode & DRM_MM_INSERT_ONCE) {
	240	err = drm_mm_insert_node_in_range(&vm->mm, node,
	241	size, alignment, color,
	242	start, end,
	243	DRM_MM_INSERT_BEST);
	244	if (err != -ENOSPC)
	245	return err;
	246	}
	247
616d9cee CW	248	if (flags & PIN_NOEVICT)
	249	return -ENOSPC;
	250
6846895f CW	251	/*
6846895f CW	252	* No free space, pick a slot at random.
606fec95 CW	253	*
	254	* There is a pathological case here using a GTT shared between
	255	* mmap and GPU (i.e. ggtt/aliasing_ppgtt but not full-ppgtt):
	256	*
	257	* \|<-- 256 MiB aperture -->\|\|<-- 1792 MiB unmappable -->\|
	258	* (64k objects) (448k objects)
	259	*
	260	* Now imagine that the eviction LRU is ordered top-down (just because
	261	* pathology meets real life), and that we need to evict an object to
	262	* make room inside the aperture. The eviction scan then has to walk
	263	* the 448k list before it finds one within range. And now imagine that
	264	* it has to search for a new hole between every byte inside the memcpy,
	265	* for several simultaneous clients.
	266	*
	267	* On a full-ppgtt system, if we have run out of available space, there
	268	* will be lots and lots of objects in the eviction list! Again,
	269	* searching that LRU list may be slow if we are also applying any
	270	* range restrictions (e.g. restriction to low 4GiB) and so, for
	271	* simplicity and similarilty between different GTT, try the single
	272	* random replacement first.
	273	*/
	274	offset = random_offset(start, end,
	275	size, alignment ?: I915_GTT_MIN_ALIGNMENT);
7e00897b	276	err = i915_gem_gtt_reserve(vm, ww, node, size, offset, color, flags);
606fec95 CW	277	if (err != -ENOSPC)
	278	return err;
	279
6846895f CW	280	if (flags & PIN_NOSEARCH)
	281	return -ENOSPC;
	282
606fec95	283	/* Randomly selected placement is pinned, do a search */
7e00897b	284	err = i915_gem_evict_something(vm, ww, size, alignment, color,
e007b19d CW	285	start, end, flags);
	286	if (err)
	287	return err;
	288
4e64e553 CW	289	return drm_mm_insert_node_in_range(&vm->mm, node,
	290	size, alignment, color,
	291	start, end, DRM_MM_INSERT_EVICT);
e007b19d	292	}
3b5bb0a3 CW	293
3b5bb0a3 CW	294	#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
1c42819a	295	#include "selftests/i915_gem_gtt.c"
3b5bb0a3	296	#endif