[linux-block.git] / drivers / gpu / drm / i915 / i915_gem_gtt.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2010 Daniel Vetter
 * Copyright © 2020 Intel Corporation
 */

#include <linux/slab.h> /* fault-inject.h is not standalone! */

#include <linux/fault-inject.h>
#include <linux/log2.h>
#include <linux/random.h>
#include <linux/seq_file.h>
#include <linux/stop_machine.h>

#include <asm/set_memory.h>
#include <asm/smp.h>

#include <drm/i915_drm.h>

#include "display/intel_frontbuffer.h"
#include "gt/intel_gt.h"
#include "gt/intel_gt_requests.h"

#include "i915_drv.h"
#include "i915_scatterlist.h"
#include "i915_trace.h"
#include "i915_vgpu.h"

int i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj,
			       struct sg_table *pages)
{
	do {
		if (dma_map_sg_attrs(&obj->base.dev->pdev->dev,
				     pages->sgl, pages->nents,
				     PCI_DMA_BIDIRECTIONAL,
				     DMA_ATTR_NO_WARN))
			return 0;

		/*
		 * If the DMA remap fails, one cause can be that we have
		 * too many objects pinned in a small remapping table,
		 * such as swiotlb. Incrementally purge all other objects and
		 * try again - if there are no more pages to remove from
		 * the DMA remapper, i915_gem_shrink will return 0.
		 */
		GEM_BUG_ON(obj->mm.pages == pages);
	} while (i915_gem_shrink(to_i915(obj->base.dev),
				 obj->base.size >> PAGE_SHIFT, NULL,
				 I915_SHRINK_BOUND |
				 I915_SHRINK_UNBOUND));

	return -ENOSPC;
}

void i915_gem_gtt_finish_pages(struct drm_i915_gem_object *obj,
			       struct sg_table *pages)
{
	struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
	struct device *kdev = &dev_priv->drm.pdev->dev;
	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	if (unlikely(ggtt->do_idle_maps)) {
		/* XXX This does not prevent more requests being submitted! */
		if (intel_gt_retire_requests_timeout(ggtt->vm.gt,
						     -MAX_SCHEDULE_TIMEOUT)) {
			DRM_ERROR("Failed to wait for idle; VT'd may hang.\n");
			/* Wait a bit, in hopes it avoids the hang */
			udelay(10);
		}
	}

	dma_unmap_sg(kdev, pages->sgl, pages->nents, PCI_DMA_BIDIRECTIONAL);
}

/**
 * i915_gem_gtt_reserve - reserve a node in an address_space (GTT)
 * @vm: the &struct i915_address_space
 * @node: the &struct drm_mm_node (typically i915_vma.mode)
 * @size: how much space to allocate inside the GTT,
 *        must be #I915_GTT_PAGE_SIZE aligned
 * @offset: where to insert inside the GTT,
 *          must be #I915_GTT_MIN_ALIGNMENT aligned, and the node
 *          (@offset + @size) must fit within the address space
 * @color: color to apply to node, if this node is not from a VMA,
 *         color must be #I915_COLOR_UNEVICTABLE
 * @flags: control search and eviction behaviour
 *
 * i915_gem_gtt_reserve() tries to insert the @node at the exact @offset inside
 * the address space (using @size and @color). If the @node does not fit, it
 * tries to evict any overlapping nodes from the GTT, including any
 * neighbouring nodes if the colors do not match (to ensure guard pages between
 * differing domains). See i915_gem_evict_for_node() for the gory details
 * on the eviction algorithm. #PIN_NONBLOCK may used to prevent waiting on
 * evicting active overlapping objects, and any overlapping node that is pinned
 * or marked as unevictable will also result in failure.
 *
 * Returns: 0 on success, -ENOSPC if no suitable hole is found, -EINTR if
 * asked to wait for eviction and interrupted.
 */
int i915_gem_gtt_reserve(struct i915_address_space *vm,
			 struct drm_mm_node *node,
			 u64 size, u64 offset, unsigned long color,
			 unsigned int flags)
{
	int err;

	GEM_BUG_ON(!size);
	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
	GEM_BUG_ON(!IS_ALIGNED(offset, I915_GTT_MIN_ALIGNMENT));
	GEM_BUG_ON(range_overflows(offset, size, vm->total));
	GEM_BUG_ON(vm == &vm->i915->ggtt.alias->vm);
	GEM_BUG_ON(drm_mm_node_allocated(node));

	node->size = size;
	node->start = offset;
	node->color = color;

	err = drm_mm_reserve_node(&vm->mm, node);
	if (err != -ENOSPC)
		return err;

	if (flags & PIN_NOEVICT)
		return -ENOSPC;

	err = i915_gem_evict_for_node(vm, node, flags);
	if (err == 0)
		err = drm_mm_reserve_node(&vm->mm, node);

	return err;
}

static u64 random_offset(u64 start, u64 end, u64 len, u64 align)
{
	u64 range, addr;

	GEM_BUG_ON(range_overflows(start, len, end));
	GEM_BUG_ON(round_up(start, align) > round_down(end - len, align));

	range = round_down(end - len, align) - round_up(start, align);
	if (range) {
		if (sizeof(unsigned long) == sizeof(u64)) {
			addr = get_random_long();
		} else {
			addr = get_random_int();
			if (range > U32_MAX) {
				addr <<= 32;
				addr |= get_random_int();
			}
		}
		div64_u64_rem(addr, range, &addr);
		start += addr;
	}

	return round_up(start, align);
}

/**
 * i915_gem_gtt_insert - insert a node into an address_space (GTT)
 * @vm: the &struct i915_address_space
 * @node: the &struct drm_mm_node (typically i915_vma.node)
 * @size: how much space to allocate inside the GTT,
 *        must be #I915_GTT_PAGE_SIZE aligned
 * @alignment: required alignment of starting offset, may be 0 but
 *             if specified, this must be a power-of-two and at least
 *             #I915_GTT_MIN_ALIGNMENT
 * @color: color to apply to node
 * @start: start of any range restriction inside GTT (0 for all),
 *         must be #I915_GTT_PAGE_SIZE aligned
 * @end: end of any range restriction inside GTT (U64_MAX for all),
 *       must be #I915_GTT_PAGE_SIZE aligned if not U64_MAX
 * @flags: control search and eviction behaviour
 *
 * i915_gem_gtt_insert() first searches for an available hole into which
 * is can insert the node. The hole address is aligned to @alignment and
 * its @size must then fit entirely within the [@start, @end] bounds. The
 * nodes on either side of the hole must match @color, or else a guard page
 * will be inserted between the two nodes (or the node evicted). If no
 * suitable hole is found, first a victim is randomly selected and tested
 * for eviction, otherwise then the LRU list of objects within the GTT
 * is scanned to find the first set of replacement nodes to create the hole.
 * Those old overlapping nodes are evicted from the GTT (and so must be
 * rebound before any future use). Any node that is currently pinned cannot
 * be evicted (see i915_vma_pin()). Similar if the node's VMA is currently
 * active and #PIN_NONBLOCK is specified, that node is also skipped when
 * searching for an eviction candidate. See i915_gem_evict_something() for
 * the gory details on the eviction algorithm.
 *
 * Returns: 0 on success, -ENOSPC if no suitable hole is found, -EINTR if
 * asked to wait for eviction and interrupted.
 */
int i915_gem_gtt_insert(struct i915_address_space *vm,
			struct drm_mm_node *node,
			u64 size, u64 alignment, unsigned long color,
			u64 start, u64 end, unsigned int flags)
{
	enum drm_mm_insert_mode mode;
	u64 offset;
	int err;

	lockdep_assert_held(&vm->mutex);

	GEM_BUG_ON(!size);
	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
	GEM_BUG_ON(alignment && !is_power_of_2(alignment));
	GEM_BUG_ON(alignment && !IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT));
	GEM_BUG_ON(start >= end);
	GEM_BUG_ON(start > 0  && !IS_ALIGNED(start, I915_GTT_PAGE_SIZE));
	GEM_BUG_ON(end < U64_MAX && !IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
	GEM_BUG_ON(vm == &vm->i915->ggtt.alias->vm);
	GEM_BUG_ON(drm_mm_node_allocated(node));

	if (unlikely(range_overflows(start, size, end)))
		return -ENOSPC;

	if (unlikely(round_up(start, alignment) > round_down(end - size, alignment)))
		return -ENOSPC;

	mode = DRM_MM_INSERT_BEST;
	if (flags & PIN_HIGH)
		mode = DRM_MM_INSERT_HIGHEST;
	if (flags & PIN_MAPPABLE)
		mode = DRM_MM_INSERT_LOW;

	/* We only allocate in PAGE_SIZE/GTT_PAGE_SIZE (4096) chunks,
	 * so we know that we always have a minimum alignment of 4096.
	 * The drm_mm range manager is optimised to return results
	 * with zero alignment, so where possible use the optimal
	 * path.
	 */
	BUILD_BUG_ON(I915_GTT_MIN_ALIGNMENT > I915_GTT_PAGE_SIZE);
	if (alignment <= I915_GTT_MIN_ALIGNMENT)
		alignment = 0;

	err = drm_mm_insert_node_in_range(&vm->mm, node,
					  size, alignment, color,
					  start, end, mode);
	if (err != -ENOSPC)
		return err;

	if (mode & DRM_MM_INSERT_ONCE) {
		err = drm_mm_insert_node_in_range(&vm->mm, node,
						  size, alignment, color,
						  start, end,
						  DRM_MM_INSERT_BEST);
		if (err != -ENOSPC)
			return err;
	}

	if (flags & PIN_NOEVICT)
		return -ENOSPC;

	/*
	 * No free space, pick a slot at random.
	 *
	 * There is a pathological case here using a GTT shared between
	 * mmap and GPU (i.e. ggtt/aliasing_ppgtt but not full-ppgtt):
	 *
	 *    |<-- 256 MiB aperture -->||<-- 1792 MiB unmappable -->|
	 *         (64k objects)             (448k objects)
	 *
	 * Now imagine that the eviction LRU is ordered top-down (just because
	 * pathology meets real life), and that we need to evict an object to
	 * make room inside the aperture. The eviction scan then has to walk
	 * the 448k list before it finds one within range. And now imagine that
	 * it has to search for a new hole between every byte inside the memcpy,
	 * for several simultaneous clients.
	 *
	 * On a full-ppgtt system, if we have run out of available space, there
	 * will be lots and lots of objects in the eviction list! Again,
	 * searching that LRU list may be slow if we are also applying any
	 * range restrictions (e.g. restriction to low 4GiB) and so, for
	 * simplicity and similarilty between different GTT, try the single
	 * random replacement first.
	 */
	offset = random_offset(start, end,
			       size, alignment ?: I915_GTT_MIN_ALIGNMENT);
	err = i915_gem_gtt_reserve(vm, node, size, offset, color, flags);
	if (err != -ENOSPC)
		return err;

	if (flags & PIN_NOSEARCH)
		return -ENOSPC;

	/* Randomly selected placement is pinned, do a search */
	err = i915_gem_evict_something(vm, size, alignment, color,
				       start, end, flags);
	if (err)
		return err;

	return drm_mm_insert_node_in_range(&vm->mm, node,
					   size, alignment, color,
					   start, end, DRM_MM_INSERT_EVICT);
}

#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftests/i915_gem_gtt.c"
#endif
Commit	Line	Data
2c86e55d	1	// SPDX-License-Identifier: MIT
76aaf220 DV	2	/*
76aaf220 DV	3	* Copyright © 2010 Daniel Vetter
2c86e55d	4	* Copyright © 2020 Intel Corporation
76aaf220 DV	5	*/
76aaf220 DV	6
aae4a3d8 CW	7	#include <linux/slab.h> /* fault-inject.h is not standalone! */
	8
	9	#include <linux/fault-inject.h>
e007b19d	10	#include <linux/log2.h>
606fec95	11	#include <linux/random.h>
0e46ce2e	12	#include <linux/seq_file.h>
5bab6f60	13	#include <linux/stop_machine.h>
e007b19d	14
ed3ba079	15	#include <asm/set_memory.h>
78387745	16	#include <asm/smp.h>
ed3ba079	17
760285e7	18	#include <drm/i915_drm.h>
e007b19d	19
df0566a6	20	#include "display/intel_frontbuffer.h"
eaf522f6	21	#include "gt/intel_gt.h"
66101975	22	#include "gt/intel_gt_requests.h"
df0566a6	23
76aaf220	24	#include "i915_drv.h"
37d63f8f	25	#include "i915_scatterlist.h"
76aaf220	26	#include "i915_trace.h"
37d63f8f	27	#include "i915_vgpu.h"
76aaf220	28
2c86e55d MA	29	int i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj,
2c86e55d MA	30	struct sg_table *pages)
678d96fb	31	{
66df1014	32	do {
2c86e55d MA	33	if (dma_map_sg_attrs(&obj->base.dev->pdev->dev,
	34	pages->sgl, pages->nents,
	35	PCI_DMA_BIDIRECTIONAL,
	36	DMA_ATTR_NO_WARN))
	37	return 0;
66df1014	38
63fd659f	39	/*
2c86e55d MA	40	* If the DMA remap fails, one cause can be that we have
	41	* too many objects pinned in a small remapping table,
	42	* such as swiotlb. Incrementally purge all other objects and
	43	* try again - if there are no more pages to remove from
	44	* the DMA remapper, i915_gem_shrink will return 0.
63fd659f	45	*/
2c86e55d MA	46	GEM_BUG_ON(obj->mm.pages == pages);
	47	} while (i915_gem_shrink(to_i915(obj->base.dev),
	48	obj->base.size >> PAGE_SHIFT, NULL,
	49	I915_SHRINK_BOUND \|
	50	I915_SHRINK_UNBOUND));
d1c54acd	51
2c86e55d	52	return -ENOSPC;
d1c54acd MK	53	}
d1c54acd MK	54
2c86e55d MA	55	void i915_gem_gtt_finish_pages(struct drm_i915_gem_object *obj,
2c86e55d MA	56	struct sg_table *pages)
4ad2af1e	57	{
2c86e55d MA	58	struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
	59	struct device *kdev = &dev_priv->drm.pdev->dev;
	60	struct i915_ggtt *ggtt = &dev_priv->ggtt;
66df1014	61
2c86e55d MA	62	if (unlikely(ggtt->do_idle_maps)) {
	63	/* XXX This does not prevent more requests being submitted! */
	64	if (intel_gt_retire_requests_timeout(ggtt->vm.gt,
	65	-MAX_SCHEDULE_TIMEOUT)) {
	66	DRM_ERROR("Failed to wait for idle; VT'd may hang.\n");
	67	/* Wait a bit, in hopes it avoids the hang */
	68	udelay(10);
	69	}
aa095871	70	}
66df1014	71
2c86e55d	72	dma_unmap_sg(kdev, pages->sgl, pages->nents, PCI_DMA_BIDIRECTIONAL);
fe14d5f4 TU	73	}
fe14d5f4 TU	74
625d988a CW	75	/**
625d988a CW	76	* i915_gem_gtt_reserve - reserve a node in an address_space (GTT)
a4dbf7cf CW	77	* @vm: the &struct i915_address_space
	78	* @node: the &struct drm_mm_node (typically i915_vma.mode)
	79	* @size: how much space to allocate inside the GTT,
	80	* must be #I915_GTT_PAGE_SIZE aligned
	81	* @offset: where to insert inside the GTT,
	82	* must be #I915_GTT_MIN_ALIGNMENT aligned, and the node
	83	* (@offset + @size) must fit within the address space
	84	* @color: color to apply to node, if this node is not from a VMA,
	85	* color must be #I915_COLOR_UNEVICTABLE
	86	* @flags: control search and eviction behaviour
625d988a CW	87	*
	88	* i915_gem_gtt_reserve() tries to insert the @node at the exact @offset inside
	89	* the address space (using @size and @color). If the @node does not fit, it
	90	* tries to evict any overlapping nodes from the GTT, including any
	91	* neighbouring nodes if the colors do not match (to ensure guard pages between
	92	* differing domains). See i915_gem_evict_for_node() for the gory details
	93	* on the eviction algorithm. #PIN_NONBLOCK may used to prevent waiting on
	94	* evicting active overlapping objects, and any overlapping node that is pinned
	95	* or marked as unevictable will also result in failure.
	96	*
	97	* Returns: 0 on success, -ENOSPC if no suitable hole is found, -EINTR if
	98	* asked to wait for eviction and interrupted.
	99	*/
	100	int i915_gem_gtt_reserve(struct i915_address_space *vm,
	101	struct drm_mm_node *node,
	102	u64 size, u64 offset, unsigned long color,
	103	unsigned int flags)
	104	{
	105	int err;
	106
	107	GEM_BUG_ON(!size);
	108	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
	109	GEM_BUG_ON(!IS_ALIGNED(offset, I915_GTT_MIN_ALIGNMENT));
	110	GEM_BUG_ON(range_overflows(offset, size, vm->total));
c082afac	111	GEM_BUG_ON(vm == &vm->i915->ggtt.alias->vm);
9734ad13	112	GEM_BUG_ON(drm_mm_node_allocated(node));
625d988a CW	113
	114	node->size = size;
	115	node->start = offset;
	116	node->color = color;
	117
	118	err = drm_mm_reserve_node(&vm->mm, node);
	119	if (err != -ENOSPC)
	120	return err;
	121
616d9cee CW	122	if (flags & PIN_NOEVICT)
	123	return -ENOSPC;
	124
625d988a CW	125	err = i915_gem_evict_for_node(vm, node, flags);
	126	if (err == 0)
	127	err = drm_mm_reserve_node(&vm->mm, node);
	128
	129	return err;
	130	}
	131
606fec95 CW	132	static u64 random_offset(u64 start, u64 end, u64 len, u64 align)
	133	{
	134	u64 range, addr;
	135
	136	GEM_BUG_ON(range_overflows(start, len, end));
	137	GEM_BUG_ON(round_up(start, align) > round_down(end - len, align));
	138
	139	range = round_down(end - len, align) - round_up(start, align);
	140	if (range) {
	141	if (sizeof(unsigned long) == sizeof(u64)) {
	142	addr = get_random_long();
	143	} else {
	144	addr = get_random_int();
	145	if (range > U32_MAX) {
	146	addr <<= 32;
	147	addr \|= get_random_int();
	148	}
	149	}
	150	div64_u64_rem(addr, range, &addr);
	151	start += addr;
	152	}
	153
	154	return round_up(start, align);
	155	}
	156
e007b19d CW	157	/**
e007b19d CW	158	* i915_gem_gtt_insert - insert a node into an address_space (GTT)
a4dbf7cf CW	159	* @vm: the &struct i915_address_space
	160	* @node: the &struct drm_mm_node (typically i915_vma.node)
	161	* @size: how much space to allocate inside the GTT,
	162	* must be #I915_GTT_PAGE_SIZE aligned
	163	* @alignment: required alignment of starting offset, may be 0 but
	164	* if specified, this must be a power-of-two and at least
	165	* #I915_GTT_MIN_ALIGNMENT
	166	* @color: color to apply to node
	167	* @start: start of any range restriction inside GTT (0 for all),
e007b19d	168	* must be #I915_GTT_PAGE_SIZE aligned
a4dbf7cf CW	169	* @end: end of any range restriction inside GTT (U64_MAX for all),
	170	* must be #I915_GTT_PAGE_SIZE aligned if not U64_MAX
	171	* @flags: control search and eviction behaviour
e007b19d CW	172	*
	173	* i915_gem_gtt_insert() first searches for an available hole into which
	174	* is can insert the node. The hole address is aligned to @alignment and
	175	* its @size must then fit entirely within the [@start, @end] bounds. The
	176	* nodes on either side of the hole must match @color, or else a guard page
	177	* will be inserted between the two nodes (or the node evicted). If no
606fec95 CW	178	* suitable hole is found, first a victim is randomly selected and tested
606fec95 CW	179	* for eviction, otherwise then the LRU list of objects within the GTT
e007b19d CW	180	* is scanned to find the first set of replacement nodes to create the hole.
	181	* Those old overlapping nodes are evicted from the GTT (and so must be
	182	* rebound before any future use). Any node that is currently pinned cannot
	183	* be evicted (see i915_vma_pin()). Similar if the node's VMA is currently
	184	* active and #PIN_NONBLOCK is specified, that node is also skipped when
	185	* searching for an eviction candidate. See i915_gem_evict_something() for
	186	* the gory details on the eviction algorithm.
	187	*
	188	* Returns: 0 on success, -ENOSPC if no suitable hole is found, -EINTR if
	189	* asked to wait for eviction and interrupted.
	190	*/
	191	int i915_gem_gtt_insert(struct i915_address_space *vm,
	192	struct drm_mm_node *node,
	193	u64 size, u64 alignment, unsigned long color,
	194	u64 start, u64 end, unsigned int flags)
	195	{
4e64e553	196	enum drm_mm_insert_mode mode;
606fec95	197	u64 offset;
e007b19d CW	198	int err;
e007b19d CW	199
2850748e CW	200	lockdep_assert_held(&vm->mutex);
2850748e CW	201
e007b19d CW	202	GEM_BUG_ON(!size);
	203	GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
	204	GEM_BUG_ON(alignment && !is_power_of_2(alignment));
	205	GEM_BUG_ON(alignment && !IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT));
	206	GEM_BUG_ON(start >= end);
	207	GEM_BUG_ON(start > 0 && !IS_ALIGNED(start, I915_GTT_PAGE_SIZE));
	208	GEM_BUG_ON(end < U64_MAX && !IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
c082afac	209	GEM_BUG_ON(vm == &vm->i915->ggtt.alias->vm);
9734ad13	210	GEM_BUG_ON(drm_mm_node_allocated(node));
e007b19d CW	211
	212	if (unlikely(range_overflows(start, size, end)))
	213	return -ENOSPC;
	214
	215	if (unlikely(round_up(start, alignment) > round_down(end - size, alignment)))
	216	return -ENOSPC;
	217
4e64e553 CW	218	mode = DRM_MM_INSERT_BEST;
4e64e553 CW	219	if (flags & PIN_HIGH)
eb479f86	220	mode = DRM_MM_INSERT_HIGHEST;
4e64e553 CW	221	if (flags & PIN_MAPPABLE)
4e64e553 CW	222	mode = DRM_MM_INSERT_LOW;
e007b19d CW	223
	224	/* We only allocate in PAGE_SIZE/GTT_PAGE_SIZE (4096) chunks,
	225	* so we know that we always have a minimum alignment of 4096.
	226	* The drm_mm range manager is optimised to return results
	227	* with zero alignment, so where possible use the optimal
	228	* path.
	229	*/
	230	BUILD_BUG_ON(I915_GTT_MIN_ALIGNMENT > I915_GTT_PAGE_SIZE);
	231	if (alignment <= I915_GTT_MIN_ALIGNMENT)
	232	alignment = 0;
	233
4e64e553 CW	234	err = drm_mm_insert_node_in_range(&vm->mm, node,
	235	size, alignment, color,
	236	start, end, mode);
e007b19d CW	237	if (err != -ENOSPC)
	238	return err;
	239
eb479f86 CW	240	if (mode & DRM_MM_INSERT_ONCE) {
	241	err = drm_mm_insert_node_in_range(&vm->mm, node,
	242	size, alignment, color,
	243	start, end,
	244	DRM_MM_INSERT_BEST);
	245	if (err != -ENOSPC)
	246	return err;
	247	}
	248
616d9cee CW	249	if (flags & PIN_NOEVICT)
	250	return -ENOSPC;
	251
6846895f CW	252	/*
6846895f CW	253	* No free space, pick a slot at random.
606fec95 CW	254	*
	255	* There is a pathological case here using a GTT shared between
	256	* mmap and GPU (i.e. ggtt/aliasing_ppgtt but not full-ppgtt):
	257	*
	258	* \|<-- 256 MiB aperture -->\|\|<-- 1792 MiB unmappable -->\|
	259	* (64k objects) (448k objects)
	260	*
	261	* Now imagine that the eviction LRU is ordered top-down (just because
	262	* pathology meets real life), and that we need to evict an object to
	263	* make room inside the aperture. The eviction scan then has to walk
	264	* the 448k list before it finds one within range. And now imagine that
	265	* it has to search for a new hole between every byte inside the memcpy,
	266	* for several simultaneous clients.
	267	*
	268	* On a full-ppgtt system, if we have run out of available space, there
	269	* will be lots and lots of objects in the eviction list! Again,
	270	* searching that LRU list may be slow if we are also applying any
	271	* range restrictions (e.g. restriction to low 4GiB) and so, for
	272	* simplicity and similarilty between different GTT, try the single
	273	* random replacement first.
	274	*/
	275	offset = random_offset(start, end,
	276	size, alignment ?: I915_GTT_MIN_ALIGNMENT);
	277	err = i915_gem_gtt_reserve(vm, node, size, offset, color, flags);
	278	if (err != -ENOSPC)
	279	return err;
	280
6846895f CW	281	if (flags & PIN_NOSEARCH)
	282	return -ENOSPC;
	283
606fec95	284	/* Randomly selected placement is pinned, do a search */
e007b19d CW	285	err = i915_gem_evict_something(vm, size, alignment, color,
	286	start, end, flags);
	287	if (err)
	288	return err;
	289
4e64e553 CW	290	return drm_mm_insert_node_in_range(&vm->mm, node,
	291	size, alignment, color,
	292	start, end, DRM_MM_INSERT_EVICT);
e007b19d	293	}
3b5bb0a3 CW	294
3b5bb0a3 CW	295	#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
1c42819a	296	#include "selftests/i915_gem_gtt.c"
3b5bb0a3	297	#endif