[linux-2.6-block.git] / drivers / gpu / drm / i915 / i915_gem_gtt.c

/*
 * Copyright © 2010 Daniel Vetter
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 *
 */

#include "drmP.h"
#include "drm.h"
#include "i915_drm.h"
#include "i915_drv.h"
#include "i915_trace.h"
#include "intel_drv.h"

void i915_gem_restore_gtt_mappings(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_i915_gem_object *obj;

	/* First fill our portion of the GTT with scratch pages */
	intel_gtt_clear_range(dev_priv->mm.gtt_start / PAGE_SIZE,
			      (dev_priv->mm.gtt_end - dev_priv->mm.gtt_start) / PAGE_SIZE);

	list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
		i915_gem_clflush_object(obj);

		if (dev_priv->mm.gtt->needs_dmar) {
			BUG_ON(!obj->sg_list);

			intel_gtt_insert_sg_entries(obj->sg_list,
						    obj->num_sg,
						    obj->gtt_space->start
							>> PAGE_SHIFT,
						    obj->agp_type);
		} else
			intel_gtt_insert_pages(obj->gtt_space->start
						   >> PAGE_SHIFT,
					       obj->base.size >> PAGE_SHIFT,
					       obj->pages,
					       obj->agp_type);
	}

	intel_gtt_chipset_flush();
}

int i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj)
{
	struct drm_device *dev = obj->base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	int ret;

	if (dev_priv->mm.gtt->needs_dmar) {
		ret = intel_gtt_map_memory(obj->pages,
					   obj->base.size >> PAGE_SHIFT,
					   &obj->sg_list,
					   &obj->num_sg);
		if (ret != 0)
			return ret;

		intel_gtt_insert_sg_entries(obj->sg_list,
					    obj->num_sg,
					    obj->gtt_space->start >> PAGE_SHIFT,
					    obj->agp_type);
	} else
		intel_gtt_insert_pages(obj->gtt_space->start >> PAGE_SHIFT,
				       obj->base.size >> PAGE_SHIFT,
				       obj->pages,
				       obj->agp_type);

	return 0;
}

void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj)
{
	intel_gtt_clear_range(obj->gtt_space->start >> PAGE_SHIFT,
			      obj->base.size >> PAGE_SHIFT);

	if (obj->sg_list) {
		intel_gtt_unmap_memory(obj->sg_list, obj->num_sg);
		obj->sg_list = NULL;
	}
}
Commit	Line	Data
76aaf220 DV	1	/*
	2	* Copyright © 2010 Daniel Vetter
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice (including the next
	12	* paragraph) shall be included in all copies or substantial portions of the
	13	* Software.
	14	*
	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
	21	* IN THE SOFTWARE.
	22	*
	23	*/
	24
	25	#include "drmP.h"
	26	#include "drm.h"
	27	#include "i915_drm.h"
	28	#include "i915_drv.h"
	29	#include "i915_trace.h"
	30	#include "intel_drv.h"
	31
	32	void i915_gem_restore_gtt_mappings(struct drm_device *dev)
	33	{
	34	struct drm_i915_private *dev_priv = dev->dev_private;
05394f39	35	struct drm_i915_gem_object *obj;
76aaf220	36
bee4a186 CW	37	/* First fill our portion of the GTT with scratch pages */
	38	intel_gtt_clear_range(dev_priv->mm.gtt_start / PAGE_SIZE,
	39	(dev_priv->mm.gtt_end - dev_priv->mm.gtt_start) / PAGE_SIZE);
	40
05394f39	41	list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
a8e93126 CW	42	i915_gem_clflush_object(obj);
a8e93126 CW	43
185cbcb3	44	if (dev_priv->mm.gtt->needs_dmar) {
05394f39	45	BUG_ON(!obj->sg_list);
185cbcb3	46
05394f39 CW	47	intel_gtt_insert_sg_entries(obj->sg_list,
	48	obj->num_sg,
	49	obj->gtt_space->start
185cbcb3	50	>> PAGE_SHIFT,
05394f39	51	obj->agp_type);
185cbcb3	52	} else
05394f39	53	intel_gtt_insert_pages(obj->gtt_space->start
185cbcb3	54	>> PAGE_SHIFT,
05394f39 CW	55	obj->base.size >> PAGE_SHIFT,
	56	obj->pages,
	57	obj->agp_type);
76aaf220 DV	58	}
76aaf220 DV	59
76aaf220 DV	60	intel_gtt_chipset_flush();
76aaf220 DV	61	}
7c2e6fdf	62
05394f39	63	int i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj)
7c2e6fdf	64	{
05394f39	65	struct drm_device *dev = obj->base.dev;
185cbcb3	66	struct drm_i915_private *dev_priv = dev->dev_private;
185cbcb3	67	int ret;
7c2e6fdf	68
185cbcb3	69	if (dev_priv->mm.gtt->needs_dmar) {
05394f39 CW	70	ret = intel_gtt_map_memory(obj->pages,
	71	obj->base.size >> PAGE_SHIFT,
	72	&obj->sg_list,
	73	&obj->num_sg);
185cbcb3 DV	74	if (ret != 0)
	75	return ret;
	76
05394f39 CW	77	intel_gtt_insert_sg_entries(obj->sg_list,
	78	obj->num_sg,
	79	obj->gtt_space->start >> PAGE_SHIFT,
	80	obj->agp_type);
185cbcb3	81	} else
05394f39 CW	82	intel_gtt_insert_pages(obj->gtt_space->start >> PAGE_SHIFT,
	83	obj->base.size >> PAGE_SHIFT,
	84	obj->pages,
	85	obj->agp_type);
7c2e6fdf	86
185cbcb3	87	return 0;
7c2e6fdf DV	88	}
7c2e6fdf DV	89
05394f39	90	void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj)
7c2e6fdf	91	{
d9126400 CW	92	intel_gtt_clear_range(obj->gtt_space->start >> PAGE_SHIFT,
d9126400 CW	93	obj->base.size >> PAGE_SHIFT);
7c2e6fdf	94
d9126400	95	if (obj->sg_list) {
05394f39 CW	96	intel_gtt_unmap_memory(obj->sg_list, obj->num_sg);
05394f39 CW	97	obj->sg_list = NULL;
185cbcb3	98	}
7c2e6fdf	99	}