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54cf91dc CW |
1 | /* |
2 | * Copyright © 2008,2010 Intel Corporation | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | |
21 | * IN THE SOFTWARE. | |
22 | * | |
23 | * Authors: | |
24 | * Eric Anholt <eric@anholt.net> | |
25 | * Chris Wilson <chris@chris-wilson.co.uk> | |
26 | * | |
27 | */ | |
28 | ||
ad778f89 CW |
29 | #include <linux/dma_remapping.h> |
30 | #include <linux/reservation.h> | |
fec0445c | 31 | #include <linux/sync_file.h> |
ad778f89 CW |
32 | #include <linux/uaccess.h> |
33 | ||
760285e7 DH |
34 | #include <drm/drmP.h> |
35 | #include <drm/i915_drm.h> | |
ad778f89 | 36 | |
54cf91dc | 37 | #include "i915_drv.h" |
57822dc6 | 38 | #include "i915_gem_clflush.h" |
54cf91dc CW |
39 | #include "i915_trace.h" |
40 | #include "intel_drv.h" | |
5d723d7a | 41 | #include "intel_frontbuffer.h" |
54cf91dc | 42 | |
d50415cc CW |
43 | #define DBG_USE_CPU_RELOC 0 /* -1 force GTT relocs; 1 force CPU relocs */ |
44 | ||
dade2a61 CW |
45 | #define __EXEC_OBJECT_HAS_REF BIT(31) |
46 | #define __EXEC_OBJECT_HAS_PIN BIT(30) | |
47 | #define __EXEC_OBJECT_HAS_FENCE BIT(29) | |
48 | #define __EXEC_OBJECT_NEEDS_MAP BIT(28) | |
49 | #define __EXEC_OBJECT_NEEDS_BIAS BIT(27) | |
50 | #define __EXEC_OBJECT_INTERNAL_FLAGS (~0u << 27) /* all of the above */ | |
2889caa9 CW |
51 | #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE) |
52 | ||
53 | #define __EXEC_HAS_RELOC BIT(31) | |
54 | #define __EXEC_VALIDATED BIT(30) | |
55 | #define UPDATE PIN_OFFSET_FIXED | |
d23db88c CW |
56 | |
57 | #define BATCH_OFFSET_BIAS (256*1024) | |
a415d355 | 58 | |
650bc635 CW |
59 | #define __I915_EXEC_ILLEGAL_FLAGS \ |
60 | (__I915_EXEC_UNKNOWN_FLAGS | I915_EXEC_CONSTANTS_MASK) | |
5b043f4e | 61 | |
2889caa9 CW |
62 | /** |
63 | * DOC: User command execution | |
64 | * | |
65 | * Userspace submits commands to be executed on the GPU as an instruction | |
66 | * stream within a GEM object we call a batchbuffer. This instructions may | |
67 | * refer to other GEM objects containing auxiliary state such as kernels, | |
68 | * samplers, render targets and even secondary batchbuffers. Userspace does | |
69 | * not know where in the GPU memory these objects reside and so before the | |
70 | * batchbuffer is passed to the GPU for execution, those addresses in the | |
71 | * batchbuffer and auxiliary objects are updated. This is known as relocation, | |
72 | * or patching. To try and avoid having to relocate each object on the next | |
73 | * execution, userspace is told the location of those objects in this pass, | |
74 | * but this remains just a hint as the kernel may choose a new location for | |
75 | * any object in the future. | |
76 | * | |
77 | * Processing an execbuf ioctl is conceptually split up into a few phases. | |
78 | * | |
79 | * 1. Validation - Ensure all the pointers, handles and flags are valid. | |
80 | * 2. Reservation - Assign GPU address space for every object | |
81 | * 3. Relocation - Update any addresses to point to the final locations | |
82 | * 4. Serialisation - Order the request with respect to its dependencies | |
83 | * 5. Construction - Construct a request to execute the batchbuffer | |
84 | * 6. Submission (at some point in the future execution) | |
85 | * | |
86 | * Reserving resources for the execbuf is the most complicated phase. We | |
87 | * neither want to have to migrate the object in the address space, nor do | |
88 | * we want to have to update any relocations pointing to this object. Ideally, | |
89 | * we want to leave the object where it is and for all the existing relocations | |
90 | * to match. If the object is given a new address, or if userspace thinks the | |
91 | * object is elsewhere, we have to parse all the relocation entries and update | |
92 | * the addresses. Userspace can set the I915_EXEC_NORELOC flag to hint that | |
93 | * all the target addresses in all of its objects match the value in the | |
94 | * relocation entries and that they all match the presumed offsets given by the | |
95 | * list of execbuffer objects. Using this knowledge, we know that if we haven't | |
96 | * moved any buffers, all the relocation entries are valid and we can skip | |
97 | * the update. (If userspace is wrong, the likely outcome is an impromptu GPU | |
98 | * hang.) The requirement for using I915_EXEC_NO_RELOC are: | |
99 | * | |
100 | * The addresses written in the objects must match the corresponding | |
101 | * reloc.presumed_offset which in turn must match the corresponding | |
102 | * execobject.offset. | |
103 | * | |
104 | * Any render targets written to in the batch must be flagged with | |
105 | * EXEC_OBJECT_WRITE. | |
106 | * | |
107 | * To avoid stalling, execobject.offset should match the current | |
108 | * address of that object within the active context. | |
109 | * | |
110 | * The reservation is done is multiple phases. First we try and keep any | |
111 | * object already bound in its current location - so as long as meets the | |
112 | * constraints imposed by the new execbuffer. Any object left unbound after the | |
113 | * first pass is then fitted into any available idle space. If an object does | |
114 | * not fit, all objects are removed from the reservation and the process rerun | |
115 | * after sorting the objects into a priority order (more difficult to fit | |
116 | * objects are tried first). Failing that, the entire VM is cleared and we try | |
117 | * to fit the execbuf once last time before concluding that it simply will not | |
118 | * fit. | |
119 | * | |
120 | * A small complication to all of this is that we allow userspace not only to | |
121 | * specify an alignment and a size for the object in the address space, but | |
122 | * we also allow userspace to specify the exact offset. This objects are | |
123 | * simpler to place (the location is known a priori) all we have to do is make | |
124 | * sure the space is available. | |
125 | * | |
126 | * Once all the objects are in place, patching up the buried pointers to point | |
127 | * to the final locations is a fairly simple job of walking over the relocation | |
128 | * entry arrays, looking up the right address and rewriting the value into | |
129 | * the object. Simple! ... The relocation entries are stored in user memory | |
130 | * and so to access them we have to copy them into a local buffer. That copy | |
131 | * has to avoid taking any pagefaults as they may lead back to a GEM object | |
132 | * requiring the struct_mutex (i.e. recursive deadlock). So once again we split | |
133 | * the relocation into multiple passes. First we try to do everything within an | |
134 | * atomic context (avoid the pagefaults) which requires that we never wait. If | |
135 | * we detect that we may wait, or if we need to fault, then we have to fallback | |
136 | * to a slower path. The slowpath has to drop the mutex. (Can you hear alarm | |
137 | * bells yet?) Dropping the mutex means that we lose all the state we have | |
138 | * built up so far for the execbuf and we must reset any global data. However, | |
139 | * we do leave the objects pinned in their final locations - which is a | |
140 | * potential issue for concurrent execbufs. Once we have left the mutex, we can | |
141 | * allocate and copy all the relocation entries into a large array at our | |
142 | * leisure, reacquire the mutex, reclaim all the objects and other state and | |
143 | * then proceed to update any incorrect addresses with the objects. | |
144 | * | |
145 | * As we process the relocation entries, we maintain a record of whether the | |
146 | * object is being written to. Using NORELOC, we expect userspace to provide | |
147 | * this information instead. We also check whether we can skip the relocation | |
148 | * by comparing the expected value inside the relocation entry with the target's | |
149 | * final address. If they differ, we have to map the current object and rewrite | |
150 | * the 4 or 8 byte pointer within. | |
151 | * | |
152 | * Serialising an execbuf is quite simple according to the rules of the GEM | |
153 | * ABI. Execution within each context is ordered by the order of submission. | |
154 | * Writes to any GEM object are in order of submission and are exclusive. Reads | |
155 | * from a GEM object are unordered with respect to other reads, but ordered by | |
156 | * writes. A write submitted after a read cannot occur before the read, and | |
157 | * similarly any read submitted after a write cannot occur before the write. | |
158 | * Writes are ordered between engines such that only one write occurs at any | |
159 | * time (completing any reads beforehand) - using semaphores where available | |
160 | * and CPU serialisation otherwise. Other GEM access obey the same rules, any | |
161 | * write (either via mmaps using set-domain, or via pwrite) must flush all GPU | |
162 | * reads before starting, and any read (either using set-domain or pread) must | |
163 | * flush all GPU writes before starting. (Note we only employ a barrier before, | |
164 | * we currently rely on userspace not concurrently starting a new execution | |
165 | * whilst reading or writing to an object. This may be an advantage or not | |
166 | * depending on how much you trust userspace not to shoot themselves in the | |
167 | * foot.) Serialisation may just result in the request being inserted into | |
168 | * a DAG awaiting its turn, but most simple is to wait on the CPU until | |
169 | * all dependencies are resolved. | |
170 | * | |
171 | * After all of that, is just a matter of closing the request and handing it to | |
172 | * the hardware (well, leaving it in a queue to be executed). However, we also | |
173 | * offer the ability for batchbuffers to be run with elevated privileges so | |
174 | * that they access otherwise hidden registers. (Used to adjust L3 cache etc.) | |
175 | * Before any batch is given extra privileges we first must check that it | |
176 | * contains no nefarious instructions, we check that each instruction is from | |
177 | * our whitelist and all registers are also from an allowed list. We first | |
178 | * copy the user's batchbuffer to a shadow (so that the user doesn't have | |
179 | * access to it, either by the CPU or GPU as we scan it) and then parse each | |
180 | * instruction. If everything is ok, we set a flag telling the hardware to run | |
181 | * the batchbuffer in trusted mode, otherwise the ioctl is rejected. | |
182 | */ | |
183 | ||
650bc635 | 184 | struct i915_execbuffer { |
2889caa9 CW |
185 | struct drm_i915_private *i915; /** i915 backpointer */ |
186 | struct drm_file *file; /** per-file lookup tables and limits */ | |
187 | struct drm_i915_gem_execbuffer2 *args; /** ioctl parameters */ | |
188 | struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */ | |
189 | ||
190 | struct intel_engine_cs *engine; /** engine to queue the request to */ | |
191 | struct i915_gem_context *ctx; /** context for building the request */ | |
192 | struct i915_address_space *vm; /** GTT and vma for the request */ | |
193 | ||
194 | struct drm_i915_gem_request *request; /** our request to build */ | |
195 | struct i915_vma *batch; /** identity of the batch obj/vma */ | |
196 | ||
197 | /** actual size of execobj[] as we may extend it for the cmdparser */ | |
198 | unsigned int buffer_count; | |
199 | ||
200 | /** list of vma not yet bound during reservation phase */ | |
201 | struct list_head unbound; | |
202 | ||
203 | /** list of vma that have execobj.relocation_count */ | |
204 | struct list_head relocs; | |
205 | ||
206 | /** | |
207 | * Track the most recently used object for relocations, as we | |
208 | * frequently have to perform multiple relocations within the same | |
209 | * obj/page | |
210 | */ | |
650bc635 | 211 | struct reloc_cache { |
2889caa9 CW |
212 | struct drm_mm_node node; /** temporary GTT binding */ |
213 | unsigned long vaddr; /** Current kmap address */ | |
214 | unsigned long page; /** Currently mapped page index */ | |
650bc635 | 215 | bool use_64bit_reloc : 1; |
2889caa9 CW |
216 | bool has_llc : 1; |
217 | bool has_fence : 1; | |
218 | bool needs_unfenced : 1; | |
650bc635 | 219 | } reloc_cache; |
2889caa9 CW |
220 | |
221 | u64 invalid_flags; /** Set of execobj.flags that are invalid */ | |
222 | u32 context_flags; /** Set of execobj.flags to insert from the ctx */ | |
223 | ||
224 | u32 batch_start_offset; /** Location within object of batch */ | |
225 | u32 batch_len; /** Length of batch within object */ | |
226 | u32 batch_flags; /** Flags composed for emit_bb_start() */ | |
227 | ||
228 | /** | |
229 | * Indicate either the size of the hastable used to resolve | |
230 | * relocation handles, or if negative that we are using a direct | |
231 | * index into the execobj[]. | |
232 | */ | |
233 | int lut_size; | |
234 | struct hlist_head *buckets; /** ht for relocation handles */ | |
67731b87 CW |
235 | }; |
236 | ||
4ff4b44c CW |
237 | /* |
238 | * As an alternative to creating a hashtable of handle-to-vma for a batch, | |
239 | * we used the last available reserved field in the execobject[] and stash | |
240 | * a link from the execobj to its vma. | |
241 | */ | |
242 | #define __exec_to_vma(ee) (ee)->rsvd2 | |
243 | #define exec_to_vma(ee) u64_to_ptr(struct i915_vma, __exec_to_vma(ee)) | |
244 | ||
2889caa9 CW |
245 | /* |
246 | * Used to convert any address to canonical form. | |
247 | * Starting from gen8, some commands (e.g. STATE_BASE_ADDRESS, | |
248 | * MI_LOAD_REGISTER_MEM and others, see Broadwell PRM Vol2a) require the | |
249 | * addresses to be in a canonical form: | |
250 | * "GraphicsAddress[63:48] are ignored by the HW and assumed to be in correct | |
251 | * canonical form [63:48] == [47]." | |
252 | */ | |
253 | #define GEN8_HIGH_ADDRESS_BIT 47 | |
254 | static inline u64 gen8_canonical_addr(u64 address) | |
255 | { | |
256 | return sign_extend64(address, GEN8_HIGH_ADDRESS_BIT); | |
257 | } | |
258 | ||
259 | static inline u64 gen8_noncanonical_addr(u64 address) | |
260 | { | |
261 | return address & GENMASK_ULL(GEN8_HIGH_ADDRESS_BIT, 0); | |
262 | } | |
263 | ||
650bc635 | 264 | static int eb_create(struct i915_execbuffer *eb) |
67731b87 | 265 | { |
2889caa9 CW |
266 | if (!(eb->args->flags & I915_EXEC_HANDLE_LUT)) { |
267 | unsigned int size = 1 + ilog2(eb->buffer_count); | |
4ff4b44c | 268 | |
2889caa9 CW |
269 | /* |
270 | * Without a 1:1 association between relocation handles and | |
271 | * the execobject[] index, we instead create a hashtable. | |
272 | * We size it dynamically based on available memory, starting | |
273 | * first with 1:1 assocative hash and scaling back until | |
274 | * the allocation succeeds. | |
275 | * | |
276 | * Later on we use a positive lut_size to indicate we are | |
277 | * using this hashtable, and a negative value to indicate a | |
278 | * direct lookup. | |
279 | */ | |
4ff4b44c CW |
280 | do { |
281 | eb->buckets = kzalloc(sizeof(struct hlist_head) << size, | |
282 | GFP_TEMPORARY | | |
283 | __GFP_NORETRY | | |
284 | __GFP_NOWARN); | |
285 | if (eb->buckets) | |
286 | break; | |
287 | } while (--size); | |
288 | ||
289 | if (unlikely(!eb->buckets)) { | |
290 | eb->buckets = kzalloc(sizeof(struct hlist_head), | |
291 | GFP_TEMPORARY); | |
292 | if (unlikely(!eb->buckets)) | |
293 | return -ENOMEM; | |
294 | } | |
eef90ccb | 295 | |
2889caa9 | 296 | eb->lut_size = size; |
650bc635 | 297 | } else { |
2889caa9 | 298 | eb->lut_size = -eb->buffer_count; |
650bc635 | 299 | } |
eef90ccb | 300 | |
650bc635 | 301 | return 0; |
67731b87 CW |
302 | } |
303 | ||
2889caa9 CW |
304 | static bool |
305 | eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry, | |
306 | const struct i915_vma *vma) | |
307 | { | |
308 | if (!(entry->flags & __EXEC_OBJECT_HAS_PIN)) | |
309 | return true; | |
310 | ||
311 | if (vma->node.size < entry->pad_to_size) | |
312 | return true; | |
313 | ||
314 | if (entry->alignment && !IS_ALIGNED(vma->node.start, entry->alignment)) | |
315 | return true; | |
316 | ||
317 | if (entry->flags & EXEC_OBJECT_PINNED && | |
318 | vma->node.start != entry->offset) | |
319 | return true; | |
320 | ||
321 | if (entry->flags & __EXEC_OBJECT_NEEDS_BIAS && | |
322 | vma->node.start < BATCH_OFFSET_BIAS) | |
323 | return true; | |
324 | ||
325 | if (!(entry->flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) && | |
326 | (vma->node.start + vma->node.size - 1) >> 32) | |
327 | return true; | |
328 | ||
329 | return false; | |
330 | } | |
331 | ||
332 | static inline void | |
333 | eb_pin_vma(struct i915_execbuffer *eb, | |
334 | struct drm_i915_gem_exec_object2 *entry, | |
335 | struct i915_vma *vma) | |
336 | { | |
337 | u64 flags; | |
338 | ||
616d9cee CW |
339 | if (vma->node.size) |
340 | flags = vma->node.start; | |
341 | else | |
342 | flags = entry->offset & PIN_OFFSET_MASK; | |
343 | ||
344 | flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED; | |
2889caa9 CW |
345 | if (unlikely(entry->flags & EXEC_OBJECT_NEEDS_GTT)) |
346 | flags |= PIN_GLOBAL; | |
616d9cee | 347 | |
2889caa9 CW |
348 | if (unlikely(i915_vma_pin(vma, 0, 0, flags))) |
349 | return; | |
350 | ||
351 | if (unlikely(entry->flags & EXEC_OBJECT_NEEDS_FENCE)) { | |
352 | if (unlikely(i915_vma_get_fence(vma))) { | |
353 | i915_vma_unpin(vma); | |
354 | return; | |
355 | } | |
356 | ||
357 | if (i915_vma_pin_fence(vma)) | |
358 | entry->flags |= __EXEC_OBJECT_HAS_FENCE; | |
359 | } | |
360 | ||
361 | entry->flags |= __EXEC_OBJECT_HAS_PIN; | |
362 | } | |
363 | ||
d55495b4 CW |
364 | static inline void |
365 | __eb_unreserve_vma(struct i915_vma *vma, | |
366 | const struct drm_i915_gem_exec_object2 *entry) | |
367 | { | |
2889caa9 CW |
368 | GEM_BUG_ON(!(entry->flags & __EXEC_OBJECT_HAS_PIN)); |
369 | ||
d55495b4 CW |
370 | if (unlikely(entry->flags & __EXEC_OBJECT_HAS_FENCE)) |
371 | i915_vma_unpin_fence(vma); | |
372 | ||
2889caa9 | 373 | __i915_vma_unpin(vma); |
d55495b4 CW |
374 | } |
375 | ||
2889caa9 CW |
376 | static inline void |
377 | eb_unreserve_vma(struct i915_vma *vma, | |
378 | struct drm_i915_gem_exec_object2 *entry) | |
d55495b4 | 379 | { |
2889caa9 CW |
380 | if (!(entry->flags & __EXEC_OBJECT_HAS_PIN)) |
381 | return; | |
d55495b4 CW |
382 | |
383 | __eb_unreserve_vma(vma, entry); | |
2889caa9 | 384 | entry->flags &= ~__EXEC_OBJECT_RESERVED; |
d55495b4 CW |
385 | } |
386 | ||
2889caa9 CW |
387 | static int |
388 | eb_validate_vma(struct i915_execbuffer *eb, | |
389 | struct drm_i915_gem_exec_object2 *entry, | |
390 | struct i915_vma *vma) | |
67731b87 | 391 | { |
2889caa9 CW |
392 | if (unlikely(entry->flags & eb->invalid_flags)) |
393 | return -EINVAL; | |
d55495b4 | 394 | |
2889caa9 CW |
395 | if (unlikely(entry->alignment && !is_power_of_2(entry->alignment))) |
396 | return -EINVAL; | |
397 | ||
398 | /* | |
399 | * Offset can be used as input (EXEC_OBJECT_PINNED), reject | |
400 | * any non-page-aligned or non-canonical addresses. | |
401 | */ | |
402 | if (unlikely(entry->flags & EXEC_OBJECT_PINNED && | |
403 | entry->offset != gen8_canonical_addr(entry->offset & PAGE_MASK))) | |
404 | return -EINVAL; | |
405 | ||
406 | /* pad_to_size was once a reserved field, so sanitize it */ | |
407 | if (entry->flags & EXEC_OBJECT_PAD_TO_SIZE) { | |
408 | if (unlikely(offset_in_page(entry->pad_to_size))) | |
409 | return -EINVAL; | |
410 | } else { | |
411 | entry->pad_to_size = 0; | |
d55495b4 CW |
412 | } |
413 | ||
2889caa9 CW |
414 | if (unlikely(vma->exec_entry)) { |
415 | DRM_DEBUG("Object [handle %d, index %d] appears more than once in object list\n", | |
416 | entry->handle, (int)(entry - eb->exec)); | |
417 | return -EINVAL; | |
418 | } | |
419 | ||
420 | /* | |
421 | * From drm_mm perspective address space is continuous, | |
422 | * so from this point we're always using non-canonical | |
423 | * form internally. | |
424 | */ | |
425 | entry->offset = gen8_noncanonical_addr(entry->offset); | |
426 | ||
427 | return 0; | |
67731b87 CW |
428 | } |
429 | ||
2889caa9 CW |
430 | static int |
431 | eb_add_vma(struct i915_execbuffer *eb, | |
432 | struct drm_i915_gem_exec_object2 *entry, | |
433 | struct i915_vma *vma) | |
59bfa124 | 434 | { |
2889caa9 CW |
435 | int err; |
436 | ||
437 | GEM_BUG_ON(i915_vma_is_closed(vma)); | |
438 | ||
439 | if (!(eb->args->flags & __EXEC_VALIDATED)) { | |
440 | err = eb_validate_vma(eb, entry, vma); | |
441 | if (unlikely(err)) | |
442 | return err; | |
4ff4b44c | 443 | } |
4ff4b44c | 444 | |
2889caa9 CW |
445 | if (eb->lut_size >= 0) { |
446 | vma->exec_handle = entry->handle; | |
4ff4b44c | 447 | hlist_add_head(&vma->exec_node, |
2889caa9 CW |
448 | &eb->buckets[hash_32(entry->handle, |
449 | eb->lut_size)]); | |
4ff4b44c | 450 | } |
59bfa124 | 451 | |
2889caa9 CW |
452 | if (entry->relocation_count) |
453 | list_add_tail(&vma->reloc_link, &eb->relocs); | |
454 | ||
455 | if (!eb->reloc_cache.has_fence) { | |
456 | entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE; | |
457 | } else { | |
458 | if ((entry->flags & EXEC_OBJECT_NEEDS_FENCE || | |
459 | eb->reloc_cache.needs_unfenced) && | |
460 | i915_gem_object_is_tiled(vma->obj)) | |
461 | entry->flags |= EXEC_OBJECT_NEEDS_GTT | __EXEC_OBJECT_NEEDS_MAP; | |
462 | } | |
463 | ||
464 | if (!(entry->flags & EXEC_OBJECT_PINNED)) | |
465 | entry->flags |= eb->context_flags; | |
466 | ||
467 | /* | |
468 | * Stash a pointer from the vma to execobj, so we can query its flags, | |
469 | * size, alignment etc as provided by the user. Also we stash a pointer | |
470 | * to the vma inside the execobj so that we can use a direct lookup | |
471 | * to find the right target VMA when doing relocations. | |
472 | */ | |
473 | vma->exec_entry = entry; | |
dade2a61 | 474 | __exec_to_vma(entry) = (uintptr_t)vma; |
2889caa9 CW |
475 | |
476 | err = 0; | |
616d9cee | 477 | eb_pin_vma(eb, entry, vma); |
2889caa9 CW |
478 | if (eb_vma_misplaced(entry, vma)) { |
479 | eb_unreserve_vma(vma, entry); | |
480 | ||
481 | list_add_tail(&vma->exec_link, &eb->unbound); | |
482 | if (drm_mm_node_allocated(&vma->node)) | |
483 | err = i915_vma_unbind(vma); | |
484 | } else { | |
485 | if (entry->offset != vma->node.start) { | |
486 | entry->offset = vma->node.start | UPDATE; | |
487 | eb->args->flags |= __EXEC_HAS_RELOC; | |
488 | } | |
489 | } | |
490 | return err; | |
491 | } | |
492 | ||
493 | static inline int use_cpu_reloc(const struct reloc_cache *cache, | |
494 | const struct drm_i915_gem_object *obj) | |
495 | { | |
496 | if (!i915_gem_object_has_struct_page(obj)) | |
497 | return false; | |
498 | ||
499 | if (DBG_USE_CPU_RELOC) | |
500 | return DBG_USE_CPU_RELOC > 0; | |
501 | ||
502 | return (cache->has_llc || | |
503 | obj->cache_dirty || | |
504 | obj->cache_level != I915_CACHE_NONE); | |
505 | } | |
506 | ||
507 | static int eb_reserve_vma(const struct i915_execbuffer *eb, | |
508 | struct i915_vma *vma) | |
509 | { | |
510 | struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; | |
511 | u64 flags; | |
512 | int err; | |
513 | ||
514 | flags = PIN_USER | PIN_NONBLOCK; | |
515 | if (entry->flags & EXEC_OBJECT_NEEDS_GTT) | |
516 | flags |= PIN_GLOBAL; | |
517 | ||
518 | /* | |
519 | * Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset, | |
520 | * limit address to the first 4GBs for unflagged objects. | |
521 | */ | |
522 | if (!(entry->flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) | |
523 | flags |= PIN_ZONE_4G; | |
524 | ||
525 | if (entry->flags & __EXEC_OBJECT_NEEDS_MAP) | |
526 | flags |= PIN_MAPPABLE; | |
527 | ||
528 | if (entry->flags & EXEC_OBJECT_PINNED) { | |
529 | flags |= entry->offset | PIN_OFFSET_FIXED; | |
530 | flags &= ~PIN_NONBLOCK; /* force overlapping PINNED checks */ | |
531 | } else if (entry->flags & __EXEC_OBJECT_NEEDS_BIAS) { | |
532 | flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS; | |
533 | } | |
534 | ||
535 | err = i915_vma_pin(vma, entry->pad_to_size, entry->alignment, flags); | |
536 | if (err) | |
537 | return err; | |
538 | ||
539 | if (entry->offset != vma->node.start) { | |
540 | entry->offset = vma->node.start | UPDATE; | |
541 | eb->args->flags |= __EXEC_HAS_RELOC; | |
542 | } | |
543 | ||
544 | entry->flags |= __EXEC_OBJECT_HAS_PIN; | |
545 | GEM_BUG_ON(eb_vma_misplaced(entry, vma)); | |
546 | ||
547 | if (unlikely(entry->flags & EXEC_OBJECT_NEEDS_FENCE)) { | |
548 | err = i915_vma_get_fence(vma); | |
549 | if (unlikely(err)) { | |
550 | i915_vma_unpin(vma); | |
551 | return err; | |
552 | } | |
553 | ||
554 | if (i915_vma_pin_fence(vma)) | |
555 | entry->flags |= __EXEC_OBJECT_HAS_FENCE; | |
556 | } | |
557 | ||
558 | return 0; | |
559 | } | |
560 | ||
561 | static int eb_reserve(struct i915_execbuffer *eb) | |
562 | { | |
563 | const unsigned int count = eb->buffer_count; | |
564 | struct list_head last; | |
565 | struct i915_vma *vma; | |
566 | unsigned int i, pass; | |
567 | int err; | |
568 | ||
569 | /* | |
570 | * Attempt to pin all of the buffers into the GTT. | |
571 | * This is done in 3 phases: | |
572 | * | |
573 | * 1a. Unbind all objects that do not match the GTT constraints for | |
574 | * the execbuffer (fenceable, mappable, alignment etc). | |
575 | * 1b. Increment pin count for already bound objects. | |
576 | * 2. Bind new objects. | |
577 | * 3. Decrement pin count. | |
578 | * | |
579 | * This avoid unnecessary unbinding of later objects in order to make | |
580 | * room for the earlier objects *unless* we need to defragment. | |
581 | */ | |
582 | ||
583 | pass = 0; | |
584 | err = 0; | |
585 | do { | |
586 | list_for_each_entry(vma, &eb->unbound, exec_link) { | |
587 | err = eb_reserve_vma(eb, vma); | |
588 | if (err) | |
589 | break; | |
590 | } | |
591 | if (err != -ENOSPC) | |
592 | return err; | |
593 | ||
594 | /* Resort *all* the objects into priority order */ | |
595 | INIT_LIST_HEAD(&eb->unbound); | |
596 | INIT_LIST_HEAD(&last); | |
597 | for (i = 0; i < count; i++) { | |
598 | struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; | |
599 | ||
600 | if (entry->flags & EXEC_OBJECT_PINNED && | |
601 | entry->flags & __EXEC_OBJECT_HAS_PIN) | |
602 | continue; | |
603 | ||
604 | vma = exec_to_vma(entry); | |
605 | eb_unreserve_vma(vma, entry); | |
606 | ||
607 | if (entry->flags & EXEC_OBJECT_PINNED) | |
608 | list_add(&vma->exec_link, &eb->unbound); | |
609 | else if (entry->flags & __EXEC_OBJECT_NEEDS_MAP) | |
610 | list_add_tail(&vma->exec_link, &eb->unbound); | |
611 | else | |
612 | list_add_tail(&vma->exec_link, &last); | |
613 | } | |
614 | list_splice_tail(&last, &eb->unbound); | |
615 | ||
616 | switch (pass++) { | |
617 | case 0: | |
618 | break; | |
619 | ||
620 | case 1: | |
621 | /* Too fragmented, unbind everything and retry */ | |
622 | err = i915_gem_evict_vm(eb->vm); | |
623 | if (err) | |
624 | return err; | |
625 | break; | |
626 | ||
627 | default: | |
628 | return -ENOSPC; | |
629 | } | |
630 | } while (1); | |
4ff4b44c | 631 | } |
59bfa124 | 632 | |
4ff4b44c | 633 | static inline struct hlist_head * |
2889caa9 | 634 | ht_head(const struct i915_gem_context_vma_lut *lut, u32 handle) |
4ff4b44c | 635 | { |
2889caa9 | 636 | return &lut->ht[hash_32(handle, lut->ht_bits)]; |
4ff4b44c CW |
637 | } |
638 | ||
639 | static inline bool | |
2889caa9 | 640 | ht_needs_resize(const struct i915_gem_context_vma_lut *lut) |
4ff4b44c | 641 | { |
2889caa9 CW |
642 | return (4*lut->ht_count > 3*lut->ht_size || |
643 | 4*lut->ht_count + 1 < lut->ht_size); | |
59bfa124 CW |
644 | } |
645 | ||
2889caa9 CW |
646 | static unsigned int eb_batch_index(const struct i915_execbuffer *eb) |
647 | { | |
648 | return eb->buffer_count - 1; | |
649 | } | |
650 | ||
651 | static int eb_select_context(struct i915_execbuffer *eb) | |
652 | { | |
653 | struct i915_gem_context *ctx; | |
654 | ||
655 | ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1); | |
656 | if (unlikely(IS_ERR(ctx))) | |
657 | return PTR_ERR(ctx); | |
658 | ||
659 | if (unlikely(i915_gem_context_is_banned(ctx))) { | |
660 | DRM_DEBUG("Context %u tried to submit while banned\n", | |
661 | ctx->user_handle); | |
662 | return -EIO; | |
663 | } | |
664 | ||
665 | eb->ctx = i915_gem_context_get(ctx); | |
666 | eb->vm = ctx->ppgtt ? &ctx->ppgtt->base : &eb->i915->ggtt.base; | |
667 | ||
668 | eb->context_flags = 0; | |
669 | if (ctx->flags & CONTEXT_NO_ZEROMAP) | |
670 | eb->context_flags |= __EXEC_OBJECT_NEEDS_BIAS; | |
671 | ||
672 | return 0; | |
673 | } | |
674 | ||
675 | static int eb_lookup_vmas(struct i915_execbuffer *eb) | |
3b96eff4 | 676 | { |
4ff4b44c | 677 | #define INTERMEDIATE BIT(0) |
2889caa9 CW |
678 | const unsigned int count = eb->buffer_count; |
679 | struct i915_gem_context_vma_lut *lut = &eb->ctx->vma_lut; | |
4ff4b44c | 680 | struct i915_vma *vma; |
2889caa9 CW |
681 | struct idr *idr; |
682 | unsigned int i; | |
4ff4b44c | 683 | int slow_pass = -1; |
2889caa9 | 684 | int err; |
3b96eff4 | 685 | |
2889caa9 CW |
686 | INIT_LIST_HEAD(&eb->relocs); |
687 | INIT_LIST_HEAD(&eb->unbound); | |
d55495b4 | 688 | |
2889caa9 CW |
689 | if (unlikely(lut->ht_size & I915_CTX_RESIZE_IN_PROGRESS)) |
690 | flush_work(&lut->resize); | |
691 | GEM_BUG_ON(lut->ht_size & I915_CTX_RESIZE_IN_PROGRESS); | |
4ff4b44c CW |
692 | |
693 | for (i = 0; i < count; i++) { | |
694 | __exec_to_vma(&eb->exec[i]) = 0; | |
695 | ||
696 | hlist_for_each_entry(vma, | |
2889caa9 | 697 | ht_head(lut, eb->exec[i].handle), |
4ff4b44c CW |
698 | ctx_node) { |
699 | if (vma->ctx_handle != eb->exec[i].handle) | |
700 | continue; | |
701 | ||
2889caa9 CW |
702 | err = eb_add_vma(eb, &eb->exec[i], vma); |
703 | if (unlikely(err)) | |
704 | return err; | |
4ff4b44c CW |
705 | |
706 | goto next_vma; | |
707 | } | |
708 | ||
709 | if (slow_pass < 0) | |
710 | slow_pass = i; | |
711 | next_vma: ; | |
712 | } | |
713 | ||
714 | if (slow_pass < 0) | |
2889caa9 | 715 | goto out; |
4ff4b44c | 716 | |
650bc635 | 717 | spin_lock(&eb->file->table_lock); |
2889caa9 CW |
718 | /* |
719 | * Grab a reference to the object and release the lock so we can lookup | |
720 | * or create the VMA without using GFP_ATOMIC | |
721 | */ | |
722 | idr = &eb->file->object_idr; | |
4ff4b44c CW |
723 | for (i = slow_pass; i < count; i++) { |
724 | struct drm_i915_gem_object *obj; | |
3b96eff4 | 725 | |
4ff4b44c CW |
726 | if (__exec_to_vma(&eb->exec[i])) |
727 | continue; | |
728 | ||
2889caa9 | 729 | obj = to_intel_bo(idr_find(idr, eb->exec[i].handle)); |
4ff4b44c | 730 | if (unlikely(!obj)) { |
650bc635 | 731 | spin_unlock(&eb->file->table_lock); |
4ff4b44c CW |
732 | DRM_DEBUG("Invalid object handle %d at index %d\n", |
733 | eb->exec[i].handle, i); | |
2889caa9 CW |
734 | err = -ENOENT; |
735 | goto err; | |
3b96eff4 CW |
736 | } |
737 | ||
4ff4b44c | 738 | __exec_to_vma(&eb->exec[i]) = INTERMEDIATE | (uintptr_t)obj; |
27173f1f | 739 | } |
650bc635 | 740 | spin_unlock(&eb->file->table_lock); |
3b96eff4 | 741 | |
4ff4b44c CW |
742 | for (i = slow_pass; i < count; i++) { |
743 | struct drm_i915_gem_object *obj; | |
6f65e29a | 744 | |
2889caa9 | 745 | if (!(__exec_to_vma(&eb->exec[i]) & INTERMEDIATE)) |
4ff4b44c | 746 | continue; |
9ae9ab52 | 747 | |
e656a6cb DV |
748 | /* |
749 | * NOTE: We can leak any vmas created here when something fails | |
750 | * later on. But that's no issue since vma_unbind can deal with | |
751 | * vmas which are not actually bound. And since only | |
752 | * lookup_or_create exists as an interface to get at the vma | |
753 | * from the (obj, vm) we don't run the risk of creating | |
754 | * duplicated vmas for the same vm. | |
755 | */ | |
2889caa9 | 756 | obj = u64_to_ptr(typeof(*obj), |
4ff4b44c | 757 | __exec_to_vma(&eb->exec[i]) & ~INTERMEDIATE); |
650bc635 | 758 | vma = i915_vma_instance(obj, eb->vm, NULL); |
058d88c4 | 759 | if (unlikely(IS_ERR(vma))) { |
27173f1f | 760 | DRM_DEBUG("Failed to lookup VMA\n"); |
2889caa9 CW |
761 | err = PTR_ERR(vma); |
762 | goto err; | |
27173f1f BW |
763 | } |
764 | ||
4ff4b44c CW |
765 | /* First come, first served */ |
766 | if (!vma->ctx) { | |
767 | vma->ctx = eb->ctx; | |
768 | vma->ctx_handle = eb->exec[i].handle; | |
769 | hlist_add_head(&vma->ctx_node, | |
2889caa9 CW |
770 | ht_head(lut, eb->exec[i].handle)); |
771 | lut->ht_count++; | |
772 | lut->ht_size |= I915_CTX_RESIZE_IN_PROGRESS; | |
4ff4b44c CW |
773 | if (i915_vma_is_ggtt(vma)) { |
774 | GEM_BUG_ON(obj->vma_hashed); | |
775 | obj->vma_hashed = vma; | |
776 | } | |
dade2a61 CW |
777 | |
778 | i915_vma_get(vma); | |
eef90ccb | 779 | } |
4ff4b44c | 780 | |
2889caa9 CW |
781 | err = eb_add_vma(eb, &eb->exec[i], vma); |
782 | if (unlikely(err)) | |
783 | goto err; | |
dade2a61 CW |
784 | |
785 | /* Only after we validated the user didn't use our bits */ | |
786 | if (vma->ctx != eb->ctx) { | |
787 | i915_vma_get(vma); | |
788 | eb->exec[i].flags |= __EXEC_OBJECT_HAS_REF; | |
789 | } | |
4ff4b44c CW |
790 | } |
791 | ||
2889caa9 CW |
792 | if (lut->ht_size & I915_CTX_RESIZE_IN_PROGRESS) { |
793 | if (ht_needs_resize(lut)) | |
794 | queue_work(system_highpri_wq, &lut->resize); | |
795 | else | |
796 | lut->ht_size &= ~I915_CTX_RESIZE_IN_PROGRESS; | |
3b96eff4 | 797 | } |
3b96eff4 | 798 | |
2889caa9 CW |
799 | out: |
800 | /* take note of the batch buffer before we might reorder the lists */ | |
801 | i = eb_batch_index(eb); | |
802 | eb->batch = exec_to_vma(&eb->exec[i]); | |
27173f1f | 803 | |
9ae9ab52 | 804 | /* |
4ff4b44c CW |
805 | * SNA is doing fancy tricks with compressing batch buffers, which leads |
806 | * to negative relocation deltas. Usually that works out ok since the | |
807 | * relocate address is still positive, except when the batch is placed | |
808 | * very low in the GTT. Ensure this doesn't happen. | |
809 | * | |
810 | * Note that actual hangs have only been observed on gen7, but for | |
811 | * paranoia do it everywhere. | |
9ae9ab52 | 812 | */ |
2889caa9 CW |
813 | if (!(eb->exec[i].flags & EXEC_OBJECT_PINNED)) |
814 | eb->exec[i].flags |= __EXEC_OBJECT_NEEDS_BIAS; | |
815 | if (eb->reloc_cache.has_fence) | |
816 | eb->exec[i].flags |= EXEC_OBJECT_NEEDS_FENCE; | |
9ae9ab52 | 817 | |
2889caa9 CW |
818 | eb->args->flags |= __EXEC_VALIDATED; |
819 | return eb_reserve(eb); | |
820 | ||
821 | err: | |
822 | for (i = slow_pass; i < count; i++) { | |
823 | if (__exec_to_vma(&eb->exec[i]) & INTERMEDIATE) | |
824 | __exec_to_vma(&eb->exec[i]) = 0; | |
825 | } | |
826 | lut->ht_size &= ~I915_CTX_RESIZE_IN_PROGRESS; | |
827 | return err; | |
828 | #undef INTERMEDIATE | |
3b96eff4 CW |
829 | } |
830 | ||
4ff4b44c | 831 | static struct i915_vma * |
2889caa9 | 832 | eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle) |
67731b87 | 833 | { |
2889caa9 CW |
834 | if (eb->lut_size < 0) { |
835 | if (handle >= -eb->lut_size) | |
eef90ccb | 836 | return NULL; |
4ff4b44c | 837 | return exec_to_vma(&eb->exec[handle]); |
eef90ccb CW |
838 | } else { |
839 | struct hlist_head *head; | |
aa45950b | 840 | struct i915_vma *vma; |
67731b87 | 841 | |
2889caa9 | 842 | head = &eb->buckets[hash_32(handle, eb->lut_size)]; |
aa45950b | 843 | hlist_for_each_entry(vma, head, exec_node) { |
27173f1f BW |
844 | if (vma->exec_handle == handle) |
845 | return vma; | |
eef90ccb CW |
846 | } |
847 | return NULL; | |
848 | } | |
67731b87 CW |
849 | } |
850 | ||
2889caa9 | 851 | static void eb_release_vmas(const struct i915_execbuffer *eb) |
a415d355 | 852 | { |
2889caa9 CW |
853 | const unsigned int count = eb->buffer_count; |
854 | unsigned int i; | |
855 | ||
856 | for (i = 0; i < count; i++) { | |
857 | struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; | |
858 | struct i915_vma *vma = exec_to_vma(entry); | |
650bc635 | 859 | |
2889caa9 | 860 | if (!vma) |
d55495b4 | 861 | continue; |
bcffc3fa | 862 | |
2889caa9 | 863 | GEM_BUG_ON(vma->exec_entry != entry); |
172ae5b4 | 864 | vma->exec_entry = NULL; |
9e53d9be | 865 | |
dade2a61 CW |
866 | if (entry->flags & __EXEC_OBJECT_HAS_PIN) |
867 | __eb_unreserve_vma(vma, entry); | |
868 | ||
869 | if (entry->flags & __EXEC_OBJECT_HAS_REF) | |
870 | i915_vma_put(vma); | |
d50415cc | 871 | |
dade2a61 CW |
872 | entry->flags &= |
873 | ~(__EXEC_OBJECT_RESERVED | __EXEC_OBJECT_HAS_REF); | |
2889caa9 | 874 | } |
dabdfe02 CW |
875 | } |
876 | ||
2889caa9 | 877 | static void eb_reset_vmas(const struct i915_execbuffer *eb) |
934acce3 | 878 | { |
2889caa9 CW |
879 | eb_release_vmas(eb); |
880 | if (eb->lut_size >= 0) | |
881 | memset(eb->buckets, 0, | |
882 | sizeof(struct hlist_head) << eb->lut_size); | |
934acce3 MW |
883 | } |
884 | ||
2889caa9 | 885 | static void eb_destroy(const struct i915_execbuffer *eb) |
934acce3 | 886 | { |
2889caa9 CW |
887 | if (eb->lut_size >= 0) |
888 | kfree(eb->buckets); | |
934acce3 MW |
889 | } |
890 | ||
2889caa9 | 891 | static inline u64 |
d50415cc | 892 | relocation_target(const struct drm_i915_gem_relocation_entry *reloc, |
2889caa9 | 893 | const struct i915_vma *target) |
934acce3 | 894 | { |
2889caa9 | 895 | return gen8_canonical_addr((int)reloc->delta + target->node.start); |
934acce3 MW |
896 | } |
897 | ||
d50415cc CW |
898 | static void reloc_cache_init(struct reloc_cache *cache, |
899 | struct drm_i915_private *i915) | |
5032d871 | 900 | { |
31a39207 | 901 | cache->page = -1; |
d50415cc | 902 | cache->vaddr = 0; |
dfc5148f | 903 | /* Must be a variable in the struct to allow GCC to unroll. */ |
2889caa9 CW |
904 | cache->has_llc = HAS_LLC(i915); |
905 | cache->has_fence = INTEL_GEN(i915) < 4; | |
906 | cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment; | |
dfc5148f | 907 | cache->use_64bit_reloc = HAS_64BIT_RELOC(i915); |
e8cb909a | 908 | cache->node.allocated = false; |
d50415cc | 909 | } |
5032d871 | 910 | |
d50415cc CW |
911 | static inline void *unmask_page(unsigned long p) |
912 | { | |
913 | return (void *)(uintptr_t)(p & PAGE_MASK); | |
914 | } | |
915 | ||
916 | static inline unsigned int unmask_flags(unsigned long p) | |
917 | { | |
918 | return p & ~PAGE_MASK; | |
31a39207 CW |
919 | } |
920 | ||
d50415cc CW |
921 | #define KMAP 0x4 /* after CLFLUSH_FLAGS */ |
922 | ||
650bc635 CW |
923 | static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache) |
924 | { | |
925 | struct drm_i915_private *i915 = | |
926 | container_of(cache, struct i915_execbuffer, reloc_cache)->i915; | |
927 | return &i915->ggtt; | |
928 | } | |
929 | ||
930 | static void reloc_cache_reset(struct reloc_cache *cache) | |
31a39207 | 931 | { |
d50415cc | 932 | void *vaddr; |
5032d871 | 933 | |
31a39207 CW |
934 | if (!cache->vaddr) |
935 | return; | |
3c94ceee | 936 | |
d50415cc CW |
937 | vaddr = unmask_page(cache->vaddr); |
938 | if (cache->vaddr & KMAP) { | |
939 | if (cache->vaddr & CLFLUSH_AFTER) | |
940 | mb(); | |
3c94ceee | 941 | |
d50415cc CW |
942 | kunmap_atomic(vaddr); |
943 | i915_gem_obj_finish_shmem_access((struct drm_i915_gem_object *)cache->node.mm); | |
944 | } else { | |
e8cb909a | 945 | wmb(); |
d50415cc | 946 | io_mapping_unmap_atomic((void __iomem *)vaddr); |
e8cb909a | 947 | if (cache->node.allocated) { |
650bc635 | 948 | struct i915_ggtt *ggtt = cache_to_ggtt(cache); |
e8cb909a CW |
949 | |
950 | ggtt->base.clear_range(&ggtt->base, | |
951 | cache->node.start, | |
4fb84d99 | 952 | cache->node.size); |
e8cb909a CW |
953 | drm_mm_remove_node(&cache->node); |
954 | } else { | |
955 | i915_vma_unpin((struct i915_vma *)cache->node.mm); | |
3c94ceee | 956 | } |
31a39207 | 957 | } |
650bc635 CW |
958 | |
959 | cache->vaddr = 0; | |
960 | cache->page = -1; | |
31a39207 CW |
961 | } |
962 | ||
963 | static void *reloc_kmap(struct drm_i915_gem_object *obj, | |
964 | struct reloc_cache *cache, | |
2889caa9 | 965 | unsigned long page) |
31a39207 | 966 | { |
d50415cc CW |
967 | void *vaddr; |
968 | ||
969 | if (cache->vaddr) { | |
970 | kunmap_atomic(unmask_page(cache->vaddr)); | |
971 | } else { | |
972 | unsigned int flushes; | |
2889caa9 | 973 | int err; |
31a39207 | 974 | |
2889caa9 CW |
975 | err = i915_gem_obj_prepare_shmem_write(obj, &flushes); |
976 | if (err) | |
977 | return ERR_PTR(err); | |
d50415cc CW |
978 | |
979 | BUILD_BUG_ON(KMAP & CLFLUSH_FLAGS); | |
980 | BUILD_BUG_ON((KMAP | CLFLUSH_FLAGS) & PAGE_MASK); | |
3c94ceee | 981 | |
d50415cc CW |
982 | cache->vaddr = flushes | KMAP; |
983 | cache->node.mm = (void *)obj; | |
984 | if (flushes) | |
985 | mb(); | |
3c94ceee BW |
986 | } |
987 | ||
d50415cc CW |
988 | vaddr = kmap_atomic(i915_gem_object_get_dirty_page(obj, page)); |
989 | cache->vaddr = unmask_flags(cache->vaddr) | (unsigned long)vaddr; | |
31a39207 | 990 | cache->page = page; |
5032d871 | 991 | |
d50415cc | 992 | return vaddr; |
5032d871 RB |
993 | } |
994 | ||
d50415cc CW |
995 | static void *reloc_iomap(struct drm_i915_gem_object *obj, |
996 | struct reloc_cache *cache, | |
2889caa9 | 997 | unsigned long page) |
5032d871 | 998 | { |
650bc635 | 999 | struct i915_ggtt *ggtt = cache_to_ggtt(cache); |
e8cb909a | 1000 | unsigned long offset; |
d50415cc | 1001 | void *vaddr; |
5032d871 | 1002 | |
d50415cc | 1003 | if (cache->vaddr) { |
615e5000 | 1004 | io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr)); |
d50415cc CW |
1005 | } else { |
1006 | struct i915_vma *vma; | |
2889caa9 | 1007 | int err; |
5032d871 | 1008 | |
2889caa9 | 1009 | if (use_cpu_reloc(cache, obj)) |
d50415cc | 1010 | return NULL; |
3c94ceee | 1011 | |
2889caa9 CW |
1012 | err = i915_gem_object_set_to_gtt_domain(obj, true); |
1013 | if (err) | |
1014 | return ERR_PTR(err); | |
3c94ceee | 1015 | |
d50415cc CW |
1016 | vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, |
1017 | PIN_MAPPABLE | PIN_NONBLOCK); | |
e8cb909a CW |
1018 | if (IS_ERR(vma)) { |
1019 | memset(&cache->node, 0, sizeof(cache->node)); | |
2889caa9 | 1020 | err = drm_mm_insert_node_in_range |
e8cb909a | 1021 | (&ggtt->base.mm, &cache->node, |
f51455d4 | 1022 | PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE, |
e8cb909a | 1023 | 0, ggtt->mappable_end, |
4e64e553 | 1024 | DRM_MM_INSERT_LOW); |
2889caa9 | 1025 | if (err) /* no inactive aperture space, use cpu reloc */ |
c92fa4fe | 1026 | return NULL; |
e8cb909a | 1027 | } else { |
2889caa9 CW |
1028 | err = i915_vma_put_fence(vma); |
1029 | if (err) { | |
e8cb909a | 1030 | i915_vma_unpin(vma); |
2889caa9 | 1031 | return ERR_PTR(err); |
e8cb909a | 1032 | } |
5032d871 | 1033 | |
e8cb909a CW |
1034 | cache->node.start = vma->node.start; |
1035 | cache->node.mm = (void *)vma; | |
3c94ceee | 1036 | } |
e8cb909a | 1037 | } |
3c94ceee | 1038 | |
e8cb909a CW |
1039 | offset = cache->node.start; |
1040 | if (cache->node.allocated) { | |
fc099090 | 1041 | wmb(); |
e8cb909a CW |
1042 | ggtt->base.insert_page(&ggtt->base, |
1043 | i915_gem_object_get_dma_address(obj, page), | |
1044 | offset, I915_CACHE_NONE, 0); | |
1045 | } else { | |
1046 | offset += page << PAGE_SHIFT; | |
3c94ceee BW |
1047 | } |
1048 | ||
650bc635 CW |
1049 | vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->mappable, |
1050 | offset); | |
d50415cc CW |
1051 | cache->page = page; |
1052 | cache->vaddr = (unsigned long)vaddr; | |
5032d871 | 1053 | |
d50415cc | 1054 | return vaddr; |
5032d871 RB |
1055 | } |
1056 | ||
d50415cc CW |
1057 | static void *reloc_vaddr(struct drm_i915_gem_object *obj, |
1058 | struct reloc_cache *cache, | |
2889caa9 | 1059 | unsigned long page) |
edf4427b | 1060 | { |
d50415cc | 1061 | void *vaddr; |
5032d871 | 1062 | |
d50415cc CW |
1063 | if (cache->page == page) { |
1064 | vaddr = unmask_page(cache->vaddr); | |
1065 | } else { | |
1066 | vaddr = NULL; | |
1067 | if ((cache->vaddr & KMAP) == 0) | |
1068 | vaddr = reloc_iomap(obj, cache, page); | |
1069 | if (!vaddr) | |
1070 | vaddr = reloc_kmap(obj, cache, page); | |
3c94ceee BW |
1071 | } |
1072 | ||
d50415cc | 1073 | return vaddr; |
edf4427b CW |
1074 | } |
1075 | ||
d50415cc | 1076 | static void clflush_write32(u32 *addr, u32 value, unsigned int flushes) |
edf4427b | 1077 | { |
d50415cc CW |
1078 | if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) { |
1079 | if (flushes & CLFLUSH_BEFORE) { | |
1080 | clflushopt(addr); | |
1081 | mb(); | |
1082 | } | |
edf4427b | 1083 | |
d50415cc | 1084 | *addr = value; |
edf4427b | 1085 | |
2889caa9 CW |
1086 | /* |
1087 | * Writes to the same cacheline are serialised by the CPU | |
d50415cc CW |
1088 | * (including clflush). On the write path, we only require |
1089 | * that it hits memory in an orderly fashion and place | |
1090 | * mb barriers at the start and end of the relocation phase | |
1091 | * to ensure ordering of clflush wrt to the system. | |
1092 | */ | |
1093 | if (flushes & CLFLUSH_AFTER) | |
1094 | clflushopt(addr); | |
1095 | } else | |
1096 | *addr = value; | |
edf4427b | 1097 | } |
edf4427b | 1098 | |
2889caa9 CW |
1099 | static u64 |
1100 | relocate_entry(struct i915_vma *vma, | |
d50415cc | 1101 | const struct drm_i915_gem_relocation_entry *reloc, |
2889caa9 CW |
1102 | struct i915_execbuffer *eb, |
1103 | const struct i915_vma *target) | |
edf4427b | 1104 | { |
2889caa9 | 1105 | struct drm_i915_gem_object *obj = vma->obj; |
d50415cc | 1106 | u64 offset = reloc->offset; |
2889caa9 CW |
1107 | u64 target_offset = relocation_target(reloc, target); |
1108 | bool wide = eb->reloc_cache.use_64bit_reloc; | |
d50415cc | 1109 | void *vaddr; |
edf4427b | 1110 | |
d50415cc | 1111 | repeat: |
2889caa9 | 1112 | vaddr = reloc_vaddr(obj, &eb->reloc_cache, offset >> PAGE_SHIFT); |
d50415cc CW |
1113 | if (IS_ERR(vaddr)) |
1114 | return PTR_ERR(vaddr); | |
1115 | ||
1116 | clflush_write32(vaddr + offset_in_page(offset), | |
1117 | lower_32_bits(target_offset), | |
2889caa9 | 1118 | eb->reloc_cache.vaddr); |
d50415cc CW |
1119 | |
1120 | if (wide) { | |
1121 | offset += sizeof(u32); | |
1122 | target_offset >>= 32; | |
1123 | wide = false; | |
1124 | goto repeat; | |
edf4427b | 1125 | } |
edf4427b | 1126 | |
2889caa9 | 1127 | return target->node.start | UPDATE; |
edf4427b | 1128 | } |
edf4427b | 1129 | |
2889caa9 CW |
1130 | static u64 |
1131 | eb_relocate_entry(struct i915_execbuffer *eb, | |
1132 | struct i915_vma *vma, | |
1133 | const struct drm_i915_gem_relocation_entry *reloc) | |
54cf91dc | 1134 | { |
507d977f | 1135 | struct i915_vma *target; |
2889caa9 | 1136 | int err; |
54cf91dc | 1137 | |
67731b87 | 1138 | /* we've already hold a reference to all valid objects */ |
507d977f CW |
1139 | target = eb_get_vma(eb, reloc->target_handle); |
1140 | if (unlikely(!target)) | |
54cf91dc | 1141 | return -ENOENT; |
e844b990 | 1142 | |
54cf91dc | 1143 | /* Validate that the target is in a valid r/w GPU domain */ |
b8f7ab17 | 1144 | if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) { |
ff240199 | 1145 | DRM_DEBUG("reloc with multiple write domains: " |
507d977f | 1146 | "target %d offset %d " |
54cf91dc | 1147 | "read %08x write %08x", |
507d977f | 1148 | reloc->target_handle, |
54cf91dc CW |
1149 | (int) reloc->offset, |
1150 | reloc->read_domains, | |
1151 | reloc->write_domain); | |
8b78f0e5 | 1152 | return -EINVAL; |
54cf91dc | 1153 | } |
4ca4a250 DV |
1154 | if (unlikely((reloc->write_domain | reloc->read_domains) |
1155 | & ~I915_GEM_GPU_DOMAINS)) { | |
ff240199 | 1156 | DRM_DEBUG("reloc with read/write non-GPU domains: " |
507d977f | 1157 | "target %d offset %d " |
54cf91dc | 1158 | "read %08x write %08x", |
507d977f | 1159 | reloc->target_handle, |
54cf91dc CW |
1160 | (int) reloc->offset, |
1161 | reloc->read_domains, | |
1162 | reloc->write_domain); | |
8b78f0e5 | 1163 | return -EINVAL; |
54cf91dc | 1164 | } |
54cf91dc | 1165 | |
2889caa9 | 1166 | if (reloc->write_domain) { |
507d977f CW |
1167 | target->exec_entry->flags |= EXEC_OBJECT_WRITE; |
1168 | ||
2889caa9 CW |
1169 | /* |
1170 | * Sandybridge PPGTT errata: We need a global gtt mapping | |
1171 | * for MI and pipe_control writes because the gpu doesn't | |
1172 | * properly redirect them through the ppgtt for non_secure | |
1173 | * batchbuffers. | |
1174 | */ | |
1175 | if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION && | |
1176 | IS_GEN6(eb->i915)) { | |
1177 | err = i915_vma_bind(target, target->obj->cache_level, | |
1178 | PIN_GLOBAL); | |
1179 | if (WARN_ONCE(err, | |
1180 | "Unexpected failure to bind target VMA!")) | |
1181 | return err; | |
1182 | } | |
507d977f | 1183 | } |
54cf91dc | 1184 | |
2889caa9 CW |
1185 | /* |
1186 | * If the relocation already has the right value in it, no | |
54cf91dc CW |
1187 | * more work needs to be done. |
1188 | */ | |
2889caa9 | 1189 | if (gen8_canonical_addr(target->node.start) == reloc->presumed_offset) |
67731b87 | 1190 | return 0; |
54cf91dc CW |
1191 | |
1192 | /* Check that the relocation address is valid... */ | |
3c94ceee | 1193 | if (unlikely(reloc->offset > |
507d977f | 1194 | vma->size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) { |
ff240199 | 1195 | DRM_DEBUG("Relocation beyond object bounds: " |
507d977f CW |
1196 | "target %d offset %d size %d.\n", |
1197 | reloc->target_handle, | |
1198 | (int)reloc->offset, | |
1199 | (int)vma->size); | |
8b78f0e5 | 1200 | return -EINVAL; |
54cf91dc | 1201 | } |
b8f7ab17 | 1202 | if (unlikely(reloc->offset & 3)) { |
ff240199 | 1203 | DRM_DEBUG("Relocation not 4-byte aligned: " |
507d977f CW |
1204 | "target %d offset %d.\n", |
1205 | reloc->target_handle, | |
1206 | (int)reloc->offset); | |
8b78f0e5 | 1207 | return -EINVAL; |
54cf91dc CW |
1208 | } |
1209 | ||
071750e5 CW |
1210 | /* |
1211 | * If we write into the object, we need to force the synchronisation | |
1212 | * barrier, either with an asynchronous clflush or if we executed the | |
1213 | * patching using the GPU (though that should be serialised by the | |
1214 | * timeline). To be completely sure, and since we are required to | |
1215 | * do relocations we are already stalling, disable the user's opt | |
1216 | * of our synchronisation. | |
1217 | */ | |
1218 | vma->exec_entry->flags &= ~EXEC_OBJECT_ASYNC; | |
1219 | ||
54cf91dc | 1220 | /* and update the user's relocation entry */ |
2889caa9 | 1221 | return relocate_entry(vma, reloc, eb, target); |
54cf91dc CW |
1222 | } |
1223 | ||
2889caa9 | 1224 | static int eb_relocate_vma(struct i915_execbuffer *eb, struct i915_vma *vma) |
54cf91dc | 1225 | { |
1d83f442 | 1226 | #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry)) |
2889caa9 CW |
1227 | struct drm_i915_gem_relocation_entry stack[N_RELOC(512)]; |
1228 | struct drm_i915_gem_relocation_entry __user *urelocs; | |
1229 | const struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; | |
1230 | unsigned int remain; | |
54cf91dc | 1231 | |
2889caa9 | 1232 | urelocs = u64_to_user_ptr(entry->relocs_ptr); |
1d83f442 | 1233 | remain = entry->relocation_count; |
2889caa9 CW |
1234 | if (unlikely(remain > N_RELOC(ULONG_MAX))) |
1235 | return -EINVAL; | |
ebc0808f | 1236 | |
2889caa9 CW |
1237 | /* |
1238 | * We must check that the entire relocation array is safe | |
1239 | * to read. However, if the array is not writable the user loses | |
1240 | * the updated relocation values. | |
1241 | */ | |
1242 | if (unlikely(!access_ok(VERIFY_READ, urelocs, remain*sizeof(urelocs)))) | |
1243 | return -EFAULT; | |
1244 | ||
1245 | do { | |
1246 | struct drm_i915_gem_relocation_entry *r = stack; | |
1247 | unsigned int count = | |
1248 | min_t(unsigned int, remain, ARRAY_SIZE(stack)); | |
1249 | unsigned int copied; | |
1d83f442 | 1250 | |
2889caa9 CW |
1251 | /* |
1252 | * This is the fast path and we cannot handle a pagefault | |
ebc0808f CW |
1253 | * whilst holding the struct mutex lest the user pass in the |
1254 | * relocations contained within a mmaped bo. For in such a case | |
1255 | * we, the page fault handler would call i915_gem_fault() and | |
1256 | * we would try to acquire the struct mutex again. Obviously | |
1257 | * this is bad and so lockdep complains vehemently. | |
1258 | */ | |
1259 | pagefault_disable(); | |
2889caa9 | 1260 | copied = __copy_from_user_inatomic(r, urelocs, count * sizeof(r[0])); |
ebc0808f | 1261 | pagefault_enable(); |
2889caa9 CW |
1262 | if (unlikely(copied)) { |
1263 | remain = -EFAULT; | |
31a39207 CW |
1264 | goto out; |
1265 | } | |
54cf91dc | 1266 | |
2889caa9 | 1267 | remain -= count; |
1d83f442 | 1268 | do { |
2889caa9 | 1269 | u64 offset = eb_relocate_entry(eb, vma, r); |
54cf91dc | 1270 | |
2889caa9 CW |
1271 | if (likely(offset == 0)) { |
1272 | } else if ((s64)offset < 0) { | |
1273 | remain = (int)offset; | |
31a39207 | 1274 | goto out; |
2889caa9 CW |
1275 | } else { |
1276 | /* | |
1277 | * Note that reporting an error now | |
1278 | * leaves everything in an inconsistent | |
1279 | * state as we have *already* changed | |
1280 | * the relocation value inside the | |
1281 | * object. As we have not changed the | |
1282 | * reloc.presumed_offset or will not | |
1283 | * change the execobject.offset, on the | |
1284 | * call we may not rewrite the value | |
1285 | * inside the object, leaving it | |
1286 | * dangling and causing a GPU hang. Unless | |
1287 | * userspace dynamically rebuilds the | |
1288 | * relocations on each execbuf rather than | |
1289 | * presume a static tree. | |
1290 | * | |
1291 | * We did previously check if the relocations | |
1292 | * were writable (access_ok), an error now | |
1293 | * would be a strange race with mprotect, | |
1294 | * having already demonstrated that we | |
1295 | * can read from this userspace address. | |
1296 | */ | |
1297 | offset = gen8_canonical_addr(offset & ~UPDATE); | |
1298 | __put_user(offset, | |
1299 | &urelocs[r-stack].presumed_offset); | |
1d83f442 | 1300 | } |
2889caa9 CW |
1301 | } while (r++, --count); |
1302 | urelocs += ARRAY_SIZE(stack); | |
1303 | } while (remain); | |
31a39207 | 1304 | out: |
650bc635 | 1305 | reloc_cache_reset(&eb->reloc_cache); |
2889caa9 | 1306 | return remain; |
54cf91dc CW |
1307 | } |
1308 | ||
1309 | static int | |
2889caa9 | 1310 | eb_relocate_vma_slow(struct i915_execbuffer *eb, struct i915_vma *vma) |
54cf91dc | 1311 | { |
27173f1f | 1312 | const struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; |
2889caa9 CW |
1313 | struct drm_i915_gem_relocation_entry *relocs = |
1314 | u64_to_ptr(typeof(*relocs), entry->relocs_ptr); | |
1315 | unsigned int i; | |
1316 | int err; | |
54cf91dc CW |
1317 | |
1318 | for (i = 0; i < entry->relocation_count; i++) { | |
2889caa9 | 1319 | u64 offset = eb_relocate_entry(eb, vma, &relocs[i]); |
d4aeee77 | 1320 | |
2889caa9 CW |
1321 | if ((s64)offset < 0) { |
1322 | err = (int)offset; | |
1323 | goto err; | |
1324 | } | |
54cf91dc | 1325 | } |
2889caa9 CW |
1326 | err = 0; |
1327 | err: | |
1328 | reloc_cache_reset(&eb->reloc_cache); | |
1329 | return err; | |
edf4427b CW |
1330 | } |
1331 | ||
2889caa9 | 1332 | static int check_relocations(const struct drm_i915_gem_exec_object2 *entry) |
1690e1eb | 1333 | { |
2889caa9 CW |
1334 | const char __user *addr, *end; |
1335 | unsigned long size; | |
1336 | char __maybe_unused c; | |
1690e1eb | 1337 | |
2889caa9 CW |
1338 | size = entry->relocation_count; |
1339 | if (size == 0) | |
1340 | return 0; | |
7788a765 | 1341 | |
2889caa9 CW |
1342 | if (size > N_RELOC(ULONG_MAX)) |
1343 | return -EINVAL; | |
9a5a53b3 | 1344 | |
2889caa9 CW |
1345 | addr = u64_to_user_ptr(entry->relocs_ptr); |
1346 | size *= sizeof(struct drm_i915_gem_relocation_entry); | |
1347 | if (!access_ok(VERIFY_READ, addr, size)) | |
1348 | return -EFAULT; | |
1690e1eb | 1349 | |
2889caa9 CW |
1350 | end = addr + size; |
1351 | for (; addr < end; addr += PAGE_SIZE) { | |
1352 | int err = __get_user(c, addr); | |
1353 | if (err) | |
1354 | return err; | |
ed5982e6 | 1355 | } |
2889caa9 | 1356 | return __get_user(c, end - 1); |
7788a765 | 1357 | } |
1690e1eb | 1358 | |
2889caa9 | 1359 | static int eb_copy_relocations(const struct i915_execbuffer *eb) |
d23db88c | 1360 | { |
2889caa9 CW |
1361 | const unsigned int count = eb->buffer_count; |
1362 | unsigned int i; | |
1363 | int err; | |
e6a84468 | 1364 | |
2889caa9 CW |
1365 | for (i = 0; i < count; i++) { |
1366 | const unsigned int nreloc = eb->exec[i].relocation_count; | |
1367 | struct drm_i915_gem_relocation_entry __user *urelocs; | |
1368 | struct drm_i915_gem_relocation_entry *relocs; | |
1369 | unsigned long size; | |
1370 | unsigned long copied; | |
e6a84468 | 1371 | |
2889caa9 CW |
1372 | if (nreloc == 0) |
1373 | continue; | |
e6a84468 | 1374 | |
2889caa9 CW |
1375 | err = check_relocations(&eb->exec[i]); |
1376 | if (err) | |
1377 | goto err; | |
d23db88c | 1378 | |
2889caa9 CW |
1379 | urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr); |
1380 | size = nreloc * sizeof(*relocs); | |
d23db88c | 1381 | |
2889caa9 CW |
1382 | relocs = kvmalloc_array(size, 1, GFP_TEMPORARY); |
1383 | if (!relocs) { | |
1384 | kvfree(relocs); | |
1385 | err = -ENOMEM; | |
1386 | goto err; | |
1387 | } | |
d23db88c | 1388 | |
2889caa9 CW |
1389 | /* copy_from_user is limited to < 4GiB */ |
1390 | copied = 0; | |
1391 | do { | |
1392 | unsigned int len = | |
1393 | min_t(u64, BIT_ULL(31), size - copied); | |
1394 | ||
1395 | if (__copy_from_user((char *)relocs + copied, | |
1396 | (char *)urelocs + copied, | |
1397 | len)) { | |
1398 | kvfree(relocs); | |
1399 | err = -EFAULT; | |
1400 | goto err; | |
1401 | } | |
91b2db6f | 1402 | |
2889caa9 CW |
1403 | copied += len; |
1404 | } while (copied < size); | |
506a8e87 | 1405 | |
2889caa9 CW |
1406 | /* |
1407 | * As we do not update the known relocation offsets after | |
1408 | * relocating (due to the complexities in lock handling), | |
1409 | * we need to mark them as invalid now so that we force the | |
1410 | * relocation processing next time. Just in case the target | |
1411 | * object is evicted and then rebound into its old | |
1412 | * presumed_offset before the next execbuffer - if that | |
1413 | * happened we would make the mistake of assuming that the | |
1414 | * relocations were valid. | |
1415 | */ | |
1416 | user_access_begin(); | |
1417 | for (copied = 0; copied < nreloc; copied++) | |
1418 | unsafe_put_user(-1, | |
1419 | &urelocs[copied].presumed_offset, | |
1420 | end_user); | |
1421 | end_user: | |
1422 | user_access_end(); | |
d23db88c | 1423 | |
2889caa9 CW |
1424 | eb->exec[i].relocs_ptr = (uintptr_t)relocs; |
1425 | } | |
edf4427b | 1426 | |
2889caa9 | 1427 | return 0; |
101b506a | 1428 | |
2889caa9 CW |
1429 | err: |
1430 | while (i--) { | |
1431 | struct drm_i915_gem_relocation_entry *relocs = | |
1432 | u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr); | |
1433 | if (eb->exec[i].relocation_count) | |
1434 | kvfree(relocs); | |
1435 | } | |
1436 | return err; | |
d23db88c CW |
1437 | } |
1438 | ||
2889caa9 | 1439 | static int eb_prefault_relocations(const struct i915_execbuffer *eb) |
54cf91dc | 1440 | { |
2889caa9 CW |
1441 | const unsigned int count = eb->buffer_count; |
1442 | unsigned int i; | |
54cf91dc | 1443 | |
2889caa9 CW |
1444 | if (unlikely(i915.prefault_disable)) |
1445 | return 0; | |
54cf91dc | 1446 | |
2889caa9 CW |
1447 | for (i = 0; i < count; i++) { |
1448 | int err; | |
54cf91dc | 1449 | |
2889caa9 CW |
1450 | err = check_relocations(&eb->exec[i]); |
1451 | if (err) | |
1452 | return err; | |
1453 | } | |
a415d355 | 1454 | |
2889caa9 | 1455 | return 0; |
54cf91dc CW |
1456 | } |
1457 | ||
2889caa9 | 1458 | static noinline int eb_relocate_slow(struct i915_execbuffer *eb) |
54cf91dc | 1459 | { |
650bc635 | 1460 | struct drm_device *dev = &eb->i915->drm; |
2889caa9 | 1461 | bool have_copy = false; |
27173f1f | 1462 | struct i915_vma *vma; |
2889caa9 CW |
1463 | int err = 0; |
1464 | ||
1465 | repeat: | |
1466 | if (signal_pending(current)) { | |
1467 | err = -ERESTARTSYS; | |
1468 | goto out; | |
1469 | } | |
27173f1f | 1470 | |
67731b87 | 1471 | /* We may process another execbuffer during the unlock... */ |
2889caa9 | 1472 | eb_reset_vmas(eb); |
54cf91dc CW |
1473 | mutex_unlock(&dev->struct_mutex); |
1474 | ||
2889caa9 CW |
1475 | /* |
1476 | * We take 3 passes through the slowpatch. | |
1477 | * | |
1478 | * 1 - we try to just prefault all the user relocation entries and | |
1479 | * then attempt to reuse the atomic pagefault disabled fast path again. | |
1480 | * | |
1481 | * 2 - we copy the user entries to a local buffer here outside of the | |
1482 | * local and allow ourselves to wait upon any rendering before | |
1483 | * relocations | |
1484 | * | |
1485 | * 3 - we already have a local copy of the relocation entries, but | |
1486 | * were interrupted (EAGAIN) whilst waiting for the objects, try again. | |
1487 | */ | |
1488 | if (!err) { | |
1489 | err = eb_prefault_relocations(eb); | |
1490 | } else if (!have_copy) { | |
1491 | err = eb_copy_relocations(eb); | |
1492 | have_copy = err == 0; | |
1493 | } else { | |
1494 | cond_resched(); | |
1495 | err = 0; | |
54cf91dc | 1496 | } |
2889caa9 CW |
1497 | if (err) { |
1498 | mutex_lock(&dev->struct_mutex); | |
1499 | goto out; | |
54cf91dc CW |
1500 | } |
1501 | ||
2889caa9 CW |
1502 | err = i915_mutex_lock_interruptible(dev); |
1503 | if (err) { | |
54cf91dc | 1504 | mutex_lock(&dev->struct_mutex); |
2889caa9 | 1505 | goto out; |
54cf91dc CW |
1506 | } |
1507 | ||
67731b87 | 1508 | /* reacquire the objects */ |
2889caa9 CW |
1509 | err = eb_lookup_vmas(eb); |
1510 | if (err) | |
3b96eff4 | 1511 | goto err; |
67731b87 | 1512 | |
2889caa9 CW |
1513 | list_for_each_entry(vma, &eb->relocs, reloc_link) { |
1514 | if (!have_copy) { | |
1515 | pagefault_disable(); | |
1516 | err = eb_relocate_vma(eb, vma); | |
1517 | pagefault_enable(); | |
1518 | if (err) | |
1519 | goto repeat; | |
1520 | } else { | |
1521 | err = eb_relocate_vma_slow(eb, vma); | |
1522 | if (err) | |
1523 | goto err; | |
1524 | } | |
54cf91dc CW |
1525 | } |
1526 | ||
2889caa9 CW |
1527 | /* |
1528 | * Leave the user relocations as are, this is the painfully slow path, | |
54cf91dc CW |
1529 | * and we want to avoid the complication of dropping the lock whilst |
1530 | * having buffers reserved in the aperture and so causing spurious | |
1531 | * ENOSPC for random operations. | |
1532 | */ | |
1533 | ||
1534 | err: | |
2889caa9 CW |
1535 | if (err == -EAGAIN) |
1536 | goto repeat; | |
1537 | ||
1538 | out: | |
1539 | if (have_copy) { | |
1540 | const unsigned int count = eb->buffer_count; | |
1541 | unsigned int i; | |
1542 | ||
1543 | for (i = 0; i < count; i++) { | |
1544 | const struct drm_i915_gem_exec_object2 *entry = | |
1545 | &eb->exec[i]; | |
1546 | struct drm_i915_gem_relocation_entry *relocs; | |
1547 | ||
1548 | if (!entry->relocation_count) | |
1549 | continue; | |
1550 | ||
1551 | relocs = u64_to_ptr(typeof(*relocs), entry->relocs_ptr); | |
1552 | kvfree(relocs); | |
1553 | } | |
1554 | } | |
1555 | ||
1556 | return err ?: have_copy; | |
54cf91dc CW |
1557 | } |
1558 | ||
2889caa9 | 1559 | static int eb_relocate(struct i915_execbuffer *eb) |
54cf91dc | 1560 | { |
2889caa9 CW |
1561 | if (eb_lookup_vmas(eb)) |
1562 | goto slow; | |
1563 | ||
1564 | /* The objects are in their final locations, apply the relocations. */ | |
1565 | if (eb->args->flags & __EXEC_HAS_RELOC) { | |
1566 | struct i915_vma *vma; | |
1567 | ||
1568 | list_for_each_entry(vma, &eb->relocs, reloc_link) { | |
1569 | if (eb_relocate_vma(eb, vma)) | |
1570 | goto slow; | |
1571 | } | |
1572 | } | |
1573 | ||
1574 | return 0; | |
1575 | ||
1576 | slow: | |
1577 | return eb_relocate_slow(eb); | |
1578 | } | |
1579 | ||
1580 | static void eb_export_fence(struct drm_i915_gem_object *obj, | |
1581 | struct drm_i915_gem_request *req, | |
1582 | unsigned int flags) | |
1583 | { | |
1584 | struct reservation_object *resv = obj->resv; | |
1585 | ||
1586 | /* | |
1587 | * Ignore errors from failing to allocate the new fence, we can't | |
1588 | * handle an error right now. Worst case should be missed | |
1589 | * synchronisation leading to rendering corruption. | |
1590 | */ | |
1591 | reservation_object_lock(resv, NULL); | |
1592 | if (flags & EXEC_OBJECT_WRITE) | |
1593 | reservation_object_add_excl_fence(resv, &req->fence); | |
1594 | else if (reservation_object_reserve_shared(resv) == 0) | |
1595 | reservation_object_add_shared_fence(resv, &req->fence); | |
1596 | reservation_object_unlock(resv); | |
1597 | } | |
1598 | ||
1599 | static int eb_move_to_gpu(struct i915_execbuffer *eb) | |
1600 | { | |
1601 | const unsigned int count = eb->buffer_count; | |
1602 | unsigned int i; | |
1603 | int err; | |
54cf91dc | 1604 | |
2889caa9 CW |
1605 | for (i = 0; i < count; i++) { |
1606 | const struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; | |
1607 | struct i915_vma *vma = exec_to_vma(entry); | |
27173f1f | 1608 | struct drm_i915_gem_object *obj = vma->obj; |
03ade511 | 1609 | |
2889caa9 | 1610 | if (entry->flags & EXEC_OBJECT_CAPTURE) { |
b0fd47ad CW |
1611 | struct i915_gem_capture_list *capture; |
1612 | ||
1613 | capture = kmalloc(sizeof(*capture), GFP_KERNEL); | |
1614 | if (unlikely(!capture)) | |
1615 | return -ENOMEM; | |
1616 | ||
650bc635 | 1617 | capture->next = eb->request->capture_list; |
b0fd47ad | 1618 | capture->vma = vma; |
650bc635 | 1619 | eb->request->capture_list = capture; |
b0fd47ad CW |
1620 | } |
1621 | ||
2889caa9 CW |
1622 | if (entry->flags & EXEC_OBJECT_ASYNC) |
1623 | goto skip_flushes; | |
77ae9957 | 1624 | |
7fc92e96 | 1625 | if (unlikely(obj->cache_dirty && !obj->cache_coherent)) |
57822dc6 | 1626 | i915_gem_clflush_object(obj, 0); |
57822dc6 | 1627 | |
2889caa9 CW |
1628 | err = i915_gem_request_await_object |
1629 | (eb->request, obj, entry->flags & EXEC_OBJECT_WRITE); | |
1630 | if (err) | |
1631 | return err; | |
1632 | ||
1633 | skip_flushes: | |
1634 | i915_vma_move_to_active(vma, eb->request, entry->flags); | |
1635 | __eb_unreserve_vma(vma, entry); | |
1636 | vma->exec_entry = NULL; | |
1637 | } | |
1638 | ||
1639 | for (i = 0; i < count; i++) { | |
1640 | const struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; | |
1641 | struct i915_vma *vma = exec_to_vma(entry); | |
1642 | ||
1643 | eb_export_fence(vma->obj, eb->request, entry->flags); | |
dade2a61 CW |
1644 | if (unlikely(entry->flags & __EXEC_OBJECT_HAS_REF)) |
1645 | i915_vma_put(vma); | |
c59a333f | 1646 | } |
2889caa9 | 1647 | eb->exec = NULL; |
c59a333f | 1648 | |
dcd79934 | 1649 | /* Unconditionally flush any chipset caches (for streaming writes). */ |
650bc635 | 1650 | i915_gem_chipset_flush(eb->i915); |
6ac42f41 | 1651 | |
c7fe7d25 | 1652 | /* Unconditionally invalidate GPU caches and TLBs. */ |
650bc635 | 1653 | return eb->engine->emit_flush(eb->request, EMIT_INVALIDATE); |
54cf91dc CW |
1654 | } |
1655 | ||
2889caa9 | 1656 | static bool i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec) |
54cf91dc | 1657 | { |
650bc635 | 1658 | if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS) |
ed5982e6 DV |
1659 | return false; |
1660 | ||
2f5945bc CW |
1661 | /* Kernel clipping was a DRI1 misfeature */ |
1662 | if (exec->num_cliprects || exec->cliprects_ptr) | |
1663 | return false; | |
1664 | ||
1665 | if (exec->DR4 == 0xffffffff) { | |
1666 | DRM_DEBUG("UXA submitting garbage DR4, fixing up\n"); | |
1667 | exec->DR4 = 0; | |
1668 | } | |
1669 | if (exec->DR1 || exec->DR4) | |
1670 | return false; | |
1671 | ||
1672 | if ((exec->batch_start_offset | exec->batch_len) & 0x7) | |
1673 | return false; | |
1674 | ||
1675 | return true; | |
54cf91dc CW |
1676 | } |
1677 | ||
5cf3d280 CW |
1678 | void i915_vma_move_to_active(struct i915_vma *vma, |
1679 | struct drm_i915_gem_request *req, | |
1680 | unsigned int flags) | |
1681 | { | |
1682 | struct drm_i915_gem_object *obj = vma->obj; | |
1683 | const unsigned int idx = req->engine->id; | |
1684 | ||
81147b07 | 1685 | lockdep_assert_held(&req->i915->drm.struct_mutex); |
5cf3d280 CW |
1686 | GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); |
1687 | ||
2889caa9 CW |
1688 | /* |
1689 | * Add a reference if we're newly entering the active list. | |
b0decaf7 CW |
1690 | * The order in which we add operations to the retirement queue is |
1691 | * vital here: mark_active adds to the start of the callback list, | |
1692 | * such that subsequent callbacks are called first. Therefore we | |
1693 | * add the active reference first and queue for it to be dropped | |
1694 | * *last*. | |
1695 | */ | |
d07f0e59 CW |
1696 | if (!i915_vma_is_active(vma)) |
1697 | obj->active_count++; | |
1698 | i915_vma_set_active(vma, idx); | |
1699 | i915_gem_active_set(&vma->last_read[idx], req); | |
1700 | list_move_tail(&vma->vm_link, &vma->vm->active_list); | |
5cf3d280 | 1701 | |
e27ab73d | 1702 | obj->base.write_domain = 0; |
5cf3d280 | 1703 | if (flags & EXEC_OBJECT_WRITE) { |
e27ab73d CW |
1704 | obj->base.write_domain = I915_GEM_DOMAIN_RENDER; |
1705 | ||
5b8c8aec CW |
1706 | if (intel_fb_obj_invalidate(obj, ORIGIN_CS)) |
1707 | i915_gem_active_set(&obj->frontbuffer_write, req); | |
5cf3d280 | 1708 | |
e27ab73d | 1709 | obj->base.read_domains = 0; |
5cf3d280 | 1710 | } |
e27ab73d | 1711 | obj->base.read_domains |= I915_GEM_GPU_DOMAINS; |
5cf3d280 | 1712 | |
49ef5294 CW |
1713 | if (flags & EXEC_OBJECT_NEEDS_FENCE) |
1714 | i915_gem_active_set(&vma->last_fence, req); | |
5cf3d280 CW |
1715 | } |
1716 | ||
2889caa9 | 1717 | static int i915_reset_gen7_sol_offsets(struct drm_i915_gem_request *req) |
ae662d31 | 1718 | { |
73dec95e TU |
1719 | u32 *cs; |
1720 | int i; | |
ae662d31 | 1721 | |
b5321f30 | 1722 | if (!IS_GEN7(req->i915) || req->engine->id != RCS) { |
9d662da8 DV |
1723 | DRM_DEBUG("sol reset is gen7/rcs only\n"); |
1724 | return -EINVAL; | |
1725 | } | |
ae662d31 | 1726 | |
2889caa9 | 1727 | cs = intel_ring_begin(req, 4 * 2 + 2); |
73dec95e TU |
1728 | if (IS_ERR(cs)) |
1729 | return PTR_ERR(cs); | |
ae662d31 | 1730 | |
2889caa9 | 1731 | *cs++ = MI_LOAD_REGISTER_IMM(4); |
ae662d31 | 1732 | for (i = 0; i < 4; i++) { |
73dec95e TU |
1733 | *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i)); |
1734 | *cs++ = 0; | |
ae662d31 | 1735 | } |
2889caa9 | 1736 | *cs++ = MI_NOOP; |
73dec95e | 1737 | intel_ring_advance(req, cs); |
ae662d31 EA |
1738 | |
1739 | return 0; | |
1740 | } | |
1741 | ||
650bc635 | 1742 | static struct i915_vma *eb_parse(struct i915_execbuffer *eb, bool is_master) |
71745376 | 1743 | { |
71745376 | 1744 | struct drm_i915_gem_object *shadow_batch_obj; |
17cabf57 | 1745 | struct i915_vma *vma; |
2889caa9 | 1746 | int err; |
71745376 | 1747 | |
650bc635 CW |
1748 | shadow_batch_obj = i915_gem_batch_pool_get(&eb->engine->batch_pool, |
1749 | PAGE_ALIGN(eb->batch_len)); | |
71745376 | 1750 | if (IS_ERR(shadow_batch_obj)) |
59bfa124 | 1751 | return ERR_CAST(shadow_batch_obj); |
71745376 | 1752 | |
2889caa9 | 1753 | err = intel_engine_cmd_parser(eb->engine, |
650bc635 | 1754 | eb->batch->obj, |
33a051a5 | 1755 | shadow_batch_obj, |
650bc635 CW |
1756 | eb->batch_start_offset, |
1757 | eb->batch_len, | |
33a051a5 | 1758 | is_master); |
2889caa9 CW |
1759 | if (err) { |
1760 | if (err == -EACCES) /* unhandled chained batch */ | |
058d88c4 CW |
1761 | vma = NULL; |
1762 | else | |
2889caa9 | 1763 | vma = ERR_PTR(err); |
058d88c4 CW |
1764 | goto out; |
1765 | } | |
71745376 | 1766 | |
058d88c4 CW |
1767 | vma = i915_gem_object_ggtt_pin(shadow_batch_obj, NULL, 0, 0, 0); |
1768 | if (IS_ERR(vma)) | |
1769 | goto out; | |
de4e783a | 1770 | |
650bc635 | 1771 | vma->exec_entry = |
2889caa9 CW |
1772 | memset(&eb->exec[eb->buffer_count++], |
1773 | 0, sizeof(*vma->exec_entry)); | |
dade2a61 | 1774 | vma->exec_entry->flags = __EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_REF; |
2889caa9 | 1775 | __exec_to_vma(vma->exec_entry) = (uintptr_t)i915_vma_get(vma); |
71745376 | 1776 | |
058d88c4 | 1777 | out: |
de4e783a | 1778 | i915_gem_object_unpin_pages(shadow_batch_obj); |
058d88c4 | 1779 | return vma; |
71745376 | 1780 | } |
5c6c6003 | 1781 | |
c8659efa | 1782 | static void |
2889caa9 | 1783 | add_to_client(struct drm_i915_gem_request *req, struct drm_file *file) |
c8659efa CW |
1784 | { |
1785 | req->file_priv = file->driver_priv; | |
1786 | list_add_tail(&req->client_link, &req->file_priv->mm.request_list); | |
1787 | } | |
1788 | ||
2889caa9 | 1789 | static int eb_submit(struct i915_execbuffer *eb) |
78382593 | 1790 | { |
2889caa9 | 1791 | int err; |
78382593 | 1792 | |
2889caa9 CW |
1793 | err = eb_move_to_gpu(eb); |
1794 | if (err) | |
1795 | return err; | |
78382593 | 1796 | |
2889caa9 CW |
1797 | err = i915_switch_context(eb->request); |
1798 | if (err) | |
1799 | return err; | |
78382593 | 1800 | |
650bc635 | 1801 | if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) { |
2889caa9 CW |
1802 | err = i915_reset_gen7_sol_offsets(eb->request); |
1803 | if (err) | |
1804 | return err; | |
78382593 OM |
1805 | } |
1806 | ||
2889caa9 | 1807 | err = eb->engine->emit_bb_start(eb->request, |
650bc635 CW |
1808 | eb->batch->node.start + |
1809 | eb->batch_start_offset, | |
1810 | eb->batch_len, | |
2889caa9 CW |
1811 | eb->batch_flags); |
1812 | if (err) | |
1813 | return err; | |
78382593 | 1814 | |
2f5945bc | 1815 | return 0; |
78382593 OM |
1816 | } |
1817 | ||
a8ebba75 ZY |
1818 | /** |
1819 | * Find one BSD ring to dispatch the corresponding BSD command. | |
c80ff16e | 1820 | * The engine index is returned. |
a8ebba75 | 1821 | */ |
de1add36 | 1822 | static unsigned int |
c80ff16e CW |
1823 | gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv, |
1824 | struct drm_file *file) | |
a8ebba75 | 1825 | { |
a8ebba75 ZY |
1826 | struct drm_i915_file_private *file_priv = file->driver_priv; |
1827 | ||
de1add36 | 1828 | /* Check whether the file_priv has already selected one ring. */ |
6f633402 JL |
1829 | if ((int)file_priv->bsd_engine < 0) |
1830 | file_priv->bsd_engine = atomic_fetch_xor(1, | |
1831 | &dev_priv->mm.bsd_engine_dispatch_index); | |
d23db88c | 1832 | |
c80ff16e | 1833 | return file_priv->bsd_engine; |
d23db88c CW |
1834 | } |
1835 | ||
de1add36 TU |
1836 | #define I915_USER_RINGS (4) |
1837 | ||
117897f4 | 1838 | static const enum intel_engine_id user_ring_map[I915_USER_RINGS + 1] = { |
de1add36 TU |
1839 | [I915_EXEC_DEFAULT] = RCS, |
1840 | [I915_EXEC_RENDER] = RCS, | |
1841 | [I915_EXEC_BLT] = BCS, | |
1842 | [I915_EXEC_BSD] = VCS, | |
1843 | [I915_EXEC_VEBOX] = VECS | |
1844 | }; | |
1845 | ||
f8ca0c07 DG |
1846 | static struct intel_engine_cs * |
1847 | eb_select_engine(struct drm_i915_private *dev_priv, | |
1848 | struct drm_file *file, | |
1849 | struct drm_i915_gem_execbuffer2 *args) | |
de1add36 TU |
1850 | { |
1851 | unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK; | |
f8ca0c07 | 1852 | struct intel_engine_cs *engine; |
de1add36 TU |
1853 | |
1854 | if (user_ring_id > I915_USER_RINGS) { | |
1855 | DRM_DEBUG("execbuf with unknown ring: %u\n", user_ring_id); | |
f8ca0c07 | 1856 | return NULL; |
de1add36 TU |
1857 | } |
1858 | ||
1859 | if ((user_ring_id != I915_EXEC_BSD) && | |
1860 | ((args->flags & I915_EXEC_BSD_MASK) != 0)) { | |
1861 | DRM_DEBUG("execbuf with non bsd ring but with invalid " | |
1862 | "bsd dispatch flags: %d\n", (int)(args->flags)); | |
f8ca0c07 | 1863 | return NULL; |
de1add36 TU |
1864 | } |
1865 | ||
1866 | if (user_ring_id == I915_EXEC_BSD && HAS_BSD2(dev_priv)) { | |
1867 | unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK; | |
1868 | ||
1869 | if (bsd_idx == I915_EXEC_BSD_DEFAULT) { | |
c80ff16e | 1870 | bsd_idx = gen8_dispatch_bsd_engine(dev_priv, file); |
de1add36 TU |
1871 | } else if (bsd_idx >= I915_EXEC_BSD_RING1 && |
1872 | bsd_idx <= I915_EXEC_BSD_RING2) { | |
d9da6aa0 | 1873 | bsd_idx >>= I915_EXEC_BSD_SHIFT; |
de1add36 TU |
1874 | bsd_idx--; |
1875 | } else { | |
1876 | DRM_DEBUG("execbuf with unknown bsd ring: %u\n", | |
1877 | bsd_idx); | |
f8ca0c07 | 1878 | return NULL; |
de1add36 TU |
1879 | } |
1880 | ||
3b3f1650 | 1881 | engine = dev_priv->engine[_VCS(bsd_idx)]; |
de1add36 | 1882 | } else { |
3b3f1650 | 1883 | engine = dev_priv->engine[user_ring_map[user_ring_id]]; |
de1add36 TU |
1884 | } |
1885 | ||
3b3f1650 | 1886 | if (!engine) { |
de1add36 | 1887 | DRM_DEBUG("execbuf with invalid ring: %u\n", user_ring_id); |
f8ca0c07 | 1888 | return NULL; |
de1add36 TU |
1889 | } |
1890 | ||
f8ca0c07 | 1891 | return engine; |
de1add36 TU |
1892 | } |
1893 | ||
54cf91dc | 1894 | static int |
650bc635 | 1895 | i915_gem_do_execbuffer(struct drm_device *dev, |
54cf91dc CW |
1896 | struct drm_file *file, |
1897 | struct drm_i915_gem_execbuffer2 *args, | |
41bde553 | 1898 | struct drm_i915_gem_exec_object2 *exec) |
54cf91dc | 1899 | { |
650bc635 | 1900 | struct i915_execbuffer eb; |
fec0445c CW |
1901 | struct dma_fence *in_fence = NULL; |
1902 | struct sync_file *out_fence = NULL; | |
1903 | int out_fence_fd = -1; | |
2889caa9 | 1904 | int err; |
432e58ed | 1905 | |
2889caa9 CW |
1906 | BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS & |
1907 | ~__EXEC_OBJECT_UNKNOWN_FLAGS); | |
54cf91dc | 1908 | |
650bc635 CW |
1909 | eb.i915 = to_i915(dev); |
1910 | eb.file = file; | |
1911 | eb.args = args; | |
2889caa9 CW |
1912 | if (!(args->flags & I915_EXEC_NO_RELOC)) |
1913 | args->flags |= __EXEC_HAS_RELOC; | |
650bc635 | 1914 | eb.exec = exec; |
2889caa9 CW |
1915 | eb.ctx = NULL; |
1916 | eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS; | |
1917 | if (USES_FULL_PPGTT(eb.i915)) | |
1918 | eb.invalid_flags |= EXEC_OBJECT_NEEDS_GTT; | |
650bc635 CW |
1919 | reloc_cache_init(&eb.reloc_cache, eb.i915); |
1920 | ||
2889caa9 | 1921 | eb.buffer_count = args->buffer_count; |
650bc635 CW |
1922 | eb.batch_start_offset = args->batch_start_offset; |
1923 | eb.batch_len = args->batch_len; | |
1924 | ||
2889caa9 | 1925 | eb.batch_flags = 0; |
d7d4eedd | 1926 | if (args->flags & I915_EXEC_SECURE) { |
b3ac9f25 | 1927 | if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN)) |
d7d4eedd CW |
1928 | return -EPERM; |
1929 | ||
2889caa9 | 1930 | eb.batch_flags |= I915_DISPATCH_SECURE; |
d7d4eedd | 1931 | } |
b45305fc | 1932 | if (args->flags & I915_EXEC_IS_PINNED) |
2889caa9 | 1933 | eb.batch_flags |= I915_DISPATCH_PINNED; |
54cf91dc | 1934 | |
650bc635 CW |
1935 | eb.engine = eb_select_engine(eb.i915, file, args); |
1936 | if (!eb.engine) | |
54cf91dc | 1937 | return -EINVAL; |
54cf91dc | 1938 | |
a9ed33ca | 1939 | if (args->flags & I915_EXEC_RESOURCE_STREAMER) { |
650bc635 | 1940 | if (!HAS_RESOURCE_STREAMER(eb.i915)) { |
a9ed33ca AJ |
1941 | DRM_DEBUG("RS is only allowed for Haswell, Gen8 and above\n"); |
1942 | return -EINVAL; | |
1943 | } | |
650bc635 | 1944 | if (eb.engine->id != RCS) { |
a9ed33ca | 1945 | DRM_DEBUG("RS is not available on %s\n", |
650bc635 | 1946 | eb.engine->name); |
a9ed33ca AJ |
1947 | return -EINVAL; |
1948 | } | |
1949 | ||
2889caa9 | 1950 | eb.batch_flags |= I915_DISPATCH_RS; |
a9ed33ca AJ |
1951 | } |
1952 | ||
fec0445c CW |
1953 | if (args->flags & I915_EXEC_FENCE_IN) { |
1954 | in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2)); | |
4a04e371 DCS |
1955 | if (!in_fence) |
1956 | return -EINVAL; | |
fec0445c CW |
1957 | } |
1958 | ||
1959 | if (args->flags & I915_EXEC_FENCE_OUT) { | |
1960 | out_fence_fd = get_unused_fd_flags(O_CLOEXEC); | |
1961 | if (out_fence_fd < 0) { | |
2889caa9 | 1962 | err = out_fence_fd; |
4a04e371 | 1963 | goto err_in_fence; |
fec0445c CW |
1964 | } |
1965 | } | |
1966 | ||
2889caa9 CW |
1967 | if (eb_create(&eb)) |
1968 | return -ENOMEM; | |
1969 | ||
1970 | /* | |
1971 | * Take a local wakeref for preparing to dispatch the execbuf as | |
67d97da3 CW |
1972 | * we expect to access the hardware fairly frequently in the |
1973 | * process. Upon first dispatch, we acquire another prolonged | |
1974 | * wakeref that we hold until the GPU has been idle for at least | |
1975 | * 100ms. | |
1976 | */ | |
650bc635 | 1977 | intel_runtime_pm_get(eb.i915); |
2889caa9 CW |
1978 | err = i915_mutex_lock_interruptible(dev); |
1979 | if (err) | |
1980 | goto err_rpm; | |
f65c9168 | 1981 | |
2889caa9 CW |
1982 | err = eb_select_context(&eb); |
1983 | if (unlikely(err)) | |
1984 | goto err_unlock; | |
54cf91dc | 1985 | |
2889caa9 CW |
1986 | err = eb_relocate(&eb); |
1987 | if (err) | |
1988 | /* | |
1989 | * If the user expects the execobject.offset and | |
1990 | * reloc.presumed_offset to be an exact match, | |
1991 | * as for using NO_RELOC, then we cannot update | |
1992 | * the execobject.offset until we have completed | |
1993 | * relocation. | |
1994 | */ | |
1995 | args->flags &= ~__EXEC_HAS_RELOC; | |
1996 | if (err < 0) | |
1997 | goto err_vma; | |
54cf91dc | 1998 | |
2889caa9 | 1999 | if (unlikely(eb.batch->exec_entry->flags & EXEC_OBJECT_WRITE)) { |
ff240199 | 2000 | DRM_DEBUG("Attempting to use self-modifying batch buffer\n"); |
2889caa9 CW |
2001 | err = -EINVAL; |
2002 | goto err_vma; | |
54cf91dc | 2003 | } |
650bc635 CW |
2004 | if (eb.batch_start_offset > eb.batch->size || |
2005 | eb.batch_len > eb.batch->size - eb.batch_start_offset) { | |
0b537272 | 2006 | DRM_DEBUG("Attempting to use out-of-bounds batch\n"); |
2889caa9 CW |
2007 | err = -EINVAL; |
2008 | goto err_vma; | |
0b537272 | 2009 | } |
54cf91dc | 2010 | |
650bc635 | 2011 | if (eb.engine->needs_cmd_parser && eb.batch_len) { |
59bfa124 CW |
2012 | struct i915_vma *vma; |
2013 | ||
650bc635 | 2014 | vma = eb_parse(&eb, drm_is_current_master(file)); |
59bfa124 | 2015 | if (IS_ERR(vma)) { |
2889caa9 CW |
2016 | err = PTR_ERR(vma); |
2017 | goto err_vma; | |
78a42377 | 2018 | } |
17cabf57 | 2019 | |
59bfa124 | 2020 | if (vma) { |
c7c7372e RP |
2021 | /* |
2022 | * Batch parsed and accepted: | |
2023 | * | |
2024 | * Set the DISPATCH_SECURE bit to remove the NON_SECURE | |
2025 | * bit from MI_BATCH_BUFFER_START commands issued in | |
2026 | * the dispatch_execbuffer implementations. We | |
2027 | * specifically don't want that set on batches the | |
2028 | * command parser has accepted. | |
2029 | */ | |
2889caa9 | 2030 | eb.batch_flags |= I915_DISPATCH_SECURE; |
650bc635 CW |
2031 | eb.batch_start_offset = 0; |
2032 | eb.batch = vma; | |
c7c7372e | 2033 | } |
351e3db2 BV |
2034 | } |
2035 | ||
650bc635 CW |
2036 | if (eb.batch_len == 0) |
2037 | eb.batch_len = eb.batch->size - eb.batch_start_offset; | |
78a42377 | 2038 | |
2889caa9 CW |
2039 | /* |
2040 | * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure | |
d7d4eedd | 2041 | * batch" bit. Hence we need to pin secure batches into the global gtt. |
28cf5415 | 2042 | * hsw should have this fixed, but bdw mucks it up again. */ |
2889caa9 | 2043 | if (eb.batch_flags & I915_DISPATCH_SECURE) { |
058d88c4 | 2044 | struct i915_vma *vma; |
59bfa124 | 2045 | |
da51a1e7 DV |
2046 | /* |
2047 | * So on first glance it looks freaky that we pin the batch here | |
2048 | * outside of the reservation loop. But: | |
2049 | * - The batch is already pinned into the relevant ppgtt, so we | |
2050 | * already have the backing storage fully allocated. | |
2051 | * - No other BO uses the global gtt (well contexts, but meh), | |
fd0753cf | 2052 | * so we don't really have issues with multiple objects not |
da51a1e7 DV |
2053 | * fitting due to fragmentation. |
2054 | * So this is actually safe. | |
2055 | */ | |
2889caa9 | 2056 | vma = i915_gem_object_ggtt_pin(eb.batch->obj, NULL, 0, 0, 0); |
058d88c4 | 2057 | if (IS_ERR(vma)) { |
2889caa9 CW |
2058 | err = PTR_ERR(vma); |
2059 | goto err_vma; | |
058d88c4 | 2060 | } |
d7d4eedd | 2061 | |
650bc635 | 2062 | eb.batch = vma; |
59bfa124 | 2063 | } |
d7d4eedd | 2064 | |
0c8dac88 | 2065 | /* Allocate a request for this batch buffer nice and early. */ |
650bc635 CW |
2066 | eb.request = i915_gem_request_alloc(eb.engine, eb.ctx); |
2067 | if (IS_ERR(eb.request)) { | |
2889caa9 | 2068 | err = PTR_ERR(eb.request); |
0c8dac88 | 2069 | goto err_batch_unpin; |
26827088 | 2070 | } |
0c8dac88 | 2071 | |
fec0445c | 2072 | if (in_fence) { |
2889caa9 CW |
2073 | err = i915_gem_request_await_dma_fence(eb.request, in_fence); |
2074 | if (err < 0) | |
fec0445c CW |
2075 | goto err_request; |
2076 | } | |
2077 | ||
2078 | if (out_fence_fd != -1) { | |
650bc635 | 2079 | out_fence = sync_file_create(&eb.request->fence); |
fec0445c | 2080 | if (!out_fence) { |
2889caa9 | 2081 | err = -ENOMEM; |
fec0445c CW |
2082 | goto err_request; |
2083 | } | |
2084 | } | |
2085 | ||
2889caa9 CW |
2086 | /* |
2087 | * Whilst this request exists, batch_obj will be on the | |
17f298cf CW |
2088 | * active_list, and so will hold the active reference. Only when this |
2089 | * request is retired will the the batch_obj be moved onto the | |
2090 | * inactive_list and lose its active reference. Hence we do not need | |
2091 | * to explicitly hold another reference here. | |
2092 | */ | |
650bc635 | 2093 | eb.request->batch = eb.batch; |
5f19e2bf | 2094 | |
2889caa9 CW |
2095 | trace_i915_gem_request_queue(eb.request, eb.batch_flags); |
2096 | err = eb_submit(&eb); | |
aa9b7810 | 2097 | err_request: |
2889caa9 | 2098 | __i915_add_request(eb.request, err == 0); |
650bc635 | 2099 | add_to_client(eb.request, file); |
c8659efa | 2100 | |
fec0445c | 2101 | if (out_fence) { |
2889caa9 | 2102 | if (err == 0) { |
fec0445c CW |
2103 | fd_install(out_fence_fd, out_fence->file); |
2104 | args->rsvd2 &= GENMASK_ULL(0, 31); /* keep in-fence */ | |
2105 | args->rsvd2 |= (u64)out_fence_fd << 32; | |
2106 | out_fence_fd = -1; | |
2107 | } else { | |
2108 | fput(out_fence->file); | |
2109 | } | |
2110 | } | |
54cf91dc | 2111 | |
0c8dac88 | 2112 | err_batch_unpin: |
2889caa9 | 2113 | if (eb.batch_flags & I915_DISPATCH_SECURE) |
650bc635 | 2114 | i915_vma_unpin(eb.batch); |
2889caa9 CW |
2115 | err_vma: |
2116 | if (eb.exec) | |
2117 | eb_release_vmas(&eb); | |
2118 | i915_gem_context_put(eb.ctx); | |
2119 | err_unlock: | |
54cf91dc | 2120 | mutex_unlock(&dev->struct_mutex); |
2889caa9 | 2121 | err_rpm: |
650bc635 | 2122 | intel_runtime_pm_put(eb.i915); |
2889caa9 | 2123 | eb_destroy(&eb); |
fec0445c CW |
2124 | if (out_fence_fd != -1) |
2125 | put_unused_fd(out_fence_fd); | |
4a04e371 | 2126 | err_in_fence: |
fec0445c | 2127 | dma_fence_put(in_fence); |
2889caa9 | 2128 | return err; |
54cf91dc CW |
2129 | } |
2130 | ||
2131 | /* | |
2132 | * Legacy execbuffer just creates an exec2 list from the original exec object | |
2133 | * list array and passes it to the real function. | |
2134 | */ | |
2135 | int | |
2136 | i915_gem_execbuffer(struct drm_device *dev, void *data, | |
2137 | struct drm_file *file) | |
2138 | { | |
2889caa9 | 2139 | const size_t sz = sizeof(struct drm_i915_gem_exec_object2); |
54cf91dc CW |
2140 | struct drm_i915_gem_execbuffer *args = data; |
2141 | struct drm_i915_gem_execbuffer2 exec2; | |
2142 | struct drm_i915_gem_exec_object *exec_list = NULL; | |
2143 | struct drm_i915_gem_exec_object2 *exec2_list = NULL; | |
2889caa9 CW |
2144 | unsigned int i; |
2145 | int err; | |
54cf91dc | 2146 | |
2889caa9 CW |
2147 | if (args->buffer_count < 1 || args->buffer_count > SIZE_MAX / sz - 1) { |
2148 | DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count); | |
54cf91dc CW |
2149 | return -EINVAL; |
2150 | } | |
2151 | ||
2889caa9 CW |
2152 | exec2.buffers_ptr = args->buffers_ptr; |
2153 | exec2.buffer_count = args->buffer_count; | |
2154 | exec2.batch_start_offset = args->batch_start_offset; | |
2155 | exec2.batch_len = args->batch_len; | |
2156 | exec2.DR1 = args->DR1; | |
2157 | exec2.DR4 = args->DR4; | |
2158 | exec2.num_cliprects = args->num_cliprects; | |
2159 | exec2.cliprects_ptr = args->cliprects_ptr; | |
2160 | exec2.flags = I915_EXEC_RENDER; | |
2161 | i915_execbuffer2_set_context_id(exec2, 0); | |
2162 | ||
2163 | if (!i915_gem_check_execbuffer(&exec2)) | |
2164 | return -EINVAL; | |
2165 | ||
54cf91dc | 2166 | /* Copy in the exec list from userland */ |
2889caa9 CW |
2167 | exec_list = kvmalloc_array(args->buffer_count, sizeof(*exec_list), |
2168 | __GFP_NOWARN | GFP_TEMPORARY); | |
2169 | exec2_list = kvmalloc_array(args->buffer_count + 1, sz, | |
2170 | __GFP_NOWARN | GFP_TEMPORARY); | |
54cf91dc | 2171 | if (exec_list == NULL || exec2_list == NULL) { |
ff240199 | 2172 | DRM_DEBUG("Failed to allocate exec list for %d buffers\n", |
54cf91dc | 2173 | args->buffer_count); |
2098105e MH |
2174 | kvfree(exec_list); |
2175 | kvfree(exec2_list); | |
54cf91dc CW |
2176 | return -ENOMEM; |
2177 | } | |
2889caa9 | 2178 | err = copy_from_user(exec_list, |
3ed605bc | 2179 | u64_to_user_ptr(args->buffers_ptr), |
54cf91dc | 2180 | sizeof(*exec_list) * args->buffer_count); |
2889caa9 | 2181 | if (err) { |
ff240199 | 2182 | DRM_DEBUG("copy %d exec entries failed %d\n", |
2889caa9 | 2183 | args->buffer_count, err); |
2098105e MH |
2184 | kvfree(exec_list); |
2185 | kvfree(exec2_list); | |
54cf91dc CW |
2186 | return -EFAULT; |
2187 | } | |
2188 | ||
2189 | for (i = 0; i < args->buffer_count; i++) { | |
2190 | exec2_list[i].handle = exec_list[i].handle; | |
2191 | exec2_list[i].relocation_count = exec_list[i].relocation_count; | |
2192 | exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr; | |
2193 | exec2_list[i].alignment = exec_list[i].alignment; | |
2194 | exec2_list[i].offset = exec_list[i].offset; | |
f0836b72 | 2195 | if (INTEL_GEN(to_i915(dev)) < 4) |
54cf91dc CW |
2196 | exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE; |
2197 | else | |
2198 | exec2_list[i].flags = 0; | |
2199 | } | |
2200 | ||
2889caa9 CW |
2201 | err = i915_gem_do_execbuffer(dev, file, &exec2, exec2_list); |
2202 | if (exec2.flags & __EXEC_HAS_RELOC) { | |
9aab8bff | 2203 | struct drm_i915_gem_exec_object __user *user_exec_list = |
3ed605bc | 2204 | u64_to_user_ptr(args->buffers_ptr); |
9aab8bff | 2205 | |
54cf91dc | 2206 | /* Copy the new buffer offsets back to the user's exec list. */ |
9aab8bff | 2207 | for (i = 0; i < args->buffer_count; i++) { |
2889caa9 CW |
2208 | if (!(exec2_list[i].offset & UPDATE)) |
2209 | continue; | |
2210 | ||
934acce3 | 2211 | exec2_list[i].offset = |
2889caa9 CW |
2212 | gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); |
2213 | exec2_list[i].offset &= PIN_OFFSET_MASK; | |
2214 | if (__copy_to_user(&user_exec_list[i].offset, | |
2215 | &exec2_list[i].offset, | |
2216 | sizeof(user_exec_list[i].offset))) | |
9aab8bff | 2217 | break; |
54cf91dc CW |
2218 | } |
2219 | } | |
2220 | ||
2098105e MH |
2221 | kvfree(exec_list); |
2222 | kvfree(exec2_list); | |
2889caa9 | 2223 | return err; |
54cf91dc CW |
2224 | } |
2225 | ||
2226 | int | |
2227 | i915_gem_execbuffer2(struct drm_device *dev, void *data, | |
2228 | struct drm_file *file) | |
2229 | { | |
2889caa9 | 2230 | const size_t sz = sizeof(struct drm_i915_gem_exec_object2); |
54cf91dc | 2231 | struct drm_i915_gem_execbuffer2 *args = data; |
2889caa9 CW |
2232 | struct drm_i915_gem_exec_object2 *exec2_list; |
2233 | int err; | |
54cf91dc | 2234 | |
2889caa9 | 2235 | if (args->buffer_count < 1 || args->buffer_count > SIZE_MAX / sz - 1) { |
ff240199 | 2236 | DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count); |
54cf91dc CW |
2237 | return -EINVAL; |
2238 | } | |
2239 | ||
2889caa9 CW |
2240 | if (!i915_gem_check_execbuffer(args)) |
2241 | return -EINVAL; | |
2242 | ||
2243 | /* Allocate an extra slot for use by the command parser */ | |
2244 | exec2_list = kvmalloc_array(args->buffer_count + 1, sz, | |
2245 | __GFP_NOWARN | GFP_TEMPORARY); | |
54cf91dc | 2246 | if (exec2_list == NULL) { |
ff240199 | 2247 | DRM_DEBUG("Failed to allocate exec list for %d buffers\n", |
54cf91dc CW |
2248 | args->buffer_count); |
2249 | return -ENOMEM; | |
2250 | } | |
2889caa9 CW |
2251 | if (copy_from_user(exec2_list, |
2252 | u64_to_user_ptr(args->buffers_ptr), | |
2253 | sizeof(*exec2_list) * args->buffer_count)) { | |
2254 | DRM_DEBUG("copy %d exec entries failed\n", args->buffer_count); | |
2098105e | 2255 | kvfree(exec2_list); |
54cf91dc CW |
2256 | return -EFAULT; |
2257 | } | |
2258 | ||
2889caa9 CW |
2259 | err = i915_gem_do_execbuffer(dev, file, args, exec2_list); |
2260 | ||
2261 | /* | |
2262 | * Now that we have begun execution of the batchbuffer, we ignore | |
2263 | * any new error after this point. Also given that we have already | |
2264 | * updated the associated relocations, we try to write out the current | |
2265 | * object locations irrespective of any error. | |
2266 | */ | |
2267 | if (args->flags & __EXEC_HAS_RELOC) { | |
d593d992 | 2268 | struct drm_i915_gem_exec_object2 __user *user_exec_list = |
2889caa9 CW |
2269 | u64_to_user_ptr(args->buffers_ptr); |
2270 | unsigned int i; | |
9aab8bff | 2271 | |
2889caa9 CW |
2272 | /* Copy the new buffer offsets back to the user's exec list. */ |
2273 | user_access_begin(); | |
9aab8bff | 2274 | for (i = 0; i < args->buffer_count; i++) { |
2889caa9 CW |
2275 | if (!(exec2_list[i].offset & UPDATE)) |
2276 | continue; | |
2277 | ||
934acce3 | 2278 | exec2_list[i].offset = |
2889caa9 CW |
2279 | gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); |
2280 | unsafe_put_user(exec2_list[i].offset, | |
2281 | &user_exec_list[i].offset, | |
2282 | end_user); | |
54cf91dc | 2283 | } |
2889caa9 CW |
2284 | end_user: |
2285 | user_access_end(); | |
54cf91dc CW |
2286 | } |
2287 | ||
2889caa9 | 2288 | args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS; |
2098105e | 2289 | kvfree(exec2_list); |
2889caa9 | 2290 | return err; |
54cf91dc | 2291 | } |