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1 | /* |
2 | * SPDX-License-Identifier: MIT | |
3 | * | |
4 | * Copyright © 2019 Intel Corporation | |
5 | */ | |
6 | ||
7 | #ifndef __I915_GEM_CONTEXT_TYPES_H__ | |
8 | #define __I915_GEM_CONTEXT_TYPES_H__ | |
9 | ||
10 | #include <linux/atomic.h> | |
11 | #include <linux/list.h> | |
12 | #include <linux/llist.h> | |
13 | #include <linux/kref.h> | |
14 | #include <linux/mutex.h> | |
15 | #include <linux/radix-tree.h> | |
c4d52feb | 16 | #include <linux/rbtree.h> |
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17 | #include <linux/rcupdate.h> |
18 | #include <linux/types.h> | |
19 | ||
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20 | #include "gt/intel_context_types.h" |
21 | ||
39e2f501 | 22 | #include "i915_scheduler.h" |
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23 | |
24 | struct pid; | |
25 | ||
26 | struct drm_i915_private; | |
27 | struct drm_i915_file_private; | |
28 | struct i915_hw_ppgtt; | |
29 | struct i915_timeline; | |
30 | struct intel_ring; | |
31 | ||
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32 | struct i915_gem_engines { |
33 | struct rcu_work rcu; | |
34 | struct drm_i915_private *i915; | |
35 | unsigned int num_engines; | |
36 | struct intel_context *engines[]; | |
37 | }; | |
38 | ||
39 | struct i915_gem_engines_iter { | |
40 | unsigned int idx; | |
41 | const struct i915_gem_engines *engines; | |
42 | }; | |
43 | ||
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44 | /** |
45 | * struct i915_gem_context - client state | |
46 | * | |
47 | * The struct i915_gem_context represents the combined view of the driver and | |
48 | * logical hardware state for a particular client. | |
49 | */ | |
50 | struct i915_gem_context { | |
51 | /** i915: i915 device backpointer */ | |
52 | struct drm_i915_private *i915; | |
53 | ||
54 | /** file_priv: owning file descriptor */ | |
55 | struct drm_i915_file_private *file_priv; | |
56 | ||
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57 | /** |
58 | * @engines: User defined engines for this context | |
59 | * | |
60 | * Various uAPI offer the ability to lookup up an | |
61 | * index from this array to select an engine operate on. | |
62 | * | |
63 | * Multiple logically distinct instances of the same engine | |
64 | * may be defined in the array, as well as composite virtual | |
65 | * engines. | |
66 | * | |
67 | * Execbuf uses the I915_EXEC_RING_MASK as an index into this | |
68 | * array to select which HW context + engine to execute on. For | |
69 | * the default array, the user_ring_map[] is used to translate | |
70 | * the legacy uABI onto the approprate index (e.g. both | |
71 | * I915_EXEC_DEFAULT and I915_EXEC_RENDER select the same | |
72 | * context, and I915_EXEC_BSD is weird). For a use defined | |
73 | * array, execbuf uses I915_EXEC_RING_MASK as a plain index. | |
74 | * | |
75 | * User defined by I915_CONTEXT_PARAM_ENGINE (when the | |
76 | * CONTEXT_USER_ENGINES flag is set). | |
77 | */ | |
78 | struct i915_gem_engines __rcu *engines; | |
79 | struct mutex engines_mutex; /* guards writes to engines */ | |
80 | ||
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81 | struct i915_timeline *timeline; |
82 | ||
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83 | /** |
84 | * @ppgtt: unique address space (GTT) | |
85 | * | |
86 | * In full-ppgtt mode, each context has its own address space ensuring | |
87 | * complete seperation of one client from all others. | |
88 | * | |
89 | * In other modes, this is a NULL pointer with the expectation that | |
90 | * the caller uses the shared global GTT. | |
91 | */ | |
92 | struct i915_hw_ppgtt *ppgtt; | |
93 | ||
94 | /** | |
95 | * @pid: process id of creator | |
96 | * | |
97 | * Note that who created the context may not be the principle user, | |
98 | * as the context may be shared across a local socket. However, | |
99 | * that should only affect the default context, all contexts created | |
100 | * explicitly by the client are expected to be isolated. | |
101 | */ | |
102 | struct pid *pid; | |
103 | ||
104 | /** | |
105 | * @name: arbitrary name | |
106 | * | |
107 | * A name is constructed for the context from the creator's process | |
108 | * name, pid and user handle in order to uniquely identify the | |
109 | * context in messages. | |
110 | */ | |
111 | const char *name; | |
112 | ||
113 | /** link: place with &drm_i915_private.context_list */ | |
114 | struct list_head link; | |
115 | struct llist_node free_link; | |
116 | ||
117 | /** | |
118 | * @ref: reference count | |
119 | * | |
120 | * A reference to a context is held by both the client who created it | |
121 | * and on each request submitted to the hardware using the request | |
122 | * (to ensure the hardware has access to the state until it has | |
123 | * finished all pending writes). See i915_gem_context_get() and | |
124 | * i915_gem_context_put() for access. | |
125 | */ | |
126 | struct kref ref; | |
127 | ||
128 | /** | |
129 | * @rcu: rcu_head for deferred freeing. | |
130 | */ | |
131 | struct rcu_head rcu; | |
132 | ||
133 | /** | |
134 | * @user_flags: small set of booleans controlled by the user | |
135 | */ | |
136 | unsigned long user_flags; | |
137 | #define UCONTEXT_NO_ZEROMAP 0 | |
138 | #define UCONTEXT_NO_ERROR_CAPTURE 1 | |
139 | #define UCONTEXT_BANNABLE 2 | |
140 | #define UCONTEXT_RECOVERABLE 3 | |
141 | ||
142 | /** | |
143 | * @flags: small set of booleans | |
144 | */ | |
145 | unsigned long flags; | |
146 | #define CONTEXT_BANNED 0 | |
147 | #define CONTEXT_CLOSED 1 | |
148 | #define CONTEXT_FORCE_SINGLE_SUBMISSION 2 | |
149 | ||
150 | /** | |
151 | * @hw_id: - unique identifier for the context | |
152 | * | |
153 | * The hardware needs to uniquely identify the context for a few | |
154 | * functions like fault reporting, PASID, scheduling. The | |
155 | * &drm_i915_private.context_hw_ida is used to assign a unqiue | |
156 | * id for the lifetime of the context. | |
157 | * | |
158 | * @hw_id_pin_count: - number of times this context had been pinned | |
159 | * for use (should be, at most, once per engine). | |
160 | * | |
161 | * @hw_id_link: - all contexts with an assigned id are tracked | |
162 | * for possible repossession. | |
163 | */ | |
164 | unsigned int hw_id; | |
165 | atomic_t hw_id_pin_count; | |
166 | struct list_head hw_id_link; | |
167 | ||
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168 | struct mutex mutex; |
169 | ||
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170 | struct i915_sched_attr sched; |
171 | ||
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172 | /** ring_size: size for allocating the per-engine ring buffer */ |
173 | u32 ring_size; | |
174 | /** desc_template: invariant fields for the HW context descriptor */ | |
175 | u32 desc_template; | |
176 | ||
177 | /** guilty_count: How many times this context has caused a GPU hang. */ | |
178 | atomic_t guilty_count; | |
179 | /** | |
180 | * @active_count: How many times this context was active during a GPU | |
181 | * hang, but did not cause it. | |
182 | */ | |
183 | atomic_t active_count; | |
184 | ||
185 | /** | |
186 | * @hang_timestamp: The last time(s) this context caused a GPU hang | |
187 | */ | |
188 | unsigned long hang_timestamp[2]; | |
189 | #define CONTEXT_FAST_HANG_JIFFIES (120 * HZ) /* 3 hangs within 120s? Banned! */ | |
190 | ||
191 | /** remap_slice: Bitmask of cache lines that need remapping */ | |
192 | u8 remap_slice; | |
193 | ||
194 | /** handles_vma: rbtree to look up our context specific obj/vma for | |
195 | * the user handle. (user handles are per fd, but the binding is | |
196 | * per vm, which may be one per context or shared with the global GTT) | |
197 | */ | |
198 | struct radix_tree_root handles_vma; | |
199 | ||
200 | /** handles_list: reverse list of all the rbtree entries in use for | |
201 | * this context, which allows us to free all the allocations on | |
202 | * context close. | |
203 | */ | |
204 | struct list_head handles_list; | |
205 | }; | |
206 | ||
207 | #endif /* __I915_GEM_CONTEXT_TYPES_H__ */ |