[linux-2.6-block.git] / drivers / gpu / drm / i915 / i915_drv.c

/* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
 */
/*
 *
 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#include <linux/device.h>
#include "drmP.h"
#include "drm.h"
#include "i915_drm.h"
#include "i915_drv.h"

#include <linux/console.h>
#include "drm_crtc_helper.h"

static int i915_modeset = -1;
module_param_named(modeset, i915_modeset, int, 0400);

unsigned int i915_fbpercrtc = 0;
module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);

unsigned int i915_powersave = 1;
module_param_named(powersave, i915_powersave, int, 0400);

unsigned int i915_lvds_downclock = 0;
module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);

static struct drm_driver driver;
extern int intel_agp_enabled;

#define INTEL_VGA_DEVICE(id, info) {		\
	.class = PCI_CLASS_DISPLAY_VGA << 8,	\
	.class_mask = 0xffff00,			\
	.vendor = 0x8086,			\
	.device = id,				\
	.subvendor = PCI_ANY_ID,		\
	.subdevice = PCI_ANY_ID,		\
	.driver_data = (unsigned long) info }

const static struct intel_device_info intel_i830_info = {
	.is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
};

const static struct intel_device_info intel_845g_info = {
	.is_i8xx = 1,
};

const static struct intel_device_info intel_i85x_info = {
	.is_i8xx = 1, .is_i85x = 1, .is_mobile = 1,
	.cursor_needs_physical = 1,
};

const static struct intel_device_info intel_i865g_info = {
	.is_i8xx = 1,
};

const static struct intel_device_info intel_i915g_info = {
	.is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i915gm_info = {
	.is_i9xx = 1,  .is_mobile = 1,
	.cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i945g_info = {
	.is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i945gm_info = {
	.is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1,
	.has_hotplug = 1, .cursor_needs_physical = 1,
};

const static struct intel_device_info intel_i965g_info = {
	.is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
};

const static struct intel_device_info intel_i965gm_info = {
	.is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
	.is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_g33_info = {
	.is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_g45_info = {
	.is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	.has_pipe_cxsr = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_gm45_info = {
	.is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
	.is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
	.has_pipe_cxsr = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_pineview_info = {
	.is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
	.need_gfx_hws = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_ironlake_d_info = {
	.is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	.has_pipe_cxsr = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_ironlake_m_info = {
	.is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
	.need_gfx_hws = 1, .has_rc6 = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_sandybridge_d_info = {
	.is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	.has_hotplug = 1, .is_gen6 = 1,
};

const static struct intel_device_info intel_sandybridge_m_info = {
	.is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	.has_hotplug = 1, .is_gen6 = 1,
};

const static struct pci_device_id pciidlist[] = {
	INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
	INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
	INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
	INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
	INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
	INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
	INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
	INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
	INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
	INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
	INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
	INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
	INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
	INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
	INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
	INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
	INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
	INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
	INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
	INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
	INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
	INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
	INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
	INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
	INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
	INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
	INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
	INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
	INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
	INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
	INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
	INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
	{0, 0, 0}
};

#if defined(CONFIG_DRM_I915_KMS)
MODULE_DEVICE_TABLE(pci, pciidlist);
#endif

static int i915_drm_freeze(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

	pci_save_state(dev->pdev);

	/* If KMS is active, we do the leavevt stuff here */
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
		int error = i915_gem_idle(dev);
		if (error) {
			dev_err(&dev->pdev->dev,
				"GEM idle failed, resume might fail\n");
			return error;
		}
		drm_irq_uninstall(dev);
	}

	i915_save_state(dev);

	intel_opregion_free(dev, 1);

	/* Modeset on resume, not lid events */
	dev_priv->modeset_on_lid = 0;

	return 0;
}

int i915_suspend(struct drm_device *dev, pm_message_t state)
{
	int error;

	if (!dev || !dev->dev_private) {
		DRM_ERROR("dev: %p\n", dev);
		DRM_ERROR("DRM not initialized, aborting suspend.\n");
		return -ENODEV;
	}

	if (state.event == PM_EVENT_PRETHAW)
		return 0;

	error = i915_drm_freeze(dev);
	if (error)
		return error;

	if (state.event == PM_EVENT_SUSPEND) {
		/* Shut down the device */
		pci_disable_device(dev->pdev);
		pci_set_power_state(dev->pdev, PCI_D3hot);
	}

	return 0;
}

static int i915_drm_thaw(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	int error = 0;

	i915_restore_state(dev);

	intel_opregion_init(dev, 1);

	/* KMS EnterVT equivalent */
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
		mutex_lock(&dev->struct_mutex);
		dev_priv->mm.suspended = 0;

		error = i915_gem_init_ringbuffer(dev);
		mutex_unlock(&dev->struct_mutex);

		drm_irq_install(dev);

		/* Resume the modeset for every activated CRTC */
		drm_helper_resume_force_mode(dev);
	}

	dev_priv->modeset_on_lid = 0;

	return error;
}

int i915_resume(struct drm_device *dev)
{
	if (pci_enable_device(dev->pdev))
		return -EIO;

	pci_set_master(dev->pdev);

	return i915_drm_thaw(dev);
}

/**
 * i965_reset - reset chip after a hang
 * @dev: drm device to reset
 * @flags: reset domains
 *
 * Reset the chip.  Useful if a hang is detected. Returns zero on successful
 * reset or otherwise an error code.
 *
 * Procedure is fairly simple:
 *   - reset the chip using the reset reg
 *   - re-init context state
 *   - re-init hardware status page
 *   - re-init ring buffer
 *   - re-init interrupt state
 *   - re-init display
 */
int i965_reset(struct drm_device *dev, u8 flags)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	unsigned long timeout;
	u8 gdrst;
	/*
	 * We really should only reset the display subsystem if we actually
	 * need to
	 */
	bool need_display = true;

	mutex_lock(&dev->struct_mutex);

	/*
	 * Clear request list
	 */
	i915_gem_retire_requests(dev);

	if (need_display)
		i915_save_display(dev);

	if (IS_I965G(dev) || IS_G4X(dev)) {
		/*
		 * Set the domains we want to reset, then the reset bit (bit 0).
		 * Clear the reset bit after a while and wait for hardware status
		 * bit (bit 1) to be set
		 */
		pci_read_config_byte(dev->pdev, GDRST, &gdrst);
		pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
		udelay(50);
		pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);

		/* ...we don't want to loop forever though, 500ms should be plenty */
	       timeout = jiffies + msecs_to_jiffies(500);
		do {
			udelay(100);
			pci_read_config_byte(dev->pdev, GDRST, &gdrst);
		} while ((gdrst & 0x1) && time_after(timeout, jiffies));

		if (gdrst & 0x1) {
			WARN(true, "i915: Failed to reset chip\n");
			mutex_unlock(&dev->struct_mutex);
			return -EIO;
		}
	} else {
		DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
		return -ENODEV;
	}

	/* Ok, now get things going again... */

	/*
	 * Everything depends on having the GTT running, so we need to start
	 * there.  Fortunately we don't need to do this unless we reset the
	 * chip at a PCI level.
	 *
	 * Next we need to restore the context, but we don't use those
	 * yet either...
	 *
	 * Ring buffer needs to be re-initialized in the KMS case, or if X
	 * was running at the time of the reset (i.e. we weren't VT
	 * switched away).
	 */
	if (drm_core_check_feature(dev, DRIVER_MODESET) ||
	    !dev_priv->mm.suspended) {
		drm_i915_ring_buffer_t *ring = &dev_priv->ring;
		struct drm_gem_object *obj = ring->ring_obj;
		struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
		dev_priv->mm.suspended = 0;

		/* Stop the ring if it's running. */
		I915_WRITE(PRB0_CTL, 0);
		I915_WRITE(PRB0_TAIL, 0);
		I915_WRITE(PRB0_HEAD, 0);

		/* Initialize the ring. */
		I915_WRITE(PRB0_START, obj_priv->gtt_offset);
		I915_WRITE(PRB0_CTL,
			   ((obj->size - 4096) & RING_NR_PAGES) |
			   RING_NO_REPORT |
			   RING_VALID);
		if (!drm_core_check_feature(dev, DRIVER_MODESET))
			i915_kernel_lost_context(dev);
		else {
			ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
			ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
			ring->space = ring->head - (ring->tail + 8);
			if (ring->space < 0)
				ring->space += ring->Size;
		}

		mutex_unlock(&dev->struct_mutex);
		drm_irq_uninstall(dev);
		drm_irq_install(dev);
		mutex_lock(&dev->struct_mutex);
	}

	/*
	 * Display needs restore too...
	 */
	if (need_display)
		i915_restore_display(dev);

	mutex_unlock(&dev->struct_mutex);
	return 0;
}


static int __devinit
i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	return drm_get_dev(pdev, ent, &driver);
}

static void
i915_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

static int i915_pm_suspend(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);
	int error;

	if (!drm_dev || !drm_dev->dev_private) {
		dev_err(dev, "DRM not initialized, aborting suspend.\n");
		return -ENODEV;
	}

	error = i915_drm_freeze(drm_dev);
	if (error)
		return error;

	pci_disable_device(pdev);
	pci_set_power_state(pdev, PCI_D3hot);

	return 0;
}

static int i915_pm_resume(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	return i915_resume(drm_dev);
}

static int i915_pm_freeze(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	if (!drm_dev || !drm_dev->dev_private) {
		dev_err(dev, "DRM not initialized, aborting suspend.\n");
		return -ENODEV;
	}

	return i915_drm_freeze(drm_dev);
}

static int i915_pm_thaw(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	return i915_drm_thaw(drm_dev);
}

static int i915_pm_poweroff(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	struct drm_device *drm_dev = pci_get_drvdata(pdev);

	return i915_drm_freeze(drm_dev);
}

const struct dev_pm_ops i915_pm_ops = {
     .suspend = i915_pm_suspend,
     .resume = i915_pm_resume,
     .freeze = i915_pm_freeze,
     .thaw = i915_pm_thaw,
     .poweroff = i915_pm_poweroff,
     .restore = i915_pm_resume,
};

static struct vm_operations_struct i915_gem_vm_ops = {
	.fault = i915_gem_fault,
	.open = drm_gem_vm_open,
	.close = drm_gem_vm_close,
};

static struct drm_driver driver = {
	/* don't use mtrr's here, the Xserver or user space app should
	 * deal with them for intel hardware.
	 */
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
	.load = i915_driver_load,
	.unload = i915_driver_unload,
	.open = i915_driver_open,
	.lastclose = i915_driver_lastclose,
	.preclose = i915_driver_preclose,
	.postclose = i915_driver_postclose,

	/* Used in place of i915_pm_ops for non-DRIVER_MODESET */
	.suspend = i915_suspend,
	.resume = i915_resume,

	.device_is_agp = i915_driver_device_is_agp,
	.enable_vblank = i915_enable_vblank,
	.disable_vblank = i915_disable_vblank,
	.irq_preinstall = i915_driver_irq_preinstall,
	.irq_postinstall = i915_driver_irq_postinstall,
	.irq_uninstall = i915_driver_irq_uninstall,
	.irq_handler = i915_driver_irq_handler,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.get_map_ofs = drm_core_get_map_ofs,
	.get_reg_ofs = drm_core_get_reg_ofs,
	.master_create = i915_master_create,
	.master_destroy = i915_master_destroy,
#if defined(CONFIG_DEBUG_FS)
	.debugfs_init = i915_debugfs_init,
	.debugfs_cleanup = i915_debugfs_cleanup,
#endif
	.gem_init_object = i915_gem_init_object,
	.gem_free_object = i915_gem_free_object,
	.gem_vm_ops = &i915_gem_vm_ops,
	.ioctls = i915_ioctls,
	.fops = {
		 .owner = THIS_MODULE,
		 .open = drm_open,
		 .release = drm_release,
		 .unlocked_ioctl = drm_ioctl,
		 .mmap = drm_gem_mmap,
		 .poll = drm_poll,
		 .fasync = drm_fasync,
		 .read = drm_read,
#ifdef CONFIG_COMPAT
		 .compat_ioctl = i915_compat_ioctl,
#endif
	},

	.pci_driver = {
		 .name = DRIVER_NAME,
		 .id_table = pciidlist,
		 .probe = i915_pci_probe,
		 .remove = i915_pci_remove,
		 .driver.pm = &i915_pm_ops,
	},

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

static int __init i915_init(void)
{
	if (!intel_agp_enabled) {
		DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
		return -ENODEV;
	}

	driver.num_ioctls = i915_max_ioctl;

	i915_gem_shrinker_init();

	/*
	 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
	 * explicitly disabled with the module pararmeter.
	 *
	 * Otherwise, just follow the parameter (defaulting to off).
	 *
	 * Allow optional vga_text_mode_force boot option to override
	 * the default behavior.
	 */
#if defined(CONFIG_DRM_I915_KMS)
	if (i915_modeset != 0)
		driver.driver_features |= DRIVER_MODESET;
#endif
	if (i915_modeset == 1)
		driver.driver_features |= DRIVER_MODESET;

#ifdef CONFIG_VGA_CONSOLE
	if (vgacon_text_force() && i915_modeset == -1)
		driver.driver_features &= ~DRIVER_MODESET;
#endif

	if (!(driver.driver_features & DRIVER_MODESET)) {
		driver.suspend = i915_suspend;
		driver.resume = i915_resume;
	}

	return drm_init(&driver);
}

static void __exit i915_exit(void)
{
	i915_gem_shrinker_exit();
	drm_exit(&driver);
}

module_init(i915_init);
module_exit(i915_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL and additional rights");
Commit	Line	Data
1da177e4 LT	1	/* i915_drv.c -- i830,i845,i855,i865,i915 driver -- linux-c --
1da177e4 LT	2	*/
0d6aa60b	3	/*
bc54fd1a	4	*
1da177e4 LT	5	* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
1da177e4 LT	6	* All Rights Reserved.
bc54fd1a DA	7	*
	8	* Permission is hereby granted, free of charge, to any person obtaining a
	9	* copy of this software and associated documentation files (the
	10	* "Software"), to deal in the Software without restriction, including
	11	* without limitation the rights to use, copy, modify, merge, publish,
	12	* distribute, sub license, and/or sell copies of the Software, and to
	13	* permit persons to whom the Software is furnished to do so, subject to
	14	* the following conditions:
	15	*
	16	* The above copyright notice and this permission notice (including the
	17	* next paragraph) shall be included in all copies or substantial portions
	18	* of the Software.
	19	*
	20	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
	21	* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	22	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
	23	* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
	24	* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
	25	* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
	26	* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
	27	*
0d6aa60b	28	*/
1da177e4	29
5669fcac	30	#include <linux/device.h>
1da177e4 LT	31	#include "drmP.h"
	32	#include "drm.h"
	33	#include "i915_drm.h"
	34	#include "i915_drv.h"
	35
79e53945	36	#include <linux/console.h>
354ff967	37	#include "drm_crtc_helper.h"
79e53945	38
d6073d77	39	static int i915_modeset = -1;
79e53945 JB	40	module_param_named(modeset, i915_modeset, int, 0400);
	41
	42	unsigned int i915_fbpercrtc = 0;
	43	module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
1da177e4	44
652c393a JB	45	unsigned int i915_powersave = 1;
	46	module_param_named(powersave, i915_powersave, int, 0400);
	47
33814341 JB	48	unsigned int i915_lvds_downclock = 0;
	49	module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
	50
112b715e	51	static struct drm_driver driver;
1f7a6e37	52	extern int intel_agp_enabled;
112b715e	53
cfdf1fa2	54	#define INTEL_VGA_DEVICE(id, info) { \
49ae35f2 KH	55	.class = PCI_CLASS_DISPLAY_VGA << 8, \
	56	.class_mask = 0xffff00, \
	57	.vendor = 0x8086, \
	58	.device = id, \
	59	.subvendor = PCI_ANY_ID, \
	60	.subdevice = PCI_ANY_ID, \
cfdf1fa2 KH	61	.driver_data = (unsigned long) info }
	62
	63	const static struct intel_device_info intel_i830_info = {
b295d1b6	64	.is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
cfdf1fa2 KH	65	};
	66
	67	const static struct intel_device_info intel_845g_info = {
	68	.is_i8xx = 1,
	69	};
	70
	71	const static struct intel_device_info intel_i85x_info = {
5ce8ba7c AJ	72	.is_i8xx = 1, .is_i85x = 1, .is_mobile = 1,
5ce8ba7c AJ	73	.cursor_needs_physical = 1,
cfdf1fa2 KH	74	};
	75
	76	const static struct intel_device_info intel_i865g_info = {
	77	.is_i8xx = 1,
	78	};
	79
	80	const static struct intel_device_info intel_i915g_info = {
b295d1b6	81	.is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
cfdf1fa2 KH	82	};
cfdf1fa2 KH	83	const static struct intel_device_info intel_i915gm_info = {
8d06a1e1	84	.is_i9xx = 1, .is_mobile = 1,
b295d1b6	85	.cursor_needs_physical = 1,
cfdf1fa2 KH	86	};
cfdf1fa2 KH	87	const static struct intel_device_info intel_i945g_info = {
b295d1b6	88	.is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
cfdf1fa2 KH	89	};
cfdf1fa2 KH	90	const static struct intel_device_info intel_i945gm_info = {
8d06a1e1	91	.is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1,
b295d1b6	92	.has_hotplug = 1, .cursor_needs_physical = 1,
cfdf1fa2 KH	93	};
	94
	95	const static struct intel_device_info intel_i965g_info = {
	96	.is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
	97	};
	98
	99	const static struct intel_device_info intel_i965gm_info = {
	100	.is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
	101	.is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
	102	.has_hotplug = 1,
	103	};
	104
	105	const static struct intel_device_info intel_g33_info = {
	106	.is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	107	.has_hotplug = 1,
	108	};
	109
	110	const static struct intel_device_info intel_g45_info = {
	111	.is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	112	.has_pipe_cxsr = 1,
	113	.has_hotplug = 1,
	114	};
	115
	116	const static struct intel_device_info intel_gm45_info = {
	117	.is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
	118	.is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
	119	.has_pipe_cxsr = 1,
	120	.has_hotplug = 1,
	121	};
	122
	123	const static struct intel_device_info intel_pineview_info = {
	124	.is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
8a6c77d6	125	.need_gfx_hws = 1,
cfdf1fa2 KH	126	.has_hotplug = 1,
	127	};
	128
	129	const static struct intel_device_info intel_ironlake_d_info = {
	130	.is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	131	.has_pipe_cxsr = 1,
	132	.has_hotplug = 1,
	133	};
	134
	135	const static struct intel_device_info intel_ironlake_m_info = {
	136	.is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
	137	.need_gfx_hws = 1, .has_rc6 = 1,
	138	.has_hotplug = 1,
	139	};
	140
f6e450a6 EA	141	const static struct intel_device_info intel_sandybridge_d_info = {
f6e450a6 EA	142	.is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
59f2d0fc	143	.has_hotplug = 1, .is_gen6 = 1,
f6e450a6 EA	144	};
f6e450a6 EA	145
a13e4093	146	const static struct intel_device_info intel_sandybridge_m_info = {
faa7bde6	147	.is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, .need_gfx_hws = 1,
59f2d0fc	148	.has_hotplug = 1, .is_gen6 = 1,
a13e4093 EA	149	};
a13e4093 EA	150
cfdf1fa2 KH	151	const static struct pci_device_id pciidlist[] = {
	152	INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
	153	INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
	154	INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
5ce8ba7c	155	INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
cfdf1fa2 KH	156	INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
	157	INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
	158	INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
	159	INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
	160	INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
	161	INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
	162	INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
	163	INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
	164	INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
	165	INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
	166	INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
	167	INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
	168	INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
	169	INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
	170	INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
	171	INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
	172	INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
	173	INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
	174	INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
	175	INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
	176	INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
	177	INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
	178	INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
	179	INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
	180	INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
	181	INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
f6e450a6	182	INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
a13e4093	183	INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
49ae35f2	184	{0, 0, 0}
1da177e4 LT	185	};
1da177e4 LT	186
79e53945 JB	187	#if defined(CONFIG_DRM_I915_KMS)
	188	MODULE_DEVICE_TABLE(pci, pciidlist);
	189	#endif
	190
84b79f8d	191	static int i915_drm_freeze(struct drm_device *dev)
ba8bbcf6	192	{
61caf87c RW	193	struct drm_i915_private *dev_priv = dev->dev_private;
61caf87c RW	194
ba8bbcf6	195	pci_save_state(dev->pdev);
ba8bbcf6	196
5669fcac	197	/* If KMS is active, we do the leavevt stuff here */
226485e9	198	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
84b79f8d RW	199	int error = i915_gem_idle(dev);
84b79f8d RW	200	if (error) {
226485e9	201	dev_err(&dev->pdev->dev,
84b79f8d RW	202	"GEM idle failed, resume might fail\n");
	203	return error;
	204	}
226485e9	205	drm_irq_uninstall(dev);
5669fcac JB	206	}
5669fcac JB	207
9e06dd39 JB	208	i915_save_state(dev);
9e06dd39 JB	209
3b1c1c11	210	intel_opregion_free(dev, 1);
8ee1c3db	211
84b79f8d RW	212	/* Modeset on resume, not lid events */
84b79f8d RW	213	dev_priv->modeset_on_lid = 0;
61caf87c RW	214
61caf87c RW	215	return 0;
84b79f8d RW	216	}
84b79f8d RW	217
6a9ee8af	218	int i915_suspend(struct drm_device *dev, pm_message_t state)
84b79f8d RW	219	{
	220	int error;
	221
	222	if (!dev \|\| !dev->dev_private) {
	223	DRM_ERROR("dev: %p\n", dev);
	224	DRM_ERROR("DRM not initialized, aborting suspend.\n");
	225	return -ENODEV;
	226	}
	227
	228	if (state.event == PM_EVENT_PRETHAW)
	229	return 0;
	230
	231	error = i915_drm_freeze(dev);
	232	if (error)
	233	return error;
	234
b932ccb5 DA	235	if (state.event == PM_EVENT_SUSPEND) {
	236	/* Shut down the device */
	237	pci_disable_device(dev->pdev);
	238	pci_set_power_state(dev->pdev, PCI_D3hot);
	239	}
ba8bbcf6 JB	240
	241	return 0;
	242	}
	243
84b79f8d	244	static int i915_drm_thaw(struct drm_device *dev)
ba8bbcf6	245	{
5669fcac	246	struct drm_i915_private *dev_priv = dev->dev_private;
84b79f8d	247	int error = 0;
8ee1c3db	248
61caf87c RW	249	i915_restore_state(dev);
	250
	251	intel_opregion_init(dev, 1);
	252
5669fcac JB	253	/* KMS EnterVT equivalent */
	254	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
	255	mutex_lock(&dev->struct_mutex);
	256	dev_priv->mm.suspended = 0;
	257
84b79f8d	258	error = i915_gem_init_ringbuffer(dev);
5669fcac	259	mutex_unlock(&dev->struct_mutex);
226485e9 JB	260
226485e9 JB	261	drm_irq_install(dev);
84b79f8d	262
354ff967 ZY	263	/* Resume the modeset for every activated CRTC */
	264	drm_helper_resume_force_mode(dev);
	265	}
5669fcac	266
c9354c85	267	dev_priv->modeset_on_lid = 0;
06891e27	268
84b79f8d RW	269	return error;
	270	}
	271
6a9ee8af	272	int i915_resume(struct drm_device *dev)
84b79f8d RW	273	{
	274	if (pci_enable_device(dev->pdev))
	275	return -EIO;
	276
	277	pci_set_master(dev->pdev);
	278
84b79f8d	279	return i915_drm_thaw(dev);
ba8bbcf6 JB	280	}
ba8bbcf6 JB	281
11ed50ec BG	282	/**
	283	* i965_reset - reset chip after a hang
	284	* @dev: drm device to reset
	285	* @flags: reset domains
	286	*
	287	* Reset the chip. Useful if a hang is detected. Returns zero on successful
	288	* reset or otherwise an error code.
	289	*
	290	* Procedure is fairly simple:
	291	* - reset the chip using the reset reg
	292	* - re-init context state
	293	* - re-init hardware status page
	294	* - re-init ring buffer
	295	* - re-init interrupt state
	296	* - re-init display
	297	*/
	298	int i965_reset(struct drm_device *dev, u8 flags)
	299	{
	300	drm_i915_private_t *dev_priv = dev->dev_private;
	301	unsigned long timeout;
	302	u8 gdrst;
	303	/*
	304	* We really should only reset the display subsystem if we actually
	305	* need to
	306	*/
	307	bool need_display = true;
	308
	309	mutex_lock(&dev->struct_mutex);
	310
	311	/*
	312	* Clear request list
	313	*/
	314	i915_gem_retire_requests(dev);
	315
	316	if (need_display)
	317	i915_save_display(dev);
	318
	319	if (IS_I965G(dev) \|\| IS_G4X(dev)) {
	320	/*
	321	* Set the domains we want to reset, then the reset bit (bit 0).
	322	* Clear the reset bit after a while and wait for hardware status
	323	* bit (bit 1) to be set
	324	*/
	325	pci_read_config_byte(dev->pdev, GDRST, &gdrst);
	326	pci_write_config_byte(dev->pdev, GDRST, gdrst \| flags \| ((flags == GDRST_FULL) ? 0x1 : 0x0));
	327	udelay(50);
	328	pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
	329
	330	/* ...we don't want to loop forever though, 500ms should be plenty */
	331	timeout = jiffies + msecs_to_jiffies(500);
	332	do {
	333	udelay(100);
	334	pci_read_config_byte(dev->pdev, GDRST, &gdrst);
	335	} while ((gdrst & 0x1) && time_after(timeout, jiffies));
	336
	337	if (gdrst & 0x1) {
	338	WARN(true, "i915: Failed to reset chip\n");
	339	mutex_unlock(&dev->struct_mutex);
	340	return -EIO;
	341	}
	342	} else {
	343	DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
	344	return -ENODEV;
	345	}
346
347	/* Ok, now get things going again... */
348
349	/*
350	* Everything depends on having the GTT running, so we need to start
351	* there. Fortunately we don't need to do this unless we reset the
352	* chip at a PCI level.
353	*
354	* Next we need to restore the context, but we don't use those
355	* yet either...
356	*
357	* Ring buffer needs to be re-initialized in the KMS case, or if X
358	* was running at the time of the reset (i.e. we weren't VT
359	* switched away).
360	*/
361	if (drm_core_check_feature(dev, DRIVER_MODESET) \|\|
362	!dev_priv->mm.suspended) {
363	drm_i915_ring_buffer_t *ring = &dev_priv->ring;
364	struct drm_gem_object *obj = ring->ring_obj;
23010e43	365	struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
11ed50ec BG	366	dev_priv->mm.suspended = 0;
	367
	368	/* Stop the ring if it's running. */
	369	I915_WRITE(PRB0_CTL, 0);
	370	I915_WRITE(PRB0_TAIL, 0);
	371	I915_WRITE(PRB0_HEAD, 0);
	372
	373	/* Initialize the ring. */
	374	I915_WRITE(PRB0_START, obj_priv->gtt_offset);
	375	I915_WRITE(PRB0_CTL,
	376	((obj->size - 4096) & RING_NR_PAGES) \|
	377	RING_NO_REPORT \|
	378	RING_VALID);
	379	if (!drm_core_check_feature(dev, DRIVER_MODESET))
	380	i915_kernel_lost_context(dev);
	381	else {
	382	ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
	383	ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
	384	ring->space = ring->head - (ring->tail + 8);
	385	if (ring->space < 0)
	386	ring->space += ring->Size;
	387	}
	388
	389	mutex_unlock(&dev->struct_mutex);
	390	drm_irq_uninstall(dev);
	391	drm_irq_install(dev);
	392	mutex_lock(&dev->struct_mutex);
	393	}
	394
	395	/*
	396	* Display needs restore too...
	397	*/
	398	if (need_display)
	399	i915_restore_display(dev);
	400
	401	mutex_unlock(&dev->struct_mutex);
	402	return 0;
	403	}
	404
	405
112b715e KH	406	static int __devinit
	407	i915_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
	408	{
	409	return drm_get_dev(pdev, ent, &driver);
	410	}
	411
	412	static void
	413	i915_pci_remove(struct pci_dev *pdev)
	414	{
	415	struct drm_device *dev = pci_get_drvdata(pdev);
	416
	417	drm_put_dev(dev);
	418	}
	419
84b79f8d	420	static int i915_pm_suspend(struct device *dev)
112b715e	421	{
84b79f8d RW	422	struct pci_dev *pdev = to_pci_dev(dev);
	423	struct drm_device *drm_dev = pci_get_drvdata(pdev);
	424	int error;
112b715e	425
84b79f8d RW	426	if (!drm_dev \|\| !drm_dev->dev_private) {
	427	dev_err(dev, "DRM not initialized, aborting suspend.\n");
	428	return -ENODEV;
	429	}
112b715e	430
84b79f8d RW	431	error = i915_drm_freeze(drm_dev);
	432	if (error)
	433	return error;
112b715e	434
84b79f8d RW	435	pci_disable_device(pdev);
84b79f8d RW	436	pci_set_power_state(pdev, PCI_D3hot);
cbda12d7	437
84b79f8d	438	return 0;
cbda12d7 ZW	439	}
cbda12d7 ZW	440
84b79f8d	441	static int i915_pm_resume(struct device *dev)
cbda12d7	442	{
84b79f8d RW	443	struct pci_dev *pdev = to_pci_dev(dev);
	444	struct drm_device *drm_dev = pci_get_drvdata(pdev);
	445
	446	return i915_resume(drm_dev);
cbda12d7 ZW	447	}
cbda12d7 ZW	448
84b79f8d	449	static int i915_pm_freeze(struct device *dev)
cbda12d7	450	{
84b79f8d RW	451	struct pci_dev *pdev = to_pci_dev(dev);
	452	struct drm_device *drm_dev = pci_get_drvdata(pdev);
	453
	454	if (!drm_dev \|\| !drm_dev->dev_private) {
	455	dev_err(dev, "DRM not initialized, aborting suspend.\n");
	456	return -ENODEV;
	457	}
	458
	459	return i915_drm_freeze(drm_dev);
cbda12d7 ZW	460	}
cbda12d7 ZW	461
84b79f8d	462	static int i915_pm_thaw(struct device *dev)
cbda12d7	463	{
84b79f8d RW	464	struct pci_dev *pdev = to_pci_dev(dev);
	465	struct drm_device *drm_dev = pci_get_drvdata(pdev);
	466
	467	return i915_drm_thaw(drm_dev);
cbda12d7 ZW	468	}
cbda12d7 ZW	469
84b79f8d	470	static int i915_pm_poweroff(struct device *dev)
cbda12d7	471	{
84b79f8d RW	472	struct pci_dev *pdev = to_pci_dev(dev);
84b79f8d RW	473	struct drm_device *drm_dev = pci_get_drvdata(pdev);
84b79f8d	474
61caf87c	475	return i915_drm_freeze(drm_dev);
cbda12d7 ZW	476	}
	477
	478	const struct dev_pm_ops i915_pm_ops = {
	479	.suspend = i915_pm_suspend,
	480	.resume = i915_pm_resume,
	481	.freeze = i915_pm_freeze,
	482	.thaw = i915_pm_thaw,
	483	.poweroff = i915_pm_poweroff,
84b79f8d	484	.restore = i915_pm_resume,
cbda12d7 ZW	485	};
cbda12d7 ZW	486
de151cf6 JB	487	static struct vm_operations_struct i915_gem_vm_ops = {
de151cf6 JB	488	.fault = i915_gem_fault,
ab00b3e5 JB	489	.open = drm_gem_vm_open,
ab00b3e5 JB	490	.close = drm_gem_vm_close,
de151cf6 JB	491	};
de151cf6 JB	492
1da177e4	493	static struct drm_driver driver = {
792d2b9a DA	494	/* don't use mtrr's here, the Xserver or user space app should
	495	* deal with them for intel hardware.
	496	*/
673a394b EA	497	.driver_features =
	498	DRIVER_USE_AGP \| DRIVER_REQUIRE_AGP \| /* DRIVER_USE_MTRR \|*/
	499	DRIVER_HAVE_IRQ \| DRIVER_IRQ_SHARED \| DRIVER_GEM,
22eae947	500	.load = i915_driver_load,
ba8bbcf6	501	.unload = i915_driver_unload,
673a394b	502	.open = i915_driver_open,
22eae947 DA	503	.lastclose = i915_driver_lastclose,
22eae947 DA	504	.preclose = i915_driver_preclose,
673a394b	505	.postclose = i915_driver_postclose,
d8e29209 RW	506
	507	/* Used in place of i915_pm_ops for non-DRIVER_MODESET */
	508	.suspend = i915_suspend,
	509	.resume = i915_resume,
	510
cda17380	511	.device_is_agp = i915_driver_device_is_agp,
0a3e67a4 JB	512	.enable_vblank = i915_enable_vblank,
0a3e67a4 JB	513	.disable_vblank = i915_disable_vblank,
1da177e4 LT	514	.irq_preinstall = i915_driver_irq_preinstall,
	515	.irq_postinstall = i915_driver_irq_postinstall,
	516	.irq_uninstall = i915_driver_irq_uninstall,
	517	.irq_handler = i915_driver_irq_handler,
	518	.reclaim_buffers = drm_core_reclaim_buffers,
	519	.get_map_ofs = drm_core_get_map_ofs,
	520	.get_reg_ofs = drm_core_get_reg_ofs,
7c1c2871 DA	521	.master_create = i915_master_create,
7c1c2871 DA	522	.master_destroy = i915_master_destroy,
955b12de	523	#if defined(CONFIG_DEBUG_FS)
27c202ad BG	524	.debugfs_init = i915_debugfs_init,
27c202ad BG	525	.debugfs_cleanup = i915_debugfs_cleanup,
955b12de	526	#endif
673a394b EA	527	.gem_init_object = i915_gem_init_object,
673a394b EA	528	.gem_free_object = i915_gem_free_object,
de151cf6	529	.gem_vm_ops = &i915_gem_vm_ops,
1da177e4 LT	530	.ioctls = i915_ioctls,
1da177e4 LT	531	.fops = {
b5e89ed5 DA	532	.owner = THIS_MODULE,
	533	.open = drm_open,
	534	.release = drm_release,
ed8b6704	535	.unlocked_ioctl = drm_ioctl,
de151cf6	536	.mmap = drm_gem_mmap,
b5e89ed5 DA	537	.poll = drm_poll,
b5e89ed5 DA	538	.fasync = drm_fasync,
c9a9c5e0	539	.read = drm_read,
8ca7c1df	540	#ifdef CONFIG_COMPAT
b5e89ed5	541	.compat_ioctl = i915_compat_ioctl,
8ca7c1df	542	#endif
22eae947 DA	543	},
22eae947 DA	544
1da177e4	545	.pci_driver = {
22eae947 DA	546	.name = DRIVER_NAME,
22eae947 DA	547	.id_table = pciidlist,
112b715e KH	548	.probe = i915_pci_probe,
112b715e KH	549	.remove = i915_pci_remove,
cbda12d7	550	.driver.pm = &i915_pm_ops,
22eae947	551	},
bc5f4523	552
22eae947 DA	553	.name = DRIVER_NAME,
	554	.desc = DRIVER_DESC,
	555	.date = DRIVER_DATE,
	556	.major = DRIVER_MAJOR,
	557	.minor = DRIVER_MINOR,
	558	.patchlevel = DRIVER_PATCHLEVEL,
1da177e4 LT	559	};
	560
	561	static int __init i915_init(void)
	562	{
1f7a6e37 ZW	563	if (!intel_agp_enabled) {
	564	DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
	565	return -ENODEV;
	566	}
	567
1da177e4	568	driver.num_ioctls = i915_max_ioctl;
79e53945	569
31169714 CW	570	i915_gem_shrinker_init();
31169714 CW	571
79e53945 JB	572	/*
	573	* If CONFIG_DRM_I915_KMS is set, default to KMS unless
	574	* explicitly disabled with the module pararmeter.
	575	*
	576	* Otherwise, just follow the parameter (defaulting to off).
	577	*
	578	* Allow optional vga_text_mode_force boot option to override
	579	* the default behavior.
	580	*/
	581	#if defined(CONFIG_DRM_I915_KMS)
	582	if (i915_modeset != 0)
	583	driver.driver_features \|= DRIVER_MODESET;
	584	#endif
	585	if (i915_modeset == 1)
	586	driver.driver_features \|= DRIVER_MODESET;
	587
	588	#ifdef CONFIG_VGA_CONSOLE
	589	if (vgacon_text_force() && i915_modeset == -1)
	590	driver.driver_features &= ~DRIVER_MODESET;
	591	#endif
	592
f97108d1 JB	593	if (!(driver.driver_features & DRIVER_MODESET)) {
	594	driver.suspend = i915_suspend;
	595	driver.resume = i915_resume;
	596	}
	597
1da177e4 LT	598	return drm_init(&driver);
	599	}
	600
	601	static void __exit i915_exit(void)
	602	{
31169714	603	i915_gem_shrinker_exit();
1da177e4 LT	604	drm_exit(&driver);
	605	}
	606
	607	module_init(i915_init);
	608	module_exit(i915_exit);
	609
b5e89ed5 DA	610	MODULE_AUTHOR(DRIVER_AUTHOR);
b5e89ed5 DA	611	MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4	612	MODULE_LICENSE("GPL and additional rights");