[linux-2.6-block.git] / drivers / gpu / drm / i915 / i915_drv.c

/* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
 */
/*
 *
 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#include <linux/device.h>
#include "drmP.h"
#include "drm.h"
#include "i915_drm.h"
#include "i915_drv.h"

#include <linux/console.h>
#include "drm_crtc_helper.h"

static int i915_modeset = -1;
module_param_named(modeset, i915_modeset, int, 0400);

unsigned int i915_fbpercrtc = 0;
module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);

unsigned int i915_powersave = 1;
module_param_named(powersave, i915_powersave, int, 0400);

unsigned int i915_lvds_downclock = 0;
module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);

static struct drm_driver driver;

#define INTEL_VGA_DEVICE(id, info) {		\
	.class = PCI_CLASS_DISPLAY_VGA << 8,	\
	.class_mask = 0xffff00,			\
	.vendor = 0x8086,			\
	.device = id,				\
	.subvendor = PCI_ANY_ID,		\
	.subdevice = PCI_ANY_ID,		\
	.driver_data = (unsigned long) info }

const static struct intel_device_info intel_i830_info = {
	.is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
};

const static struct intel_device_info intel_845g_info = {
	.is_i8xx = 1,
};

const static struct intel_device_info intel_i85x_info = {
	.is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
};

const static struct intel_device_info intel_i865g_info = {
	.is_i8xx = 1,
};

const static struct intel_device_info intel_i915g_info = {
	.is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i915gm_info = {
	.is_i9xx = 1,  .is_mobile = 1, .has_fbc = 1,
	.cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i945g_info = {
	.is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
};
const static struct intel_device_info intel_i945gm_info = {
	.is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
	.has_hotplug = 1, .cursor_needs_physical = 1,
};

const static struct intel_device_info intel_i965g_info = {
	.is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
};

const static struct intel_device_info intel_i965gm_info = {
	.is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
	.is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_g33_info = {
	.is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_g45_info = {
	.is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	.has_pipe_cxsr = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_gm45_info = {
	.is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
	.is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
	.has_pipe_cxsr = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_pineview_info = {
	.is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
	.has_pipe_cxsr = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_ironlake_d_info = {
	.is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	.has_pipe_cxsr = 1,
	.has_hotplug = 1,
};

const static struct intel_device_info intel_ironlake_m_info = {
	.is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
	.need_gfx_hws = 1, .has_rc6 = 1,
	.has_hotplug = 1,
};

const static struct pci_device_id pciidlist[] = {
	INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
	INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
	INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
	INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
	INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
	INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
	INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
	INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
	INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
	INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
	INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
	INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
	INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
	INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
	INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
	INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
	INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
	INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
	INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
	INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
	INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
	INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
	INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
	INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
	INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
	INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
	INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
	INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
	INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
	INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
	{0, 0, 0}
};

#if defined(CONFIG_DRM_I915_KMS)
MODULE_DEVICE_TABLE(pci, pciidlist);
#endif

static int i915_suspend(struct drm_device *dev, pm_message_t state)
{
	struct drm_i915_private *dev_priv = dev->dev_private;

	if (!dev || !dev_priv) {
		DRM_ERROR("dev: %p, dev_priv: %p\n", dev, dev_priv);
		DRM_ERROR("DRM not initialized, aborting suspend.\n");
		return -ENODEV;
	}

	if (state.event == PM_EVENT_PRETHAW)
		return 0;

	pci_save_state(dev->pdev);

	/* If KMS is active, we do the leavevt stuff here */
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
		if (i915_gem_idle(dev))
			dev_err(&dev->pdev->dev,
				"GEM idle failed, resume may fail\n");
		drm_irq_uninstall(dev);
	}

	i915_save_state(dev);

	intel_opregion_free(dev, 1);

	if (state.event == PM_EVENT_SUSPEND) {
		/* Shut down the device */
		pci_disable_device(dev->pdev);
		pci_set_power_state(dev->pdev, PCI_D3hot);
	}

	/* Modeset on resume, not lid events */
	dev_priv->modeset_on_lid = 0;

	return 0;
}

static int i915_resume(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	int ret = 0;

	if (pci_enable_device(dev->pdev))
		return -1;
	pci_set_master(dev->pdev);

	i915_restore_state(dev);

	intel_opregion_init(dev, 1);

	/* KMS EnterVT equivalent */
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
		mutex_lock(&dev->struct_mutex);
		dev_priv->mm.suspended = 0;

		ret = i915_gem_init_ringbuffer(dev);
		if (ret != 0)
			ret = -1;
		mutex_unlock(&dev->struct_mutex);

		drm_irq_install(dev);
	}
	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
		/* Resume the modeset for every activated CRTC */
		drm_helper_resume_force_mode(dev);
	}

	dev_priv->modeset_on_lid = 0;

	return ret;
}

/**
 * i965_reset - reset chip after a hang
 * @dev: drm device to reset
 * @flags: reset domains
 *
 * Reset the chip.  Useful if a hang is detected. Returns zero on successful
 * reset or otherwise an error code.
 *
 * Procedure is fairly simple:
 *   - reset the chip using the reset reg
 *   - re-init context state
 *   - re-init hardware status page
 *   - re-init ring buffer
 *   - re-init interrupt state
 *   - re-init display
 */
int i965_reset(struct drm_device *dev, u8 flags)
{
	drm_i915_private_t *dev_priv = dev->dev_private;
	unsigned long timeout;
	u8 gdrst;
	/*
	 * We really should only reset the display subsystem if we actually
	 * need to
	 */
	bool need_display = true;

	mutex_lock(&dev->struct_mutex);

	/*
	 * Clear request list
	 */
	i915_gem_retire_requests(dev);

	if (need_display)
		i915_save_display(dev);

	if (IS_I965G(dev) || IS_G4X(dev)) {
		/*
		 * Set the domains we want to reset, then the reset bit (bit 0).
		 * Clear the reset bit after a while and wait for hardware status
		 * bit (bit 1) to be set
		 */
		pci_read_config_byte(dev->pdev, GDRST, &gdrst);
		pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
		udelay(50);
		pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);

		/* ...we don't want to loop forever though, 500ms should be plenty */
	       timeout = jiffies + msecs_to_jiffies(500);
		do {
			udelay(100);
			pci_read_config_byte(dev->pdev, GDRST, &gdrst);
		} while ((gdrst & 0x1) && time_after(timeout, jiffies));

		if (gdrst & 0x1) {
			WARN(true, "i915: Failed to reset chip\n");
			mutex_unlock(&dev->struct_mutex);
			return -EIO;
		}
	} else {
		DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
		return -ENODEV;
	}

	/* Ok, now get things going again... */

	/*
	 * Everything depends on having the GTT running, so we need to start
	 * there.  Fortunately we don't need to do this unless we reset the
	 * chip at a PCI level.
	 *
	 * Next we need to restore the context, but we don't use those
	 * yet either...
	 *
	 * Ring buffer needs to be re-initialized in the KMS case, or if X
	 * was running at the time of the reset (i.e. we weren't VT
	 * switched away).
	 */
	if (drm_core_check_feature(dev, DRIVER_MODESET) ||
	    !dev_priv->mm.suspended) {
		drm_i915_ring_buffer_t *ring = &dev_priv->ring;
		struct drm_gem_object *obj = ring->ring_obj;
		struct drm_i915_gem_object *obj_priv = obj->driver_private;
		dev_priv->mm.suspended = 0;

		/* Stop the ring if it's running. */
		I915_WRITE(PRB0_CTL, 0);
		I915_WRITE(PRB0_TAIL, 0);
		I915_WRITE(PRB0_HEAD, 0);

		/* Initialize the ring. */
		I915_WRITE(PRB0_START, obj_priv->gtt_offset);
		I915_WRITE(PRB0_CTL,
			   ((obj->size - 4096) & RING_NR_PAGES) |
			   RING_NO_REPORT |
			   RING_VALID);
		if (!drm_core_check_feature(dev, DRIVER_MODESET))
			i915_kernel_lost_context(dev);
		else {
			ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
			ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
			ring->space = ring->head - (ring->tail + 8);
			if (ring->space < 0)
				ring->space += ring->Size;
		}

		mutex_unlock(&dev->struct_mutex);
		drm_irq_uninstall(dev);
		drm_irq_install(dev);
		mutex_lock(&dev->struct_mutex);
	}

	/*
	 * Display needs restore too...
	 */
	if (need_display)
		i915_restore_display(dev);

	mutex_unlock(&dev->struct_mutex);
	return 0;
}


static int __devinit
i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	return drm_get_dev(pdev, ent, &driver);
}

static void
i915_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

static int
i915_pci_suspend(struct pci_dev *pdev, pm_message_t state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	return i915_suspend(dev, state);
}

static int
i915_pci_resume(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	return i915_resume(dev);
}

static int
i915_pm_suspend(struct device *dev)
{
	return i915_pci_suspend(to_pci_dev(dev), PMSG_SUSPEND);
}

static int
i915_pm_resume(struct device *dev)
{
	return i915_pci_resume(to_pci_dev(dev));
}

static int
i915_pm_freeze(struct device *dev)
{
	return i915_pci_suspend(to_pci_dev(dev), PMSG_FREEZE);
}

static int
i915_pm_thaw(struct device *dev)
{
	/* thaw during hibernate, do nothing! */
	return 0;
}

static int
i915_pm_poweroff(struct device *dev)
{
	return i915_pci_suspend(to_pci_dev(dev), PMSG_HIBERNATE);
}

static int
i915_pm_restore(struct device *dev)
{
	return i915_pci_resume(to_pci_dev(dev));
}

const struct dev_pm_ops i915_pm_ops = {
     .suspend = i915_pm_suspend,
     .resume = i915_pm_resume,
     .freeze = i915_pm_freeze,
     .thaw = i915_pm_thaw,
     .poweroff = i915_pm_poweroff,
     .restore = i915_pm_restore,
};

static struct vm_operations_struct i915_gem_vm_ops = {
	.fault = i915_gem_fault,
	.open = drm_gem_vm_open,
	.close = drm_gem_vm_close,
};

static struct drm_driver driver = {
	/* don't use mtrr's here, the Xserver or user space app should
	 * deal with them for intel hardware.
	 */
	.driver_features =
	    DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
	    DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
	.load = i915_driver_load,
	.unload = i915_driver_unload,
	.open = i915_driver_open,
	.lastclose = i915_driver_lastclose,
	.preclose = i915_driver_preclose,
	.postclose = i915_driver_postclose,

	/* Used in place of i915_pm_ops for non-DRIVER_MODESET */
	.suspend = i915_suspend,
	.resume = i915_resume,

	.device_is_agp = i915_driver_device_is_agp,
	.enable_vblank = i915_enable_vblank,
	.disable_vblank = i915_disable_vblank,
	.irq_preinstall = i915_driver_irq_preinstall,
	.irq_postinstall = i915_driver_irq_postinstall,
	.irq_uninstall = i915_driver_irq_uninstall,
	.irq_handler = i915_driver_irq_handler,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.get_map_ofs = drm_core_get_map_ofs,
	.get_reg_ofs = drm_core_get_reg_ofs,
	.master_create = i915_master_create,
	.master_destroy = i915_master_destroy,
#if defined(CONFIG_DEBUG_FS)
	.debugfs_init = i915_debugfs_init,
	.debugfs_cleanup = i915_debugfs_cleanup,
#endif
	.gem_init_object = i915_gem_init_object,
	.gem_free_object = i915_gem_free_object,
	.gem_vm_ops = &i915_gem_vm_ops,
	.ioctls = i915_ioctls,
	.fops = {
		 .owner = THIS_MODULE,
		 .open = drm_open,
		 .release = drm_release,
		 .unlocked_ioctl = drm_ioctl,
		 .mmap = drm_gem_mmap,
		 .poll = drm_poll,
		 .fasync = drm_fasync,
		 .read = drm_read,
#ifdef CONFIG_COMPAT
		 .compat_ioctl = i915_compat_ioctl,
#endif
	},

	.pci_driver = {
		 .name = DRIVER_NAME,
		 .id_table = pciidlist,
		 .probe = i915_pci_probe,
		 .remove = i915_pci_remove,
		 .driver.pm = &i915_pm_ops,
	},

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
	.date = DRIVER_DATE,
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

static int __init i915_init(void)
{
	driver.num_ioctls = i915_max_ioctl;

	i915_gem_shrinker_init();

	/*
	 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
	 * explicitly disabled with the module pararmeter.
	 *
	 * Otherwise, just follow the parameter (defaulting to off).
	 *
	 * Allow optional vga_text_mode_force boot option to override
	 * the default behavior.
	 */
#if defined(CONFIG_DRM_I915_KMS)
	if (i915_modeset != 0)
		driver.driver_features |= DRIVER_MODESET;
#endif
	if (i915_modeset == 1)
		driver.driver_features |= DRIVER_MODESET;

#ifdef CONFIG_VGA_CONSOLE
	if (vgacon_text_force() && i915_modeset == -1)
		driver.driver_features &= ~DRIVER_MODESET;
#endif

	return drm_init(&driver);
}

static void __exit i915_exit(void)
{
	i915_gem_shrinker_exit();
	drm_exit(&driver);
}

module_init(i915_init);
module_exit(i915_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL and additional rights");
Commit	Line	Data
1da177e4 LT	1	/* i915_drv.c -- i830,i845,i855,i865,i915 driver -- linux-c --
1da177e4 LT	2	*/
0d6aa60b	3	/*
bc54fd1a	4	*
1da177e4 LT	5	* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
1da177e4 LT	6	* All Rights Reserved.
bc54fd1a DA	7	*
	8	* Permission is hereby granted, free of charge, to any person obtaining a
	9	* copy of this software and associated documentation files (the
	10	* "Software"), to deal in the Software without restriction, including
	11	* without limitation the rights to use, copy, modify, merge, publish,
	12	* distribute, sub license, and/or sell copies of the Software, and to
	13	* permit persons to whom the Software is furnished to do so, subject to
	14	* the following conditions:
	15	*
	16	* The above copyright notice and this permission notice (including the
	17	* next paragraph) shall be included in all copies or substantial portions
	18	* of the Software.
	19	*
	20	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
	21	* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	22	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
	23	* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
	24	* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
	25	* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
	26	* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
	27	*
0d6aa60b	28	*/
1da177e4	29
5669fcac	30	#include <linux/device.h>
1da177e4 LT	31	#include "drmP.h"
	32	#include "drm.h"
	33	#include "i915_drm.h"
	34	#include "i915_drv.h"
	35
79e53945	36	#include <linux/console.h>
354ff967	37	#include "drm_crtc_helper.h"
79e53945	38
d6073d77	39	static int i915_modeset = -1;
79e53945 JB	40	module_param_named(modeset, i915_modeset, int, 0400);
	41
	42	unsigned int i915_fbpercrtc = 0;
	43	module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
1da177e4	44
652c393a JB	45	unsigned int i915_powersave = 1;
	46	module_param_named(powersave, i915_powersave, int, 0400);
	47
33814341 JB	48	unsigned int i915_lvds_downclock = 0;
	49	module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
	50
112b715e KH	51	static struct drm_driver driver;
112b715e KH	52
cfdf1fa2	53	#define INTEL_VGA_DEVICE(id, info) { \
49ae35f2 KH	54	.class = PCI_CLASS_DISPLAY_VGA << 8, \
	55	.class_mask = 0xffff00, \
	56	.vendor = 0x8086, \
	57	.device = id, \
	58	.subvendor = PCI_ANY_ID, \
	59	.subdevice = PCI_ANY_ID, \
cfdf1fa2 KH	60	.driver_data = (unsigned long) info }
	61
	62	const static struct intel_device_info intel_i830_info = {
b295d1b6	63	.is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
cfdf1fa2 KH	64	};
	65
	66	const static struct intel_device_info intel_845g_info = {
	67	.is_i8xx = 1,
	68	};
	69
	70	const static struct intel_device_info intel_i85x_info = {
b295d1b6	71	.is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
cfdf1fa2 KH	72	};
	73
	74	const static struct intel_device_info intel_i865g_info = {
	75	.is_i8xx = 1,
	76	};
	77
	78	const static struct intel_device_info intel_i915g_info = {
b295d1b6	79	.is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
cfdf1fa2 KH	80	};
	81	const static struct intel_device_info intel_i915gm_info = {
	82	.is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
b295d1b6	83	.cursor_needs_physical = 1,
cfdf1fa2 KH	84	};
cfdf1fa2 KH	85	const static struct intel_device_info intel_i945g_info = {
b295d1b6	86	.is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
cfdf1fa2 KH	87	};
	88	const static struct intel_device_info intel_i945gm_info = {
	89	.is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
b295d1b6	90	.has_hotplug = 1, .cursor_needs_physical = 1,
cfdf1fa2 KH	91	};
	92
	93	const static struct intel_device_info intel_i965g_info = {
	94	.is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
	95	};
	96
	97	const static struct intel_device_info intel_i965gm_info = {
	98	.is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
	99	.is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
	100	.has_hotplug = 1,
	101	};
	102
	103	const static struct intel_device_info intel_g33_info = {
	104	.is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	105	.has_hotplug = 1,
	106	};
	107
	108	const static struct intel_device_info intel_g45_info = {
	109	.is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	110	.has_pipe_cxsr = 1,
	111	.has_hotplug = 1,
	112	};
	113
	114	const static struct intel_device_info intel_gm45_info = {
	115	.is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
	116	.is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
	117	.has_pipe_cxsr = 1,
	118	.has_hotplug = 1,
	119	};
	120
	121	const static struct intel_device_info intel_pineview_info = {
	122	.is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
	123	.has_pipe_cxsr = 1,
	124	.has_hotplug = 1,
	125	};
	126
	127	const static struct intel_device_info intel_ironlake_d_info = {
	128	.is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
	129	.has_pipe_cxsr = 1,
	130	.has_hotplug = 1,
	131	};
	132
	133	const static struct intel_device_info intel_ironlake_m_info = {
	134	.is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
	135	.need_gfx_hws = 1, .has_rc6 = 1,
	136	.has_hotplug = 1,
	137	};
	138
	139	const static struct pci_device_id pciidlist[] = {
	140	INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
	141	INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
	142	INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
	143	INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
	144	INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
	145	INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
	146	INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
	147	INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
	148	INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
	149	INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
	150	INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
	151	INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
	152	INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
	153	INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
	154	INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
155	INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
156	INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
157	INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
158	INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
159	INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
160	INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
161	INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
162	INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
163	INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
164	INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
165	INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
166	INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
167	INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
168	INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
169	INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
49ae35f2	170	{0, 0, 0}
1da177e4 LT	171	};
1da177e4 LT	172
79e53945 JB	173	#if defined(CONFIG_DRM_I915_KMS)
	174	MODULE_DEVICE_TABLE(pci, pciidlist);
	175	#endif
	176
b932ccb5	177	static int i915_suspend(struct drm_device *dev, pm_message_t state)
ba8bbcf6 JB	178	{
ba8bbcf6 JB	179	struct drm_i915_private *dev_priv = dev->dev_private;
ba8bbcf6 JB	180
ba8bbcf6 JB	181	if (!dev \|\| !dev_priv) {
1ae8c0a5 KP	182	DRM_ERROR("dev: %p, dev_priv: %p\n", dev, dev_priv);
1ae8c0a5 KP	183	DRM_ERROR("DRM not initialized, aborting suspend.\n");
ba8bbcf6 JB	184	return -ENODEV;
	185	}
	186
b932ccb5 DA	187	if (state.event == PM_EVENT_PRETHAW)
	188	return 0;
	189
ba8bbcf6	190	pci_save_state(dev->pdev);
ba8bbcf6	191
5669fcac	192	/* If KMS is active, we do the leavevt stuff here */
226485e9 JB	193	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
	194	if (i915_gem_idle(dev))
	195	dev_err(&dev->pdev->dev,
	196	"GEM idle failed, resume may fail\n");
	197	drm_irq_uninstall(dev);
5669fcac JB	198	}
5669fcac JB	199
9e06dd39 JB	200	i915_save_state(dev);
9e06dd39 JB	201
3b1c1c11	202	intel_opregion_free(dev, 1);
8ee1c3db	203
b932ccb5 DA	204	if (state.event == PM_EVENT_SUSPEND) {
	205	/* Shut down the device */
	206	pci_disable_device(dev->pdev);
	207	pci_set_power_state(dev->pdev, PCI_D3hot);
	208	}
ba8bbcf6	209
c9354c85 LT	210	/* Modeset on resume, not lid events */
c9354c85 LT	211	dev_priv->modeset_on_lid = 0;
06891e27	212
ba8bbcf6 JB	213	return 0;
	214	}
	215
	216	static int i915_resume(struct drm_device *dev)
	217	{
5669fcac JB	218	struct drm_i915_private *dev_priv = dev->dev_private;
	219	int ret = 0;
	220
ba8bbcf6 JB	221	if (pci_enable_device(dev->pdev))
ba8bbcf6 JB	222	return -1;
ea7b44c8	223	pci_set_master(dev->pdev);
ba8bbcf6	224
317c35d1	225	i915_restore_state(dev);
ba8bbcf6	226
74a365b3	227	intel_opregion_init(dev, 1);
8ee1c3db	228
5669fcac JB	229	/* KMS EnterVT equivalent */
	230	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
	231	mutex_lock(&dev->struct_mutex);
	232	dev_priv->mm.suspended = 0;
	233
	234	ret = i915_gem_init_ringbuffer(dev);
	235	if (ret != 0)
	236	ret = -1;
	237	mutex_unlock(&dev->struct_mutex);
226485e9 JB	238
226485e9 JB	239	drm_irq_install(dev);
5669fcac	240	}
354ff967 ZY	241	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
	242	/* Resume the modeset for every activated CRTC */
	243	drm_helper_resume_force_mode(dev);
	244	}
5669fcac	245
c9354c85	246	dev_priv->modeset_on_lid = 0;
06891e27	247
5669fcac	248	return ret;
ba8bbcf6 JB	249	}
ba8bbcf6 JB	250
11ed50ec BG	251	/**
	252	* i965_reset - reset chip after a hang
	253	* @dev: drm device to reset
	254	* @flags: reset domains
	255	*
	256	* Reset the chip. Useful if a hang is detected. Returns zero on successful
	257	* reset or otherwise an error code.
	258	*
	259	* Procedure is fairly simple:
	260	* - reset the chip using the reset reg
	261	* - re-init context state
	262	* - re-init hardware status page
	263	* - re-init ring buffer
	264	* - re-init interrupt state
	265	* - re-init display
	266	*/
	267	int i965_reset(struct drm_device *dev, u8 flags)
	268	{
	269	drm_i915_private_t *dev_priv = dev->dev_private;
	270	unsigned long timeout;
	271	u8 gdrst;
	272	/*
	273	* We really should only reset the display subsystem if we actually
	274	* need to
	275	*/
	276	bool need_display = true;
	277
	278	mutex_lock(&dev->struct_mutex);
	279
	280	/*
	281	* Clear request list
	282	*/
	283	i915_gem_retire_requests(dev);
	284
	285	if (need_display)
	286	i915_save_display(dev);
	287
	288	if (IS_I965G(dev) \|\| IS_G4X(dev)) {
	289	/*
	290	* Set the domains we want to reset, then the reset bit (bit 0).
	291	* Clear the reset bit after a while and wait for hardware status
	292	* bit (bit 1) to be set
	293	*/
	294	pci_read_config_byte(dev->pdev, GDRST, &gdrst);
	295	pci_write_config_byte(dev->pdev, GDRST, gdrst \| flags \| ((flags == GDRST_FULL) ? 0x1 : 0x0));
	296	udelay(50);
	297	pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
	298
	299	/* ...we don't want to loop forever though, 500ms should be plenty */
	300	timeout = jiffies + msecs_to_jiffies(500);
	301	do {
	302	udelay(100);
	303	pci_read_config_byte(dev->pdev, GDRST, &gdrst);
	304	} while ((gdrst & 0x1) && time_after(timeout, jiffies));
	305
	306	if (gdrst & 0x1) {
	307	WARN(true, "i915: Failed to reset chip\n");
	308	mutex_unlock(&dev->struct_mutex);
	309	return -EIO;
	310	}
	311	} else {
	312	DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
	313	return -ENODEV;
	314	}
315
316	/* Ok, now get things going again... */
317
318	/*
319	* Everything depends on having the GTT running, so we need to start
320	* there. Fortunately we don't need to do this unless we reset the
321	* chip at a PCI level.
322	*
323	* Next we need to restore the context, but we don't use those
324	* yet either...
325	*
326	* Ring buffer needs to be re-initialized in the KMS case, or if X
327	* was running at the time of the reset (i.e. we weren't VT
328	* switched away).
329	*/
330	if (drm_core_check_feature(dev, DRIVER_MODESET) \|\|
331	!dev_priv->mm.suspended) {
332	drm_i915_ring_buffer_t *ring = &dev_priv->ring;
333	struct drm_gem_object *obj = ring->ring_obj;
334	struct drm_i915_gem_object *obj_priv = obj->driver_private;
335	dev_priv->mm.suspended = 0;
336
337	/* Stop the ring if it's running. */
338	I915_WRITE(PRB0_CTL, 0);
339	I915_WRITE(PRB0_TAIL, 0);
340	I915_WRITE(PRB0_HEAD, 0);
341
342	/* Initialize the ring. */
343	I915_WRITE(PRB0_START, obj_priv->gtt_offset);
344	I915_WRITE(PRB0_CTL,
345	((obj->size - 4096) & RING_NR_PAGES) \|
346	RING_NO_REPORT \|
347	RING_VALID);
348	if (!drm_core_check_feature(dev, DRIVER_MODESET))
349	i915_kernel_lost_context(dev);
350	else {
351	ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
352	ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
353	ring->space = ring->head - (ring->tail + 8);
354	if (ring->space < 0)
355	ring->space += ring->Size;
356	}
357
358	mutex_unlock(&dev->struct_mutex);
359	drm_irq_uninstall(dev);
360	drm_irq_install(dev);
361	mutex_lock(&dev->struct_mutex);
362	}
363
364	/*
365	* Display needs restore too...
366	*/
367	if (need_display)
368	i915_restore_display(dev);
369
370	mutex_unlock(&dev->struct_mutex);
371	return 0;
372	}
373
374
112b715e KH	375	static int __devinit
	376	i915_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
	377	{
	378	return drm_get_dev(pdev, ent, &driver);
	379	}
	380
	381	static void
	382	i915_pci_remove(struct pci_dev *pdev)
	383	{
	384	struct drm_device *dev = pci_get_drvdata(pdev);
	385
	386	drm_put_dev(dev);
	387	}
	388
	389	static int
	390	i915_pci_suspend(struct pci_dev *pdev, pm_message_t state)
	391	{
	392	struct drm_device *dev = pci_get_drvdata(pdev);
	393
	394	return i915_suspend(dev, state);
	395	}
	396
	397	static int
	398	i915_pci_resume(struct pci_dev *pdev)
	399	{
	400	struct drm_device *dev = pci_get_drvdata(pdev);
	401
	402	return i915_resume(dev);
	403	}
	404
cbda12d7 ZW	405	static int
	406	i915_pm_suspend(struct device *dev)
	407	{
	408	return i915_pci_suspend(to_pci_dev(dev), PMSG_SUSPEND);
	409	}
	410
	411	static int
	412	i915_pm_resume(struct device *dev)
	413	{
	414	return i915_pci_resume(to_pci_dev(dev));
	415	}
	416
	417	static int
	418	i915_pm_freeze(struct device *dev)
	419	{
	420	return i915_pci_suspend(to_pci_dev(dev), PMSG_FREEZE);
	421	}
	422
	423	static int
	424	i915_pm_thaw(struct device *dev)
	425	{
	426	/* thaw during hibernate, do nothing! */
	427	return 0;
	428	}
	429
	430	static int
	431	i915_pm_poweroff(struct device *dev)
	432	{
	433	return i915_pci_suspend(to_pci_dev(dev), PMSG_HIBERNATE);
	434	}
	435
	436	static int
	437	i915_pm_restore(struct device *dev)
	438	{
	439	return i915_pci_resume(to_pci_dev(dev));
	440	}
	441
	442	const struct dev_pm_ops i915_pm_ops = {
	443	.suspend = i915_pm_suspend,
	444	.resume = i915_pm_resume,
	445	.freeze = i915_pm_freeze,
	446	.thaw = i915_pm_thaw,
	447	.poweroff = i915_pm_poweroff,
	448	.restore = i915_pm_restore,
	449	};
	450
de151cf6 JB	451	static struct vm_operations_struct i915_gem_vm_ops = {
de151cf6 JB	452	.fault = i915_gem_fault,
ab00b3e5 JB	453	.open = drm_gem_vm_open,
ab00b3e5 JB	454	.close = drm_gem_vm_close,
de151cf6 JB	455	};
de151cf6 JB	456
1da177e4	457	static struct drm_driver driver = {
792d2b9a DA	458	/* don't use mtrr's here, the Xserver or user space app should
	459	* deal with them for intel hardware.
	460	*/
673a394b EA	461	.driver_features =
	462	DRIVER_USE_AGP \| DRIVER_REQUIRE_AGP \| /* DRIVER_USE_MTRR \|*/
	463	DRIVER_HAVE_IRQ \| DRIVER_IRQ_SHARED \| DRIVER_GEM,
22eae947	464	.load = i915_driver_load,
ba8bbcf6	465	.unload = i915_driver_unload,
673a394b	466	.open = i915_driver_open,
22eae947 DA	467	.lastclose = i915_driver_lastclose,
22eae947 DA	468	.preclose = i915_driver_preclose,
673a394b	469	.postclose = i915_driver_postclose,
d8e29209 RW	470
	471	/* Used in place of i915_pm_ops for non-DRIVER_MODESET */
	472	.suspend = i915_suspend,
	473	.resume = i915_resume,
	474
cda17380	475	.device_is_agp = i915_driver_device_is_agp,
0a3e67a4 JB	476	.enable_vblank = i915_enable_vblank,
0a3e67a4 JB	477	.disable_vblank = i915_disable_vblank,
1da177e4 LT	478	.irq_preinstall = i915_driver_irq_preinstall,
	479	.irq_postinstall = i915_driver_irq_postinstall,
	480	.irq_uninstall = i915_driver_irq_uninstall,
	481	.irq_handler = i915_driver_irq_handler,
	482	.reclaim_buffers = drm_core_reclaim_buffers,
	483	.get_map_ofs = drm_core_get_map_ofs,
	484	.get_reg_ofs = drm_core_get_reg_ofs,
7c1c2871 DA	485	.master_create = i915_master_create,
7c1c2871 DA	486	.master_destroy = i915_master_destroy,
955b12de	487	#if defined(CONFIG_DEBUG_FS)
27c202ad BG	488	.debugfs_init = i915_debugfs_init,
27c202ad BG	489	.debugfs_cleanup = i915_debugfs_cleanup,
955b12de	490	#endif
673a394b EA	491	.gem_init_object = i915_gem_init_object,
673a394b EA	492	.gem_free_object = i915_gem_free_object,
de151cf6	493	.gem_vm_ops = &i915_gem_vm_ops,
1da177e4 LT	494	.ioctls = i915_ioctls,
1da177e4 LT	495	.fops = {
b5e89ed5 DA	496	.owner = THIS_MODULE,
	497	.open = drm_open,
	498	.release = drm_release,
ed8b6704	499	.unlocked_ioctl = drm_ioctl,
de151cf6	500	.mmap = drm_gem_mmap,
b5e89ed5 DA	501	.poll = drm_poll,
b5e89ed5 DA	502	.fasync = drm_fasync,
c9a9c5e0	503	.read = drm_read,
8ca7c1df	504	#ifdef CONFIG_COMPAT
b5e89ed5	505	.compat_ioctl = i915_compat_ioctl,
8ca7c1df	506	#endif
22eae947 DA	507	},
22eae947 DA	508
1da177e4	509	.pci_driver = {
22eae947 DA	510	.name = DRIVER_NAME,
22eae947 DA	511	.id_table = pciidlist,
112b715e KH	512	.probe = i915_pci_probe,
112b715e KH	513	.remove = i915_pci_remove,
cbda12d7	514	.driver.pm = &i915_pm_ops,
22eae947	515	},
bc5f4523	516
22eae947 DA	517	.name = DRIVER_NAME,
	518	.desc = DRIVER_DESC,
	519	.date = DRIVER_DATE,
	520	.major = DRIVER_MAJOR,
	521	.minor = DRIVER_MINOR,
	522	.patchlevel = DRIVER_PATCHLEVEL,
1da177e4 LT	523	};
	524
	525	static int __init i915_init(void)
	526	{
	527	driver.num_ioctls = i915_max_ioctl;
79e53945	528
31169714 CW	529	i915_gem_shrinker_init();
31169714 CW	530
79e53945 JB	531	/*
	532	* If CONFIG_DRM_I915_KMS is set, default to KMS unless
	533	* explicitly disabled with the module pararmeter.
	534	*
	535	* Otherwise, just follow the parameter (defaulting to off).
	536	*
	537	* Allow optional vga_text_mode_force boot option to override
	538	* the default behavior.
	539	*/
	540	#if defined(CONFIG_DRM_I915_KMS)
	541	if (i915_modeset != 0)
	542	driver.driver_features \|= DRIVER_MODESET;
	543	#endif
	544	if (i915_modeset == 1)
	545	driver.driver_features \|= DRIVER_MODESET;
	546
	547	#ifdef CONFIG_VGA_CONSOLE
	548	if (vgacon_text_force() && i915_modeset == -1)
	549	driver.driver_features &= ~DRIVER_MODESET;
	550	#endif
	551
1da177e4 LT	552	return drm_init(&driver);
	553	}
	554
	555	static void __exit i915_exit(void)
	556	{
31169714	557	i915_gem_shrinker_exit();
1da177e4 LT	558	drm_exit(&driver);
	559	}
	560
	561	module_init(i915_init);
	562	module_exit(i915_exit);
	563
b5e89ed5 DA	564	MODULE_AUTHOR(DRIVER_AUTHOR);
b5e89ed5 DA	565	MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4	566	MODULE_LICENSE("GPL and additional rights");