projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| cf1c97dc AS |
1 | /* |
| 2 | * SPDX-License-Identifier: MIT | |
| 3 | * | |
| 4 | * Copyright © 2019 Intel Corporation | |
| 5 | */ | |
| 6 | ||
| 7 | #ifndef INTEL_GT_IRQ_H | |
| 8 | #define INTEL_GT_IRQ_H | |
| 9 | ||
| 10 | #include <linux/types.h> | |
| 11 | ||
| 12 | struct intel_gt; | |
| 13 | ||
| 14 | #define GEN8_GT_IRQS (GEN8_GT_RCS_IRQ | \ | |
| 15 | GEN8_GT_BCS_IRQ | \ | |
| 16 | GEN8_GT_VCS0_IRQ | \ | |
| 17 | GEN8_GT_VCS1_IRQ | \ | |
| 18 | GEN8_GT_VECS_IRQ | \ | |
| 19 | GEN8_GT_PM_IRQ | \ | |
| 20 | GEN8_GT_GUC_IRQ) | |
| 21 | ||
| 22 | void gen11_gt_irq_reset(struct intel_gt *gt); | |
| 23 | void gen11_gt_irq_postinstall(struct intel_gt *gt); | |
| 24 | void gen11_gt_irq_handler(struct intel_gt *gt, const u32 master_ctl); | |
| 25 | ||
| 26 | bool gen11_gt_reset_one_iir(struct intel_gt *gt, | |
| 27 | const unsigned int bank, | |
| 28 | const unsigned int bit); | |
| 29 | ||
| 30 | void gen5_gt_irq_handler(struct intel_gt *gt, u32 gt_iir); | |
| 31 | ||
| 32 | void gen5_gt_irq_postinstall(struct intel_gt *gt); | |
| 33 | void gen5_gt_irq_reset(struct intel_gt *gt); | |
| 34 | void gen5_gt_disable_irq(struct intel_gt *gt, u32 mask); | |
| 35 | void gen5_gt_enable_irq(struct intel_gt *gt, u32 mask); | |
| 36 | ||
| 37 | void gen6_gt_irq_handler(struct intel_gt *gt, u32 gt_iir); | |
| 38 | ||
| 6cc32f15 | 39 | void gen8_gt_irq_handler(struct intel_gt *gt, u32 master_ctl); |
| cf1c97dc | 40 | void gen8_gt_irq_reset(struct intel_gt *gt); |
| cf1c97dc AS |
41 | void gen8_gt_irq_postinstall(struct intel_gt *gt); |
| 42 | ||
| 43 | #endif /* INTEL_GT_IRQ_H */ |