Merge drm/drm-next into drm-intel-next
[linux-2.6-block.git] / drivers / gpu / drm / i915 / gt / intel_gt_debugfs.c
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9dd4b065 1// SPDX-License-Identifier: MIT
9dd4b065
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2/*
3 * Copyright © 2019 Intel Corporation
4 */
5
6#include <linux/debugfs.h>
7
022f324c 8#include "i915_drv.h"
b7563ec7 9#include "intel_gt.h"
022f324c 10#include "intel_gt_debugfs.h"
00142bce 11#include "intel_gt_engines_debugfs.h"
e7858254 12#include "intel_gt_mcr.h"
23f6a829 13#include "intel_gt_pm_debugfs.h"
a00eda7d 14#include "intel_sseu_debugfs.h"
390cf1b2 15#include "pxp/intel_pxp_debugfs.h"
293a5548 16#include "uc/intel_uc_debugfs.h"
9dd4b065 17
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18int intel_gt_debugfs_reset_show(struct intel_gt *gt, u64 *val)
19{
20 int ret = intel_gt_terminally_wedged(gt);
21
22 switch (ret) {
23 case -EIO:
24 *val = 1;
25 return 0;
26 case 0:
27 *val = 0;
28 return 0;
29 default:
30 return ret;
31 }
32}
33
7d14db8b 34void intel_gt_debugfs_reset_store(struct intel_gt *gt, u64 val)
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35{
36 /* Flush any previous reset before applying for a new one */
37 wait_event(gt->reset.queue,
38 !test_bit(I915_RESET_BACKOFF, &gt->reset.flags));
39
40 intel_gt_handle_error(gt, val, I915_ERROR_CAPTURE,
41 "Manually reset engine mask to %llx", val);
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42}
43
44/*
45 * keep the interface clean where the first parameter
46 * is a 'struct intel_gt *' instead of 'void *'
47 */
48static int __intel_gt_debugfs_reset_show(void *data, u64 *val)
49{
50 return intel_gt_debugfs_reset_show(data, val);
51}
52
53static int __intel_gt_debugfs_reset_store(void *data, u64 val)
54{
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55 intel_gt_debugfs_reset_store(data, val);
56
57 return 0;
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58}
59
60DEFINE_SIMPLE_ATTRIBUTE(reset_fops, __intel_gt_debugfs_reset_show,
61 __intel_gt_debugfs_reset_store, "%llu\n");
62
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63static int steering_show(struct seq_file *m, void *data)
64{
65 struct drm_printer p = drm_seq_file_printer(m);
66 struct intel_gt *gt = m->private;
67
3fe6c7f5 68 intel_gt_mcr_report_steering(&p, gt, true);
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69
70 return 0;
71}
72DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(steering);
73
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74static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root)
75{
76 static const struct intel_gt_debugfs_file files[] = {
77 { "reset", &reset_fops, NULL },
b7563ec7 78 { "steering", &steering_fops },
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79 };
80
81 intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);
82}
83
022f324c 84void intel_gt_debugfs_register(struct intel_gt *gt)
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85{
86 struct dentry *root;
87
88 if (!gt->i915->drm.primary->debugfs_root)
89 return;
90
91 root = debugfs_create_dir("gt", gt->i915->drm.primary->debugfs_root);
92 if (IS_ERR(root))
93 return;
94
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95 gt_debugfs_register(gt, root);
96
00142bce 97 intel_gt_engines_debugfs_register(gt, root);
23f6a829 98 intel_gt_pm_debugfs_register(gt, root);
a00eda7d 99 intel_sseu_debugfs_register(gt, root);
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100
101 intel_uc_debugfs_register(&gt->uc, root);
390cf1b2 102 intel_pxp_debugfs_register(&gt->pxp, root);
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103}
104
12df6c59 105void intel_gt_debugfs_register_files(struct dentry *root,
022f324c 106 const struct intel_gt_debugfs_file *files,
12df6c59 107 unsigned long count, void *data)
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108{
109 while (count--) {
293a5548 110 umode_t mode = files->fops->write ? 0644 : 0444;
2f8aa3b8 111
12df6c59 112 if (!files->eval || files->eval(data))
9dd4b065 113 debugfs_create_file(files->name,
293a5548 114 mode, root, data,
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115 files->fops);
116
117 files++;
118 }
119}