Commit | Line | Data |
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54cf91dc | 1 | /* |
10be98a7 | 2 | * SPDX-License-Identifier: MIT |
54cf91dc | 3 | * |
10be98a7 | 4 | * Copyright © 2008,2010 Intel Corporation |
54cf91dc CW |
5 | */ |
6 | ||
daedaa33 | 7 | #include <linux/intel-iommu.h> |
52791eee | 8 | #include <linux/dma-resv.h> |
fec0445c | 9 | #include <linux/sync_file.h> |
ad778f89 CW |
10 | #include <linux/uaccess.h> |
11 | ||
cf6e7bac | 12 | #include <drm/drm_syncobj.h> |
ad778f89 | 13 | |
df0566a6 JN |
14 | #include "display/intel_frontbuffer.h" |
15 | ||
afa13085 | 16 | #include "gem/i915_gem_ioctls.h" |
10be98a7 | 17 | #include "gt/intel_context.h" |
baea429d | 18 | #include "gt/intel_gt.h" |
16e87459 | 19 | #include "gt/intel_gt_buffer_pool.h" |
8f2a1057 | 20 | #include "gt/intel_gt_pm.h" |
2871ea85 | 21 | #include "gt/intel_ring.h" |
8f2a1057 | 22 | |
6da4a2c4 | 23 | #include "i915_drv.h" |
57822dc6 | 24 | #include "i915_gem_clflush.h" |
10be98a7 | 25 | #include "i915_gem_context.h" |
6da4a2c4 | 26 | #include "i915_gem_ioctls.h" |
686c7c35 | 27 | #include "i915_sw_fence_work.h" |
54cf91dc | 28 | #include "i915_trace.h" |
cda9edd0 | 29 | #include "i915_user_extensions.h" |
54cf91dc | 30 | |
7d6236bb CW |
31 | struct eb_vma { |
32 | struct i915_vma *vma; | |
33 | unsigned int flags; | |
34 | ||
35 | /** This vma's place in the execbuf reservation list */ | |
36 | struct drm_i915_gem_exec_object2 *exec; | |
37 | struct list_head bind_link; | |
38 | struct list_head reloc_link; | |
39 | ||
40 | struct hlist_node node; | |
41 | u32 handle; | |
42 | }; | |
43 | ||
0f1dd022 CW |
44 | struct eb_vma_array { |
45 | struct kref kref; | |
46 | struct eb_vma vma[]; | |
47 | }; | |
48 | ||
003d8b91 CW |
49 | #define __EXEC_OBJECT_HAS_PIN BIT(31) |
50 | #define __EXEC_OBJECT_HAS_FENCE BIT(30) | |
51 | #define __EXEC_OBJECT_NEEDS_MAP BIT(29) | |
52 | #define __EXEC_OBJECT_NEEDS_BIAS BIT(28) | |
53 | #define __EXEC_OBJECT_INTERNAL_FLAGS (~0u << 28) /* all of the above */ | |
2889caa9 CW |
54 | |
55 | #define __EXEC_HAS_RELOC BIT(31) | |
003d8b91 | 56 | #define __EXEC_INTERNAL_FLAGS (~0u << 31) |
2889caa9 | 57 | #define UPDATE PIN_OFFSET_FIXED |
d23db88c CW |
58 | |
59 | #define BATCH_OFFSET_BIAS (256*1024) | |
a415d355 | 60 | |
650bc635 | 61 | #define __I915_EXEC_ILLEGAL_FLAGS \ |
08e3e21a LDM |
62 | (__I915_EXEC_UNKNOWN_FLAGS | \ |
63 | I915_EXEC_CONSTANTS_MASK | \ | |
64 | I915_EXEC_RESOURCE_STREAMER) | |
5b043f4e | 65 | |
d20ac620 CW |
66 | /* Catch emission of unexpected errors for CI! */ |
67 | #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) | |
68 | #undef EINVAL | |
69 | #define EINVAL ({ \ | |
70 | DRM_DEBUG_DRIVER("EINVAL at %s:%d\n", __func__, __LINE__); \ | |
71 | 22; \ | |
72 | }) | |
73 | #endif | |
74 | ||
2889caa9 CW |
75 | /** |
76 | * DOC: User command execution | |
77 | * | |
78 | * Userspace submits commands to be executed on the GPU as an instruction | |
79 | * stream within a GEM object we call a batchbuffer. This instructions may | |
80 | * refer to other GEM objects containing auxiliary state such as kernels, | |
81 | * samplers, render targets and even secondary batchbuffers. Userspace does | |
82 | * not know where in the GPU memory these objects reside and so before the | |
83 | * batchbuffer is passed to the GPU for execution, those addresses in the | |
84 | * batchbuffer and auxiliary objects are updated. This is known as relocation, | |
85 | * or patching. To try and avoid having to relocate each object on the next | |
86 | * execution, userspace is told the location of those objects in this pass, | |
87 | * but this remains just a hint as the kernel may choose a new location for | |
88 | * any object in the future. | |
89 | * | |
99d7e4ee KR |
90 | * At the level of talking to the hardware, submitting a batchbuffer for the |
91 | * GPU to execute is to add content to a buffer from which the HW | |
92 | * command streamer is reading. | |
93 | * | |
94 | * 1. Add a command to load the HW context. For Logical Ring Contexts, i.e. | |
95 | * Execlists, this command is not placed on the same buffer as the | |
96 | * remaining items. | |
97 | * | |
98 | * 2. Add a command to invalidate caches to the buffer. | |
99 | * | |
100 | * 3. Add a batchbuffer start command to the buffer; the start command is | |
101 | * essentially a token together with the GPU address of the batchbuffer | |
102 | * to be executed. | |
103 | * | |
104 | * 4. Add a pipeline flush to the buffer. | |
105 | * | |
106 | * 5. Add a memory write command to the buffer to record when the GPU | |
107 | * is done executing the batchbuffer. The memory write writes the | |
108 | * global sequence number of the request, ``i915_request::global_seqno``; | |
109 | * the i915 driver uses the current value in the register to determine | |
110 | * if the GPU has completed the batchbuffer. | |
111 | * | |
112 | * 6. Add a user interrupt command to the buffer. This command instructs | |
113 | * the GPU to issue an interrupt when the command, pipeline flush and | |
114 | * memory write are completed. | |
115 | * | |
116 | * 7. Inform the hardware of the additional commands added to the buffer | |
117 | * (by updating the tail pointer). | |
118 | * | |
2889caa9 CW |
119 | * Processing an execbuf ioctl is conceptually split up into a few phases. |
120 | * | |
121 | * 1. Validation - Ensure all the pointers, handles and flags are valid. | |
122 | * 2. Reservation - Assign GPU address space for every object | |
123 | * 3. Relocation - Update any addresses to point to the final locations | |
124 | * 4. Serialisation - Order the request with respect to its dependencies | |
125 | * 5. Construction - Construct a request to execute the batchbuffer | |
126 | * 6. Submission (at some point in the future execution) | |
127 | * | |
128 | * Reserving resources for the execbuf is the most complicated phase. We | |
129 | * neither want to have to migrate the object in the address space, nor do | |
130 | * we want to have to update any relocations pointing to this object. Ideally, | |
131 | * we want to leave the object where it is and for all the existing relocations | |
132 | * to match. If the object is given a new address, or if userspace thinks the | |
133 | * object is elsewhere, we have to parse all the relocation entries and update | |
134 | * the addresses. Userspace can set the I915_EXEC_NORELOC flag to hint that | |
135 | * all the target addresses in all of its objects match the value in the | |
136 | * relocation entries and that they all match the presumed offsets given by the | |
137 | * list of execbuffer objects. Using this knowledge, we know that if we haven't | |
138 | * moved any buffers, all the relocation entries are valid and we can skip | |
139 | * the update. (If userspace is wrong, the likely outcome is an impromptu GPU | |
140 | * hang.) The requirement for using I915_EXEC_NO_RELOC are: | |
141 | * | |
142 | * The addresses written in the objects must match the corresponding | |
143 | * reloc.presumed_offset which in turn must match the corresponding | |
144 | * execobject.offset. | |
145 | * | |
146 | * Any render targets written to in the batch must be flagged with | |
147 | * EXEC_OBJECT_WRITE. | |
148 | * | |
149 | * To avoid stalling, execobject.offset should match the current | |
150 | * address of that object within the active context. | |
151 | * | |
152 | * The reservation is done is multiple phases. First we try and keep any | |
153 | * object already bound in its current location - so as long as meets the | |
154 | * constraints imposed by the new execbuffer. Any object left unbound after the | |
155 | * first pass is then fitted into any available idle space. If an object does | |
156 | * not fit, all objects are removed from the reservation and the process rerun | |
157 | * after sorting the objects into a priority order (more difficult to fit | |
158 | * objects are tried first). Failing that, the entire VM is cleared and we try | |
159 | * to fit the execbuf once last time before concluding that it simply will not | |
160 | * fit. | |
161 | * | |
162 | * A small complication to all of this is that we allow userspace not only to | |
163 | * specify an alignment and a size for the object in the address space, but | |
164 | * we also allow userspace to specify the exact offset. This objects are | |
165 | * simpler to place (the location is known a priori) all we have to do is make | |
166 | * sure the space is available. | |
167 | * | |
168 | * Once all the objects are in place, patching up the buried pointers to point | |
169 | * to the final locations is a fairly simple job of walking over the relocation | |
170 | * entry arrays, looking up the right address and rewriting the value into | |
171 | * the object. Simple! ... The relocation entries are stored in user memory | |
172 | * and so to access them we have to copy them into a local buffer. That copy | |
173 | * has to avoid taking any pagefaults as they may lead back to a GEM object | |
174 | * requiring the struct_mutex (i.e. recursive deadlock). So once again we split | |
175 | * the relocation into multiple passes. First we try to do everything within an | |
176 | * atomic context (avoid the pagefaults) which requires that we never wait. If | |
177 | * we detect that we may wait, or if we need to fault, then we have to fallback | |
178 | * to a slower path. The slowpath has to drop the mutex. (Can you hear alarm | |
179 | * bells yet?) Dropping the mutex means that we lose all the state we have | |
180 | * built up so far for the execbuf and we must reset any global data. However, | |
181 | * we do leave the objects pinned in their final locations - which is a | |
182 | * potential issue for concurrent execbufs. Once we have left the mutex, we can | |
183 | * allocate and copy all the relocation entries into a large array at our | |
184 | * leisure, reacquire the mutex, reclaim all the objects and other state and | |
185 | * then proceed to update any incorrect addresses with the objects. | |
186 | * | |
187 | * As we process the relocation entries, we maintain a record of whether the | |
188 | * object is being written to. Using NORELOC, we expect userspace to provide | |
189 | * this information instead. We also check whether we can skip the relocation | |
190 | * by comparing the expected value inside the relocation entry with the target's | |
191 | * final address. If they differ, we have to map the current object and rewrite | |
192 | * the 4 or 8 byte pointer within. | |
193 | * | |
194 | * Serialising an execbuf is quite simple according to the rules of the GEM | |
195 | * ABI. Execution within each context is ordered by the order of submission. | |
196 | * Writes to any GEM object are in order of submission and are exclusive. Reads | |
197 | * from a GEM object are unordered with respect to other reads, but ordered by | |
198 | * writes. A write submitted after a read cannot occur before the read, and | |
199 | * similarly any read submitted after a write cannot occur before the write. | |
200 | * Writes are ordered between engines such that only one write occurs at any | |
201 | * time (completing any reads beforehand) - using semaphores where available | |
202 | * and CPU serialisation otherwise. Other GEM access obey the same rules, any | |
203 | * write (either via mmaps using set-domain, or via pwrite) must flush all GPU | |
204 | * reads before starting, and any read (either using set-domain or pread) must | |
205 | * flush all GPU writes before starting. (Note we only employ a barrier before, | |
206 | * we currently rely on userspace not concurrently starting a new execution | |
207 | * whilst reading or writing to an object. This may be an advantage or not | |
208 | * depending on how much you trust userspace not to shoot themselves in the | |
209 | * foot.) Serialisation may just result in the request being inserted into | |
210 | * a DAG awaiting its turn, but most simple is to wait on the CPU until | |
211 | * all dependencies are resolved. | |
212 | * | |
213 | * After all of that, is just a matter of closing the request and handing it to | |
214 | * the hardware (well, leaving it in a queue to be executed). However, we also | |
215 | * offer the ability for batchbuffers to be run with elevated privileges so | |
216 | * that they access otherwise hidden registers. (Used to adjust L3 cache etc.) | |
217 | * Before any batch is given extra privileges we first must check that it | |
218 | * contains no nefarious instructions, we check that each instruction is from | |
219 | * our whitelist and all registers are also from an allowed list. We first | |
220 | * copy the user's batchbuffer to a shadow (so that the user doesn't have | |
221 | * access to it, either by the CPU or GPU as we scan it) and then parse each | |
222 | * instruction. If everything is ok, we set a flag telling the hardware to run | |
223 | * the batchbuffer in trusted mode, otherwise the ioctl is rejected. | |
224 | */ | |
225 | ||
650bc635 | 226 | struct i915_execbuffer { |
2889caa9 CW |
227 | struct drm_i915_private *i915; /** i915 backpointer */ |
228 | struct drm_file *file; /** per-file lookup tables and limits */ | |
229 | struct drm_i915_gem_execbuffer2 *args; /** ioctl parameters */ | |
230 | struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */ | |
7d6236bb | 231 | struct eb_vma *vma; |
2889caa9 CW |
232 | |
233 | struct intel_engine_cs *engine; /** engine to queue the request to */ | |
8f2a1057 CW |
234 | struct intel_context *context; /* logical state for the request */ |
235 | struct i915_gem_context *gem_context; /** caller's context */ | |
2889caa9 | 236 | |
e61e0f51 | 237 | struct i915_request *request; /** our request to build */ |
7d6236bb | 238 | struct eb_vma *batch; /** identity of the batch obj/vma */ |
32d94048 | 239 | struct i915_vma *trampoline; /** trampoline used for chaining */ |
2889caa9 CW |
240 | |
241 | /** actual size of execobj[] as we may extend it for the cmdparser */ | |
242 | unsigned int buffer_count; | |
243 | ||
244 | /** list of vma not yet bound during reservation phase */ | |
245 | struct list_head unbound; | |
246 | ||
247 | /** list of vma that have execobj.relocation_count */ | |
248 | struct list_head relocs; | |
249 | ||
250 | /** | |
251 | * Track the most recently used object for relocations, as we | |
252 | * frequently have to perform multiple relocations within the same | |
253 | * obj/page | |
254 | */ | |
650bc635 | 255 | struct reloc_cache { |
2889caa9 | 256 | struct drm_mm_node node; /** temporary GTT binding */ |
7dd4f672 | 257 | unsigned int gen; /** Cached value of INTEL_GEN */ |
650bc635 | 258 | bool use_64bit_reloc : 1; |
2889caa9 CW |
259 | bool has_llc : 1; |
260 | bool has_fence : 1; | |
261 | bool needs_unfenced : 1; | |
7dd4f672 | 262 | |
0e97fbb0 | 263 | struct i915_vma *target; |
e61e0f51 | 264 | struct i915_request *rq; |
964a9b0f | 265 | struct i915_vma *rq_vma; |
7dd4f672 CW |
266 | u32 *rq_cmd; |
267 | unsigned int rq_size; | |
650bc635 | 268 | } reloc_cache; |
2889caa9 CW |
269 | |
270 | u64 invalid_flags; /** Set of execobj.flags that are invalid */ | |
271 | u32 context_flags; /** Set of execobj.flags to insert from the ctx */ | |
272 | ||
273 | u32 batch_start_offset; /** Location within object of batch */ | |
274 | u32 batch_len; /** Length of batch within object */ | |
275 | u32 batch_flags; /** Flags composed for emit_bb_start() */ | |
276 | ||
277 | /** | |
278 | * Indicate either the size of the hastable used to resolve | |
279 | * relocation handles, or if negative that we are using a direct | |
280 | * index into the execobj[]. | |
281 | */ | |
282 | int lut_size; | |
283 | struct hlist_head *buckets; /** ht for relocation handles */ | |
0f1dd022 | 284 | struct eb_vma_array *array; |
cda9edd0 LL |
285 | |
286 | struct i915_eb_fence { | |
287 | struct drm_syncobj *syncobj; /* Use with ptr_mask_bits() */ | |
288 | } *fences; | |
289 | u32 n_fences; | |
290 | ||
291 | u64 extension_flags; /** Available extensions parameters */ | |
67731b87 CW |
292 | }; |
293 | ||
3dbf26ed CW |
294 | static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb) |
295 | { | |
311a50e7 | 296 | return intel_engine_requires_cmd_parser(eb->engine) || |
435e8fc0 JB |
297 | (intel_engine_using_cmd_parser(eb->engine) && |
298 | eb->args->batch_len); | |
3dbf26ed CW |
299 | } |
300 | ||
0f1dd022 CW |
301 | static struct eb_vma_array *eb_vma_array_create(unsigned int count) |
302 | { | |
303 | struct eb_vma_array *arr; | |
304 | ||
305 | arr = kvmalloc(struct_size(arr, vma, count), GFP_KERNEL | __GFP_NOWARN); | |
306 | if (!arr) | |
307 | return NULL; | |
308 | ||
309 | kref_init(&arr->kref); | |
310 | arr->vma[0].vma = NULL; | |
311 | ||
312 | return arr; | |
313 | } | |
314 | ||
315 | static inline void eb_unreserve_vma(struct eb_vma *ev) | |
316 | { | |
317 | struct i915_vma *vma = ev->vma; | |
318 | ||
319 | if (unlikely(ev->flags & __EXEC_OBJECT_HAS_FENCE)) | |
320 | __i915_vma_unpin_fence(vma); | |
321 | ||
322 | if (ev->flags & __EXEC_OBJECT_HAS_PIN) | |
323 | __i915_vma_unpin(vma); | |
324 | ||
325 | ev->flags &= ~(__EXEC_OBJECT_HAS_PIN | | |
326 | __EXEC_OBJECT_HAS_FENCE); | |
327 | } | |
328 | ||
329 | static void eb_vma_array_destroy(struct kref *kref) | |
330 | { | |
331 | struct eb_vma_array *arr = container_of(kref, typeof(*arr), kref); | |
332 | struct eb_vma *ev = arr->vma; | |
333 | ||
334 | while (ev->vma) { | |
335 | eb_unreserve_vma(ev); | |
336 | i915_vma_put(ev->vma); | |
337 | ev++; | |
338 | } | |
339 | ||
340 | kvfree(arr); | |
341 | } | |
342 | ||
343 | static void eb_vma_array_put(struct eb_vma_array *arr) | |
344 | { | |
345 | kref_put(&arr->kref, eb_vma_array_destroy); | |
346 | } | |
347 | ||
650bc635 | 348 | static int eb_create(struct i915_execbuffer *eb) |
67731b87 | 349 | { |
0f1dd022 CW |
350 | /* Allocate an extra slot for use by the command parser + sentinel */ |
351 | eb->array = eb_vma_array_create(eb->buffer_count + 2); | |
352 | if (!eb->array) | |
353 | return -ENOMEM; | |
354 | ||
355 | eb->vma = eb->array->vma; | |
356 | ||
2889caa9 CW |
357 | if (!(eb->args->flags & I915_EXEC_HANDLE_LUT)) { |
358 | unsigned int size = 1 + ilog2(eb->buffer_count); | |
4ff4b44c | 359 | |
2889caa9 CW |
360 | /* |
361 | * Without a 1:1 association between relocation handles and | |
362 | * the execobject[] index, we instead create a hashtable. | |
363 | * We size it dynamically based on available memory, starting | |
364 | * first with 1:1 assocative hash and scaling back until | |
365 | * the allocation succeeds. | |
366 | * | |
367 | * Later on we use a positive lut_size to indicate we are | |
368 | * using this hashtable, and a negative value to indicate a | |
369 | * direct lookup. | |
370 | */ | |
4ff4b44c | 371 | do { |
0d95c883 | 372 | gfp_t flags; |
4d470f73 CW |
373 | |
374 | /* While we can still reduce the allocation size, don't | |
375 | * raise a warning and allow the allocation to fail. | |
376 | * On the last pass though, we want to try as hard | |
377 | * as possible to perform the allocation and warn | |
378 | * if it fails. | |
379 | */ | |
0ee931c4 | 380 | flags = GFP_KERNEL; |
4d470f73 CW |
381 | if (size > 1) |
382 | flags |= __GFP_NORETRY | __GFP_NOWARN; | |
383 | ||
4ff4b44c | 384 | eb->buckets = kzalloc(sizeof(struct hlist_head) << size, |
4d470f73 | 385 | flags); |
4ff4b44c CW |
386 | if (eb->buckets) |
387 | break; | |
388 | } while (--size); | |
389 | ||
0f1dd022 CW |
390 | if (unlikely(!size)) { |
391 | eb_vma_array_put(eb->array); | |
4d470f73 | 392 | return -ENOMEM; |
0f1dd022 | 393 | } |
eef90ccb | 394 | |
2889caa9 | 395 | eb->lut_size = size; |
650bc635 | 396 | } else { |
2889caa9 | 397 | eb->lut_size = -eb->buffer_count; |
650bc635 | 398 | } |
eef90ccb | 399 | |
650bc635 | 400 | return 0; |
67731b87 CW |
401 | } |
402 | ||
2889caa9 CW |
403 | static bool |
404 | eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry, | |
c7c6e46f CW |
405 | const struct i915_vma *vma, |
406 | unsigned int flags) | |
2889caa9 | 407 | { |
2889caa9 CW |
408 | if (vma->node.size < entry->pad_to_size) |
409 | return true; | |
410 | ||
411 | if (entry->alignment && !IS_ALIGNED(vma->node.start, entry->alignment)) | |
412 | return true; | |
413 | ||
c7c6e46f | 414 | if (flags & EXEC_OBJECT_PINNED && |
2889caa9 CW |
415 | vma->node.start != entry->offset) |
416 | return true; | |
417 | ||
c7c6e46f | 418 | if (flags & __EXEC_OBJECT_NEEDS_BIAS && |
2889caa9 CW |
419 | vma->node.start < BATCH_OFFSET_BIAS) |
420 | return true; | |
421 | ||
c7c6e46f | 422 | if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) && |
2889caa9 CW |
423 | (vma->node.start + vma->node.size - 1) >> 32) |
424 | return true; | |
425 | ||
1d033beb CW |
426 | if (flags & __EXEC_OBJECT_NEEDS_MAP && |
427 | !i915_vma_is_map_and_fenceable(vma)) | |
428 | return true; | |
429 | ||
2889caa9 CW |
430 | return false; |
431 | } | |
432 | ||
8a338f4b CW |
433 | static u64 eb_pin_flags(const struct drm_i915_gem_exec_object2 *entry, |
434 | unsigned int exec_flags) | |
435 | { | |
436 | u64 pin_flags = 0; | |
437 | ||
438 | if (exec_flags & EXEC_OBJECT_NEEDS_GTT) | |
439 | pin_flags |= PIN_GLOBAL; | |
440 | ||
441 | /* | |
442 | * Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset, | |
443 | * limit address to the first 4GBs for unflagged objects. | |
444 | */ | |
445 | if (!(exec_flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) | |
446 | pin_flags |= PIN_ZONE_4G; | |
447 | ||
448 | if (exec_flags & __EXEC_OBJECT_NEEDS_MAP) | |
449 | pin_flags |= PIN_MAPPABLE; | |
450 | ||
451 | if (exec_flags & EXEC_OBJECT_PINNED) | |
452 | pin_flags |= entry->offset | PIN_OFFSET_FIXED; | |
453 | else if (exec_flags & __EXEC_OBJECT_NEEDS_BIAS) | |
454 | pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS; | |
455 | ||
456 | return pin_flags; | |
457 | } | |
458 | ||
c7c6e46f | 459 | static inline bool |
2889caa9 | 460 | eb_pin_vma(struct i915_execbuffer *eb, |
c7c6e46f | 461 | const struct drm_i915_gem_exec_object2 *entry, |
7d6236bb | 462 | struct eb_vma *ev) |
2889caa9 | 463 | { |
7d6236bb | 464 | struct i915_vma *vma = ev->vma; |
c7c6e46f | 465 | u64 pin_flags; |
2889caa9 | 466 | |
616d9cee | 467 | if (vma->node.size) |
c7c6e46f | 468 | pin_flags = vma->node.start; |
616d9cee | 469 | else |
c7c6e46f | 470 | pin_flags = entry->offset & PIN_OFFSET_MASK; |
616d9cee | 471 | |
c7c6e46f | 472 | pin_flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED; |
7d6236bb | 473 | if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_GTT)) |
c7c6e46f | 474 | pin_flags |= PIN_GLOBAL; |
616d9cee | 475 | |
8a338f4b CW |
476 | /* Attempt to reuse the current location if available */ |
477 | if (unlikely(i915_vma_pin(vma, 0, 0, pin_flags))) { | |
478 | if (entry->flags & EXEC_OBJECT_PINNED) | |
479 | return false; | |
480 | ||
481 | /* Failing that pick any _free_ space if suitable */ | |
482 | if (unlikely(i915_vma_pin(vma, | |
483 | entry->pad_to_size, | |
484 | entry->alignment, | |
485 | eb_pin_flags(entry, ev->flags) | | |
486 | PIN_USER | PIN_NOEVICT))) | |
487 | return false; | |
488 | } | |
2889caa9 | 489 | |
7d6236bb | 490 | if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) { |
3bd40735 | 491 | if (unlikely(i915_vma_pin_fence(vma))) { |
2889caa9 | 492 | i915_vma_unpin(vma); |
c7c6e46f | 493 | return false; |
2889caa9 CW |
494 | } |
495 | ||
3bd40735 | 496 | if (vma->fence) |
7d6236bb | 497 | ev->flags |= __EXEC_OBJECT_HAS_FENCE; |
2889caa9 CW |
498 | } |
499 | ||
7d6236bb CW |
500 | ev->flags |= __EXEC_OBJECT_HAS_PIN; |
501 | return !eb_vma_misplaced(entry, vma, ev->flags); | |
2889caa9 CW |
502 | } |
503 | ||
2889caa9 CW |
504 | static int |
505 | eb_validate_vma(struct i915_execbuffer *eb, | |
506 | struct drm_i915_gem_exec_object2 *entry, | |
507 | struct i915_vma *vma) | |
67731b87 | 508 | { |
2889caa9 CW |
509 | if (unlikely(entry->flags & eb->invalid_flags)) |
510 | return -EINVAL; | |
d55495b4 | 511 | |
2920516b MA |
512 | if (unlikely(entry->alignment && |
513 | !is_power_of_2_u64(entry->alignment))) | |
2889caa9 CW |
514 | return -EINVAL; |
515 | ||
516 | /* | |
517 | * Offset can be used as input (EXEC_OBJECT_PINNED), reject | |
518 | * any non-page-aligned or non-canonical addresses. | |
519 | */ | |
520 | if (unlikely(entry->flags & EXEC_OBJECT_PINNED && | |
6fc4e48f | 521 | entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK))) |
2889caa9 CW |
522 | return -EINVAL; |
523 | ||
524 | /* pad_to_size was once a reserved field, so sanitize it */ | |
525 | if (entry->flags & EXEC_OBJECT_PAD_TO_SIZE) { | |
526 | if (unlikely(offset_in_page(entry->pad_to_size))) | |
527 | return -EINVAL; | |
528 | } else { | |
529 | entry->pad_to_size = 0; | |
d55495b4 | 530 | } |
2889caa9 CW |
531 | /* |
532 | * From drm_mm perspective address space is continuous, | |
533 | * so from this point we're always using non-canonical | |
534 | * form internally. | |
535 | */ | |
536 | entry->offset = gen8_noncanonical_addr(entry->offset); | |
537 | ||
c7c6e46f CW |
538 | if (!eb->reloc_cache.has_fence) { |
539 | entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE; | |
540 | } else { | |
541 | if ((entry->flags & EXEC_OBJECT_NEEDS_FENCE || | |
542 | eb->reloc_cache.needs_unfenced) && | |
543 | i915_gem_object_is_tiled(vma->obj)) | |
544 | entry->flags |= EXEC_OBJECT_NEEDS_GTT | __EXEC_OBJECT_NEEDS_MAP; | |
545 | } | |
546 | ||
547 | if (!(entry->flags & EXEC_OBJECT_PINNED)) | |
548 | entry->flags |= eb->context_flags; | |
549 | ||
2889caa9 | 550 | return 0; |
67731b87 CW |
551 | } |
552 | ||
003d8b91 | 553 | static void |
746c8f14 CW |
554 | eb_add_vma(struct i915_execbuffer *eb, |
555 | unsigned int i, unsigned batch_idx, | |
556 | struct i915_vma *vma) | |
59bfa124 | 557 | { |
c7c6e46f | 558 | struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; |
7d6236bb | 559 | struct eb_vma *ev = &eb->vma[i]; |
2889caa9 CW |
560 | |
561 | GEM_BUG_ON(i915_vma_is_closed(vma)); | |
562 | ||
93159e12 | 563 | ev->vma = vma; |
7d6236bb CW |
564 | ev->exec = entry; |
565 | ev->flags = entry->flags; | |
566 | ||
4d470f73 | 567 | if (eb->lut_size > 0) { |
7d6236bb CW |
568 | ev->handle = entry->handle; |
569 | hlist_add_head(&ev->node, | |
2889caa9 CW |
570 | &eb->buckets[hash_32(entry->handle, |
571 | eb->lut_size)]); | |
4ff4b44c | 572 | } |
59bfa124 | 573 | |
2889caa9 | 574 | if (entry->relocation_count) |
7d6236bb | 575 | list_add_tail(&ev->reloc_link, &eb->relocs); |
2889caa9 | 576 | |
746c8f14 CW |
577 | /* |
578 | * SNA is doing fancy tricks with compressing batch buffers, which leads | |
579 | * to negative relocation deltas. Usually that works out ok since the | |
580 | * relocate address is still positive, except when the batch is placed | |
581 | * very low in the GTT. Ensure this doesn't happen. | |
582 | * | |
583 | * Note that actual hangs have only been observed on gen7, but for | |
584 | * paranoia do it everywhere. | |
585 | */ | |
586 | if (i == batch_idx) { | |
827db9d8 | 587 | if (entry->relocation_count && |
7d6236bb CW |
588 | !(ev->flags & EXEC_OBJECT_PINNED)) |
589 | ev->flags |= __EXEC_OBJECT_NEEDS_BIAS; | |
746c8f14 | 590 | if (eb->reloc_cache.has_fence) |
7d6236bb | 591 | ev->flags |= EXEC_OBJECT_NEEDS_FENCE; |
746c8f14 | 592 | |
7d6236bb | 593 | eb->batch = ev; |
746c8f14 CW |
594 | } |
595 | ||
7d6236bb | 596 | if (eb_pin_vma(eb, entry, ev)) { |
2889caa9 CW |
597 | if (entry->offset != vma->node.start) { |
598 | entry->offset = vma->node.start | UPDATE; | |
599 | eb->args->flags |= __EXEC_HAS_RELOC; | |
600 | } | |
c7c6e46f | 601 | } else { |
7d6236bb | 602 | eb_unreserve_vma(ev); |
7d6236bb | 603 | list_add_tail(&ev->bind_link, &eb->unbound); |
2889caa9 | 604 | } |
2889caa9 CW |
605 | } |
606 | ||
2889caa9 | 607 | static int eb_reserve_vma(const struct i915_execbuffer *eb, |
7d6236bb | 608 | struct eb_vma *ev, |
2920bb94 | 609 | u64 pin_flags) |
2889caa9 | 610 | { |
7d6236bb | 611 | struct drm_i915_gem_exec_object2 *entry = ev->exec; |
7d6236bb | 612 | struct i915_vma *vma = ev->vma; |
2889caa9 CW |
613 | int err; |
614 | ||
003d8b91 CW |
615 | if (drm_mm_node_allocated(&vma->node) && |
616 | eb_vma_misplaced(entry, vma, ev->flags)) { | |
617 | err = i915_vma_unbind(vma); | |
618 | if (err) | |
619 | return err; | |
620 | } | |
621 | ||
c7c6e46f CW |
622 | err = i915_vma_pin(vma, |
623 | entry->pad_to_size, entry->alignment, | |
8a338f4b | 624 | eb_pin_flags(entry, ev->flags) | pin_flags); |
2889caa9 CW |
625 | if (err) |
626 | return err; | |
627 | ||
628 | if (entry->offset != vma->node.start) { | |
629 | entry->offset = vma->node.start | UPDATE; | |
630 | eb->args->flags |= __EXEC_HAS_RELOC; | |
631 | } | |
632 | ||
8a338f4b | 633 | if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) { |
3bd40735 | 634 | err = i915_vma_pin_fence(vma); |
2889caa9 CW |
635 | if (unlikely(err)) { |
636 | i915_vma_unpin(vma); | |
637 | return err; | |
638 | } | |
639 | ||
3bd40735 | 640 | if (vma->fence) |
8a338f4b | 641 | ev->flags |= __EXEC_OBJECT_HAS_FENCE; |
2889caa9 CW |
642 | } |
643 | ||
8a338f4b | 644 | ev->flags |= __EXEC_OBJECT_HAS_PIN; |
7d6236bb | 645 | GEM_BUG_ON(eb_vma_misplaced(entry, vma, ev->flags)); |
1da7b54c | 646 | |
2889caa9 CW |
647 | return 0; |
648 | } | |
649 | ||
650 | static int eb_reserve(struct i915_execbuffer *eb) | |
651 | { | |
652 | const unsigned int count = eb->buffer_count; | |
2920bb94 | 653 | unsigned int pin_flags = PIN_USER | PIN_NONBLOCK; |
2889caa9 | 654 | struct list_head last; |
7d6236bb | 655 | struct eb_vma *ev; |
2889caa9 | 656 | unsigned int i, pass; |
ef398881 | 657 | int err = 0; |
2889caa9 CW |
658 | |
659 | /* | |
660 | * Attempt to pin all of the buffers into the GTT. | |
661 | * This is done in 3 phases: | |
662 | * | |
663 | * 1a. Unbind all objects that do not match the GTT constraints for | |
664 | * the execbuffer (fenceable, mappable, alignment etc). | |
665 | * 1b. Increment pin count for already bound objects. | |
666 | * 2. Bind new objects. | |
667 | * 3. Decrement pin count. | |
668 | * | |
669 | * This avoid unnecessary unbinding of later objects in order to make | |
670 | * room for the earlier objects *unless* we need to defragment. | |
671 | */ | |
672 | ||
ef398881 CW |
673 | if (mutex_lock_interruptible(&eb->i915->drm.struct_mutex)) |
674 | return -EINTR; | |
675 | ||
2889caa9 | 676 | pass = 0; |
2889caa9 | 677 | do { |
7d6236bb CW |
678 | list_for_each_entry(ev, &eb->unbound, bind_link) { |
679 | err = eb_reserve_vma(eb, ev, pin_flags); | |
2889caa9 CW |
680 | if (err) |
681 | break; | |
682 | } | |
003d8b91 | 683 | if (!(err == -ENOSPC || err == -EAGAIN)) |
ef398881 | 684 | break; |
2889caa9 CW |
685 | |
686 | /* Resort *all* the objects into priority order */ | |
687 | INIT_LIST_HEAD(&eb->unbound); | |
688 | INIT_LIST_HEAD(&last); | |
689 | for (i = 0; i < count; i++) { | |
7d6236bb | 690 | unsigned int flags; |
2889caa9 | 691 | |
7d6236bb CW |
692 | ev = &eb->vma[i]; |
693 | flags = ev->flags; | |
c7c6e46f CW |
694 | if (flags & EXEC_OBJECT_PINNED && |
695 | flags & __EXEC_OBJECT_HAS_PIN) | |
2889caa9 CW |
696 | continue; |
697 | ||
7d6236bb | 698 | eb_unreserve_vma(ev); |
2889caa9 | 699 | |
c7c6e46f | 700 | if (flags & EXEC_OBJECT_PINNED) |
35e882a4 | 701 | /* Pinned must have their slot */ |
7d6236bb | 702 | list_add(&ev->bind_link, &eb->unbound); |
c7c6e46f | 703 | else if (flags & __EXEC_OBJECT_NEEDS_MAP) |
35e882a4 | 704 | /* Map require the lowest 256MiB (aperture) */ |
7d6236bb | 705 | list_add_tail(&ev->bind_link, &eb->unbound); |
35e882a4 CW |
706 | else if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) |
707 | /* Prioritise 4GiB region for restricted bo */ | |
7d6236bb | 708 | list_add(&ev->bind_link, &last); |
2889caa9 | 709 | else |
7d6236bb | 710 | list_add_tail(&ev->bind_link, &last); |
2889caa9 CW |
711 | } |
712 | list_splice_tail(&last, &eb->unbound); | |
713 | ||
003d8b91 | 714 | if (err == -EAGAIN) { |
ef398881 | 715 | mutex_unlock(&eb->i915->drm.struct_mutex); |
003d8b91 | 716 | flush_workqueue(eb->i915->mm.userptr_wq); |
ef398881 | 717 | mutex_lock(&eb->i915->drm.struct_mutex); |
003d8b91 CW |
718 | continue; |
719 | } | |
720 | ||
2889caa9 CW |
721 | switch (pass++) { |
722 | case 0: | |
723 | break; | |
724 | ||
725 | case 1: | |
726 | /* Too fragmented, unbind everything and retry */ | |
2850748e | 727 | mutex_lock(&eb->context->vm->mutex); |
f5d974f9 | 728 | err = i915_gem_evict_vm(eb->context->vm); |
2850748e | 729 | mutex_unlock(&eb->context->vm->mutex); |
2889caa9 | 730 | if (err) |
ef398881 | 731 | goto unlock; |
2889caa9 CW |
732 | break; |
733 | ||
734 | default: | |
ef398881 CW |
735 | err = -ENOSPC; |
736 | goto unlock; | |
2889caa9 | 737 | } |
2920bb94 CW |
738 | |
739 | pin_flags = PIN_USER; | |
2889caa9 | 740 | } while (1); |
ef398881 CW |
741 | |
742 | unlock: | |
743 | mutex_unlock(&eb->i915->drm.struct_mutex); | |
744 | return err; | |
4ff4b44c | 745 | } |
59bfa124 | 746 | |
2889caa9 CW |
747 | static unsigned int eb_batch_index(const struct i915_execbuffer *eb) |
748 | { | |
1a71cf2f CW |
749 | if (eb->args->flags & I915_EXEC_BATCH_FIRST) |
750 | return 0; | |
751 | else | |
752 | return eb->buffer_count - 1; | |
2889caa9 CW |
753 | } |
754 | ||
755 | static int eb_select_context(struct i915_execbuffer *eb) | |
756 | { | |
757 | struct i915_gem_context *ctx; | |
758 | ||
759 | ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1); | |
1acfc104 CW |
760 | if (unlikely(!ctx)) |
761 | return -ENOENT; | |
2889caa9 | 762 | |
8f2a1057 | 763 | eb->gem_context = ctx; |
a4e7ccda | 764 | if (rcu_access_pointer(ctx->vm)) |
4f2c7337 | 765 | eb->invalid_flags |= EXEC_OBJECT_NEEDS_GTT; |
2889caa9 CW |
766 | |
767 | eb->context_flags = 0; | |
d3f3e5e4 | 768 | if (test_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags)) |
2889caa9 CW |
769 | eb->context_flags |= __EXEC_OBJECT_NEEDS_BIAS; |
770 | ||
771 | return 0; | |
772 | } | |
773 | ||
93159e12 CW |
774 | static int __eb_add_lut(struct i915_execbuffer *eb, |
775 | u32 handle, struct i915_vma *vma) | |
3b96eff4 | 776 | { |
93159e12 CW |
777 | struct i915_gem_context *ctx = eb->gem_context; |
778 | struct i915_lut_handle *lut; | |
2889caa9 | 779 | int err; |
3b96eff4 | 780 | |
93159e12 CW |
781 | lut = i915_lut_handle_alloc(); |
782 | if (unlikely(!lut)) | |
783 | return -ENOMEM; | |
784 | ||
785 | i915_vma_get(vma); | |
786 | if (!atomic_fetch_inc(&vma->open_count)) | |
787 | i915_vma_reopen(vma); | |
788 | lut->handle = handle; | |
789 | lut->ctx = ctx; | |
790 | ||
791 | /* Check that the context hasn't been closed in the meantime */ | |
792 | err = -EINTR; | |
f7ce8639 CW |
793 | if (!mutex_lock_interruptible(&ctx->lut_mutex)) { |
794 | struct i915_address_space *vm = rcu_access_pointer(ctx->vm); | |
795 | ||
796 | if (unlikely(vm && vma->vm != vm)) | |
797 | err = -EAGAIN; /* user racing with ctx set-vm */ | |
798 | else if (likely(!i915_gem_context_is_closed(ctx))) | |
93159e12 | 799 | err = radix_tree_insert(&ctx->handles_vma, handle, vma); |
f7ce8639 CW |
800 | else |
801 | err = -ENOENT; | |
93159e12 CW |
802 | if (err == 0) { /* And nor has this handle */ |
803 | struct drm_i915_gem_object *obj = vma->obj; | |
804 | ||
096a42dd | 805 | spin_lock(&obj->lut_lock); |
93159e12 CW |
806 | if (idr_find(&eb->file->object_idr, handle) == obj) { |
807 | list_add(&lut->obj_link, &obj->lut_list); | |
808 | } else { | |
809 | radix_tree_delete(&ctx->handles_vma, handle); | |
810 | err = -ENOENT; | |
811 | } | |
096a42dd | 812 | spin_unlock(&obj->lut_lock); |
93159e12 | 813 | } |
f7ce8639 | 814 | mutex_unlock(&ctx->lut_mutex); |
93159e12 CW |
815 | } |
816 | if (unlikely(err)) | |
817 | goto err; | |
003d8b91 | 818 | |
93159e12 | 819 | return 0; |
d55495b4 | 820 | |
93159e12 | 821 | err: |
50689771 | 822 | i915_vma_close(vma); |
93159e12 CW |
823 | i915_vma_put(vma); |
824 | i915_lut_handle_free(lut); | |
825 | return err; | |
826 | } | |
746c8f14 | 827 | |
93159e12 CW |
828 | static struct i915_vma *eb_lookup_vma(struct i915_execbuffer *eb, u32 handle) |
829 | { | |
f7ce8639 CW |
830 | struct i915_address_space *vm = eb->context->vm; |
831 | ||
93159e12 CW |
832 | do { |
833 | struct drm_i915_gem_object *obj; | |
170fa29b | 834 | struct i915_vma *vma; |
93159e12 | 835 | int err; |
4ff4b44c | 836 | |
93159e12 CW |
837 | rcu_read_lock(); |
838 | vma = radix_tree_lookup(&eb->gem_context->handles_vma, handle); | |
f7ce8639 | 839 | if (likely(vma && vma->vm == vm)) |
93159e12 CW |
840 | vma = i915_vma_tryget(vma); |
841 | rcu_read_unlock(); | |
842 | if (likely(vma)) | |
843 | return vma; | |
4ff4b44c | 844 | |
170fa29b | 845 | obj = i915_gem_object_lookup(eb->file, handle); |
93159e12 CW |
846 | if (unlikely(!obj)) |
847 | return ERR_PTR(-ENOENT); | |
3b96eff4 | 848 | |
f7ce8639 | 849 | vma = i915_vma_instance(obj, vm, NULL); |
772b5408 | 850 | if (IS_ERR(vma)) { |
93159e12 CW |
851 | i915_gem_object_put(obj); |
852 | return vma; | |
27173f1f BW |
853 | } |
854 | ||
93159e12 CW |
855 | err = __eb_add_lut(eb, handle, vma); |
856 | if (likely(!err)) | |
857 | return vma; | |
d1b48c1e | 858 | |
93159e12 CW |
859 | i915_gem_object_put(obj); |
860 | if (err != -EEXIST) | |
861 | return ERR_PTR(err); | |
862 | } while (1); | |
863 | } | |
4ff4b44c | 864 | |
93159e12 CW |
865 | static int eb_lookup_vmas(struct i915_execbuffer *eb) |
866 | { | |
867 | unsigned int batch = eb_batch_index(eb); | |
868 | unsigned int i; | |
869 | int err = 0; | |
155ab883 | 870 | |
93159e12 CW |
871 | INIT_LIST_HEAD(&eb->relocs); |
872 | INIT_LIST_HEAD(&eb->unbound); | |
873 | ||
874 | for (i = 0; i < eb->buffer_count; i++) { | |
875 | struct i915_vma *vma; | |
876 | ||
877 | vma = eb_lookup_vma(eb, eb->exec[i].handle); | |
878 | if (IS_ERR(vma)) { | |
879 | err = PTR_ERR(vma); | |
880 | break; | |
881 | } | |
d1b48c1e | 882 | |
003d8b91 | 883 | err = eb_validate_vma(eb, &eb->exec[i], vma); |
93159e12 CW |
884 | if (unlikely(err)) { |
885 | i915_vma_put(vma); | |
886 | break; | |
887 | } | |
dade2a61 | 888 | |
003d8b91 | 889 | eb_add_vma(eb, i, batch, vma); |
4ff4b44c CW |
890 | } |
891 | ||
7d6236bb | 892 | eb->vma[i].vma = NULL; |
2889caa9 | 893 | return err; |
3b96eff4 CW |
894 | } |
895 | ||
7d6236bb | 896 | static struct eb_vma * |
2889caa9 | 897 | eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle) |
67731b87 | 898 | { |
2889caa9 CW |
899 | if (eb->lut_size < 0) { |
900 | if (handle >= -eb->lut_size) | |
eef90ccb | 901 | return NULL; |
7d6236bb | 902 | return &eb->vma[handle]; |
eef90ccb CW |
903 | } else { |
904 | struct hlist_head *head; | |
7d6236bb | 905 | struct eb_vma *ev; |
67731b87 | 906 | |
2889caa9 | 907 | head = &eb->buckets[hash_32(handle, eb->lut_size)]; |
7d6236bb CW |
908 | hlist_for_each_entry(ev, head, node) { |
909 | if (ev->handle == handle) | |
910 | return ev; | |
eef90ccb CW |
911 | } |
912 | return NULL; | |
913 | } | |
67731b87 CW |
914 | } |
915 | ||
2889caa9 | 916 | static void eb_destroy(const struct i915_execbuffer *eb) |
934acce3 | 917 | { |
7dd4f672 CW |
918 | GEM_BUG_ON(eb->reloc_cache.rq); |
919 | ||
0f1dd022 CW |
920 | if (eb->array) |
921 | eb_vma_array_put(eb->array); | |
922 | ||
4d470f73 | 923 | if (eb->lut_size > 0) |
2889caa9 | 924 | kfree(eb->buckets); |
934acce3 MW |
925 | } |
926 | ||
2889caa9 | 927 | static inline u64 |
d50415cc | 928 | relocation_target(const struct drm_i915_gem_relocation_entry *reloc, |
2889caa9 | 929 | const struct i915_vma *target) |
934acce3 | 930 | { |
2889caa9 | 931 | return gen8_canonical_addr((int)reloc->delta + target->node.start); |
934acce3 MW |
932 | } |
933 | ||
d50415cc CW |
934 | static void reloc_cache_init(struct reloc_cache *cache, |
935 | struct drm_i915_private *i915) | |
5032d871 | 936 | { |
dfc5148f | 937 | /* Must be a variable in the struct to allow GCC to unroll. */ |
7dd4f672 | 938 | cache->gen = INTEL_GEN(i915); |
2889caa9 | 939 | cache->has_llc = HAS_LLC(i915); |
dfc5148f | 940 | cache->use_64bit_reloc = HAS_64BIT_RELOC(i915); |
7dd4f672 CW |
941 | cache->has_fence = cache->gen < 4; |
942 | cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment; | |
4ee92c71 | 943 | cache->node.flags = 0; |
7dd4f672 | 944 | cache->rq = NULL; |
e3d29130 | 945 | cache->target = NULL; |
d50415cc | 946 | } |
5032d871 | 947 | |
964a9b0f CW |
948 | #define RELOC_TAIL 4 |
949 | ||
950 | static int reloc_gpu_chain(struct reloc_cache *cache) | |
951 | { | |
952 | struct intel_gt_buffer_pool_node *pool; | |
953 | struct i915_request *rq = cache->rq; | |
954 | struct i915_vma *batch; | |
955 | u32 *cmd; | |
956 | int err; | |
957 | ||
958 | pool = intel_gt_get_buffer_pool(rq->engine->gt, PAGE_SIZE); | |
959 | if (IS_ERR(pool)) | |
960 | return PTR_ERR(pool); | |
961 | ||
962 | batch = i915_vma_instance(pool->obj, rq->context->vm, NULL); | |
963 | if (IS_ERR(batch)) { | |
964 | err = PTR_ERR(batch); | |
965 | goto out_pool; | |
966 | } | |
967 | ||
968 | err = i915_vma_pin(batch, 0, 0, PIN_USER | PIN_NONBLOCK); | |
969 | if (err) | |
970 | goto out_pool; | |
971 | ||
972 | GEM_BUG_ON(cache->rq_size + RELOC_TAIL > PAGE_SIZE / sizeof(u32)); | |
973 | cmd = cache->rq_cmd + cache->rq_size; | |
974 | *cmd++ = MI_ARB_CHECK; | |
f5b62bdb | 975 | if (cache->gen >= 8) |
964a9b0f | 976 | *cmd++ = MI_BATCH_BUFFER_START_GEN8; |
f5b62bdb | 977 | else if (cache->gen >= 6) |
964a9b0f | 978 | *cmd++ = MI_BATCH_BUFFER_START; |
f5b62bdb CW |
979 | else |
980 | *cmd++ = MI_BATCH_BUFFER_START | MI_BATCH_GTT; | |
981 | *cmd++ = lower_32_bits(batch->node.start); | |
982 | *cmd++ = upper_32_bits(batch->node.start); /* Always 0 for gen<8 */ | |
964a9b0f CW |
983 | i915_gem_object_flush_map(cache->rq_vma->obj); |
984 | i915_gem_object_unpin_map(cache->rq_vma->obj); | |
985 | cache->rq_vma = NULL; | |
986 | ||
987 | err = intel_gt_buffer_pool_mark_active(pool, rq); | |
988 | if (err == 0) { | |
989 | i915_vma_lock(batch); | |
990 | err = i915_request_await_object(rq, batch->obj, false); | |
991 | if (err == 0) | |
992 | err = i915_vma_move_to_active(batch, rq, 0); | |
993 | i915_vma_unlock(batch); | |
994 | } | |
995 | i915_vma_unpin(batch); | |
996 | if (err) | |
997 | goto out_pool; | |
998 | ||
999 | cmd = i915_gem_object_pin_map(batch->obj, | |
1000 | cache->has_llc ? | |
1001 | I915_MAP_FORCE_WB : | |
1002 | I915_MAP_FORCE_WC); | |
1003 | if (IS_ERR(cmd)) { | |
1004 | err = PTR_ERR(cmd); | |
1005 | goto out_pool; | |
1006 | } | |
1007 | ||
1008 | /* Return with batch mapping (cmd) still pinned */ | |
1009 | cache->rq_cmd = cmd; | |
1010 | cache->rq_size = 0; | |
1011 | cache->rq_vma = batch; | |
1012 | ||
1013 | out_pool: | |
1014 | intel_gt_buffer_pool_put(pool); | |
1015 | return err; | |
1016 | } | |
1017 | ||
1018 | static unsigned int reloc_bb_flags(const struct reloc_cache *cache) | |
1019 | { | |
1020 | return cache->gen > 5 ? 0 : I915_DISPATCH_SECURE; | |
1021 | } | |
1022 | ||
0e97fbb0 | 1023 | static int reloc_gpu_flush(struct reloc_cache *cache) |
7dd4f672 | 1024 | { |
964a9b0f CW |
1025 | struct i915_request *rq; |
1026 | int err; | |
30c88a47 | 1027 | |
964a9b0f CW |
1028 | rq = fetch_and_zero(&cache->rq); |
1029 | if (!rq) | |
0e97fbb0 | 1030 | return 0; |
a679f58d | 1031 | |
964a9b0f CW |
1032 | if (cache->rq_vma) { |
1033 | struct drm_i915_gem_object *obj = cache->rq_vma->obj; | |
a679f58d | 1034 | |
964a9b0f CW |
1035 | GEM_BUG_ON(cache->rq_size >= obj->base.size / sizeof(u32)); |
1036 | cache->rq_cmd[cache->rq_size++] = MI_BATCH_BUFFER_END; | |
7dd4f672 | 1037 | |
964a9b0f CW |
1038 | __i915_gem_object_flush_map(obj, |
1039 | 0, sizeof(u32) * cache->rq_size); | |
1040 | i915_gem_object_unpin_map(obj); | |
1041 | } | |
1042 | ||
1043 | err = 0; | |
1044 | if (rq->engine->emit_init_breadcrumb) | |
1045 | err = rq->engine->emit_init_breadcrumb(rq); | |
1046 | if (!err) | |
1047 | err = rq->engine->emit_bb_start(rq, | |
1048 | rq->batch->node.start, | |
1049 | PAGE_SIZE, | |
1050 | reloc_bb_flags(cache)); | |
1051 | if (err) | |
1052 | i915_request_set_error_once(rq, err); | |
1053 | ||
1054 | intel_gt_chipset_flush(rq->engine->gt); | |
1055 | i915_request_add(rq); | |
0e97fbb0 CW |
1056 | |
1057 | return err; | |
7dd4f672 CW |
1058 | } |
1059 | ||
6951e589 CW |
1060 | static int reloc_move_to_gpu(struct i915_request *rq, struct i915_vma *vma) |
1061 | { | |
1062 | struct drm_i915_gem_object *obj = vma->obj; | |
1063 | int err; | |
1064 | ||
1065 | i915_vma_lock(vma); | |
1066 | ||
1067 | if (obj->cache_dirty & ~obj->cache_coherent) | |
1068 | i915_gem_clflush_object(obj, 0); | |
1069 | obj->write_domain = 0; | |
1070 | ||
1071 | err = i915_request_await_object(rq, vma->obj, true); | |
1072 | if (err == 0) | |
1073 | err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE); | |
1074 | ||
1075 | i915_vma_unlock(vma); | |
1076 | ||
1077 | return err; | |
1078 | } | |
1079 | ||
7dd4f672 | 1080 | static int __reloc_gpu_alloc(struct i915_execbuffer *eb, |
6f576d62 | 1081 | struct intel_engine_cs *engine, |
7dd4f672 CW |
1082 | unsigned int len) |
1083 | { | |
1084 | struct reloc_cache *cache = &eb->reloc_cache; | |
16e87459 | 1085 | struct intel_gt_buffer_pool_node *pool; |
e61e0f51 | 1086 | struct i915_request *rq; |
7dd4f672 CW |
1087 | struct i915_vma *batch; |
1088 | u32 *cmd; | |
1089 | int err; | |
1090 | ||
6f576d62 | 1091 | pool = intel_gt_get_buffer_pool(engine->gt, PAGE_SIZE); |
b40d7378 CW |
1092 | if (IS_ERR(pool)) |
1093 | return PTR_ERR(pool); | |
7dd4f672 | 1094 | |
b40d7378 | 1095 | cmd = i915_gem_object_pin_map(pool->obj, |
a575c676 CW |
1096 | cache->has_llc ? |
1097 | I915_MAP_FORCE_WB : | |
1098 | I915_MAP_FORCE_WC); | |
b40d7378 CW |
1099 | if (IS_ERR(cmd)) { |
1100 | err = PTR_ERR(cmd); | |
1101 | goto out_pool; | |
1102 | } | |
7dd4f672 | 1103 | |
0e97fbb0 | 1104 | batch = i915_vma_instance(pool->obj, eb->context->vm, NULL); |
7dd4f672 CW |
1105 | if (IS_ERR(batch)) { |
1106 | err = PTR_ERR(batch); | |
1107 | goto err_unmap; | |
1108 | } | |
1109 | ||
1110 | err = i915_vma_pin(batch, 0, 0, PIN_USER | PIN_NONBLOCK); | |
1111 | if (err) | |
1112 | goto err_unmap; | |
1113 | ||
6f576d62 CW |
1114 | if (engine == eb->context->engine) { |
1115 | rq = i915_request_create(eb->context); | |
1116 | } else { | |
1117 | struct intel_context *ce; | |
1118 | ||
1119 | ce = intel_context_create(engine); | |
1120 | if (IS_ERR(ce)) { | |
e3d29130 | 1121 | err = PTR_ERR(ce); |
6f576d62 CW |
1122 | goto err_unpin; |
1123 | } | |
1124 | ||
1125 | i915_vm_put(ce->vm); | |
1126 | ce->vm = i915_vm_get(eb->context->vm); | |
1127 | ||
1128 | rq = intel_context_create_request(ce); | |
1129 | intel_context_put(ce); | |
1130 | } | |
7dd4f672 CW |
1131 | if (IS_ERR(rq)) { |
1132 | err = PTR_ERR(rq); | |
1133 | goto err_unpin; | |
1134 | } | |
1135 | ||
16e87459 | 1136 | err = intel_gt_buffer_pool_mark_active(pool, rq); |
b40d7378 CW |
1137 | if (err) |
1138 | goto err_request; | |
1139 | ||
6951e589 | 1140 | i915_vma_lock(batch); |
70d6894d CW |
1141 | err = i915_request_await_object(rq, batch->obj, false); |
1142 | if (err == 0) | |
1143 | err = i915_vma_move_to_active(batch, rq, 0); | |
6951e589 | 1144 | i915_vma_unlock(batch); |
a5236978 CW |
1145 | if (err) |
1146 | goto skip_request; | |
7dd4f672 CW |
1147 | |
1148 | rq->batch = batch; | |
a5236978 | 1149 | i915_vma_unpin(batch); |
7dd4f672 CW |
1150 | |
1151 | cache->rq = rq; | |
1152 | cache->rq_cmd = cmd; | |
1153 | cache->rq_size = 0; | |
964a9b0f | 1154 | cache->rq_vma = batch; |
7dd4f672 CW |
1155 | |
1156 | /* Return with batch mapping (cmd) still pinned */ | |
b40d7378 | 1157 | goto out_pool; |
7dd4f672 | 1158 | |
a5236978 | 1159 | skip_request: |
36e191f0 | 1160 | i915_request_set_error_once(rq, err); |
7dd4f672 | 1161 | err_request: |
e61e0f51 | 1162 | i915_request_add(rq); |
7dd4f672 CW |
1163 | err_unpin: |
1164 | i915_vma_unpin(batch); | |
1165 | err_unmap: | |
b40d7378 CW |
1166 | i915_gem_object_unpin_map(pool->obj); |
1167 | out_pool: | |
16e87459 | 1168 | intel_gt_buffer_pool_put(pool); |
7dd4f672 CW |
1169 | return err; |
1170 | } | |
1171 | ||
e3d29130 CW |
1172 | static bool reloc_can_use_engine(const struct intel_engine_cs *engine) |
1173 | { | |
1174 | return engine->class != VIDEO_DECODE_CLASS || !IS_GEN(engine->i915, 6); | |
1175 | } | |
1176 | ||
7dd4f672 CW |
1177 | static u32 *reloc_gpu(struct i915_execbuffer *eb, |
1178 | struct i915_vma *vma, | |
1179 | unsigned int len) | |
1180 | { | |
1181 | struct reloc_cache *cache = &eb->reloc_cache; | |
1182 | u32 *cmd; | |
964a9b0f | 1183 | int err; |
7dd4f672 CW |
1184 | |
1185 | if (unlikely(!cache->rq)) { | |
6f576d62 CW |
1186 | struct intel_engine_cs *engine = eb->engine; |
1187 | ||
e3d29130 | 1188 | if (!reloc_can_use_engine(engine)) { |
6f576d62 | 1189 | engine = engine->gt->engine_class[COPY_ENGINE_CLASS][0]; |
e3d29130 | 1190 | if (!engine) |
6f576d62 CW |
1191 | return ERR_PTR(-ENODEV); |
1192 | } | |
90cad095 | 1193 | |
6f576d62 | 1194 | err = __reloc_gpu_alloc(eb, engine, len); |
7dd4f672 CW |
1195 | if (unlikely(err)) |
1196 | return ERR_PTR(err); | |
1197 | } | |
1198 | ||
0e97fbb0 CW |
1199 | if (vma != cache->target) { |
1200 | err = reloc_move_to_gpu(cache->rq, vma); | |
1201 | if (unlikely(err)) { | |
1202 | i915_request_set_error_once(cache->rq, err); | |
1203 | return ERR_PTR(err); | |
1204 | } | |
1205 | ||
1206 | cache->target = vma; | |
1207 | } | |
1208 | ||
964a9b0f CW |
1209 | if (unlikely(cache->rq_size + len > |
1210 | PAGE_SIZE / sizeof(u32) - RELOC_TAIL)) { | |
1211 | err = reloc_gpu_chain(cache); | |
1212 | if (unlikely(err)) { | |
1213 | i915_request_set_error_once(cache->rq, err); | |
1214 | return ERR_PTR(err); | |
1215 | } | |
1216 | } | |
1217 | ||
1218 | GEM_BUG_ON(cache->rq_size + len >= PAGE_SIZE / sizeof(u32)); | |
7dd4f672 CW |
1219 | cmd = cache->rq_cmd + cache->rq_size; |
1220 | cache->rq_size += len; | |
1221 | ||
1222 | return cmd; | |
1223 | } | |
1224 | ||
e3d29130 | 1225 | static unsigned long vma_phys_addr(struct i915_vma *vma, u32 offset) |
edf4427b | 1226 | { |
e3d29130 CW |
1227 | struct page *page; |
1228 | unsigned long addr; | |
edf4427b | 1229 | |
e3d29130 | 1230 | GEM_BUG_ON(vma->pages != vma->obj->mm.pages); |
7dd4f672 | 1231 | |
e3d29130 CW |
1232 | page = i915_gem_object_get_page(vma->obj, offset >> PAGE_SHIFT); |
1233 | addr = PFN_PHYS(page_to_pfn(page)); | |
1234 | GEM_BUG_ON(overflows_type(addr, u32)); /* expected dma32 */ | |
7dd4f672 | 1235 | |
e3d29130 CW |
1236 | return addr + offset_in_page(offset); |
1237 | } | |
1238 | ||
9e0f9464 CW |
1239 | static int __reloc_entry_gpu(struct i915_execbuffer *eb, |
1240 | struct i915_vma *vma, | |
1241 | u64 offset, | |
1242 | u64 target_addr) | |
e3d29130 CW |
1243 | { |
1244 | const unsigned int gen = eb->reloc_cache.gen; | |
1245 | unsigned int len; | |
1246 | u32 *batch; | |
1247 | u64 addr; | |
1248 | ||
1249 | if (gen >= 8) | |
1250 | len = offset & 7 ? 8 : 5; | |
1251 | else if (gen >= 4) | |
1252 | len = 4; | |
1253 | else | |
1254 | len = 3; | |
1255 | ||
1256 | batch = reloc_gpu(eb, vma, len); | |
1257 | if (IS_ERR(batch)) | |
9e0f9464 | 1258 | return PTR_ERR(batch); |
e3d29130 CW |
1259 | |
1260 | addr = gen8_canonical_addr(vma->node.start + offset); | |
1261 | if (gen >= 8) { | |
1262 | if (offset & 7) { | |
1263 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1264 | *batch++ = lower_32_bits(addr); | |
1265 | *batch++ = upper_32_bits(addr); | |
1266 | *batch++ = lower_32_bits(target_addr); | |
1267 | ||
1268 | addr = gen8_canonical_addr(addr + 4); | |
7dd4f672 | 1269 | |
7dd4f672 | 1270 | *batch++ = MI_STORE_DWORD_IMM_GEN4; |
e3d29130 CW |
1271 | *batch++ = lower_32_bits(addr); |
1272 | *batch++ = upper_32_bits(addr); | |
1273 | *batch++ = upper_32_bits(target_addr); | |
7dd4f672 | 1274 | } else { |
e3d29130 CW |
1275 | *batch++ = (MI_STORE_DWORD_IMM_GEN4 | (1 << 21)) + 1; |
1276 | *batch++ = lower_32_bits(addr); | |
1277 | *batch++ = upper_32_bits(addr); | |
1278 | *batch++ = lower_32_bits(target_addr); | |
1279 | *batch++ = upper_32_bits(target_addr); | |
7dd4f672 | 1280 | } |
e3d29130 CW |
1281 | } else if (gen >= 6) { |
1282 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1283 | *batch++ = 0; | |
1284 | *batch++ = addr; | |
1285 | *batch++ = target_addr; | |
1286 | } else if (IS_I965G(eb->i915)) { | |
1287 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1288 | *batch++ = 0; | |
1289 | *batch++ = vma_phys_addr(vma, offset); | |
1290 | *batch++ = target_addr; | |
1291 | } else if (gen >= 4) { | |
1292 | *batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT; | |
1293 | *batch++ = 0; | |
1294 | *batch++ = addr; | |
1295 | *batch++ = target_addr; | |
1296 | } else if (gen >= 3 && | |
1297 | !(IS_I915G(eb->i915) || IS_I915GM(eb->i915))) { | |
1298 | *batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL; | |
1299 | *batch++ = addr; | |
1300 | *batch++ = target_addr; | |
1301 | } else { | |
1302 | *batch++ = MI_STORE_DWORD_IMM; | |
1303 | *batch++ = vma_phys_addr(vma, offset); | |
1304 | *batch++ = target_addr; | |
7dd4f672 CW |
1305 | } |
1306 | ||
9e0f9464 | 1307 | return 0; |
e3d29130 CW |
1308 | } |
1309 | ||
1310 | static u64 | |
9e0f9464 CW |
1311 | relocate_entry(struct i915_execbuffer *eb, |
1312 | struct i915_vma *vma, | |
e3d29130 | 1313 | const struct drm_i915_gem_relocation_entry *reloc, |
e3d29130 CW |
1314 | const struct i915_vma *target) |
1315 | { | |
1316 | u64 target_addr = relocation_target(reloc, target); | |
9e0f9464 CW |
1317 | int err; |
1318 | ||
1319 | err = __reloc_entry_gpu(eb, vma, reloc->offset, target_addr); | |
1320 | if (err) | |
1321 | return err; | |
edf4427b | 1322 | |
2889caa9 | 1323 | return target->node.start | UPDATE; |
edf4427b | 1324 | } |
edf4427b | 1325 | |
2889caa9 CW |
1326 | static u64 |
1327 | eb_relocate_entry(struct i915_execbuffer *eb, | |
7d6236bb | 1328 | struct eb_vma *ev, |
2889caa9 | 1329 | const struct drm_i915_gem_relocation_entry *reloc) |
54cf91dc | 1330 | { |
baa89ba3 | 1331 | struct drm_i915_private *i915 = eb->i915; |
7d6236bb | 1332 | struct eb_vma *target; |
2889caa9 | 1333 | int err; |
54cf91dc | 1334 | |
67731b87 | 1335 | /* we've already hold a reference to all valid objects */ |
507d977f CW |
1336 | target = eb_get_vma(eb, reloc->target_handle); |
1337 | if (unlikely(!target)) | |
54cf91dc | 1338 | return -ENOENT; |
e844b990 | 1339 | |
54cf91dc | 1340 | /* Validate that the target is in a valid r/w GPU domain */ |
b8f7ab17 | 1341 | if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) { |
baa89ba3 | 1342 | drm_dbg(&i915->drm, "reloc with multiple write domains: " |
507d977f | 1343 | "target %d offset %d " |
54cf91dc | 1344 | "read %08x write %08x", |
507d977f | 1345 | reloc->target_handle, |
54cf91dc CW |
1346 | (int) reloc->offset, |
1347 | reloc->read_domains, | |
1348 | reloc->write_domain); | |
8b78f0e5 | 1349 | return -EINVAL; |
54cf91dc | 1350 | } |
4ca4a250 DV |
1351 | if (unlikely((reloc->write_domain | reloc->read_domains) |
1352 | & ~I915_GEM_GPU_DOMAINS)) { | |
baa89ba3 | 1353 | drm_dbg(&i915->drm, "reloc with read/write non-GPU domains: " |
507d977f | 1354 | "target %d offset %d " |
54cf91dc | 1355 | "read %08x write %08x", |
507d977f | 1356 | reloc->target_handle, |
54cf91dc CW |
1357 | (int) reloc->offset, |
1358 | reloc->read_domains, | |
1359 | reloc->write_domain); | |
8b78f0e5 | 1360 | return -EINVAL; |
54cf91dc | 1361 | } |
54cf91dc | 1362 | |
2889caa9 | 1363 | if (reloc->write_domain) { |
7d6236bb | 1364 | target->flags |= EXEC_OBJECT_WRITE; |
507d977f | 1365 | |
2889caa9 CW |
1366 | /* |
1367 | * Sandybridge PPGTT errata: We need a global gtt mapping | |
1368 | * for MI and pipe_control writes because the gpu doesn't | |
1369 | * properly redirect them through the ppgtt for non_secure | |
1370 | * batchbuffers. | |
1371 | */ | |
1372 | if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION && | |
cf819eff | 1373 | IS_GEN(eb->i915, 6)) { |
7d6236bb CW |
1374 | err = i915_vma_bind(target->vma, |
1375 | target->vma->obj->cache_level, | |
2850748e | 1376 | PIN_GLOBAL, NULL); |
ea97c4ca | 1377 | if (err) |
2889caa9 CW |
1378 | return err; |
1379 | } | |
507d977f | 1380 | } |
54cf91dc | 1381 | |
2889caa9 CW |
1382 | /* |
1383 | * If the relocation already has the right value in it, no | |
54cf91dc CW |
1384 | * more work needs to be done. |
1385 | */ | |
9e0f9464 | 1386 | if (gen8_canonical_addr(target->vma->node.start) == reloc->presumed_offset) |
67731b87 | 1387 | return 0; |
54cf91dc CW |
1388 | |
1389 | /* Check that the relocation address is valid... */ | |
3c94ceee | 1390 | if (unlikely(reloc->offset > |
7d6236bb | 1391 | ev->vma->size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) { |
baa89ba3 | 1392 | drm_dbg(&i915->drm, "Relocation beyond object bounds: " |
507d977f CW |
1393 | "target %d offset %d size %d.\n", |
1394 | reloc->target_handle, | |
1395 | (int)reloc->offset, | |
7d6236bb | 1396 | (int)ev->vma->size); |
8b78f0e5 | 1397 | return -EINVAL; |
54cf91dc | 1398 | } |
b8f7ab17 | 1399 | if (unlikely(reloc->offset & 3)) { |
baa89ba3 | 1400 | drm_dbg(&i915->drm, "Relocation not 4-byte aligned: " |
507d977f CW |
1401 | "target %d offset %d.\n", |
1402 | reloc->target_handle, | |
1403 | (int)reloc->offset); | |
8b78f0e5 | 1404 | return -EINVAL; |
54cf91dc CW |
1405 | } |
1406 | ||
071750e5 CW |
1407 | /* |
1408 | * If we write into the object, we need to force the synchronisation | |
1409 | * barrier, either with an asynchronous clflush or if we executed the | |
1410 | * patching using the GPU (though that should be serialised by the | |
1411 | * timeline). To be completely sure, and since we are required to | |
1412 | * do relocations we are already stalling, disable the user's opt | |
0519bcb1 | 1413 | * out of our synchronisation. |
071750e5 | 1414 | */ |
7d6236bb | 1415 | ev->flags &= ~EXEC_OBJECT_ASYNC; |
071750e5 | 1416 | |
54cf91dc | 1417 | /* and update the user's relocation entry */ |
9e0f9464 | 1418 | return relocate_entry(eb, ev->vma, reloc, target->vma); |
54cf91dc CW |
1419 | } |
1420 | ||
7d6236bb | 1421 | static int eb_relocate_vma(struct i915_execbuffer *eb, struct eb_vma *ev) |
54cf91dc | 1422 | { |
1d83f442 | 1423 | #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry)) |
2889caa9 | 1424 | struct drm_i915_gem_relocation_entry stack[N_RELOC(512)]; |
7d6236bb | 1425 | const struct drm_i915_gem_exec_object2 *entry = ev->exec; |
e94f7856 CW |
1426 | struct drm_i915_gem_relocation_entry __user *urelocs = |
1427 | u64_to_user_ptr(entry->relocs_ptr); | |
1428 | unsigned long remain = entry->relocation_count; | |
54cf91dc | 1429 | |
e94f7856 | 1430 | if (unlikely(remain > N_RELOC(ULONG_MAX))) |
2889caa9 | 1431 | return -EINVAL; |
ebc0808f | 1432 | |
2889caa9 CW |
1433 | /* |
1434 | * We must check that the entire relocation array is safe | |
1435 | * to read. However, if the array is not writable the user loses | |
1436 | * the updated relocation values. | |
1437 | */ | |
e94f7856 | 1438 | if (unlikely(!access_ok(urelocs, remain * sizeof(*urelocs)))) |
2889caa9 CW |
1439 | return -EFAULT; |
1440 | ||
1441 | do { | |
1442 | struct drm_i915_gem_relocation_entry *r = stack; | |
1443 | unsigned int count = | |
e94f7856 | 1444 | min_t(unsigned long, remain, ARRAY_SIZE(stack)); |
2889caa9 | 1445 | unsigned int copied; |
1d83f442 | 1446 | |
2889caa9 CW |
1447 | /* |
1448 | * This is the fast path and we cannot handle a pagefault | |
ebc0808f CW |
1449 | * whilst holding the struct mutex lest the user pass in the |
1450 | * relocations contained within a mmaped bo. For in such a case | |
1451 | * we, the page fault handler would call i915_gem_fault() and | |
1452 | * we would try to acquire the struct mutex again. Obviously | |
1453 | * this is bad and so lockdep complains vehemently. | |
1454 | */ | |
7dc8f114 | 1455 | copied = __copy_from_user(r, urelocs, count * sizeof(r[0])); |
9e0f9464 CW |
1456 | if (unlikely(copied)) |
1457 | return -EFAULT; | |
54cf91dc | 1458 | |
2889caa9 | 1459 | remain -= count; |
1d83f442 | 1460 | do { |
7d6236bb | 1461 | u64 offset = eb_relocate_entry(eb, ev, r); |
54cf91dc | 1462 | |
2889caa9 CW |
1463 | if (likely(offset == 0)) { |
1464 | } else if ((s64)offset < 0) { | |
9e0f9464 | 1465 | return (int)offset; |
2889caa9 CW |
1466 | } else { |
1467 | /* | |
1468 | * Note that reporting an error now | |
1469 | * leaves everything in an inconsistent | |
1470 | * state as we have *already* changed | |
1471 | * the relocation value inside the | |
1472 | * object. As we have not changed the | |
1473 | * reloc.presumed_offset or will not | |
1474 | * change the execobject.offset, on the | |
1475 | * call we may not rewrite the value | |
1476 | * inside the object, leaving it | |
1477 | * dangling and causing a GPU hang. Unless | |
1478 | * userspace dynamically rebuilds the | |
1479 | * relocations on each execbuf rather than | |
1480 | * presume a static tree. | |
1481 | * | |
1482 | * We did previously check if the relocations | |
1483 | * were writable (access_ok), an error now | |
1484 | * would be a strange race with mprotect, | |
1485 | * having already demonstrated that we | |
1486 | * can read from this userspace address. | |
1487 | */ | |
1488 | offset = gen8_canonical_addr(offset & ~UPDATE); | |
97a37c91 CW |
1489 | __put_user(offset, |
1490 | &urelocs[r - stack].presumed_offset); | |
1d83f442 | 1491 | } |
2889caa9 CW |
1492 | } while (r++, --count); |
1493 | urelocs += ARRAY_SIZE(stack); | |
1494 | } while (remain); | |
9e0f9464 CW |
1495 | |
1496 | return 0; | |
54cf91dc CW |
1497 | } |
1498 | ||
2889caa9 | 1499 | static int eb_relocate(struct i915_execbuffer *eb) |
54cf91dc | 1500 | { |
003d8b91 CW |
1501 | int err; |
1502 | ||
003d8b91 | 1503 | err = eb_lookup_vmas(eb); |
003d8b91 CW |
1504 | if (err) |
1505 | return err; | |
1506 | ||
ef398881 CW |
1507 | if (!list_empty(&eb->unbound)) { |
1508 | err = eb_reserve(eb); | |
1509 | if (err) | |
1510 | return err; | |
1511 | } | |
2889caa9 CW |
1512 | |
1513 | /* The objects are in their final locations, apply the relocations. */ | |
1514 | if (eb->args->flags & __EXEC_HAS_RELOC) { | |
7d6236bb | 1515 | struct eb_vma *ev; |
0e97fbb0 | 1516 | int flush; |
2889caa9 | 1517 | |
7d6236bb | 1518 | list_for_each_entry(ev, &eb->relocs, reloc_link) { |
7dc8f114 CW |
1519 | err = eb_relocate_vma(eb, ev); |
1520 | if (err) | |
0e97fbb0 | 1521 | break; |
2889caa9 | 1522 | } |
0e97fbb0 CW |
1523 | |
1524 | flush = reloc_gpu_flush(&eb->reloc_cache); | |
1525 | if (!err) | |
1526 | err = flush; | |
2889caa9 CW |
1527 | } |
1528 | ||
0e97fbb0 | 1529 | return err; |
2889caa9 CW |
1530 | } |
1531 | ||
2889caa9 CW |
1532 | static int eb_move_to_gpu(struct i915_execbuffer *eb) |
1533 | { | |
1534 | const unsigned int count = eb->buffer_count; | |
6951e589 | 1535 | struct ww_acquire_ctx acquire; |
2889caa9 | 1536 | unsigned int i; |
6951e589 CW |
1537 | int err = 0; |
1538 | ||
1539 | ww_acquire_init(&acquire, &reservation_ww_class); | |
54cf91dc | 1540 | |
2889caa9 | 1541 | for (i = 0; i < count; i++) { |
7d6236bb CW |
1542 | struct eb_vma *ev = &eb->vma[i]; |
1543 | struct i915_vma *vma = ev->vma; | |
6951e589 CW |
1544 | |
1545 | err = ww_mutex_lock_interruptible(&vma->resv->lock, &acquire); | |
6951e589 CW |
1546 | if (err == -EDEADLK) { |
1547 | GEM_BUG_ON(i == 0); | |
1548 | do { | |
1549 | int j = i - 1; | |
1550 | ||
7d6236bb | 1551 | ww_mutex_unlock(&eb->vma[j].vma->resv->lock); |
6951e589 | 1552 | |
6951e589 | 1553 | swap(eb->vma[i], eb->vma[j]); |
6951e589 | 1554 | } while (--i); |
6951e589 CW |
1555 | |
1556 | err = ww_mutex_lock_slow_interruptible(&vma->resv->lock, | |
1557 | &acquire); | |
1558 | } | |
1559 | if (err) | |
1560 | break; | |
1561 | } | |
1562 | ww_acquire_done(&acquire); | |
1563 | ||
1564 | while (i--) { | |
7d6236bb CW |
1565 | struct eb_vma *ev = &eb->vma[i]; |
1566 | struct i915_vma *vma = ev->vma; | |
1567 | unsigned int flags = ev->flags; | |
27173f1f | 1568 | struct drm_i915_gem_object *obj = vma->obj; |
03ade511 | 1569 | |
6951e589 CW |
1570 | assert_vma_held(vma); |
1571 | ||
c7c6e46f | 1572 | if (flags & EXEC_OBJECT_CAPTURE) { |
e61e0f51 | 1573 | struct i915_capture_list *capture; |
b0fd47ad CW |
1574 | |
1575 | capture = kmalloc(sizeof(*capture), GFP_KERNEL); | |
6951e589 CW |
1576 | if (capture) { |
1577 | capture->next = eb->request->capture_list; | |
1578 | capture->vma = vma; | |
1579 | eb->request->capture_list = capture; | |
1580 | } | |
b0fd47ad CW |
1581 | } |
1582 | ||
b8f55be6 CW |
1583 | /* |
1584 | * If the GPU is not _reading_ through the CPU cache, we need | |
1585 | * to make sure that any writes (both previous GPU writes from | |
1586 | * before a change in snooping levels and normal CPU writes) | |
1587 | * caught in that cache are flushed to main memory. | |
1588 | * | |
1589 | * We want to say | |
1590 | * obj->cache_dirty && | |
1591 | * !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ) | |
1592 | * but gcc's optimiser doesn't handle that as well and emits | |
1593 | * two jumps instead of one. Maybe one day... | |
1594 | */ | |
1595 | if (unlikely(obj->cache_dirty & ~obj->cache_coherent)) { | |
0f46daa1 | 1596 | if (i915_gem_clflush_object(obj, 0)) |
c7c6e46f | 1597 | flags &= ~EXEC_OBJECT_ASYNC; |
0f46daa1 CW |
1598 | } |
1599 | ||
6951e589 CW |
1600 | if (err == 0 && !(flags & EXEC_OBJECT_ASYNC)) { |
1601 | err = i915_request_await_object | |
1602 | (eb->request, obj, flags & EXEC_OBJECT_WRITE); | |
1603 | } | |
2889caa9 | 1604 | |
6951e589 CW |
1605 | if (err == 0) |
1606 | err = i915_vma_move_to_active(vma, eb->request, flags); | |
c7c6e46f | 1607 | |
6951e589 | 1608 | i915_vma_unlock(vma); |
0f1dd022 | 1609 | eb_unreserve_vma(ev); |
c59a333f | 1610 | } |
6951e589 CW |
1611 | ww_acquire_fini(&acquire); |
1612 | ||
0f1dd022 CW |
1613 | eb_vma_array_put(fetch_and_zero(&eb->array)); |
1614 | ||
6951e589 CW |
1615 | if (unlikely(err)) |
1616 | goto err_skip; | |
1617 | ||
dcd79934 | 1618 | /* Unconditionally flush any chipset caches (for streaming writes). */ |
baea429d | 1619 | intel_gt_chipset_flush(eb->engine->gt); |
2113184c | 1620 | return 0; |
6951e589 CW |
1621 | |
1622 | err_skip: | |
36e191f0 | 1623 | i915_request_set_error_once(eb->request, err); |
6951e589 | 1624 | return err; |
54cf91dc CW |
1625 | } |
1626 | ||
00aff3f6 | 1627 | static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec) |
54cf91dc | 1628 | { |
650bc635 | 1629 | if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS) |
00aff3f6 | 1630 | return -EINVAL; |
ed5982e6 | 1631 | |
2f5945bc | 1632 | /* Kernel clipping was a DRI1 misfeature */ |
cda9edd0 LL |
1633 | if (!(exec->flags & (I915_EXEC_FENCE_ARRAY | |
1634 | I915_EXEC_USE_EXTENSIONS))) { | |
cf6e7bac | 1635 | if (exec->num_cliprects || exec->cliprects_ptr) |
00aff3f6 | 1636 | return -EINVAL; |
cf6e7bac | 1637 | } |
2f5945bc CW |
1638 | |
1639 | if (exec->DR4 == 0xffffffff) { | |
1640 | DRM_DEBUG("UXA submitting garbage DR4, fixing up\n"); | |
1641 | exec->DR4 = 0; | |
1642 | } | |
1643 | if (exec->DR1 || exec->DR4) | |
00aff3f6 | 1644 | return -EINVAL; |
2f5945bc CW |
1645 | |
1646 | if ((exec->batch_start_offset | exec->batch_len) & 0x7) | |
00aff3f6 | 1647 | return -EINVAL; |
2f5945bc | 1648 | |
00aff3f6 | 1649 | return 0; |
54cf91dc CW |
1650 | } |
1651 | ||
e61e0f51 | 1652 | static int i915_reset_gen7_sol_offsets(struct i915_request *rq) |
ae662d31 | 1653 | { |
73dec95e TU |
1654 | u32 *cs; |
1655 | int i; | |
ae662d31 | 1656 | |
5a833995 CW |
1657 | if (!IS_GEN(rq->engine->i915, 7) || rq->engine->id != RCS0) { |
1658 | drm_dbg(&rq->engine->i915->drm, "sol reset is gen7/rcs only\n"); | |
9d662da8 DV |
1659 | return -EINVAL; |
1660 | } | |
ae662d31 | 1661 | |
e61e0f51 | 1662 | cs = intel_ring_begin(rq, 4 * 2 + 2); |
73dec95e TU |
1663 | if (IS_ERR(cs)) |
1664 | return PTR_ERR(cs); | |
ae662d31 | 1665 | |
2889caa9 | 1666 | *cs++ = MI_LOAD_REGISTER_IMM(4); |
ae662d31 | 1667 | for (i = 0; i < 4; i++) { |
73dec95e TU |
1668 | *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i)); |
1669 | *cs++ = 0; | |
ae662d31 | 1670 | } |
2889caa9 | 1671 | *cs++ = MI_NOOP; |
e61e0f51 | 1672 | intel_ring_advance(rq, cs); |
ae662d31 EA |
1673 | |
1674 | return 0; | |
1675 | } | |
1676 | ||
4f7af194 | 1677 | static struct i915_vma * |
32d94048 CW |
1678 | shadow_batch_pin(struct drm_i915_gem_object *obj, |
1679 | struct i915_address_space *vm, | |
1680 | unsigned int flags) | |
4f7af194 | 1681 | { |
b291ce0a | 1682 | struct i915_vma *vma; |
b291ce0a | 1683 | int err; |
4f7af194 | 1684 | |
b291ce0a CW |
1685 | vma = i915_vma_instance(obj, vm, NULL); |
1686 | if (IS_ERR(vma)) | |
1687 | return vma; | |
1688 | ||
1689 | err = i915_vma_pin(vma, 0, 0, flags); | |
1690 | if (err) | |
1691 | return ERR_PTR(err); | |
1692 | ||
1693 | return vma; | |
4f7af194 JB |
1694 | } |
1695 | ||
686c7c35 CW |
1696 | struct eb_parse_work { |
1697 | struct dma_fence_work base; | |
1698 | struct intel_engine_cs *engine; | |
1699 | struct i915_vma *batch; | |
1700 | struct i915_vma *shadow; | |
1701 | struct i915_vma *trampoline; | |
1702 | unsigned int batch_offset; | |
1703 | unsigned int batch_length; | |
1704 | }; | |
1705 | ||
1706 | static int __eb_parse(struct dma_fence_work *work) | |
1707 | { | |
1708 | struct eb_parse_work *pw = container_of(work, typeof(*pw), base); | |
1709 | ||
1710 | return intel_engine_cmd_parser(pw->engine, | |
1711 | pw->batch, | |
1712 | pw->batch_offset, | |
1713 | pw->batch_length, | |
1714 | pw->shadow, | |
1715 | pw->trampoline); | |
1716 | } | |
1717 | ||
36c8e356 CW |
1718 | static void __eb_parse_release(struct dma_fence_work *work) |
1719 | { | |
1720 | struct eb_parse_work *pw = container_of(work, typeof(*pw), base); | |
1721 | ||
1722 | if (pw->trampoline) | |
1723 | i915_active_release(&pw->trampoline->active); | |
1724 | i915_active_release(&pw->shadow->active); | |
1725 | i915_active_release(&pw->batch->active); | |
1726 | } | |
1727 | ||
686c7c35 CW |
1728 | static const struct dma_fence_work_ops eb_parse_ops = { |
1729 | .name = "eb_parse", | |
1730 | .work = __eb_parse, | |
36c8e356 | 1731 | .release = __eb_parse_release, |
686c7c35 CW |
1732 | }; |
1733 | ||
57a78ca4 CW |
1734 | static inline int |
1735 | __parser_mark_active(struct i915_vma *vma, | |
1736 | struct intel_timeline *tl, | |
1737 | struct dma_fence *fence) | |
1738 | { | |
1739 | struct intel_gt_buffer_pool_node *node = vma->private; | |
1740 | ||
1741 | return i915_active_ref(&node->active, tl, fence); | |
1742 | } | |
1743 | ||
1744 | static int | |
1745 | parser_mark_active(struct eb_parse_work *pw, struct intel_timeline *tl) | |
1746 | { | |
1747 | int err; | |
1748 | ||
1749 | mutex_lock(&tl->mutex); | |
1750 | ||
1751 | err = __parser_mark_active(pw->shadow, tl, &pw->base.dma); | |
1752 | if (err) | |
1753 | goto unlock; | |
1754 | ||
1755 | if (pw->trampoline) { | |
1756 | err = __parser_mark_active(pw->trampoline, tl, &pw->base.dma); | |
1757 | if (err) | |
1758 | goto unlock; | |
1759 | } | |
1760 | ||
1761 | unlock: | |
1762 | mutex_unlock(&tl->mutex); | |
1763 | return err; | |
1764 | } | |
1765 | ||
686c7c35 CW |
1766 | static int eb_parse_pipeline(struct i915_execbuffer *eb, |
1767 | struct i915_vma *shadow, | |
1768 | struct i915_vma *trampoline) | |
1769 | { | |
1770 | struct eb_parse_work *pw; | |
1771 | int err; | |
1772 | ||
1773 | pw = kzalloc(sizeof(*pw), GFP_KERNEL); | |
1774 | if (!pw) | |
1775 | return -ENOMEM; | |
1776 | ||
7d6236bb | 1777 | err = i915_active_acquire(&eb->batch->vma->active); |
36c8e356 CW |
1778 | if (err) |
1779 | goto err_free; | |
1780 | ||
1781 | err = i915_active_acquire(&shadow->active); | |
1782 | if (err) | |
1783 | goto err_batch; | |
1784 | ||
1785 | if (trampoline) { | |
1786 | err = i915_active_acquire(&trampoline->active); | |
1787 | if (err) | |
1788 | goto err_shadow; | |
1789 | } | |
1790 | ||
686c7c35 CW |
1791 | dma_fence_work_init(&pw->base, &eb_parse_ops); |
1792 | ||
1793 | pw->engine = eb->engine; | |
7d6236bb | 1794 | pw->batch = eb->batch->vma; |
686c7c35 CW |
1795 | pw->batch_offset = eb->batch_start_offset; |
1796 | pw->batch_length = eb->batch_len; | |
1797 | pw->shadow = shadow; | |
1798 | pw->trampoline = trampoline; | |
1799 | ||
57a78ca4 CW |
1800 | /* Mark active refs early for this worker, in case we get interrupted */ |
1801 | err = parser_mark_active(pw, eb->context->timeline); | |
1802 | if (err) | |
1803 | goto err_commit; | |
1804 | ||
36c8e356 CW |
1805 | err = dma_resv_lock_interruptible(pw->batch->resv, NULL); |
1806 | if (err) | |
57a78ca4 | 1807 | goto err_commit; |
686c7c35 CW |
1808 | |
1809 | err = dma_resv_reserve_shared(pw->batch->resv, 1); | |
1810 | if (err) | |
57a78ca4 | 1811 | goto err_commit_unlock; |
686c7c35 CW |
1812 | |
1813 | /* Wait for all writes (and relocs) into the batch to complete */ | |
1814 | err = i915_sw_fence_await_reservation(&pw->base.chain, | |
1815 | pw->batch->resv, NULL, false, | |
1816 | 0, I915_FENCE_GFP); | |
1817 | if (err < 0) | |
57a78ca4 | 1818 | goto err_commit_unlock; |
686c7c35 CW |
1819 | |
1820 | /* Keep the batch alive and unwritten as we parse */ | |
1821 | dma_resv_add_shared_fence(pw->batch->resv, &pw->base.dma); | |
1822 | ||
1823 | dma_resv_unlock(pw->batch->resv); | |
1824 | ||
1825 | /* Force execution to wait for completion of the parser */ | |
1826 | dma_resv_lock(shadow->resv, NULL); | |
1827 | dma_resv_add_excl_fence(shadow->resv, &pw->base.dma); | |
1828 | dma_resv_unlock(shadow->resv); | |
1829 | ||
92581f9f | 1830 | dma_fence_work_commit_imm(&pw->base); |
686c7c35 CW |
1831 | return 0; |
1832 | ||
57a78ca4 | 1833 | err_commit_unlock: |
686c7c35 | 1834 | dma_resv_unlock(pw->batch->resv); |
57a78ca4 CW |
1835 | err_commit: |
1836 | i915_sw_fence_set_error_once(&pw->base.chain, err); | |
1837 | dma_fence_work_commit_imm(&pw->base); | |
1838 | return err; | |
1839 | ||
36c8e356 CW |
1840 | err_shadow: |
1841 | i915_active_release(&shadow->active); | |
1842 | err_batch: | |
7d6236bb | 1843 | i915_active_release(&eb->batch->vma->active); |
36c8e356 | 1844 | err_free: |
686c7c35 CW |
1845 | kfree(pw); |
1846 | return err; | |
1847 | } | |
1848 | ||
51696691 | 1849 | static int eb_parse(struct i915_execbuffer *eb) |
71745376 | 1850 | { |
baa89ba3 | 1851 | struct drm_i915_private *i915 = eb->i915; |
16e87459 | 1852 | struct intel_gt_buffer_pool_node *pool; |
32d94048 CW |
1853 | struct i915_vma *shadow, *trampoline; |
1854 | unsigned int len; | |
2889caa9 | 1855 | int err; |
71745376 | 1856 | |
51696691 CW |
1857 | if (!eb_use_cmdparser(eb)) |
1858 | return 0; | |
1859 | ||
32d94048 CW |
1860 | len = eb->batch_len; |
1861 | if (!CMDPARSER_USES_GGTT(eb->i915)) { | |
1862 | /* | |
1863 | * ppGTT backed shadow buffers must be mapped RO, to prevent | |
1864 | * post-scan tampering | |
1865 | */ | |
1866 | if (!eb->context->vm->has_read_only) { | |
baa89ba3 WK |
1867 | drm_dbg(&i915->drm, |
1868 | "Cannot prevent post-scan tampering without RO capable vm\n"); | |
32d94048 CW |
1869 | return -EINVAL; |
1870 | } | |
1871 | } else { | |
1872 | len += I915_CMD_PARSER_TRAMPOLINE_SIZE; | |
1873 | } | |
1874 | ||
16e87459 | 1875 | pool = intel_gt_get_buffer_pool(eb->engine->gt, len); |
b40d7378 | 1876 | if (IS_ERR(pool)) |
51696691 | 1877 | return PTR_ERR(pool); |
71745376 | 1878 | |
32d94048 CW |
1879 | shadow = shadow_batch_pin(pool->obj, eb->context->vm, PIN_USER); |
1880 | if (IS_ERR(shadow)) { | |
1881 | err = PTR_ERR(shadow); | |
f8c08d8f | 1882 | goto err; |
51696691 | 1883 | } |
32d94048 | 1884 | i915_gem_object_set_readonly(shadow->obj); |
57a78ca4 | 1885 | shadow->private = pool; |
32d94048 CW |
1886 | |
1887 | trampoline = NULL; | |
1888 | if (CMDPARSER_USES_GGTT(eb->i915)) { | |
1889 | trampoline = shadow; | |
1890 | ||
1891 | shadow = shadow_batch_pin(pool->obj, | |
1892 | &eb->engine->gt->ggtt->vm, | |
1893 | PIN_GLOBAL); | |
1894 | if (IS_ERR(shadow)) { | |
1895 | err = PTR_ERR(shadow); | |
1896 | shadow = trampoline; | |
1897 | goto err_shadow; | |
1898 | } | |
57a78ca4 | 1899 | shadow->private = pool; |
32d94048 CW |
1900 | |
1901 | eb->batch_flags |= I915_DISPATCH_SECURE; | |
1902 | } | |
f8c08d8f | 1903 | |
686c7c35 | 1904 | err = eb_parse_pipeline(eb, shadow, trampoline); |
32d94048 CW |
1905 | if (err) |
1906 | goto err_trampoline; | |
71745376 | 1907 | |
7d6236bb | 1908 | eb->vma[eb->buffer_count].vma = i915_vma_get(shadow); |
003d8b91 | 1909 | eb->vma[eb->buffer_count].flags = __EXEC_OBJECT_HAS_PIN; |
7d6236bb | 1910 | eb->batch = &eb->vma[eb->buffer_count++]; |
0f1dd022 | 1911 | eb->vma[eb->buffer_count].vma = NULL; |
71745376 | 1912 | |
32d94048 | 1913 | eb->trampoline = trampoline; |
4f7af194 | 1914 | eb->batch_start_offset = 0; |
4f7af194 | 1915 | |
51696691 | 1916 | return 0; |
b40d7378 | 1917 | |
32d94048 CW |
1918 | err_trampoline: |
1919 | if (trampoline) | |
1920 | i915_vma_unpin(trampoline); | |
1921 | err_shadow: | |
1922 | i915_vma_unpin(shadow); | |
b40d7378 | 1923 | err: |
16e87459 | 1924 | intel_gt_buffer_pool_put(pool); |
51696691 | 1925 | return err; |
71745376 | 1926 | } |
5c6c6003 | 1927 | |
c8659efa | 1928 | static void |
e61e0f51 | 1929 | add_to_client(struct i915_request *rq, struct drm_file *file) |
c8659efa | 1930 | { |
44c22f3f CW |
1931 | struct drm_i915_file_private *file_priv = file->driver_priv; |
1932 | ||
1933 | rq->file_priv = file_priv; | |
1934 | ||
1935 | spin_lock(&file_priv->mm.lock); | |
1936 | list_add_tail(&rq->client_link, &file_priv->mm.request_list); | |
1937 | spin_unlock(&file_priv->mm.lock); | |
c8659efa CW |
1938 | } |
1939 | ||
7d6236bb | 1940 | static int eb_submit(struct i915_execbuffer *eb, struct i915_vma *batch) |
78382593 | 1941 | { |
2889caa9 | 1942 | int err; |
78382593 | 1943 | |
2889caa9 CW |
1944 | err = eb_move_to_gpu(eb); |
1945 | if (err) | |
1946 | return err; | |
78382593 | 1947 | |
650bc635 | 1948 | if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) { |
2889caa9 CW |
1949 | err = i915_reset_gen7_sol_offsets(eb->request); |
1950 | if (err) | |
1951 | return err; | |
78382593 OM |
1952 | } |
1953 | ||
85474441 CW |
1954 | /* |
1955 | * After we completed waiting for other engines (using HW semaphores) | |
1956 | * then we can signal that this request/batch is ready to run. This | |
1957 | * allows us to determine if the batch is still waiting on the GPU | |
1958 | * or actually running by checking the breadcrumb. | |
1959 | */ | |
1960 | if (eb->engine->emit_init_breadcrumb) { | |
1961 | err = eb->engine->emit_init_breadcrumb(eb->request); | |
1962 | if (err) | |
1963 | return err; | |
1964 | } | |
1965 | ||
2889caa9 | 1966 | err = eb->engine->emit_bb_start(eb->request, |
7d6236bb | 1967 | batch->node.start + |
650bc635 CW |
1968 | eb->batch_start_offset, |
1969 | eb->batch_len, | |
2889caa9 CW |
1970 | eb->batch_flags); |
1971 | if (err) | |
1972 | return err; | |
78382593 | 1973 | |
32d94048 CW |
1974 | if (eb->trampoline) { |
1975 | GEM_BUG_ON(eb->batch_start_offset); | |
1976 | err = eb->engine->emit_bb_start(eb->request, | |
1977 | eb->trampoline->node.start + | |
1978 | eb->batch_len, | |
1979 | 0, 0); | |
1980 | if (err) | |
1981 | return err; | |
1982 | } | |
1983 | ||
9f3ccd40 | 1984 | if (intel_context_nopreempt(eb->context)) |
e1c31fb5 | 1985 | __set_bit(I915_FENCE_FLAG_NOPREEMPT, &eb->request->fence.flags); |
9cd20ef7 | 1986 | |
2f5945bc | 1987 | return 0; |
78382593 OM |
1988 | } |
1989 | ||
d5b2a3a4 CW |
1990 | static int num_vcs_engines(const struct drm_i915_private *i915) |
1991 | { | |
792592e7 | 1992 | return hweight64(VDBOX_MASK(&i915->gt)); |
d5b2a3a4 CW |
1993 | } |
1994 | ||
204bcfef | 1995 | /* |
a8ebba75 | 1996 | * Find one BSD ring to dispatch the corresponding BSD command. |
c80ff16e | 1997 | * The engine index is returned. |
a8ebba75 | 1998 | */ |
de1add36 | 1999 | static unsigned int |
c80ff16e CW |
2000 | gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv, |
2001 | struct drm_file *file) | |
a8ebba75 | 2002 | { |
a8ebba75 ZY |
2003 | struct drm_i915_file_private *file_priv = file->driver_priv; |
2004 | ||
de1add36 | 2005 | /* Check whether the file_priv has already selected one ring. */ |
6f633402 | 2006 | if ((int)file_priv->bsd_engine < 0) |
1a07e86c CW |
2007 | file_priv->bsd_engine = |
2008 | get_random_int() % num_vcs_engines(dev_priv); | |
d23db88c | 2009 | |
c80ff16e | 2010 | return file_priv->bsd_engine; |
d23db88c CW |
2011 | } |
2012 | ||
5e2a0419 | 2013 | static const enum intel_engine_id user_ring_map[] = { |
8a68d464 CW |
2014 | [I915_EXEC_DEFAULT] = RCS0, |
2015 | [I915_EXEC_RENDER] = RCS0, | |
2016 | [I915_EXEC_BLT] = BCS0, | |
2017 | [I915_EXEC_BSD] = VCS0, | |
2018 | [I915_EXEC_VEBOX] = VECS0 | |
de1add36 TU |
2019 | }; |
2020 | ||
e5dadff4 CW |
2021 | static struct i915_request *eb_throttle(struct intel_context *ce) |
2022 | { | |
2023 | struct intel_ring *ring = ce->ring; | |
2024 | struct intel_timeline *tl = ce->timeline; | |
2025 | struct i915_request *rq; | |
2026 | ||
2027 | /* | |
2028 | * Completely unscientific finger-in-the-air estimates for suitable | |
2029 | * maximum user request size (to avoid blocking) and then backoff. | |
2030 | */ | |
2031 | if (intel_ring_update_space(ring) >= PAGE_SIZE) | |
2032 | return NULL; | |
2033 | ||
2034 | /* | |
2035 | * Find a request that after waiting upon, there will be at least half | |
2036 | * the ring available. The hysteresis allows us to compete for the | |
2037 | * shared ring and should mean that we sleep less often prior to | |
2038 | * claiming our resources, but not so long that the ring completely | |
2039 | * drains before we can submit our next request. | |
2040 | */ | |
2041 | list_for_each_entry(rq, &tl->requests, link) { | |
2042 | if (rq->ring != ring) | |
2043 | continue; | |
2044 | ||
2045 | if (__intel_ring_space(rq->postfix, | |
2046 | ring->emit, ring->size) > ring->size / 2) | |
2047 | break; | |
2048 | } | |
2049 | if (&rq->link == &tl->requests) | |
2050 | return NULL; /* weird, we will check again later for real */ | |
2051 | ||
2052 | return i915_request_get(rq); | |
2053 | } | |
2054 | ||
e5dadff4 CW |
2055 | static int __eb_pin_engine(struct i915_execbuffer *eb, struct intel_context *ce) |
2056 | { | |
2057 | struct intel_timeline *tl; | |
2058 | struct i915_request *rq; | |
2059 | int err; | |
2060 | ||
8f2a1057 CW |
2061 | /* |
2062 | * ABI: Before userspace accesses the GPU (e.g. execbuffer), report | |
2063 | * EIO if the GPU is already wedged. | |
2064 | */ | |
cb823ed9 | 2065 | err = intel_gt_terminally_wedged(ce->engine->gt); |
8f2a1057 CW |
2066 | if (err) |
2067 | return err; | |
2068 | ||
9f3ccd40 CW |
2069 | if (unlikely(intel_context_is_banned(ce))) |
2070 | return -EIO; | |
2071 | ||
8f2a1057 CW |
2072 | /* |
2073 | * Pinning the contexts may generate requests in order to acquire | |
2074 | * GGTT space, so do this first before we reserve a seqno for | |
2075 | * ourselves. | |
2076 | */ | |
2850748e | 2077 | err = intel_context_pin(ce); |
fa9f6681 CW |
2078 | if (err) |
2079 | return err; | |
8f2a1057 | 2080 | |
a4e57f90 CW |
2081 | /* |
2082 | * Take a local wakeref for preparing to dispatch the execbuf as | |
2083 | * we expect to access the hardware fairly frequently in the | |
2084 | * process, and require the engine to be kept awake between accesses. | |
2085 | * Upon dispatch, we acquire another prolonged wakeref that we hold | |
2086 | * until the timeline is idle, which in turn releases the wakeref | |
2087 | * taken on the engine, and the parent device. | |
2088 | */ | |
e5dadff4 CW |
2089 | tl = intel_context_timeline_lock(ce); |
2090 | if (IS_ERR(tl)) { | |
2091 | err = PTR_ERR(tl); | |
a4e57f90 | 2092 | goto err_unpin; |
e5dadff4 | 2093 | } |
a4e57f90 CW |
2094 | |
2095 | intel_context_enter(ce); | |
e5dadff4 CW |
2096 | rq = eb_throttle(ce); |
2097 | ||
2098 | intel_context_timeline_unlock(tl); | |
2099 | ||
2100 | if (rq) { | |
cb4d5dc3 CW |
2101 | bool nonblock = eb->file->filp->f_flags & O_NONBLOCK; |
2102 | long timeout; | |
2103 | ||
2104 | timeout = MAX_SCHEDULE_TIMEOUT; | |
2105 | if (nonblock) | |
2106 | timeout = 0; | |
e5dadff4 | 2107 | |
cb4d5dc3 CW |
2108 | timeout = i915_request_wait(rq, |
2109 | I915_WAIT_INTERRUPTIBLE, | |
2110 | timeout); | |
e5dadff4 | 2111 | i915_request_put(rq); |
cb4d5dc3 CW |
2112 | |
2113 | if (timeout < 0) { | |
2114 | err = nonblock ? -EWOULDBLOCK : timeout; | |
2115 | goto err_exit; | |
2116 | } | |
e5dadff4 | 2117 | } |
a4e57f90 | 2118 | |
5e2a0419 | 2119 | eb->engine = ce->engine; |
8f2a1057 CW |
2120 | eb->context = ce; |
2121 | return 0; | |
a4e57f90 | 2122 | |
e5dadff4 CW |
2123 | err_exit: |
2124 | mutex_lock(&tl->mutex); | |
2125 | intel_context_exit(ce); | |
2126 | intel_context_timeline_unlock(tl); | |
a4e57f90 | 2127 | err_unpin: |
2850748e | 2128 | intel_context_unpin(ce); |
a4e57f90 | 2129 | return err; |
8f2a1057 CW |
2130 | } |
2131 | ||
e5dadff4 | 2132 | static void eb_unpin_engine(struct i915_execbuffer *eb) |
8f2a1057 | 2133 | { |
a4e57f90 | 2134 | struct intel_context *ce = eb->context; |
75d0a7f3 | 2135 | struct intel_timeline *tl = ce->timeline; |
a4e57f90 CW |
2136 | |
2137 | mutex_lock(&tl->mutex); | |
2138 | intel_context_exit(ce); | |
2139 | mutex_unlock(&tl->mutex); | |
2140 | ||
2850748e | 2141 | intel_context_unpin(ce); |
8f2a1057 | 2142 | } |
de1add36 | 2143 | |
5e2a0419 CW |
2144 | static unsigned int |
2145 | eb_select_legacy_ring(struct i915_execbuffer *eb, | |
2146 | struct drm_file *file, | |
2147 | struct drm_i915_gem_execbuffer2 *args) | |
de1add36 | 2148 | { |
8f2a1057 | 2149 | struct drm_i915_private *i915 = eb->i915; |
de1add36 | 2150 | unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK; |
de1add36 | 2151 | |
5e2a0419 CW |
2152 | if (user_ring_id != I915_EXEC_BSD && |
2153 | (args->flags & I915_EXEC_BSD_MASK)) { | |
baa89ba3 WK |
2154 | drm_dbg(&i915->drm, |
2155 | "execbuf with non bsd ring but with invalid " | |
2156 | "bsd dispatch flags: %d\n", (int)(args->flags)); | |
5e2a0419 | 2157 | return -1; |
de1add36 TU |
2158 | } |
2159 | ||
d5b2a3a4 | 2160 | if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(i915) > 1) { |
de1add36 TU |
2161 | unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK; |
2162 | ||
2163 | if (bsd_idx == I915_EXEC_BSD_DEFAULT) { | |
8f2a1057 | 2164 | bsd_idx = gen8_dispatch_bsd_engine(i915, file); |
de1add36 TU |
2165 | } else if (bsd_idx >= I915_EXEC_BSD_RING1 && |
2166 | bsd_idx <= I915_EXEC_BSD_RING2) { | |
d9da6aa0 | 2167 | bsd_idx >>= I915_EXEC_BSD_SHIFT; |
de1add36 TU |
2168 | bsd_idx--; |
2169 | } else { | |
baa89ba3 WK |
2170 | drm_dbg(&i915->drm, |
2171 | "execbuf with unknown bsd ring: %u\n", | |
2172 | bsd_idx); | |
5e2a0419 | 2173 | return -1; |
de1add36 TU |
2174 | } |
2175 | ||
5e2a0419 | 2176 | return _VCS(bsd_idx); |
de1add36 TU |
2177 | } |
2178 | ||
5e2a0419 | 2179 | if (user_ring_id >= ARRAY_SIZE(user_ring_map)) { |
baa89ba3 WK |
2180 | drm_dbg(&i915->drm, "execbuf with unknown ring: %u\n", |
2181 | user_ring_id); | |
5e2a0419 | 2182 | return -1; |
de1add36 TU |
2183 | } |
2184 | ||
5e2a0419 CW |
2185 | return user_ring_map[user_ring_id]; |
2186 | } | |
2187 | ||
2188 | static int | |
e5dadff4 CW |
2189 | eb_pin_engine(struct i915_execbuffer *eb, |
2190 | struct drm_file *file, | |
2191 | struct drm_i915_gem_execbuffer2 *args) | |
5e2a0419 CW |
2192 | { |
2193 | struct intel_context *ce; | |
2194 | unsigned int idx; | |
2195 | int err; | |
2196 | ||
976b55f0 CW |
2197 | if (i915_gem_context_user_engines(eb->gem_context)) |
2198 | idx = args->flags & I915_EXEC_RING_MASK; | |
2199 | else | |
2200 | idx = eb_select_legacy_ring(eb, file, args); | |
5e2a0419 CW |
2201 | |
2202 | ce = i915_gem_context_get_engine(eb->gem_context, idx); | |
2203 | if (IS_ERR(ce)) | |
2204 | return PTR_ERR(ce); | |
2205 | ||
e5dadff4 | 2206 | err = __eb_pin_engine(eb, ce); |
5e2a0419 CW |
2207 | intel_context_put(ce); |
2208 | ||
2209 | return err; | |
de1add36 TU |
2210 | } |
2211 | ||
cf6e7bac | 2212 | static void |
cda9edd0 | 2213 | __free_fence_array(struct i915_eb_fence *fences, unsigned int n) |
cf6e7bac JE |
2214 | { |
2215 | while (n--) | |
cda9edd0 | 2216 | drm_syncobj_put(ptr_mask_bits(fences[n].syncobj, 2)); |
cf6e7bac JE |
2217 | kvfree(fences); |
2218 | } | |
2219 | ||
cda9edd0 | 2220 | static int |
cf6e7bac | 2221 | get_fence_array(struct drm_i915_gem_execbuffer2 *args, |
cda9edd0 | 2222 | struct i915_execbuffer *eb) |
cf6e7bac | 2223 | { |
d710fc16 | 2224 | const unsigned long nfences = args->num_cliprects; |
cf6e7bac | 2225 | struct drm_i915_gem_exec_fence __user *user; |
cda9edd0 | 2226 | struct i915_eb_fence *fences; |
d710fc16 | 2227 | unsigned long n; |
cf6e7bac JE |
2228 | int err; |
2229 | ||
2230 | if (!(args->flags & I915_EXEC_FENCE_ARRAY)) | |
cda9edd0 | 2231 | return 0; |
cf6e7bac | 2232 | |
d710fc16 CW |
2233 | /* Check multiplication overflow for access_ok() and kvmalloc_array() */ |
2234 | BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long)); | |
2235 | if (nfences > min_t(unsigned long, | |
2236 | ULONG_MAX / sizeof(*user), | |
2237 | SIZE_MAX / sizeof(*fences))) | |
cda9edd0 | 2238 | return -EINVAL; |
cf6e7bac JE |
2239 | |
2240 | user = u64_to_user_ptr(args->cliprects_ptr); | |
96d4f267 | 2241 | if (!access_ok(user, nfences * sizeof(*user))) |
cda9edd0 | 2242 | return -EFAULT; |
cf6e7bac | 2243 | |
d710fc16 | 2244 | fences = kvmalloc_array(nfences, sizeof(*fences), |
0ee931c4 | 2245 | __GFP_NOWARN | GFP_KERNEL); |
cf6e7bac | 2246 | if (!fences) |
cda9edd0 | 2247 | return -ENOMEM; |
cf6e7bac JE |
2248 | |
2249 | for (n = 0; n < nfences; n++) { | |
2250 | struct drm_i915_gem_exec_fence fence; | |
2251 | struct drm_syncobj *syncobj; | |
2252 | ||
2253 | if (__copy_from_user(&fence, user++, sizeof(fence))) { | |
2254 | err = -EFAULT; | |
2255 | goto err; | |
2256 | } | |
2257 | ||
ebcaa1ff TU |
2258 | if (fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS) { |
2259 | err = -EINVAL; | |
2260 | goto err; | |
2261 | } | |
2262 | ||
cda9edd0 | 2263 | syncobj = drm_syncobj_find(eb->file, fence.handle); |
cf6e7bac JE |
2264 | if (!syncobj) { |
2265 | DRM_DEBUG("Invalid syncobj handle provided\n"); | |
2266 | err = -ENOENT; | |
2267 | goto err; | |
2268 | } | |
2269 | ||
ebcaa1ff TU |
2270 | BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) & |
2271 | ~__I915_EXEC_FENCE_UNKNOWN_FLAGS); | |
2272 | ||
cda9edd0 | 2273 | fences[n].syncobj = ptr_pack_bits(syncobj, fence.flags, 2); |
cf6e7bac JE |
2274 | } |
2275 | ||
cda9edd0 LL |
2276 | eb->fences = fences; |
2277 | eb->n_fences = nfences; | |
2278 | ||
2279 | return 0; | |
cf6e7bac JE |
2280 | |
2281 | err: | |
2282 | __free_fence_array(fences, n); | |
cda9edd0 | 2283 | return err; |
cf6e7bac JE |
2284 | } |
2285 | ||
2286 | static int | |
cda9edd0 | 2287 | await_fence_array(struct i915_execbuffer *eb) |
cf6e7bac | 2288 | { |
cf6e7bac JE |
2289 | unsigned int n; |
2290 | int err; | |
2291 | ||
cda9edd0 | 2292 | for (n = 0; n < eb->n_fences; n++) { |
cf6e7bac JE |
2293 | struct drm_syncobj *syncobj; |
2294 | struct dma_fence *fence; | |
2295 | unsigned int flags; | |
2296 | ||
cda9edd0 | 2297 | syncobj = ptr_unpack_bits(eb->fences[n].syncobj, &flags, 2); |
cf6e7bac JE |
2298 | if (!(flags & I915_EXEC_FENCE_WAIT)) |
2299 | continue; | |
2300 | ||
afca4216 | 2301 | fence = drm_syncobj_fence_get(syncobj); |
cf6e7bac JE |
2302 | if (!fence) |
2303 | return -EINVAL; | |
2304 | ||
e61e0f51 | 2305 | err = i915_request_await_dma_fence(eb->request, fence); |
cf6e7bac JE |
2306 | dma_fence_put(fence); |
2307 | if (err < 0) | |
2308 | return err; | |
2309 | } | |
2310 | ||
2311 | return 0; | |
2312 | } | |
2313 | ||
2314 | static void | |
cda9edd0 | 2315 | signal_fence_array(struct i915_execbuffer *eb) |
cf6e7bac | 2316 | { |
cf6e7bac JE |
2317 | struct dma_fence * const fence = &eb->request->fence; |
2318 | unsigned int n; | |
2319 | ||
cda9edd0 | 2320 | for (n = 0; n < eb->n_fences; n++) { |
cf6e7bac JE |
2321 | struct drm_syncobj *syncobj; |
2322 | unsigned int flags; | |
2323 | ||
cda9edd0 | 2324 | syncobj = ptr_unpack_bits(eb->fences[n].syncobj, &flags, 2); |
cf6e7bac JE |
2325 | if (!(flags & I915_EXEC_FENCE_SIGNAL)) |
2326 | continue; | |
2327 | ||
0b258ed1 | 2328 | drm_syncobj_replace_fence(syncobj, fence); |
cf6e7bac JE |
2329 | } |
2330 | } | |
2331 | ||
61231f6b CW |
2332 | static void retire_requests(struct intel_timeline *tl, struct i915_request *end) |
2333 | { | |
2334 | struct i915_request *rq, *rn; | |
2335 | ||
2336 | list_for_each_entry_safe(rq, rn, &tl->requests, link) | |
2337 | if (rq == end || !i915_request_retire(rq)) | |
2338 | break; | |
2339 | } | |
2340 | ||
2341 | static void eb_request_add(struct i915_execbuffer *eb) | |
2342 | { | |
2343 | struct i915_request *rq = eb->request; | |
2344 | struct intel_timeline * const tl = i915_request_timeline(rq); | |
2345 | struct i915_sched_attr attr = {}; | |
2346 | struct i915_request *prev; | |
2347 | ||
2348 | lockdep_assert_held(&tl->mutex); | |
2349 | lockdep_unpin_lock(&tl->mutex, rq->cookie); | |
2350 | ||
2351 | trace_i915_request_add(rq); | |
2352 | ||
2353 | prev = __i915_request_commit(rq); | |
2354 | ||
2355 | /* Check that the context wasn't destroyed before submission */ | |
207e4a71 | 2356 | if (likely(!intel_context_is_closed(eb->context))) { |
61231f6b | 2357 | attr = eb->gem_context->sched; |
61231f6b CW |
2358 | } else { |
2359 | /* Serialise with context_close via the add_to_timeline */ | |
36e191f0 CW |
2360 | i915_request_set_error_once(rq, -ENOENT); |
2361 | __i915_request_skip(rq); | |
61231f6b CW |
2362 | } |
2363 | ||
61231f6b | 2364 | __i915_request_queue(rq, &attr); |
61231f6b CW |
2365 | |
2366 | /* Try to clean up the client's timeline after submitting the request */ | |
2367 | if (prev) | |
2368 | retire_requests(tl, prev); | |
2369 | ||
2370 | mutex_unlock(&tl->mutex); | |
2371 | } | |
2372 | ||
cda9edd0 LL |
2373 | static const i915_user_extension_fn execbuf_extensions[] = { |
2374 | }; | |
2375 | ||
2376 | static int | |
2377 | parse_execbuf2_extensions(struct drm_i915_gem_execbuffer2 *args, | |
2378 | struct i915_execbuffer *eb) | |
2379 | { | |
2380 | eb->extension_flags = 0; | |
2381 | ||
2382 | if (!(args->flags & I915_EXEC_USE_EXTENSIONS)) | |
2383 | return 0; | |
2384 | ||
2385 | /* The execbuf2 extension mechanism reuses cliprects_ptr. So we cannot | |
2386 | * have another flag also using it at the same time. | |
2387 | */ | |
2388 | if (eb->args->flags & I915_EXEC_FENCE_ARRAY) | |
2389 | return -EINVAL; | |
2390 | ||
2391 | if (args->num_cliprects != 0) | |
2392 | return -EINVAL; | |
2393 | ||
2394 | return i915_user_extensions(u64_to_user_ptr(args->cliprects_ptr), | |
2395 | execbuf_extensions, | |
2396 | ARRAY_SIZE(execbuf_extensions), | |
2397 | eb); | |
2398 | } | |
2399 | ||
54cf91dc | 2400 | static int |
650bc635 | 2401 | i915_gem_do_execbuffer(struct drm_device *dev, |
54cf91dc CW |
2402 | struct drm_file *file, |
2403 | struct drm_i915_gem_execbuffer2 *args, | |
cda9edd0 | 2404 | struct drm_i915_gem_exec_object2 *exec) |
54cf91dc | 2405 | { |
44157641 | 2406 | struct drm_i915_private *i915 = to_i915(dev); |
650bc635 | 2407 | struct i915_execbuffer eb; |
fec0445c CW |
2408 | struct dma_fence *in_fence = NULL; |
2409 | struct sync_file *out_fence = NULL; | |
7d6236bb | 2410 | struct i915_vma *batch; |
fec0445c | 2411 | int out_fence_fd = -1; |
2889caa9 | 2412 | int err; |
432e58ed | 2413 | |
74c1c694 | 2414 | BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS); |
2889caa9 CW |
2415 | BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS & |
2416 | ~__EXEC_OBJECT_UNKNOWN_FLAGS); | |
54cf91dc | 2417 | |
44157641 | 2418 | eb.i915 = i915; |
650bc635 CW |
2419 | eb.file = file; |
2420 | eb.args = args; | |
9e0f9464 | 2421 | if (!(args->flags & I915_EXEC_NO_RELOC)) |
2889caa9 | 2422 | args->flags |= __EXEC_HAS_RELOC; |
c7c6e46f | 2423 | |
650bc635 | 2424 | eb.exec = exec; |
c7c6e46f | 2425 | |
2889caa9 | 2426 | eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS; |
650bc635 CW |
2427 | reloc_cache_init(&eb.reloc_cache, eb.i915); |
2428 | ||
2889caa9 | 2429 | eb.buffer_count = args->buffer_count; |
650bc635 CW |
2430 | eb.batch_start_offset = args->batch_start_offset; |
2431 | eb.batch_len = args->batch_len; | |
32d94048 | 2432 | eb.trampoline = NULL; |
650bc635 | 2433 | |
cda9edd0 LL |
2434 | eb.fences = NULL; |
2435 | eb.n_fences = 0; | |
2436 | ||
2889caa9 | 2437 | eb.batch_flags = 0; |
d7d4eedd | 2438 | if (args->flags & I915_EXEC_SECURE) { |
44157641 JB |
2439 | if (INTEL_GEN(i915) >= 11) |
2440 | return -ENODEV; | |
2441 | ||
2442 | /* Return -EPERM to trigger fallback code on old binaries. */ | |
2443 | if (!HAS_SECURE_BATCHES(i915)) | |
2444 | return -EPERM; | |
2445 | ||
b3ac9f25 | 2446 | if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN)) |
44157641 | 2447 | return -EPERM; |
d7d4eedd | 2448 | |
2889caa9 | 2449 | eb.batch_flags |= I915_DISPATCH_SECURE; |
d7d4eedd | 2450 | } |
b45305fc | 2451 | if (args->flags & I915_EXEC_IS_PINNED) |
2889caa9 | 2452 | eb.batch_flags |= I915_DISPATCH_PINNED; |
54cf91dc | 2453 | |
889333c7 CW |
2454 | #define IN_FENCES (I915_EXEC_FENCE_IN | I915_EXEC_FENCE_SUBMIT) |
2455 | if (args->flags & IN_FENCES) { | |
2456 | if ((args->flags & IN_FENCES) == IN_FENCES) | |
2457 | return -EINVAL; | |
2458 | ||
fec0445c | 2459 | in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2)); |
4a04e371 DCS |
2460 | if (!in_fence) |
2461 | return -EINVAL; | |
fec0445c | 2462 | } |
889333c7 | 2463 | #undef IN_FENCES |
a88b6e4c | 2464 | |
fec0445c CW |
2465 | if (args->flags & I915_EXEC_FENCE_OUT) { |
2466 | out_fence_fd = get_unused_fd_flags(O_CLOEXEC); | |
2467 | if (out_fence_fd < 0) { | |
2889caa9 | 2468 | err = out_fence_fd; |
889333c7 | 2469 | goto err_in_fence; |
fec0445c CW |
2470 | } |
2471 | } | |
2472 | ||
cda9edd0 | 2473 | err = parse_execbuf2_extensions(args, &eb); |
4d470f73 CW |
2474 | if (err) |
2475 | goto err_out_fence; | |
2476 | ||
cda9edd0 LL |
2477 | err = get_fence_array(args, &eb); |
2478 | if (err) | |
2479 | goto err_arr_fence; | |
2480 | ||
2481 | err = eb_create(&eb); | |
2482 | if (err) | |
2483 | goto err_arr_fence; | |
2484 | ||
4d470f73 | 2485 | GEM_BUG_ON(!eb.lut_size); |
2889caa9 | 2486 | |
1acfc104 CW |
2487 | err = eb_select_context(&eb); |
2488 | if (unlikely(err)) | |
2489 | goto err_destroy; | |
2490 | ||
e5dadff4 | 2491 | err = eb_pin_engine(&eb, file, args); |
d6f328bf | 2492 | if (unlikely(err)) |
e5dadff4 | 2493 | goto err_context; |
d6f328bf | 2494 | |
2889caa9 | 2495 | err = eb_relocate(&eb); |
1f727d9e | 2496 | if (err) { |
2889caa9 CW |
2497 | /* |
2498 | * If the user expects the execobject.offset and | |
2499 | * reloc.presumed_offset to be an exact match, | |
2500 | * as for using NO_RELOC, then we cannot update | |
2501 | * the execobject.offset until we have completed | |
2502 | * relocation. | |
2503 | */ | |
2504 | args->flags &= ~__EXEC_HAS_RELOC; | |
2889caa9 | 2505 | goto err_vma; |
1f727d9e | 2506 | } |
54cf91dc | 2507 | |
7d6236bb | 2508 | if (unlikely(eb.batch->flags & EXEC_OBJECT_WRITE)) { |
baa89ba3 WK |
2509 | drm_dbg(&i915->drm, |
2510 | "Attempting to use self-modifying batch buffer\n"); | |
2889caa9 CW |
2511 | err = -EINVAL; |
2512 | goto err_vma; | |
54cf91dc | 2513 | } |
7d6236bb CW |
2514 | |
2515 | if (range_overflows_t(u64, | |
2516 | eb.batch_start_offset, eb.batch_len, | |
2517 | eb.batch->vma->size)) { | |
baa89ba3 | 2518 | drm_dbg(&i915->drm, "Attempting to use out-of-bounds batch\n"); |
2889caa9 CW |
2519 | err = -EINVAL; |
2520 | goto err_vma; | |
0b537272 | 2521 | } |
54cf91dc | 2522 | |
435e8fc0 | 2523 | if (eb.batch_len == 0) |
7d6236bb | 2524 | eb.batch_len = eb.batch->vma->size - eb.batch_start_offset; |
435e8fc0 | 2525 | |
51696691 CW |
2526 | err = eb_parse(&eb); |
2527 | if (err) | |
2528 | goto err_vma; | |
351e3db2 | 2529 | |
2889caa9 CW |
2530 | /* |
2531 | * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure | |
d7d4eedd | 2532 | * batch" bit. Hence we need to pin secure batches into the global gtt. |
28cf5415 | 2533 | * hsw should have this fixed, but bdw mucks it up again. */ |
7d6236bb | 2534 | batch = eb.batch->vma; |
2889caa9 | 2535 | if (eb.batch_flags & I915_DISPATCH_SECURE) { |
058d88c4 | 2536 | struct i915_vma *vma; |
59bfa124 | 2537 | |
da51a1e7 DV |
2538 | /* |
2539 | * So on first glance it looks freaky that we pin the batch here | |
2540 | * outside of the reservation loop. But: | |
2541 | * - The batch is already pinned into the relevant ppgtt, so we | |
2542 | * already have the backing storage fully allocated. | |
2543 | * - No other BO uses the global gtt (well contexts, but meh), | |
fd0753cf | 2544 | * so we don't really have issues with multiple objects not |
da51a1e7 DV |
2545 | * fitting due to fragmentation. |
2546 | * So this is actually safe. | |
2547 | */ | |
7d6236bb | 2548 | vma = i915_gem_object_ggtt_pin(batch->obj, NULL, 0, 0, 0); |
058d88c4 | 2549 | if (IS_ERR(vma)) { |
2889caa9 | 2550 | err = PTR_ERR(vma); |
2c59fd06 | 2551 | goto err_parse; |
058d88c4 | 2552 | } |
d7d4eedd | 2553 | |
7d6236bb | 2554 | batch = vma; |
59bfa124 | 2555 | } |
d7d4eedd | 2556 | |
7dd4f672 CW |
2557 | /* All GPU relocation batches must be submitted prior to the user rq */ |
2558 | GEM_BUG_ON(eb.reloc_cache.rq); | |
2559 | ||
0c8dac88 | 2560 | /* Allocate a request for this batch buffer nice and early. */ |
8f2a1057 | 2561 | eb.request = i915_request_create(eb.context); |
650bc635 | 2562 | if (IS_ERR(eb.request)) { |
2889caa9 | 2563 | err = PTR_ERR(eb.request); |
0c8dac88 | 2564 | goto err_batch_unpin; |
26827088 | 2565 | } |
0c8dac88 | 2566 | |
fec0445c | 2567 | if (in_fence) { |
889333c7 CW |
2568 | if (args->flags & I915_EXEC_FENCE_SUBMIT) |
2569 | err = i915_request_await_execution(eb.request, | |
2570 | in_fence, | |
2571 | eb.engine->bond_execute); | |
2572 | else | |
2573 | err = i915_request_await_dma_fence(eb.request, | |
2574 | in_fence); | |
a88b6e4c CW |
2575 | if (err < 0) |
2576 | goto err_request; | |
2577 | } | |
2578 | ||
cda9edd0 LL |
2579 | if (eb.n_fences) { |
2580 | err = await_fence_array(&eb); | |
cf6e7bac JE |
2581 | if (err) |
2582 | goto err_request; | |
2583 | } | |
2584 | ||
fec0445c | 2585 | if (out_fence_fd != -1) { |
650bc635 | 2586 | out_fence = sync_file_create(&eb.request->fence); |
fec0445c | 2587 | if (!out_fence) { |
2889caa9 | 2588 | err = -ENOMEM; |
fec0445c CW |
2589 | goto err_request; |
2590 | } | |
2591 | } | |
2592 | ||
2889caa9 CW |
2593 | /* |
2594 | * Whilst this request exists, batch_obj will be on the | |
17f298cf CW |
2595 | * active_list, and so will hold the active reference. Only when this |
2596 | * request is retired will the the batch_obj be moved onto the | |
2597 | * inactive_list and lose its active reference. Hence we do not need | |
2598 | * to explicitly hold another reference here. | |
2599 | */ | |
7d6236bb CW |
2600 | eb.request->batch = batch; |
2601 | if (batch->private) | |
16e87459 | 2602 | intel_gt_buffer_pool_mark_active(batch->private, eb.request); |
5f19e2bf | 2603 | |
e61e0f51 | 2604 | trace_i915_request_queue(eb.request, eb.batch_flags); |
7d6236bb | 2605 | err = eb_submit(&eb, batch); |
aa9b7810 | 2606 | err_request: |
650bc635 | 2607 | add_to_client(eb.request, file); |
e14177f1 | 2608 | i915_request_get(eb.request); |
61231f6b | 2609 | eb_request_add(&eb); |
c8659efa | 2610 | |
cda9edd0 LL |
2611 | if (eb.n_fences) |
2612 | signal_fence_array(&eb); | |
cf6e7bac | 2613 | |
fec0445c | 2614 | if (out_fence) { |
2889caa9 | 2615 | if (err == 0) { |
fec0445c | 2616 | fd_install(out_fence_fd, out_fence->file); |
b6a88e4a | 2617 | args->rsvd2 &= GENMASK_ULL(31, 0); /* keep in-fence */ |
fec0445c CW |
2618 | args->rsvd2 |= (u64)out_fence_fd << 32; |
2619 | out_fence_fd = -1; | |
2620 | } else { | |
2621 | fput(out_fence->file); | |
2622 | } | |
2623 | } | |
e14177f1 | 2624 | i915_request_put(eb.request); |
54cf91dc | 2625 | |
0c8dac88 | 2626 | err_batch_unpin: |
2889caa9 | 2627 | if (eb.batch_flags & I915_DISPATCH_SECURE) |
7d6236bb | 2628 | i915_vma_unpin(batch); |
2c59fd06 | 2629 | err_parse: |
7d6236bb | 2630 | if (batch->private) |
16e87459 | 2631 | intel_gt_buffer_pool_put(batch->private); |
2889caa9 | 2632 | err_vma: |
32d94048 CW |
2633 | if (eb.trampoline) |
2634 | i915_vma_unpin(eb.trampoline); | |
e5dadff4 | 2635 | eb_unpin_engine(&eb); |
a4e57f90 | 2636 | err_context: |
8f2a1057 | 2637 | i915_gem_context_put(eb.gem_context); |
1acfc104 | 2638 | err_destroy: |
2889caa9 | 2639 | eb_destroy(&eb); |
cda9edd0 LL |
2640 | err_arr_fence: |
2641 | __free_fence_array(eb.fences, eb.n_fences); | |
4d470f73 | 2642 | err_out_fence: |
fec0445c CW |
2643 | if (out_fence_fd != -1) |
2644 | put_unused_fd(out_fence_fd); | |
4a04e371 | 2645 | err_in_fence: |
fec0445c | 2646 | dma_fence_put(in_fence); |
2889caa9 | 2647 | return err; |
54cf91dc CW |
2648 | } |
2649 | ||
d710fc16 CW |
2650 | static size_t eb_element_size(void) |
2651 | { | |
0f1dd022 | 2652 | return sizeof(struct drm_i915_gem_exec_object2); |
d710fc16 CW |
2653 | } |
2654 | ||
2655 | static bool check_buffer_count(size_t count) | |
2656 | { | |
2657 | const size_t sz = eb_element_size(); | |
2658 | ||
2659 | /* | |
2660 | * When using LUT_HANDLE, we impose a limit of INT_MAX for the lookup | |
2661 | * array size (see eb_create()). Otherwise, we can accept an array as | |
2662 | * large as can be addressed (though use large arrays at your peril)! | |
2663 | */ | |
2664 | ||
2665 | return !(count < 1 || count > INT_MAX || count > SIZE_MAX / sz - 1); | |
2666 | } | |
2667 | ||
54cf91dc CW |
2668 | /* |
2669 | * Legacy execbuffer just creates an exec2 list from the original exec object | |
2670 | * list array and passes it to the real function. | |
2671 | */ | |
2672 | int | |
6a20fe7b VS |
2673 | i915_gem_execbuffer_ioctl(struct drm_device *dev, void *data, |
2674 | struct drm_file *file) | |
54cf91dc | 2675 | { |
d0bf4582 | 2676 | struct drm_i915_private *i915 = to_i915(dev); |
54cf91dc CW |
2677 | struct drm_i915_gem_execbuffer *args = data; |
2678 | struct drm_i915_gem_execbuffer2 exec2; | |
2679 | struct drm_i915_gem_exec_object *exec_list = NULL; | |
2680 | struct drm_i915_gem_exec_object2 *exec2_list = NULL; | |
d710fc16 | 2681 | const size_t count = args->buffer_count; |
2889caa9 CW |
2682 | unsigned int i; |
2683 | int err; | |
54cf91dc | 2684 | |
d710fc16 | 2685 | if (!check_buffer_count(count)) { |
d0bf4582 | 2686 | drm_dbg(&i915->drm, "execbuf2 with %zd buffers\n", count); |
54cf91dc CW |
2687 | return -EINVAL; |
2688 | } | |
2689 | ||
2889caa9 CW |
2690 | exec2.buffers_ptr = args->buffers_ptr; |
2691 | exec2.buffer_count = args->buffer_count; | |
2692 | exec2.batch_start_offset = args->batch_start_offset; | |
2693 | exec2.batch_len = args->batch_len; | |
2694 | exec2.DR1 = args->DR1; | |
2695 | exec2.DR4 = args->DR4; | |
2696 | exec2.num_cliprects = args->num_cliprects; | |
2697 | exec2.cliprects_ptr = args->cliprects_ptr; | |
2698 | exec2.flags = I915_EXEC_RENDER; | |
2699 | i915_execbuffer2_set_context_id(exec2, 0); | |
2700 | ||
00aff3f6 TU |
2701 | err = i915_gem_check_execbuffer(&exec2); |
2702 | if (err) | |
2703 | return err; | |
2889caa9 | 2704 | |
54cf91dc | 2705 | /* Copy in the exec list from userland */ |
d710fc16 | 2706 | exec_list = kvmalloc_array(count, sizeof(*exec_list), |
0ee931c4 | 2707 | __GFP_NOWARN | GFP_KERNEL); |
0f1dd022 | 2708 | exec2_list = kvmalloc_array(count, eb_element_size(), |
0ee931c4 | 2709 | __GFP_NOWARN | GFP_KERNEL); |
54cf91dc | 2710 | if (exec_list == NULL || exec2_list == NULL) { |
d0bf4582 WK |
2711 | drm_dbg(&i915->drm, |
2712 | "Failed to allocate exec list for %d buffers\n", | |
2713 | args->buffer_count); | |
2098105e MH |
2714 | kvfree(exec_list); |
2715 | kvfree(exec2_list); | |
54cf91dc CW |
2716 | return -ENOMEM; |
2717 | } | |
2889caa9 | 2718 | err = copy_from_user(exec_list, |
3ed605bc | 2719 | u64_to_user_ptr(args->buffers_ptr), |
d710fc16 | 2720 | sizeof(*exec_list) * count); |
2889caa9 | 2721 | if (err) { |
d0bf4582 WK |
2722 | drm_dbg(&i915->drm, "copy %d exec entries failed %d\n", |
2723 | args->buffer_count, err); | |
2098105e MH |
2724 | kvfree(exec_list); |
2725 | kvfree(exec2_list); | |
54cf91dc CW |
2726 | return -EFAULT; |
2727 | } | |
2728 | ||
2729 | for (i = 0; i < args->buffer_count; i++) { | |
2730 | exec2_list[i].handle = exec_list[i].handle; | |
2731 | exec2_list[i].relocation_count = exec_list[i].relocation_count; | |
2732 | exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr; | |
2733 | exec2_list[i].alignment = exec_list[i].alignment; | |
2734 | exec2_list[i].offset = exec_list[i].offset; | |
f0836b72 | 2735 | if (INTEL_GEN(to_i915(dev)) < 4) |
54cf91dc CW |
2736 | exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE; |
2737 | else | |
2738 | exec2_list[i].flags = 0; | |
2739 | } | |
2740 | ||
cda9edd0 | 2741 | err = i915_gem_do_execbuffer(dev, file, &exec2, exec2_list); |
2889caa9 | 2742 | if (exec2.flags & __EXEC_HAS_RELOC) { |
9aab8bff | 2743 | struct drm_i915_gem_exec_object __user *user_exec_list = |
3ed605bc | 2744 | u64_to_user_ptr(args->buffers_ptr); |
9aab8bff | 2745 | |
54cf91dc | 2746 | /* Copy the new buffer offsets back to the user's exec list. */ |
9aab8bff | 2747 | for (i = 0; i < args->buffer_count; i++) { |
2889caa9 CW |
2748 | if (!(exec2_list[i].offset & UPDATE)) |
2749 | continue; | |
2750 | ||
934acce3 | 2751 | exec2_list[i].offset = |
2889caa9 CW |
2752 | gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); |
2753 | exec2_list[i].offset &= PIN_OFFSET_MASK; | |
2754 | if (__copy_to_user(&user_exec_list[i].offset, | |
2755 | &exec2_list[i].offset, | |
2756 | sizeof(user_exec_list[i].offset))) | |
9aab8bff | 2757 | break; |
54cf91dc CW |
2758 | } |
2759 | } | |
2760 | ||
2098105e MH |
2761 | kvfree(exec_list); |
2762 | kvfree(exec2_list); | |
2889caa9 | 2763 | return err; |
54cf91dc CW |
2764 | } |
2765 | ||
2766 | int | |
6a20fe7b VS |
2767 | i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data, |
2768 | struct drm_file *file) | |
54cf91dc | 2769 | { |
d0bf4582 | 2770 | struct drm_i915_private *i915 = to_i915(dev); |
54cf91dc | 2771 | struct drm_i915_gem_execbuffer2 *args = data; |
2889caa9 | 2772 | struct drm_i915_gem_exec_object2 *exec2_list; |
d710fc16 | 2773 | const size_t count = args->buffer_count; |
2889caa9 | 2774 | int err; |
54cf91dc | 2775 | |
d710fc16 | 2776 | if (!check_buffer_count(count)) { |
d0bf4582 | 2777 | drm_dbg(&i915->drm, "execbuf2 with %zd buffers\n", count); |
54cf91dc CW |
2778 | return -EINVAL; |
2779 | } | |
2780 | ||
00aff3f6 TU |
2781 | err = i915_gem_check_execbuffer(args); |
2782 | if (err) | |
2783 | return err; | |
2889caa9 | 2784 | |
0f1dd022 | 2785 | exec2_list = kvmalloc_array(count, eb_element_size(), |
0ee931c4 | 2786 | __GFP_NOWARN | GFP_KERNEL); |
54cf91dc | 2787 | if (exec2_list == NULL) { |
d0bf4582 WK |
2788 | drm_dbg(&i915->drm, "Failed to allocate exec list for %zd buffers\n", |
2789 | count); | |
54cf91dc CW |
2790 | return -ENOMEM; |
2791 | } | |
2889caa9 CW |
2792 | if (copy_from_user(exec2_list, |
2793 | u64_to_user_ptr(args->buffers_ptr), | |
d710fc16 | 2794 | sizeof(*exec2_list) * count)) { |
d0bf4582 | 2795 | drm_dbg(&i915->drm, "copy %zd exec entries failed\n", count); |
2098105e | 2796 | kvfree(exec2_list); |
54cf91dc CW |
2797 | return -EFAULT; |
2798 | } | |
2799 | ||
cda9edd0 | 2800 | err = i915_gem_do_execbuffer(dev, file, args, exec2_list); |
2889caa9 CW |
2801 | |
2802 | /* | |
2803 | * Now that we have begun execution of the batchbuffer, we ignore | |
2804 | * any new error after this point. Also given that we have already | |
2805 | * updated the associated relocations, we try to write out the current | |
2806 | * object locations irrespective of any error. | |
2807 | */ | |
2808 | if (args->flags & __EXEC_HAS_RELOC) { | |
d593d992 | 2809 | struct drm_i915_gem_exec_object2 __user *user_exec_list = |
2889caa9 CW |
2810 | u64_to_user_ptr(args->buffers_ptr); |
2811 | unsigned int i; | |
9aab8bff | 2812 | |
2889caa9 | 2813 | /* Copy the new buffer offsets back to the user's exec list. */ |
594cc251 LT |
2814 | /* |
2815 | * Note: count * sizeof(*user_exec_list) does not overflow, | |
2816 | * because we checked 'count' in check_buffer_count(). | |
2817 | * | |
2818 | * And this range already got effectively checked earlier | |
2819 | * when we did the "copy_from_user()" above. | |
2820 | */ | |
b44f6873 CL |
2821 | if (!user_write_access_begin(user_exec_list, |
2822 | count * sizeof(*user_exec_list))) | |
8f4faed0 | 2823 | goto end; |
594cc251 | 2824 | |
9aab8bff | 2825 | for (i = 0; i < args->buffer_count; i++) { |
2889caa9 CW |
2826 | if (!(exec2_list[i].offset & UPDATE)) |
2827 | continue; | |
2828 | ||
934acce3 | 2829 | exec2_list[i].offset = |
2889caa9 CW |
2830 | gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); |
2831 | unsafe_put_user(exec2_list[i].offset, | |
2832 | &user_exec_list[i].offset, | |
2833 | end_user); | |
54cf91dc | 2834 | } |
2889caa9 | 2835 | end_user: |
b44f6873 | 2836 | user_write_access_end(); |
8f4faed0 | 2837 | end:; |
54cf91dc CW |
2838 | } |
2839 | ||
2889caa9 | 2840 | args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS; |
2098105e | 2841 | kvfree(exec2_list); |
2889caa9 | 2842 | return err; |
54cf91dc | 2843 | } |
e3d29130 CW |
2844 | |
2845 | #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) | |
2846 | #include "selftests/i915_gem_execbuffer.c" | |
2847 | #endif |