Commit | Line | Data |
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54cf91dc | 1 | /* |
10be98a7 | 2 | * SPDX-License-Identifier: MIT |
54cf91dc | 3 | * |
10be98a7 | 4 | * Copyright © 2008,2010 Intel Corporation |
54cf91dc CW |
5 | */ |
6 | ||
daedaa33 | 7 | #include <linux/intel-iommu.h> |
ad778f89 | 8 | #include <linux/reservation.h> |
fec0445c | 9 | #include <linux/sync_file.h> |
ad778f89 CW |
10 | #include <linux/uaccess.h> |
11 | ||
cf6e7bac | 12 | #include <drm/drm_syncobj.h> |
760285e7 | 13 | #include <drm/i915_drm.h> |
ad778f89 | 14 | |
df0566a6 JN |
15 | #include "display/intel_frontbuffer.h" |
16 | ||
afa13085 | 17 | #include "gem/i915_gem_ioctls.h" |
10be98a7 | 18 | #include "gt/intel_context.h" |
b40d7378 | 19 | #include "gt/intel_engine_pool.h" |
baea429d | 20 | #include "gt/intel_gt.h" |
8f2a1057 CW |
21 | #include "gt/intel_gt_pm.h" |
22 | ||
6da4a2c4 | 23 | #include "i915_drv.h" |
57822dc6 | 24 | #include "i915_gem_clflush.h" |
10be98a7 | 25 | #include "i915_gem_context.h" |
6da4a2c4 | 26 | #include "i915_gem_ioctls.h" |
54cf91dc | 27 | #include "i915_trace.h" |
54cf91dc | 28 | |
7dd4f672 CW |
29 | enum { |
30 | FORCE_CPU_RELOC = 1, | |
31 | FORCE_GTT_RELOC, | |
32 | FORCE_GPU_RELOC, | |
33 | #define DBG_FORCE_RELOC 0 /* choose one of the above! */ | |
34 | }; | |
d50415cc | 35 | |
dade2a61 CW |
36 | #define __EXEC_OBJECT_HAS_REF BIT(31) |
37 | #define __EXEC_OBJECT_HAS_PIN BIT(30) | |
38 | #define __EXEC_OBJECT_HAS_FENCE BIT(29) | |
39 | #define __EXEC_OBJECT_NEEDS_MAP BIT(28) | |
40 | #define __EXEC_OBJECT_NEEDS_BIAS BIT(27) | |
41 | #define __EXEC_OBJECT_INTERNAL_FLAGS (~0u << 27) /* all of the above */ | |
2889caa9 CW |
42 | #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE) |
43 | ||
44 | #define __EXEC_HAS_RELOC BIT(31) | |
45 | #define __EXEC_VALIDATED BIT(30) | |
74c1c694 | 46 | #define __EXEC_INTERNAL_FLAGS (~0u << 30) |
2889caa9 | 47 | #define UPDATE PIN_OFFSET_FIXED |
d23db88c CW |
48 | |
49 | #define BATCH_OFFSET_BIAS (256*1024) | |
a415d355 | 50 | |
650bc635 | 51 | #define __I915_EXEC_ILLEGAL_FLAGS \ |
08e3e21a LDM |
52 | (__I915_EXEC_UNKNOWN_FLAGS | \ |
53 | I915_EXEC_CONSTANTS_MASK | \ | |
54 | I915_EXEC_RESOURCE_STREAMER) | |
5b043f4e | 55 | |
d20ac620 CW |
56 | /* Catch emission of unexpected errors for CI! */ |
57 | #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) | |
58 | #undef EINVAL | |
59 | #define EINVAL ({ \ | |
60 | DRM_DEBUG_DRIVER("EINVAL at %s:%d\n", __func__, __LINE__); \ | |
61 | 22; \ | |
62 | }) | |
63 | #endif | |
64 | ||
2889caa9 CW |
65 | /** |
66 | * DOC: User command execution | |
67 | * | |
68 | * Userspace submits commands to be executed on the GPU as an instruction | |
69 | * stream within a GEM object we call a batchbuffer. This instructions may | |
70 | * refer to other GEM objects containing auxiliary state such as kernels, | |
71 | * samplers, render targets and even secondary batchbuffers. Userspace does | |
72 | * not know where in the GPU memory these objects reside and so before the | |
73 | * batchbuffer is passed to the GPU for execution, those addresses in the | |
74 | * batchbuffer and auxiliary objects are updated. This is known as relocation, | |
75 | * or patching. To try and avoid having to relocate each object on the next | |
76 | * execution, userspace is told the location of those objects in this pass, | |
77 | * but this remains just a hint as the kernel may choose a new location for | |
78 | * any object in the future. | |
79 | * | |
99d7e4ee KR |
80 | * At the level of talking to the hardware, submitting a batchbuffer for the |
81 | * GPU to execute is to add content to a buffer from which the HW | |
82 | * command streamer is reading. | |
83 | * | |
84 | * 1. Add a command to load the HW context. For Logical Ring Contexts, i.e. | |
85 | * Execlists, this command is not placed on the same buffer as the | |
86 | * remaining items. | |
87 | * | |
88 | * 2. Add a command to invalidate caches to the buffer. | |
89 | * | |
90 | * 3. Add a batchbuffer start command to the buffer; the start command is | |
91 | * essentially a token together with the GPU address of the batchbuffer | |
92 | * to be executed. | |
93 | * | |
94 | * 4. Add a pipeline flush to the buffer. | |
95 | * | |
96 | * 5. Add a memory write command to the buffer to record when the GPU | |
97 | * is done executing the batchbuffer. The memory write writes the | |
98 | * global sequence number of the request, ``i915_request::global_seqno``; | |
99 | * the i915 driver uses the current value in the register to determine | |
100 | * if the GPU has completed the batchbuffer. | |
101 | * | |
102 | * 6. Add a user interrupt command to the buffer. This command instructs | |
103 | * the GPU to issue an interrupt when the command, pipeline flush and | |
104 | * memory write are completed. | |
105 | * | |
106 | * 7. Inform the hardware of the additional commands added to the buffer | |
107 | * (by updating the tail pointer). | |
108 | * | |
2889caa9 CW |
109 | * Processing an execbuf ioctl is conceptually split up into a few phases. |
110 | * | |
111 | * 1. Validation - Ensure all the pointers, handles and flags are valid. | |
112 | * 2. Reservation - Assign GPU address space for every object | |
113 | * 3. Relocation - Update any addresses to point to the final locations | |
114 | * 4. Serialisation - Order the request with respect to its dependencies | |
115 | * 5. Construction - Construct a request to execute the batchbuffer | |
116 | * 6. Submission (at some point in the future execution) | |
117 | * | |
118 | * Reserving resources for the execbuf is the most complicated phase. We | |
119 | * neither want to have to migrate the object in the address space, nor do | |
120 | * we want to have to update any relocations pointing to this object. Ideally, | |
121 | * we want to leave the object where it is and for all the existing relocations | |
122 | * to match. If the object is given a new address, or if userspace thinks the | |
123 | * object is elsewhere, we have to parse all the relocation entries and update | |
124 | * the addresses. Userspace can set the I915_EXEC_NORELOC flag to hint that | |
125 | * all the target addresses in all of its objects match the value in the | |
126 | * relocation entries and that they all match the presumed offsets given by the | |
127 | * list of execbuffer objects. Using this knowledge, we know that if we haven't | |
128 | * moved any buffers, all the relocation entries are valid and we can skip | |
129 | * the update. (If userspace is wrong, the likely outcome is an impromptu GPU | |
130 | * hang.) The requirement for using I915_EXEC_NO_RELOC are: | |
131 | * | |
132 | * The addresses written in the objects must match the corresponding | |
133 | * reloc.presumed_offset which in turn must match the corresponding | |
134 | * execobject.offset. | |
135 | * | |
136 | * Any render targets written to in the batch must be flagged with | |
137 | * EXEC_OBJECT_WRITE. | |
138 | * | |
139 | * To avoid stalling, execobject.offset should match the current | |
140 | * address of that object within the active context. | |
141 | * | |
142 | * The reservation is done is multiple phases. First we try and keep any | |
143 | * object already bound in its current location - so as long as meets the | |
144 | * constraints imposed by the new execbuffer. Any object left unbound after the | |
145 | * first pass is then fitted into any available idle space. If an object does | |
146 | * not fit, all objects are removed from the reservation and the process rerun | |
147 | * after sorting the objects into a priority order (more difficult to fit | |
148 | * objects are tried first). Failing that, the entire VM is cleared and we try | |
149 | * to fit the execbuf once last time before concluding that it simply will not | |
150 | * fit. | |
151 | * | |
152 | * A small complication to all of this is that we allow userspace not only to | |
153 | * specify an alignment and a size for the object in the address space, but | |
154 | * we also allow userspace to specify the exact offset. This objects are | |
155 | * simpler to place (the location is known a priori) all we have to do is make | |
156 | * sure the space is available. | |
157 | * | |
158 | * Once all the objects are in place, patching up the buried pointers to point | |
159 | * to the final locations is a fairly simple job of walking over the relocation | |
160 | * entry arrays, looking up the right address and rewriting the value into | |
161 | * the object. Simple! ... The relocation entries are stored in user memory | |
162 | * and so to access them we have to copy them into a local buffer. That copy | |
163 | * has to avoid taking any pagefaults as they may lead back to a GEM object | |
164 | * requiring the struct_mutex (i.e. recursive deadlock). So once again we split | |
165 | * the relocation into multiple passes. First we try to do everything within an | |
166 | * atomic context (avoid the pagefaults) which requires that we never wait. If | |
167 | * we detect that we may wait, or if we need to fault, then we have to fallback | |
168 | * to a slower path. The slowpath has to drop the mutex. (Can you hear alarm | |
169 | * bells yet?) Dropping the mutex means that we lose all the state we have | |
170 | * built up so far for the execbuf and we must reset any global data. However, | |
171 | * we do leave the objects pinned in their final locations - which is a | |
172 | * potential issue for concurrent execbufs. Once we have left the mutex, we can | |
173 | * allocate and copy all the relocation entries into a large array at our | |
174 | * leisure, reacquire the mutex, reclaim all the objects and other state and | |
175 | * then proceed to update any incorrect addresses with the objects. | |
176 | * | |
177 | * As we process the relocation entries, we maintain a record of whether the | |
178 | * object is being written to. Using NORELOC, we expect userspace to provide | |
179 | * this information instead. We also check whether we can skip the relocation | |
180 | * by comparing the expected value inside the relocation entry with the target's | |
181 | * final address. If they differ, we have to map the current object and rewrite | |
182 | * the 4 or 8 byte pointer within. | |
183 | * | |
184 | * Serialising an execbuf is quite simple according to the rules of the GEM | |
185 | * ABI. Execution within each context is ordered by the order of submission. | |
186 | * Writes to any GEM object are in order of submission and are exclusive. Reads | |
187 | * from a GEM object are unordered with respect to other reads, but ordered by | |
188 | * writes. A write submitted after a read cannot occur before the read, and | |
189 | * similarly any read submitted after a write cannot occur before the write. | |
190 | * Writes are ordered between engines such that only one write occurs at any | |
191 | * time (completing any reads beforehand) - using semaphores where available | |
192 | * and CPU serialisation otherwise. Other GEM access obey the same rules, any | |
193 | * write (either via mmaps using set-domain, or via pwrite) must flush all GPU | |
194 | * reads before starting, and any read (either using set-domain or pread) must | |
195 | * flush all GPU writes before starting. (Note we only employ a barrier before, | |
196 | * we currently rely on userspace not concurrently starting a new execution | |
197 | * whilst reading or writing to an object. This may be an advantage or not | |
198 | * depending on how much you trust userspace not to shoot themselves in the | |
199 | * foot.) Serialisation may just result in the request being inserted into | |
200 | * a DAG awaiting its turn, but most simple is to wait on the CPU until | |
201 | * all dependencies are resolved. | |
202 | * | |
203 | * After all of that, is just a matter of closing the request and handing it to | |
204 | * the hardware (well, leaving it in a queue to be executed). However, we also | |
205 | * offer the ability for batchbuffers to be run with elevated privileges so | |
206 | * that they access otherwise hidden registers. (Used to adjust L3 cache etc.) | |
207 | * Before any batch is given extra privileges we first must check that it | |
208 | * contains no nefarious instructions, we check that each instruction is from | |
209 | * our whitelist and all registers are also from an allowed list. We first | |
210 | * copy the user's batchbuffer to a shadow (so that the user doesn't have | |
211 | * access to it, either by the CPU or GPU as we scan it) and then parse each | |
212 | * instruction. If everything is ok, we set a flag telling the hardware to run | |
213 | * the batchbuffer in trusted mode, otherwise the ioctl is rejected. | |
214 | */ | |
215 | ||
650bc635 | 216 | struct i915_execbuffer { |
2889caa9 CW |
217 | struct drm_i915_private *i915; /** i915 backpointer */ |
218 | struct drm_file *file; /** per-file lookup tables and limits */ | |
219 | struct drm_i915_gem_execbuffer2 *args; /** ioctl parameters */ | |
220 | struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */ | |
c7c6e46f CW |
221 | struct i915_vma **vma; |
222 | unsigned int *flags; | |
2889caa9 CW |
223 | |
224 | struct intel_engine_cs *engine; /** engine to queue the request to */ | |
8f2a1057 CW |
225 | struct intel_context *context; /* logical state for the request */ |
226 | struct i915_gem_context *gem_context; /** caller's context */ | |
2889caa9 | 227 | |
e61e0f51 | 228 | struct i915_request *request; /** our request to build */ |
2889caa9 CW |
229 | struct i915_vma *batch; /** identity of the batch obj/vma */ |
230 | ||
231 | /** actual size of execobj[] as we may extend it for the cmdparser */ | |
232 | unsigned int buffer_count; | |
233 | ||
234 | /** list of vma not yet bound during reservation phase */ | |
235 | struct list_head unbound; | |
236 | ||
237 | /** list of vma that have execobj.relocation_count */ | |
238 | struct list_head relocs; | |
239 | ||
240 | /** | |
241 | * Track the most recently used object for relocations, as we | |
242 | * frequently have to perform multiple relocations within the same | |
243 | * obj/page | |
244 | */ | |
650bc635 | 245 | struct reloc_cache { |
2889caa9 CW |
246 | struct drm_mm_node node; /** temporary GTT binding */ |
247 | unsigned long vaddr; /** Current kmap address */ | |
248 | unsigned long page; /** Currently mapped page index */ | |
7dd4f672 | 249 | unsigned int gen; /** Cached value of INTEL_GEN */ |
650bc635 | 250 | bool use_64bit_reloc : 1; |
2889caa9 CW |
251 | bool has_llc : 1; |
252 | bool has_fence : 1; | |
253 | bool needs_unfenced : 1; | |
7dd4f672 | 254 | |
e61e0f51 | 255 | struct i915_request *rq; |
7dd4f672 CW |
256 | u32 *rq_cmd; |
257 | unsigned int rq_size; | |
650bc635 | 258 | } reloc_cache; |
2889caa9 CW |
259 | |
260 | u64 invalid_flags; /** Set of execobj.flags that are invalid */ | |
261 | u32 context_flags; /** Set of execobj.flags to insert from the ctx */ | |
262 | ||
263 | u32 batch_start_offset; /** Location within object of batch */ | |
264 | u32 batch_len; /** Length of batch within object */ | |
265 | u32 batch_flags; /** Flags composed for emit_bb_start() */ | |
266 | ||
267 | /** | |
268 | * Indicate either the size of the hastable used to resolve | |
269 | * relocation handles, or if negative that we are using a direct | |
270 | * index into the execobj[]. | |
271 | */ | |
272 | int lut_size; | |
273 | struct hlist_head *buckets; /** ht for relocation handles */ | |
67731b87 CW |
274 | }; |
275 | ||
c7c6e46f | 276 | #define exec_entry(EB, VMA) (&(EB)->exec[(VMA)->exec_flags - (EB)->flags]) |
4ff4b44c | 277 | |
2889caa9 CW |
278 | /* |
279 | * Used to convert any address to canonical form. | |
280 | * Starting from gen8, some commands (e.g. STATE_BASE_ADDRESS, | |
281 | * MI_LOAD_REGISTER_MEM and others, see Broadwell PRM Vol2a) require the | |
282 | * addresses to be in a canonical form: | |
283 | * "GraphicsAddress[63:48] are ignored by the HW and assumed to be in correct | |
284 | * canonical form [63:48] == [47]." | |
285 | */ | |
286 | #define GEN8_HIGH_ADDRESS_BIT 47 | |
287 | static inline u64 gen8_canonical_addr(u64 address) | |
288 | { | |
289 | return sign_extend64(address, GEN8_HIGH_ADDRESS_BIT); | |
290 | } | |
291 | ||
292 | static inline u64 gen8_noncanonical_addr(u64 address) | |
293 | { | |
294 | return address & GENMASK_ULL(GEN8_HIGH_ADDRESS_BIT, 0); | |
295 | } | |
296 | ||
3dbf26ed CW |
297 | static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb) |
298 | { | |
439e2ee4 | 299 | return intel_engine_needs_cmd_parser(eb->engine) && eb->batch_len; |
3dbf26ed CW |
300 | } |
301 | ||
650bc635 | 302 | static int eb_create(struct i915_execbuffer *eb) |
67731b87 | 303 | { |
2889caa9 CW |
304 | if (!(eb->args->flags & I915_EXEC_HANDLE_LUT)) { |
305 | unsigned int size = 1 + ilog2(eb->buffer_count); | |
4ff4b44c | 306 | |
2889caa9 CW |
307 | /* |
308 | * Without a 1:1 association between relocation handles and | |
309 | * the execobject[] index, we instead create a hashtable. | |
310 | * We size it dynamically based on available memory, starting | |
311 | * first with 1:1 assocative hash and scaling back until | |
312 | * the allocation succeeds. | |
313 | * | |
314 | * Later on we use a positive lut_size to indicate we are | |
315 | * using this hashtable, and a negative value to indicate a | |
316 | * direct lookup. | |
317 | */ | |
4ff4b44c | 318 | do { |
0d95c883 | 319 | gfp_t flags; |
4d470f73 CW |
320 | |
321 | /* While we can still reduce the allocation size, don't | |
322 | * raise a warning and allow the allocation to fail. | |
323 | * On the last pass though, we want to try as hard | |
324 | * as possible to perform the allocation and warn | |
325 | * if it fails. | |
326 | */ | |
0ee931c4 | 327 | flags = GFP_KERNEL; |
4d470f73 CW |
328 | if (size > 1) |
329 | flags |= __GFP_NORETRY | __GFP_NOWARN; | |
330 | ||
4ff4b44c | 331 | eb->buckets = kzalloc(sizeof(struct hlist_head) << size, |
4d470f73 | 332 | flags); |
4ff4b44c CW |
333 | if (eb->buckets) |
334 | break; | |
335 | } while (--size); | |
336 | ||
4d470f73 CW |
337 | if (unlikely(!size)) |
338 | return -ENOMEM; | |
eef90ccb | 339 | |
2889caa9 | 340 | eb->lut_size = size; |
650bc635 | 341 | } else { |
2889caa9 | 342 | eb->lut_size = -eb->buffer_count; |
650bc635 | 343 | } |
eef90ccb | 344 | |
650bc635 | 345 | return 0; |
67731b87 CW |
346 | } |
347 | ||
2889caa9 CW |
348 | static bool |
349 | eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry, | |
c7c6e46f CW |
350 | const struct i915_vma *vma, |
351 | unsigned int flags) | |
2889caa9 | 352 | { |
2889caa9 CW |
353 | if (vma->node.size < entry->pad_to_size) |
354 | return true; | |
355 | ||
356 | if (entry->alignment && !IS_ALIGNED(vma->node.start, entry->alignment)) | |
357 | return true; | |
358 | ||
c7c6e46f | 359 | if (flags & EXEC_OBJECT_PINNED && |
2889caa9 CW |
360 | vma->node.start != entry->offset) |
361 | return true; | |
362 | ||
c7c6e46f | 363 | if (flags & __EXEC_OBJECT_NEEDS_BIAS && |
2889caa9 CW |
364 | vma->node.start < BATCH_OFFSET_BIAS) |
365 | return true; | |
366 | ||
c7c6e46f | 367 | if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) && |
2889caa9 CW |
368 | (vma->node.start + vma->node.size - 1) >> 32) |
369 | return true; | |
370 | ||
1d033beb CW |
371 | if (flags & __EXEC_OBJECT_NEEDS_MAP && |
372 | !i915_vma_is_map_and_fenceable(vma)) | |
373 | return true; | |
374 | ||
2889caa9 CW |
375 | return false; |
376 | } | |
377 | ||
c7c6e46f | 378 | static inline bool |
2889caa9 | 379 | eb_pin_vma(struct i915_execbuffer *eb, |
c7c6e46f | 380 | const struct drm_i915_gem_exec_object2 *entry, |
2889caa9 CW |
381 | struct i915_vma *vma) |
382 | { | |
c7c6e46f CW |
383 | unsigned int exec_flags = *vma->exec_flags; |
384 | u64 pin_flags; | |
2889caa9 | 385 | |
616d9cee | 386 | if (vma->node.size) |
c7c6e46f | 387 | pin_flags = vma->node.start; |
616d9cee | 388 | else |
c7c6e46f | 389 | pin_flags = entry->offset & PIN_OFFSET_MASK; |
616d9cee | 390 | |
c7c6e46f CW |
391 | pin_flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED; |
392 | if (unlikely(exec_flags & EXEC_OBJECT_NEEDS_GTT)) | |
393 | pin_flags |= PIN_GLOBAL; | |
616d9cee | 394 | |
c7c6e46f CW |
395 | if (unlikely(i915_vma_pin(vma, 0, 0, pin_flags))) |
396 | return false; | |
2889caa9 | 397 | |
c7c6e46f | 398 | if (unlikely(exec_flags & EXEC_OBJECT_NEEDS_FENCE)) { |
3bd40735 | 399 | if (unlikely(i915_vma_pin_fence(vma))) { |
2889caa9 | 400 | i915_vma_unpin(vma); |
c7c6e46f | 401 | return false; |
2889caa9 CW |
402 | } |
403 | ||
3bd40735 | 404 | if (vma->fence) |
c7c6e46f | 405 | exec_flags |= __EXEC_OBJECT_HAS_FENCE; |
2889caa9 CW |
406 | } |
407 | ||
c7c6e46f CW |
408 | *vma->exec_flags = exec_flags | __EXEC_OBJECT_HAS_PIN; |
409 | return !eb_vma_misplaced(entry, vma, exec_flags); | |
2889caa9 CW |
410 | } |
411 | ||
c7c6e46f | 412 | static inline void __eb_unreserve_vma(struct i915_vma *vma, unsigned int flags) |
d55495b4 | 413 | { |
c7c6e46f | 414 | GEM_BUG_ON(!(flags & __EXEC_OBJECT_HAS_PIN)); |
2889caa9 | 415 | |
c7c6e46f | 416 | if (unlikely(flags & __EXEC_OBJECT_HAS_FENCE)) |
3bd40735 | 417 | __i915_vma_unpin_fence(vma); |
d55495b4 | 418 | |
2889caa9 | 419 | __i915_vma_unpin(vma); |
d55495b4 CW |
420 | } |
421 | ||
2889caa9 | 422 | static inline void |
c7c6e46f | 423 | eb_unreserve_vma(struct i915_vma *vma, unsigned int *flags) |
d55495b4 | 424 | { |
c7c6e46f | 425 | if (!(*flags & __EXEC_OBJECT_HAS_PIN)) |
2889caa9 | 426 | return; |
d55495b4 | 427 | |
c7c6e46f CW |
428 | __eb_unreserve_vma(vma, *flags); |
429 | *flags &= ~__EXEC_OBJECT_RESERVED; | |
d55495b4 CW |
430 | } |
431 | ||
2889caa9 CW |
432 | static int |
433 | eb_validate_vma(struct i915_execbuffer *eb, | |
434 | struct drm_i915_gem_exec_object2 *entry, | |
435 | struct i915_vma *vma) | |
67731b87 | 436 | { |
2889caa9 CW |
437 | if (unlikely(entry->flags & eb->invalid_flags)) |
438 | return -EINVAL; | |
d55495b4 | 439 | |
2889caa9 CW |
440 | if (unlikely(entry->alignment && !is_power_of_2(entry->alignment))) |
441 | return -EINVAL; | |
442 | ||
443 | /* | |
444 | * Offset can be used as input (EXEC_OBJECT_PINNED), reject | |
445 | * any non-page-aligned or non-canonical addresses. | |
446 | */ | |
447 | if (unlikely(entry->flags & EXEC_OBJECT_PINNED && | |
6fc4e48f | 448 | entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK))) |
2889caa9 CW |
449 | return -EINVAL; |
450 | ||
451 | /* pad_to_size was once a reserved field, so sanitize it */ | |
452 | if (entry->flags & EXEC_OBJECT_PAD_TO_SIZE) { | |
453 | if (unlikely(offset_in_page(entry->pad_to_size))) | |
454 | return -EINVAL; | |
455 | } else { | |
456 | entry->pad_to_size = 0; | |
d55495b4 CW |
457 | } |
458 | ||
c7c6e46f | 459 | if (unlikely(vma->exec_flags)) { |
2889caa9 CW |
460 | DRM_DEBUG("Object [handle %d, index %d] appears more than once in object list\n", |
461 | entry->handle, (int)(entry - eb->exec)); | |
462 | return -EINVAL; | |
463 | } | |
464 | ||
465 | /* | |
466 | * From drm_mm perspective address space is continuous, | |
467 | * so from this point we're always using non-canonical | |
468 | * form internally. | |
469 | */ | |
470 | entry->offset = gen8_noncanonical_addr(entry->offset); | |
471 | ||
c7c6e46f CW |
472 | if (!eb->reloc_cache.has_fence) { |
473 | entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE; | |
474 | } else { | |
475 | if ((entry->flags & EXEC_OBJECT_NEEDS_FENCE || | |
476 | eb->reloc_cache.needs_unfenced) && | |
477 | i915_gem_object_is_tiled(vma->obj)) | |
478 | entry->flags |= EXEC_OBJECT_NEEDS_GTT | __EXEC_OBJECT_NEEDS_MAP; | |
479 | } | |
480 | ||
481 | if (!(entry->flags & EXEC_OBJECT_PINNED)) | |
482 | entry->flags |= eb->context_flags; | |
483 | ||
2889caa9 | 484 | return 0; |
67731b87 CW |
485 | } |
486 | ||
2889caa9 | 487 | static int |
746c8f14 CW |
488 | eb_add_vma(struct i915_execbuffer *eb, |
489 | unsigned int i, unsigned batch_idx, | |
490 | struct i915_vma *vma) | |
59bfa124 | 491 | { |
c7c6e46f | 492 | struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; |
2889caa9 CW |
493 | int err; |
494 | ||
495 | GEM_BUG_ON(i915_vma_is_closed(vma)); | |
496 | ||
497 | if (!(eb->args->flags & __EXEC_VALIDATED)) { | |
498 | err = eb_validate_vma(eb, entry, vma); | |
499 | if (unlikely(err)) | |
500 | return err; | |
4ff4b44c | 501 | } |
4ff4b44c | 502 | |
4d470f73 | 503 | if (eb->lut_size > 0) { |
2889caa9 | 504 | vma->exec_handle = entry->handle; |
4ff4b44c | 505 | hlist_add_head(&vma->exec_node, |
2889caa9 CW |
506 | &eb->buckets[hash_32(entry->handle, |
507 | eb->lut_size)]); | |
4ff4b44c | 508 | } |
59bfa124 | 509 | |
2889caa9 CW |
510 | if (entry->relocation_count) |
511 | list_add_tail(&vma->reloc_link, &eb->relocs); | |
512 | ||
2889caa9 CW |
513 | /* |
514 | * Stash a pointer from the vma to execobj, so we can query its flags, | |
515 | * size, alignment etc as provided by the user. Also we stash a pointer | |
516 | * to the vma inside the execobj so that we can use a direct lookup | |
517 | * to find the right target VMA when doing relocations. | |
518 | */ | |
c7c6e46f | 519 | eb->vma[i] = vma; |
d1b48c1e | 520 | eb->flags[i] = entry->flags; |
c7c6e46f | 521 | vma->exec_flags = &eb->flags[i]; |
2889caa9 | 522 | |
746c8f14 CW |
523 | /* |
524 | * SNA is doing fancy tricks with compressing batch buffers, which leads | |
525 | * to negative relocation deltas. Usually that works out ok since the | |
526 | * relocate address is still positive, except when the batch is placed | |
527 | * very low in the GTT. Ensure this doesn't happen. | |
528 | * | |
529 | * Note that actual hangs have only been observed on gen7, but for | |
530 | * paranoia do it everywhere. | |
531 | */ | |
532 | if (i == batch_idx) { | |
827db9d8 CW |
533 | if (entry->relocation_count && |
534 | !(eb->flags[i] & EXEC_OBJECT_PINNED)) | |
746c8f14 CW |
535 | eb->flags[i] |= __EXEC_OBJECT_NEEDS_BIAS; |
536 | if (eb->reloc_cache.has_fence) | |
537 | eb->flags[i] |= EXEC_OBJECT_NEEDS_FENCE; | |
538 | ||
539 | eb->batch = vma; | |
540 | } | |
541 | ||
2889caa9 | 542 | err = 0; |
c7c6e46f | 543 | if (eb_pin_vma(eb, entry, vma)) { |
2889caa9 CW |
544 | if (entry->offset != vma->node.start) { |
545 | entry->offset = vma->node.start | UPDATE; | |
546 | eb->args->flags |= __EXEC_HAS_RELOC; | |
547 | } | |
c7c6e46f CW |
548 | } else { |
549 | eb_unreserve_vma(vma, vma->exec_flags); | |
550 | ||
551 | list_add_tail(&vma->exec_link, &eb->unbound); | |
552 | if (drm_mm_node_allocated(&vma->node)) | |
553 | err = i915_vma_unbind(vma); | |
ed2f3532 CW |
554 | if (unlikely(err)) |
555 | vma->exec_flags = NULL; | |
2889caa9 CW |
556 | } |
557 | return err; | |
558 | } | |
559 | ||
560 | static inline int use_cpu_reloc(const struct reloc_cache *cache, | |
561 | const struct drm_i915_gem_object *obj) | |
562 | { | |
563 | if (!i915_gem_object_has_struct_page(obj)) | |
564 | return false; | |
565 | ||
7dd4f672 CW |
566 | if (DBG_FORCE_RELOC == FORCE_CPU_RELOC) |
567 | return true; | |
568 | ||
569 | if (DBG_FORCE_RELOC == FORCE_GTT_RELOC) | |
570 | return false; | |
2889caa9 CW |
571 | |
572 | return (cache->has_llc || | |
573 | obj->cache_dirty || | |
574 | obj->cache_level != I915_CACHE_NONE); | |
575 | } | |
576 | ||
577 | static int eb_reserve_vma(const struct i915_execbuffer *eb, | |
578 | struct i915_vma *vma) | |
579 | { | |
c7c6e46f CW |
580 | struct drm_i915_gem_exec_object2 *entry = exec_entry(eb, vma); |
581 | unsigned int exec_flags = *vma->exec_flags; | |
582 | u64 pin_flags; | |
2889caa9 CW |
583 | int err; |
584 | ||
c7c6e46f CW |
585 | pin_flags = PIN_USER | PIN_NONBLOCK; |
586 | if (exec_flags & EXEC_OBJECT_NEEDS_GTT) | |
587 | pin_flags |= PIN_GLOBAL; | |
2889caa9 CW |
588 | |
589 | /* | |
590 | * Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset, | |
591 | * limit address to the first 4GBs for unflagged objects. | |
592 | */ | |
c7c6e46f CW |
593 | if (!(exec_flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) |
594 | pin_flags |= PIN_ZONE_4G; | |
2889caa9 | 595 | |
c7c6e46f CW |
596 | if (exec_flags & __EXEC_OBJECT_NEEDS_MAP) |
597 | pin_flags |= PIN_MAPPABLE; | |
2889caa9 | 598 | |
c7c6e46f CW |
599 | if (exec_flags & EXEC_OBJECT_PINNED) { |
600 | pin_flags |= entry->offset | PIN_OFFSET_FIXED; | |
601 | pin_flags &= ~PIN_NONBLOCK; /* force overlapping checks */ | |
602 | } else if (exec_flags & __EXEC_OBJECT_NEEDS_BIAS) { | |
603 | pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS; | |
2889caa9 CW |
604 | } |
605 | ||
c7c6e46f CW |
606 | err = i915_vma_pin(vma, |
607 | entry->pad_to_size, entry->alignment, | |
608 | pin_flags); | |
2889caa9 CW |
609 | if (err) |
610 | return err; | |
611 | ||
612 | if (entry->offset != vma->node.start) { | |
613 | entry->offset = vma->node.start | UPDATE; | |
614 | eb->args->flags |= __EXEC_HAS_RELOC; | |
615 | } | |
616 | ||
c7c6e46f | 617 | if (unlikely(exec_flags & EXEC_OBJECT_NEEDS_FENCE)) { |
3bd40735 | 618 | err = i915_vma_pin_fence(vma); |
2889caa9 CW |
619 | if (unlikely(err)) { |
620 | i915_vma_unpin(vma); | |
621 | return err; | |
622 | } | |
623 | ||
3bd40735 | 624 | if (vma->fence) |
c7c6e46f | 625 | exec_flags |= __EXEC_OBJECT_HAS_FENCE; |
2889caa9 CW |
626 | } |
627 | ||
c7c6e46f CW |
628 | *vma->exec_flags = exec_flags | __EXEC_OBJECT_HAS_PIN; |
629 | GEM_BUG_ON(eb_vma_misplaced(entry, vma, exec_flags)); | |
1da7b54c | 630 | |
2889caa9 CW |
631 | return 0; |
632 | } | |
633 | ||
634 | static int eb_reserve(struct i915_execbuffer *eb) | |
635 | { | |
636 | const unsigned int count = eb->buffer_count; | |
637 | struct list_head last; | |
638 | struct i915_vma *vma; | |
639 | unsigned int i, pass; | |
640 | int err; | |
641 | ||
642 | /* | |
643 | * Attempt to pin all of the buffers into the GTT. | |
644 | * This is done in 3 phases: | |
645 | * | |
646 | * 1a. Unbind all objects that do not match the GTT constraints for | |
647 | * the execbuffer (fenceable, mappable, alignment etc). | |
648 | * 1b. Increment pin count for already bound objects. | |
649 | * 2. Bind new objects. | |
650 | * 3. Decrement pin count. | |
651 | * | |
652 | * This avoid unnecessary unbinding of later objects in order to make | |
653 | * room for the earlier objects *unless* we need to defragment. | |
654 | */ | |
655 | ||
656 | pass = 0; | |
657 | err = 0; | |
658 | do { | |
659 | list_for_each_entry(vma, &eb->unbound, exec_link) { | |
660 | err = eb_reserve_vma(eb, vma); | |
661 | if (err) | |
662 | break; | |
663 | } | |
664 | if (err != -ENOSPC) | |
665 | return err; | |
666 | ||
667 | /* Resort *all* the objects into priority order */ | |
668 | INIT_LIST_HEAD(&eb->unbound); | |
669 | INIT_LIST_HEAD(&last); | |
670 | for (i = 0; i < count; i++) { | |
c7c6e46f CW |
671 | unsigned int flags = eb->flags[i]; |
672 | struct i915_vma *vma = eb->vma[i]; | |
2889caa9 | 673 | |
c7c6e46f CW |
674 | if (flags & EXEC_OBJECT_PINNED && |
675 | flags & __EXEC_OBJECT_HAS_PIN) | |
2889caa9 CW |
676 | continue; |
677 | ||
c7c6e46f | 678 | eb_unreserve_vma(vma, &eb->flags[i]); |
2889caa9 | 679 | |
c7c6e46f | 680 | if (flags & EXEC_OBJECT_PINNED) |
35e882a4 | 681 | /* Pinned must have their slot */ |
2889caa9 | 682 | list_add(&vma->exec_link, &eb->unbound); |
c7c6e46f | 683 | else if (flags & __EXEC_OBJECT_NEEDS_MAP) |
35e882a4 | 684 | /* Map require the lowest 256MiB (aperture) */ |
2889caa9 | 685 | list_add_tail(&vma->exec_link, &eb->unbound); |
35e882a4 CW |
686 | else if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) |
687 | /* Prioritise 4GiB region for restricted bo */ | |
688 | list_add(&vma->exec_link, &last); | |
2889caa9 CW |
689 | else |
690 | list_add_tail(&vma->exec_link, &last); | |
691 | } | |
692 | list_splice_tail(&last, &eb->unbound); | |
693 | ||
694 | switch (pass++) { | |
695 | case 0: | |
696 | break; | |
697 | ||
698 | case 1: | |
699 | /* Too fragmented, unbind everything and retry */ | |
f5d974f9 | 700 | err = i915_gem_evict_vm(eb->context->vm); |
2889caa9 CW |
701 | if (err) |
702 | return err; | |
703 | break; | |
704 | ||
705 | default: | |
706 | return -ENOSPC; | |
707 | } | |
708 | } while (1); | |
4ff4b44c | 709 | } |
59bfa124 | 710 | |
2889caa9 CW |
711 | static unsigned int eb_batch_index(const struct i915_execbuffer *eb) |
712 | { | |
1a71cf2f CW |
713 | if (eb->args->flags & I915_EXEC_BATCH_FIRST) |
714 | return 0; | |
715 | else | |
716 | return eb->buffer_count - 1; | |
2889caa9 CW |
717 | } |
718 | ||
719 | static int eb_select_context(struct i915_execbuffer *eb) | |
720 | { | |
721 | struct i915_gem_context *ctx; | |
722 | ||
723 | ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1); | |
1acfc104 CW |
724 | if (unlikely(!ctx)) |
725 | return -ENOENT; | |
2889caa9 | 726 | |
8f2a1057 | 727 | eb->gem_context = ctx; |
f5d974f9 | 728 | if (ctx->vm) |
4f2c7337 | 729 | eb->invalid_flags |= EXEC_OBJECT_NEEDS_GTT; |
2889caa9 CW |
730 | |
731 | eb->context_flags = 0; | |
d3f3e5e4 | 732 | if (test_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags)) |
2889caa9 CW |
733 | eb->context_flags |= __EXEC_OBJECT_NEEDS_BIAS; |
734 | ||
735 | return 0; | |
736 | } | |
737 | ||
d6f328bf CW |
738 | static struct i915_request *__eb_wait_for_ring(struct intel_ring *ring) |
739 | { | |
740 | struct i915_request *rq; | |
741 | ||
742 | /* | |
743 | * Completely unscientific finger-in-the-air estimates for suitable | |
744 | * maximum user request size (to avoid blocking) and then backoff. | |
745 | */ | |
746 | if (intel_ring_update_space(ring) >= PAGE_SIZE) | |
747 | return NULL; | |
748 | ||
749 | /* | |
750 | * Find a request that after waiting upon, there will be at least half | |
751 | * the ring available. The hysteresis allows us to compete for the | |
752 | * shared ring and should mean that we sleep less often prior to | |
753 | * claiming our resources, but not so long that the ring completely | |
754 | * drains before we can submit our next request. | |
755 | */ | |
756 | list_for_each_entry(rq, &ring->request_list, ring_link) { | |
757 | if (__intel_ring_space(rq->postfix, | |
758 | ring->emit, ring->size) > ring->size / 2) | |
759 | break; | |
760 | } | |
761 | if (&rq->ring_link == &ring->request_list) | |
762 | return NULL; /* weird, we will check again later for real */ | |
763 | ||
764 | return i915_request_get(rq); | |
765 | } | |
766 | ||
767 | static int eb_wait_for_ring(const struct i915_execbuffer *eb) | |
768 | { | |
d6f328bf CW |
769 | struct i915_request *rq; |
770 | int ret = 0; | |
771 | ||
772 | /* | |
773 | * Apply a light amount of backpressure to prevent excessive hogs | |
774 | * from blocking waiting for space whilst holding struct_mutex and | |
775 | * keeping all of their resources pinned. | |
776 | */ | |
777 | ||
8f2a1057 | 778 | rq = __eb_wait_for_ring(eb->context->ring); |
d6f328bf CW |
779 | if (rq) { |
780 | mutex_unlock(&eb->i915->drm.struct_mutex); | |
781 | ||
782 | if (i915_request_wait(rq, | |
783 | I915_WAIT_INTERRUPTIBLE, | |
784 | MAX_SCHEDULE_TIMEOUT) < 0) | |
785 | ret = -EINTR; | |
786 | ||
787 | i915_request_put(rq); | |
788 | ||
789 | mutex_lock(&eb->i915->drm.struct_mutex); | |
790 | } | |
791 | ||
792 | return ret; | |
793 | } | |
794 | ||
2889caa9 | 795 | static int eb_lookup_vmas(struct i915_execbuffer *eb) |
3b96eff4 | 796 | { |
8f2a1057 | 797 | struct radix_tree_root *handles_vma = &eb->gem_context->handles_vma; |
ac70ebe8 | 798 | struct drm_i915_gem_object *obj; |
746c8f14 | 799 | unsigned int i, batch; |
2889caa9 | 800 | int err; |
3b96eff4 | 801 | |
8f2a1057 | 802 | if (unlikely(i915_gem_context_is_banned(eb->gem_context))) |
8bcbfb12 CW |
803 | return -EIO; |
804 | ||
2889caa9 CW |
805 | INIT_LIST_HEAD(&eb->relocs); |
806 | INIT_LIST_HEAD(&eb->unbound); | |
d55495b4 | 807 | |
746c8f14 CW |
808 | batch = eb_batch_index(eb); |
809 | ||
155ab883 CW |
810 | mutex_lock(&eb->gem_context->mutex); |
811 | if (unlikely(i915_gem_context_is_closed(eb->gem_context))) { | |
812 | err = -ENOENT; | |
813 | goto err_ctx; | |
814 | } | |
815 | ||
170fa29b CW |
816 | for (i = 0; i < eb->buffer_count; i++) { |
817 | u32 handle = eb->exec[i].handle; | |
d1b48c1e | 818 | struct i915_lut_handle *lut; |
170fa29b | 819 | struct i915_vma *vma; |
4ff4b44c | 820 | |
d1b48c1e CW |
821 | vma = radix_tree_lookup(handles_vma, handle); |
822 | if (likely(vma)) | |
170fa29b | 823 | goto add_vma; |
4ff4b44c | 824 | |
170fa29b | 825 | obj = i915_gem_object_lookup(eb->file, handle); |
4ff4b44c | 826 | if (unlikely(!obj)) { |
2889caa9 | 827 | err = -ENOENT; |
170fa29b | 828 | goto err_vma; |
3b96eff4 CW |
829 | } |
830 | ||
f5d974f9 | 831 | vma = i915_vma_instance(obj, eb->context->vm, NULL); |
772b5408 | 832 | if (IS_ERR(vma)) { |
2889caa9 | 833 | err = PTR_ERR(vma); |
170fa29b | 834 | goto err_obj; |
27173f1f BW |
835 | } |
836 | ||
13f1bfd3 | 837 | lut = i915_lut_handle_alloc(); |
d1b48c1e CW |
838 | if (unlikely(!lut)) { |
839 | err = -ENOMEM; | |
840 | goto err_obj; | |
841 | } | |
842 | ||
843 | err = radix_tree_insert(handles_vma, handle, vma); | |
844 | if (unlikely(err)) { | |
13f1bfd3 | 845 | i915_lut_handle_free(lut); |
d1b48c1e | 846 | goto err_obj; |
eef90ccb | 847 | } |
4ff4b44c | 848 | |
155ab883 CW |
849 | /* transfer ref to lut */ |
850 | if (!atomic_fetch_inc(&vma->open_count)) | |
3365e226 | 851 | i915_vma_reopen(vma); |
d1b48c1e | 852 | lut->handle = handle; |
155ab883 CW |
853 | lut->ctx = eb->gem_context; |
854 | ||
855 | i915_gem_object_lock(obj); | |
856 | list_add(&lut->obj_link, &obj->lut_list); | |
857 | i915_gem_object_unlock(obj); | |
d1b48c1e | 858 | |
170fa29b | 859 | add_vma: |
746c8f14 | 860 | err = eb_add_vma(eb, i, batch, vma); |
2889caa9 | 861 | if (unlikely(err)) |
ac70ebe8 | 862 | goto err_vma; |
dade2a61 | 863 | |
c7c6e46f CW |
864 | GEM_BUG_ON(vma != eb->vma[i]); |
865 | GEM_BUG_ON(vma->exec_flags != &eb->flags[i]); | |
746c8f14 CW |
866 | GEM_BUG_ON(drm_mm_node_allocated(&vma->node) && |
867 | eb_vma_misplaced(&eb->exec[i], vma, eb->flags[i])); | |
4ff4b44c CW |
868 | } |
869 | ||
155ab883 CW |
870 | mutex_unlock(&eb->gem_context->mutex); |
871 | ||
2889caa9 CW |
872 | eb->args->flags |= __EXEC_VALIDATED; |
873 | return eb_reserve(eb); | |
874 | ||
170fa29b | 875 | err_obj: |
ac70ebe8 | 876 | i915_gem_object_put(obj); |
170fa29b CW |
877 | err_vma: |
878 | eb->vma[i] = NULL; | |
155ab883 CW |
879 | err_ctx: |
880 | mutex_unlock(&eb->gem_context->mutex); | |
2889caa9 | 881 | return err; |
3b96eff4 CW |
882 | } |
883 | ||
4ff4b44c | 884 | static struct i915_vma * |
2889caa9 | 885 | eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle) |
67731b87 | 886 | { |
2889caa9 CW |
887 | if (eb->lut_size < 0) { |
888 | if (handle >= -eb->lut_size) | |
eef90ccb | 889 | return NULL; |
c7c6e46f | 890 | return eb->vma[handle]; |
eef90ccb CW |
891 | } else { |
892 | struct hlist_head *head; | |
aa45950b | 893 | struct i915_vma *vma; |
67731b87 | 894 | |
2889caa9 | 895 | head = &eb->buckets[hash_32(handle, eb->lut_size)]; |
aa45950b | 896 | hlist_for_each_entry(vma, head, exec_node) { |
27173f1f BW |
897 | if (vma->exec_handle == handle) |
898 | return vma; | |
eef90ccb CW |
899 | } |
900 | return NULL; | |
901 | } | |
67731b87 CW |
902 | } |
903 | ||
2889caa9 | 904 | static void eb_release_vmas(const struct i915_execbuffer *eb) |
a415d355 | 905 | { |
2889caa9 CW |
906 | const unsigned int count = eb->buffer_count; |
907 | unsigned int i; | |
908 | ||
909 | for (i = 0; i < count; i++) { | |
c7c6e46f CW |
910 | struct i915_vma *vma = eb->vma[i]; |
911 | unsigned int flags = eb->flags[i]; | |
650bc635 | 912 | |
2889caa9 | 913 | if (!vma) |
170fa29b | 914 | break; |
bcffc3fa | 915 | |
c7c6e46f CW |
916 | GEM_BUG_ON(vma->exec_flags != &eb->flags[i]); |
917 | vma->exec_flags = NULL; | |
918 | eb->vma[i] = NULL; | |
9e53d9be | 919 | |
c7c6e46f CW |
920 | if (flags & __EXEC_OBJECT_HAS_PIN) |
921 | __eb_unreserve_vma(vma, flags); | |
dade2a61 | 922 | |
c7c6e46f | 923 | if (flags & __EXEC_OBJECT_HAS_REF) |
dade2a61 | 924 | i915_vma_put(vma); |
2889caa9 | 925 | } |
dabdfe02 CW |
926 | } |
927 | ||
2889caa9 | 928 | static void eb_reset_vmas(const struct i915_execbuffer *eb) |
934acce3 | 929 | { |
2889caa9 | 930 | eb_release_vmas(eb); |
4d470f73 | 931 | if (eb->lut_size > 0) |
2889caa9 CW |
932 | memset(eb->buckets, 0, |
933 | sizeof(struct hlist_head) << eb->lut_size); | |
934acce3 MW |
934 | } |
935 | ||
2889caa9 | 936 | static void eb_destroy(const struct i915_execbuffer *eb) |
934acce3 | 937 | { |
7dd4f672 CW |
938 | GEM_BUG_ON(eb->reloc_cache.rq); |
939 | ||
4d470f73 | 940 | if (eb->lut_size > 0) |
2889caa9 | 941 | kfree(eb->buckets); |
934acce3 MW |
942 | } |
943 | ||
2889caa9 | 944 | static inline u64 |
d50415cc | 945 | relocation_target(const struct drm_i915_gem_relocation_entry *reloc, |
2889caa9 | 946 | const struct i915_vma *target) |
934acce3 | 947 | { |
2889caa9 | 948 | return gen8_canonical_addr((int)reloc->delta + target->node.start); |
934acce3 MW |
949 | } |
950 | ||
d50415cc CW |
951 | static void reloc_cache_init(struct reloc_cache *cache, |
952 | struct drm_i915_private *i915) | |
5032d871 | 953 | { |
31a39207 | 954 | cache->page = -1; |
d50415cc | 955 | cache->vaddr = 0; |
dfc5148f | 956 | /* Must be a variable in the struct to allow GCC to unroll. */ |
7dd4f672 | 957 | cache->gen = INTEL_GEN(i915); |
2889caa9 | 958 | cache->has_llc = HAS_LLC(i915); |
dfc5148f | 959 | cache->use_64bit_reloc = HAS_64BIT_RELOC(i915); |
7dd4f672 CW |
960 | cache->has_fence = cache->gen < 4; |
961 | cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment; | |
e8cb909a | 962 | cache->node.allocated = false; |
7dd4f672 CW |
963 | cache->rq = NULL; |
964 | cache->rq_size = 0; | |
d50415cc | 965 | } |
5032d871 | 966 | |
d50415cc CW |
967 | static inline void *unmask_page(unsigned long p) |
968 | { | |
969 | return (void *)(uintptr_t)(p & PAGE_MASK); | |
970 | } | |
971 | ||
972 | static inline unsigned int unmask_flags(unsigned long p) | |
973 | { | |
974 | return p & ~PAGE_MASK; | |
31a39207 CW |
975 | } |
976 | ||
d50415cc CW |
977 | #define KMAP 0x4 /* after CLFLUSH_FLAGS */ |
978 | ||
650bc635 CW |
979 | static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache) |
980 | { | |
981 | struct drm_i915_private *i915 = | |
982 | container_of(cache, struct i915_execbuffer, reloc_cache)->i915; | |
983 | return &i915->ggtt; | |
984 | } | |
985 | ||
7dd4f672 CW |
986 | static void reloc_gpu_flush(struct reloc_cache *cache) |
987 | { | |
988 | GEM_BUG_ON(cache->rq_size >= cache->rq->batch->obj->base.size / sizeof(u32)); | |
989 | cache->rq_cmd[cache->rq_size] = MI_BATCH_BUFFER_END; | |
a679f58d CW |
990 | |
991 | __i915_gem_object_flush_map(cache->rq->batch->obj, 0, cache->rq_size); | |
7dd4f672 | 992 | i915_gem_object_unpin_map(cache->rq->batch->obj); |
a679f58d | 993 | |
baea429d | 994 | intel_gt_chipset_flush(cache->rq->engine->gt); |
7dd4f672 | 995 | |
697b9a87 | 996 | i915_request_add(cache->rq); |
7dd4f672 CW |
997 | cache->rq = NULL; |
998 | } | |
999 | ||
650bc635 | 1000 | static void reloc_cache_reset(struct reloc_cache *cache) |
31a39207 | 1001 | { |
d50415cc | 1002 | void *vaddr; |
5032d871 | 1003 | |
7dd4f672 CW |
1004 | if (cache->rq) |
1005 | reloc_gpu_flush(cache); | |
1006 | ||
31a39207 CW |
1007 | if (!cache->vaddr) |
1008 | return; | |
3c94ceee | 1009 | |
d50415cc CW |
1010 | vaddr = unmask_page(cache->vaddr); |
1011 | if (cache->vaddr & KMAP) { | |
1012 | if (cache->vaddr & CLFLUSH_AFTER) | |
1013 | mb(); | |
3c94ceee | 1014 | |
d50415cc | 1015 | kunmap_atomic(vaddr); |
f0e4a063 | 1016 | i915_gem_object_finish_access((struct drm_i915_gem_object *)cache->node.mm); |
d50415cc | 1017 | } else { |
576f0586 CW |
1018 | struct i915_ggtt *ggtt = cache_to_ggtt(cache); |
1019 | ||
1020 | intel_gt_flush_ggtt_writes(ggtt->vm.gt); | |
d50415cc | 1021 | io_mapping_unmap_atomic((void __iomem *)vaddr); |
e8cb909a | 1022 | |
576f0586 | 1023 | if (cache->node.allocated) { |
82ad6443 CW |
1024 | ggtt->vm.clear_range(&ggtt->vm, |
1025 | cache->node.start, | |
1026 | cache->node.size); | |
e8cb909a CW |
1027 | drm_mm_remove_node(&cache->node); |
1028 | } else { | |
1029 | i915_vma_unpin((struct i915_vma *)cache->node.mm); | |
3c94ceee | 1030 | } |
31a39207 | 1031 | } |
650bc635 CW |
1032 | |
1033 | cache->vaddr = 0; | |
1034 | cache->page = -1; | |
31a39207 CW |
1035 | } |
1036 | ||
1037 | static void *reloc_kmap(struct drm_i915_gem_object *obj, | |
1038 | struct reloc_cache *cache, | |
2889caa9 | 1039 | unsigned long page) |
31a39207 | 1040 | { |
d50415cc CW |
1041 | void *vaddr; |
1042 | ||
1043 | if (cache->vaddr) { | |
1044 | kunmap_atomic(unmask_page(cache->vaddr)); | |
1045 | } else { | |
1046 | unsigned int flushes; | |
2889caa9 | 1047 | int err; |
31a39207 | 1048 | |
f0e4a063 | 1049 | err = i915_gem_object_prepare_write(obj, &flushes); |
2889caa9 CW |
1050 | if (err) |
1051 | return ERR_PTR(err); | |
d50415cc CW |
1052 | |
1053 | BUILD_BUG_ON(KMAP & CLFLUSH_FLAGS); | |
1054 | BUILD_BUG_ON((KMAP | CLFLUSH_FLAGS) & PAGE_MASK); | |
3c94ceee | 1055 | |
d50415cc CW |
1056 | cache->vaddr = flushes | KMAP; |
1057 | cache->node.mm = (void *)obj; | |
1058 | if (flushes) | |
1059 | mb(); | |
3c94ceee BW |
1060 | } |
1061 | ||
d50415cc CW |
1062 | vaddr = kmap_atomic(i915_gem_object_get_dirty_page(obj, page)); |
1063 | cache->vaddr = unmask_flags(cache->vaddr) | (unsigned long)vaddr; | |
31a39207 | 1064 | cache->page = page; |
5032d871 | 1065 | |
d50415cc | 1066 | return vaddr; |
5032d871 RB |
1067 | } |
1068 | ||
d50415cc CW |
1069 | static void *reloc_iomap(struct drm_i915_gem_object *obj, |
1070 | struct reloc_cache *cache, | |
2889caa9 | 1071 | unsigned long page) |
5032d871 | 1072 | { |
650bc635 | 1073 | struct i915_ggtt *ggtt = cache_to_ggtt(cache); |
e8cb909a | 1074 | unsigned long offset; |
d50415cc | 1075 | void *vaddr; |
5032d871 | 1076 | |
d50415cc | 1077 | if (cache->vaddr) { |
576f0586 | 1078 | intel_gt_flush_ggtt_writes(ggtt->vm.gt); |
615e5000 | 1079 | io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr)); |
d50415cc CW |
1080 | } else { |
1081 | struct i915_vma *vma; | |
2889caa9 | 1082 | int err; |
5032d871 | 1083 | |
2889caa9 | 1084 | if (use_cpu_reloc(cache, obj)) |
d50415cc | 1085 | return NULL; |
3c94ceee | 1086 | |
6951e589 | 1087 | i915_gem_object_lock(obj); |
2889caa9 | 1088 | err = i915_gem_object_set_to_gtt_domain(obj, true); |
6951e589 | 1089 | i915_gem_object_unlock(obj); |
2889caa9 CW |
1090 | if (err) |
1091 | return ERR_PTR(err); | |
3c94ceee | 1092 | |
d50415cc | 1093 | vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, |
3c755c5b CW |
1094 | PIN_MAPPABLE | |
1095 | PIN_NONBLOCK | | |
1096 | PIN_NONFAULT); | |
e8cb909a CW |
1097 | if (IS_ERR(vma)) { |
1098 | memset(&cache->node, 0, sizeof(cache->node)); | |
2889caa9 | 1099 | err = drm_mm_insert_node_in_range |
82ad6443 | 1100 | (&ggtt->vm.mm, &cache->node, |
f51455d4 | 1101 | PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE, |
e8cb909a | 1102 | 0, ggtt->mappable_end, |
4e64e553 | 1103 | DRM_MM_INSERT_LOW); |
2889caa9 | 1104 | if (err) /* no inactive aperture space, use cpu reloc */ |
c92fa4fe | 1105 | return NULL; |
e8cb909a | 1106 | } else { |
2889caa9 CW |
1107 | err = i915_vma_put_fence(vma); |
1108 | if (err) { | |
e8cb909a | 1109 | i915_vma_unpin(vma); |
2889caa9 | 1110 | return ERR_PTR(err); |
e8cb909a | 1111 | } |
5032d871 | 1112 | |
e8cb909a CW |
1113 | cache->node.start = vma->node.start; |
1114 | cache->node.mm = (void *)vma; | |
3c94ceee | 1115 | } |
e8cb909a | 1116 | } |
3c94ceee | 1117 | |
e8cb909a CW |
1118 | offset = cache->node.start; |
1119 | if (cache->node.allocated) { | |
82ad6443 CW |
1120 | ggtt->vm.insert_page(&ggtt->vm, |
1121 | i915_gem_object_get_dma_address(obj, page), | |
1122 | offset, I915_CACHE_NONE, 0); | |
e8cb909a CW |
1123 | } else { |
1124 | offset += page << PAGE_SHIFT; | |
3c94ceee BW |
1125 | } |
1126 | ||
73ebd503 | 1127 | vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->iomap, |
650bc635 | 1128 | offset); |
d50415cc CW |
1129 | cache->page = page; |
1130 | cache->vaddr = (unsigned long)vaddr; | |
5032d871 | 1131 | |
d50415cc | 1132 | return vaddr; |
5032d871 RB |
1133 | } |
1134 | ||
d50415cc CW |
1135 | static void *reloc_vaddr(struct drm_i915_gem_object *obj, |
1136 | struct reloc_cache *cache, | |
2889caa9 | 1137 | unsigned long page) |
edf4427b | 1138 | { |
d50415cc | 1139 | void *vaddr; |
5032d871 | 1140 | |
d50415cc CW |
1141 | if (cache->page == page) { |
1142 | vaddr = unmask_page(cache->vaddr); | |
1143 | } else { | |
1144 | vaddr = NULL; | |
1145 | if ((cache->vaddr & KMAP) == 0) | |
1146 | vaddr = reloc_iomap(obj, cache, page); | |
1147 | if (!vaddr) | |
1148 | vaddr = reloc_kmap(obj, cache, page); | |
3c94ceee BW |
1149 | } |
1150 | ||
d50415cc | 1151 | return vaddr; |
edf4427b CW |
1152 | } |
1153 | ||
d50415cc | 1154 | static void clflush_write32(u32 *addr, u32 value, unsigned int flushes) |
edf4427b | 1155 | { |
d50415cc CW |
1156 | if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) { |
1157 | if (flushes & CLFLUSH_BEFORE) { | |
1158 | clflushopt(addr); | |
1159 | mb(); | |
1160 | } | |
edf4427b | 1161 | |
d50415cc | 1162 | *addr = value; |
edf4427b | 1163 | |
2889caa9 CW |
1164 | /* |
1165 | * Writes to the same cacheline are serialised by the CPU | |
d50415cc CW |
1166 | * (including clflush). On the write path, we only require |
1167 | * that it hits memory in an orderly fashion and place | |
1168 | * mb barriers at the start and end of the relocation phase | |
1169 | * to ensure ordering of clflush wrt to the system. | |
1170 | */ | |
1171 | if (flushes & CLFLUSH_AFTER) | |
1172 | clflushopt(addr); | |
1173 | } else | |
1174 | *addr = value; | |
edf4427b | 1175 | } |
edf4427b | 1176 | |
6951e589 CW |
1177 | static int reloc_move_to_gpu(struct i915_request *rq, struct i915_vma *vma) |
1178 | { | |
1179 | struct drm_i915_gem_object *obj = vma->obj; | |
1180 | int err; | |
1181 | ||
1182 | i915_vma_lock(vma); | |
1183 | ||
1184 | if (obj->cache_dirty & ~obj->cache_coherent) | |
1185 | i915_gem_clflush_object(obj, 0); | |
1186 | obj->write_domain = 0; | |
1187 | ||
1188 | err = i915_request_await_object(rq, vma->obj, true); | |
1189 | if (err == 0) | |
1190 | err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE); | |
1191 | ||
1192 | i915_vma_unlock(vma); | |
1193 | ||
1194 | return err; | |
1195 | } | |
1196 | ||
7dd4f672 CW |
1197 | static int __reloc_gpu_alloc(struct i915_execbuffer *eb, |
1198 | struct i915_vma *vma, | |
1199 | unsigned int len) | |
1200 | { | |
1201 | struct reloc_cache *cache = &eb->reloc_cache; | |
b40d7378 | 1202 | struct intel_engine_pool_node *pool; |
e61e0f51 | 1203 | struct i915_request *rq; |
7dd4f672 CW |
1204 | struct i915_vma *batch; |
1205 | u32 *cmd; | |
1206 | int err; | |
1207 | ||
b40d7378 CW |
1208 | pool = intel_engine_pool_get(&eb->engine->pool, PAGE_SIZE); |
1209 | if (IS_ERR(pool)) | |
1210 | return PTR_ERR(pool); | |
7dd4f672 | 1211 | |
b40d7378 | 1212 | cmd = i915_gem_object_pin_map(pool->obj, |
a575c676 CW |
1213 | cache->has_llc ? |
1214 | I915_MAP_FORCE_WB : | |
1215 | I915_MAP_FORCE_WC); | |
b40d7378 CW |
1216 | if (IS_ERR(cmd)) { |
1217 | err = PTR_ERR(cmd); | |
1218 | goto out_pool; | |
1219 | } | |
7dd4f672 | 1220 | |
b40d7378 | 1221 | batch = i915_vma_instance(pool->obj, vma->vm, NULL); |
7dd4f672 CW |
1222 | if (IS_ERR(batch)) { |
1223 | err = PTR_ERR(batch); | |
1224 | goto err_unmap; | |
1225 | } | |
1226 | ||
1227 | err = i915_vma_pin(batch, 0, 0, PIN_USER | PIN_NONBLOCK); | |
1228 | if (err) | |
1229 | goto err_unmap; | |
1230 | ||
8f2a1057 | 1231 | rq = i915_request_create(eb->context); |
7dd4f672 CW |
1232 | if (IS_ERR(rq)) { |
1233 | err = PTR_ERR(rq); | |
1234 | goto err_unpin; | |
1235 | } | |
1236 | ||
b40d7378 CW |
1237 | err = intel_engine_pool_mark_active(pool, rq); |
1238 | if (err) | |
1239 | goto err_request; | |
1240 | ||
6951e589 | 1241 | err = reloc_move_to_gpu(rq, vma); |
7dd4f672 CW |
1242 | if (err) |
1243 | goto err_request; | |
1244 | ||
7dd4f672 CW |
1245 | err = eb->engine->emit_bb_start(rq, |
1246 | batch->node.start, PAGE_SIZE, | |
1247 | cache->gen > 5 ? 0 : I915_DISPATCH_SECURE); | |
1248 | if (err) | |
6951e589 | 1249 | goto skip_request; |
7dd4f672 | 1250 | |
6951e589 | 1251 | i915_vma_lock(batch); |
95ff7c7d | 1252 | GEM_BUG_ON(!reservation_object_test_signaled_rcu(batch->resv, true)); |
a5236978 | 1253 | err = i915_vma_move_to_active(batch, rq, 0); |
6951e589 | 1254 | i915_vma_unlock(batch); |
a5236978 CW |
1255 | if (err) |
1256 | goto skip_request; | |
7dd4f672 CW |
1257 | |
1258 | rq->batch = batch; | |
a5236978 | 1259 | i915_vma_unpin(batch); |
7dd4f672 CW |
1260 | |
1261 | cache->rq = rq; | |
1262 | cache->rq_cmd = cmd; | |
1263 | cache->rq_size = 0; | |
1264 | ||
1265 | /* Return with batch mapping (cmd) still pinned */ | |
b40d7378 | 1266 | goto out_pool; |
7dd4f672 | 1267 | |
a5236978 CW |
1268 | skip_request: |
1269 | i915_request_skip(rq, err); | |
7dd4f672 | 1270 | err_request: |
e61e0f51 | 1271 | i915_request_add(rq); |
7dd4f672 CW |
1272 | err_unpin: |
1273 | i915_vma_unpin(batch); | |
1274 | err_unmap: | |
b40d7378 CW |
1275 | i915_gem_object_unpin_map(pool->obj); |
1276 | out_pool: | |
1277 | intel_engine_pool_put(pool); | |
7dd4f672 CW |
1278 | return err; |
1279 | } | |
1280 | ||
1281 | static u32 *reloc_gpu(struct i915_execbuffer *eb, | |
1282 | struct i915_vma *vma, | |
1283 | unsigned int len) | |
1284 | { | |
1285 | struct reloc_cache *cache = &eb->reloc_cache; | |
1286 | u32 *cmd; | |
1287 | ||
1288 | if (cache->rq_size > PAGE_SIZE/sizeof(u32) - (len + 1)) | |
1289 | reloc_gpu_flush(cache); | |
1290 | ||
1291 | if (unlikely(!cache->rq)) { | |
1292 | int err; | |
1293 | ||
3dbf26ed CW |
1294 | /* If we need to copy for the cmdparser, we will stall anyway */ |
1295 | if (eb_use_cmdparser(eb)) | |
1296 | return ERR_PTR(-EWOULDBLOCK); | |
1297 | ||
90cad095 CW |
1298 | if (!intel_engine_can_store_dword(eb->engine)) |
1299 | return ERR_PTR(-ENODEV); | |
1300 | ||
7dd4f672 CW |
1301 | err = __reloc_gpu_alloc(eb, vma, len); |
1302 | if (unlikely(err)) | |
1303 | return ERR_PTR(err); | |
1304 | } | |
1305 | ||
1306 | cmd = cache->rq_cmd + cache->rq_size; | |
1307 | cache->rq_size += len; | |
1308 | ||
1309 | return cmd; | |
1310 | } | |
1311 | ||
2889caa9 CW |
1312 | static u64 |
1313 | relocate_entry(struct i915_vma *vma, | |
d50415cc | 1314 | const struct drm_i915_gem_relocation_entry *reloc, |
2889caa9 CW |
1315 | struct i915_execbuffer *eb, |
1316 | const struct i915_vma *target) | |
edf4427b | 1317 | { |
d50415cc | 1318 | u64 offset = reloc->offset; |
2889caa9 CW |
1319 | u64 target_offset = relocation_target(reloc, target); |
1320 | bool wide = eb->reloc_cache.use_64bit_reloc; | |
d50415cc | 1321 | void *vaddr; |
edf4427b | 1322 | |
7dd4f672 CW |
1323 | if (!eb->reloc_cache.vaddr && |
1324 | (DBG_FORCE_RELOC == FORCE_GPU_RELOC || | |
90cad095 | 1325 | !reservation_object_test_signaled_rcu(vma->resv, true))) { |
7dd4f672 CW |
1326 | const unsigned int gen = eb->reloc_cache.gen; |
1327 | unsigned int len; | |
1328 | u32 *batch; | |
1329 | u64 addr; | |
1330 | ||
1331 | if (wide) | |
1332 | len = offset & 7 ? 8 : 5; | |
1333 | else if (gen >= 4) | |
1334 | len = 4; | |
f2f5c061 | 1335 | else |
a889580c | 1336 | len = 3; |
7dd4f672 CW |
1337 | |
1338 | batch = reloc_gpu(eb, vma, len); | |
1339 | if (IS_ERR(batch)) | |
1340 | goto repeat; | |
1341 | ||
1342 | addr = gen8_canonical_addr(vma->node.start + offset); | |
1343 | if (wide) { | |
1344 | if (offset & 7) { | |
1345 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1346 | *batch++ = lower_32_bits(addr); | |
1347 | *batch++ = upper_32_bits(addr); | |
1348 | *batch++ = lower_32_bits(target_offset); | |
1349 | ||
1350 | addr = gen8_canonical_addr(addr + 4); | |
1351 | ||
1352 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1353 | *batch++ = lower_32_bits(addr); | |
1354 | *batch++ = upper_32_bits(addr); | |
1355 | *batch++ = upper_32_bits(target_offset); | |
1356 | } else { | |
1357 | *batch++ = (MI_STORE_DWORD_IMM_GEN4 | (1 << 21)) + 1; | |
1358 | *batch++ = lower_32_bits(addr); | |
1359 | *batch++ = upper_32_bits(addr); | |
1360 | *batch++ = lower_32_bits(target_offset); | |
1361 | *batch++ = upper_32_bits(target_offset); | |
1362 | } | |
1363 | } else if (gen >= 6) { | |
1364 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1365 | *batch++ = 0; | |
1366 | *batch++ = addr; | |
1367 | *batch++ = target_offset; | |
1368 | } else if (gen >= 4) { | |
1369 | *batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT; | |
1370 | *batch++ = 0; | |
1371 | *batch++ = addr; | |
1372 | *batch++ = target_offset; | |
1373 | } else { | |
1374 | *batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL; | |
1375 | *batch++ = addr; | |
1376 | *batch++ = target_offset; | |
1377 | } | |
1378 | ||
1379 | goto out; | |
1380 | } | |
1381 | ||
d50415cc | 1382 | repeat: |
95ff7c7d | 1383 | vaddr = reloc_vaddr(vma->obj, &eb->reloc_cache, offset >> PAGE_SHIFT); |
d50415cc CW |
1384 | if (IS_ERR(vaddr)) |
1385 | return PTR_ERR(vaddr); | |
1386 | ||
1387 | clflush_write32(vaddr + offset_in_page(offset), | |
1388 | lower_32_bits(target_offset), | |
2889caa9 | 1389 | eb->reloc_cache.vaddr); |
d50415cc CW |
1390 | |
1391 | if (wide) { | |
1392 | offset += sizeof(u32); | |
1393 | target_offset >>= 32; | |
1394 | wide = false; | |
1395 | goto repeat; | |
edf4427b | 1396 | } |
edf4427b | 1397 | |
7dd4f672 | 1398 | out: |
2889caa9 | 1399 | return target->node.start | UPDATE; |
edf4427b | 1400 | } |
edf4427b | 1401 | |
2889caa9 CW |
1402 | static u64 |
1403 | eb_relocate_entry(struct i915_execbuffer *eb, | |
1404 | struct i915_vma *vma, | |
1405 | const struct drm_i915_gem_relocation_entry *reloc) | |
54cf91dc | 1406 | { |
507d977f | 1407 | struct i915_vma *target; |
2889caa9 | 1408 | int err; |
54cf91dc | 1409 | |
67731b87 | 1410 | /* we've already hold a reference to all valid objects */ |
507d977f CW |
1411 | target = eb_get_vma(eb, reloc->target_handle); |
1412 | if (unlikely(!target)) | |
54cf91dc | 1413 | return -ENOENT; |
e844b990 | 1414 | |
54cf91dc | 1415 | /* Validate that the target is in a valid r/w GPU domain */ |
b8f7ab17 | 1416 | if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) { |
ff240199 | 1417 | DRM_DEBUG("reloc with multiple write domains: " |
507d977f | 1418 | "target %d offset %d " |
54cf91dc | 1419 | "read %08x write %08x", |
507d977f | 1420 | reloc->target_handle, |
54cf91dc CW |
1421 | (int) reloc->offset, |
1422 | reloc->read_domains, | |
1423 | reloc->write_domain); | |
8b78f0e5 | 1424 | return -EINVAL; |
54cf91dc | 1425 | } |
4ca4a250 DV |
1426 | if (unlikely((reloc->write_domain | reloc->read_domains) |
1427 | & ~I915_GEM_GPU_DOMAINS)) { | |
ff240199 | 1428 | DRM_DEBUG("reloc with read/write non-GPU domains: " |
507d977f | 1429 | "target %d offset %d " |
54cf91dc | 1430 | "read %08x write %08x", |
507d977f | 1431 | reloc->target_handle, |
54cf91dc CW |
1432 | (int) reloc->offset, |
1433 | reloc->read_domains, | |
1434 | reloc->write_domain); | |
8b78f0e5 | 1435 | return -EINVAL; |
54cf91dc | 1436 | } |
54cf91dc | 1437 | |
2889caa9 | 1438 | if (reloc->write_domain) { |
c7c6e46f | 1439 | *target->exec_flags |= EXEC_OBJECT_WRITE; |
507d977f | 1440 | |
2889caa9 CW |
1441 | /* |
1442 | * Sandybridge PPGTT errata: We need a global gtt mapping | |
1443 | * for MI and pipe_control writes because the gpu doesn't | |
1444 | * properly redirect them through the ppgtt for non_secure | |
1445 | * batchbuffers. | |
1446 | */ | |
1447 | if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION && | |
cf819eff | 1448 | IS_GEN(eb->i915, 6)) { |
2889caa9 CW |
1449 | err = i915_vma_bind(target, target->obj->cache_level, |
1450 | PIN_GLOBAL); | |
1451 | if (WARN_ONCE(err, | |
1452 | "Unexpected failure to bind target VMA!")) | |
1453 | return err; | |
1454 | } | |
507d977f | 1455 | } |
54cf91dc | 1456 | |
2889caa9 CW |
1457 | /* |
1458 | * If the relocation already has the right value in it, no | |
54cf91dc CW |
1459 | * more work needs to be done. |
1460 | */ | |
7dd4f672 CW |
1461 | if (!DBG_FORCE_RELOC && |
1462 | gen8_canonical_addr(target->node.start) == reloc->presumed_offset) | |
67731b87 | 1463 | return 0; |
54cf91dc CW |
1464 | |
1465 | /* Check that the relocation address is valid... */ | |
3c94ceee | 1466 | if (unlikely(reloc->offset > |
507d977f | 1467 | vma->size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) { |
ff240199 | 1468 | DRM_DEBUG("Relocation beyond object bounds: " |
507d977f CW |
1469 | "target %d offset %d size %d.\n", |
1470 | reloc->target_handle, | |
1471 | (int)reloc->offset, | |
1472 | (int)vma->size); | |
8b78f0e5 | 1473 | return -EINVAL; |
54cf91dc | 1474 | } |
b8f7ab17 | 1475 | if (unlikely(reloc->offset & 3)) { |
ff240199 | 1476 | DRM_DEBUG("Relocation not 4-byte aligned: " |
507d977f CW |
1477 | "target %d offset %d.\n", |
1478 | reloc->target_handle, | |
1479 | (int)reloc->offset); | |
8b78f0e5 | 1480 | return -EINVAL; |
54cf91dc CW |
1481 | } |
1482 | ||
071750e5 CW |
1483 | /* |
1484 | * If we write into the object, we need to force the synchronisation | |
1485 | * barrier, either with an asynchronous clflush or if we executed the | |
1486 | * patching using the GPU (though that should be serialised by the | |
1487 | * timeline). To be completely sure, and since we are required to | |
1488 | * do relocations we are already stalling, disable the user's opt | |
0519bcb1 | 1489 | * out of our synchronisation. |
071750e5 | 1490 | */ |
c7c6e46f | 1491 | *vma->exec_flags &= ~EXEC_OBJECT_ASYNC; |
071750e5 | 1492 | |
54cf91dc | 1493 | /* and update the user's relocation entry */ |
2889caa9 | 1494 | return relocate_entry(vma, reloc, eb, target); |
54cf91dc CW |
1495 | } |
1496 | ||
2889caa9 | 1497 | static int eb_relocate_vma(struct i915_execbuffer *eb, struct i915_vma *vma) |
54cf91dc | 1498 | { |
1d83f442 | 1499 | #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry)) |
2889caa9 CW |
1500 | struct drm_i915_gem_relocation_entry stack[N_RELOC(512)]; |
1501 | struct drm_i915_gem_relocation_entry __user *urelocs; | |
c7c6e46f | 1502 | const struct drm_i915_gem_exec_object2 *entry = exec_entry(eb, vma); |
2889caa9 | 1503 | unsigned int remain; |
54cf91dc | 1504 | |
2889caa9 | 1505 | urelocs = u64_to_user_ptr(entry->relocs_ptr); |
1d83f442 | 1506 | remain = entry->relocation_count; |
2889caa9 CW |
1507 | if (unlikely(remain > N_RELOC(ULONG_MAX))) |
1508 | return -EINVAL; | |
ebc0808f | 1509 | |
2889caa9 CW |
1510 | /* |
1511 | * We must check that the entire relocation array is safe | |
1512 | * to read. However, if the array is not writable the user loses | |
1513 | * the updated relocation values. | |
1514 | */ | |
96d4f267 | 1515 | if (unlikely(!access_ok(urelocs, remain*sizeof(*urelocs)))) |
2889caa9 CW |
1516 | return -EFAULT; |
1517 | ||
1518 | do { | |
1519 | struct drm_i915_gem_relocation_entry *r = stack; | |
1520 | unsigned int count = | |
1521 | min_t(unsigned int, remain, ARRAY_SIZE(stack)); | |
1522 | unsigned int copied; | |
1d83f442 | 1523 | |
2889caa9 CW |
1524 | /* |
1525 | * This is the fast path and we cannot handle a pagefault | |
ebc0808f CW |
1526 | * whilst holding the struct mutex lest the user pass in the |
1527 | * relocations contained within a mmaped bo. For in such a case | |
1528 | * we, the page fault handler would call i915_gem_fault() and | |
1529 | * we would try to acquire the struct mutex again. Obviously | |
1530 | * this is bad and so lockdep complains vehemently. | |
1531 | */ | |
1532 | pagefault_disable(); | |
2889caa9 | 1533 | copied = __copy_from_user_inatomic(r, urelocs, count * sizeof(r[0])); |
ebc0808f | 1534 | pagefault_enable(); |
2889caa9 CW |
1535 | if (unlikely(copied)) { |
1536 | remain = -EFAULT; | |
31a39207 CW |
1537 | goto out; |
1538 | } | |
54cf91dc | 1539 | |
2889caa9 | 1540 | remain -= count; |
1d83f442 | 1541 | do { |
2889caa9 | 1542 | u64 offset = eb_relocate_entry(eb, vma, r); |
54cf91dc | 1543 | |
2889caa9 CW |
1544 | if (likely(offset == 0)) { |
1545 | } else if ((s64)offset < 0) { | |
1546 | remain = (int)offset; | |
31a39207 | 1547 | goto out; |
2889caa9 CW |
1548 | } else { |
1549 | /* | |
1550 | * Note that reporting an error now | |
1551 | * leaves everything in an inconsistent | |
1552 | * state as we have *already* changed | |
1553 | * the relocation value inside the | |
1554 | * object. As we have not changed the | |
1555 | * reloc.presumed_offset or will not | |
1556 | * change the execobject.offset, on the | |
1557 | * call we may not rewrite the value | |
1558 | * inside the object, leaving it | |
1559 | * dangling and causing a GPU hang. Unless | |
1560 | * userspace dynamically rebuilds the | |
1561 | * relocations on each execbuf rather than | |
1562 | * presume a static tree. | |
1563 | * | |
1564 | * We did previously check if the relocations | |
1565 | * were writable (access_ok), an error now | |
1566 | * would be a strange race with mprotect, | |
1567 | * having already demonstrated that we | |
1568 | * can read from this userspace address. | |
1569 | */ | |
1570 | offset = gen8_canonical_addr(offset & ~UPDATE); | |
fddcd00a CW |
1571 | if (unlikely(__put_user(offset, &urelocs[r-stack].presumed_offset))) { |
1572 | remain = -EFAULT; | |
1573 | goto out; | |
1574 | } | |
1d83f442 | 1575 | } |
2889caa9 CW |
1576 | } while (r++, --count); |
1577 | urelocs += ARRAY_SIZE(stack); | |
1578 | } while (remain); | |
31a39207 | 1579 | out: |
650bc635 | 1580 | reloc_cache_reset(&eb->reloc_cache); |
2889caa9 | 1581 | return remain; |
54cf91dc CW |
1582 | } |
1583 | ||
1584 | static int | |
2889caa9 | 1585 | eb_relocate_vma_slow(struct i915_execbuffer *eb, struct i915_vma *vma) |
54cf91dc | 1586 | { |
c7c6e46f | 1587 | const struct drm_i915_gem_exec_object2 *entry = exec_entry(eb, vma); |
2889caa9 CW |
1588 | struct drm_i915_gem_relocation_entry *relocs = |
1589 | u64_to_ptr(typeof(*relocs), entry->relocs_ptr); | |
1590 | unsigned int i; | |
1591 | int err; | |
54cf91dc CW |
1592 | |
1593 | for (i = 0; i < entry->relocation_count; i++) { | |
2889caa9 | 1594 | u64 offset = eb_relocate_entry(eb, vma, &relocs[i]); |
d4aeee77 | 1595 | |
2889caa9 CW |
1596 | if ((s64)offset < 0) { |
1597 | err = (int)offset; | |
1598 | goto err; | |
1599 | } | |
54cf91dc | 1600 | } |
2889caa9 CW |
1601 | err = 0; |
1602 | err: | |
1603 | reloc_cache_reset(&eb->reloc_cache); | |
1604 | return err; | |
edf4427b CW |
1605 | } |
1606 | ||
2889caa9 | 1607 | static int check_relocations(const struct drm_i915_gem_exec_object2 *entry) |
1690e1eb | 1608 | { |
2889caa9 CW |
1609 | const char __user *addr, *end; |
1610 | unsigned long size; | |
1611 | char __maybe_unused c; | |
1690e1eb | 1612 | |
2889caa9 CW |
1613 | size = entry->relocation_count; |
1614 | if (size == 0) | |
1615 | return 0; | |
7788a765 | 1616 | |
2889caa9 CW |
1617 | if (size > N_RELOC(ULONG_MAX)) |
1618 | return -EINVAL; | |
9a5a53b3 | 1619 | |
2889caa9 CW |
1620 | addr = u64_to_user_ptr(entry->relocs_ptr); |
1621 | size *= sizeof(struct drm_i915_gem_relocation_entry); | |
96d4f267 | 1622 | if (!access_ok(addr, size)) |
2889caa9 | 1623 | return -EFAULT; |
1690e1eb | 1624 | |
2889caa9 CW |
1625 | end = addr + size; |
1626 | for (; addr < end; addr += PAGE_SIZE) { | |
1627 | int err = __get_user(c, addr); | |
1628 | if (err) | |
1629 | return err; | |
ed5982e6 | 1630 | } |
2889caa9 | 1631 | return __get_user(c, end - 1); |
7788a765 | 1632 | } |
1690e1eb | 1633 | |
2889caa9 | 1634 | static int eb_copy_relocations(const struct i915_execbuffer *eb) |
d23db88c | 1635 | { |
2889caa9 CW |
1636 | const unsigned int count = eb->buffer_count; |
1637 | unsigned int i; | |
1638 | int err; | |
e6a84468 | 1639 | |
2889caa9 CW |
1640 | for (i = 0; i < count; i++) { |
1641 | const unsigned int nreloc = eb->exec[i].relocation_count; | |
1642 | struct drm_i915_gem_relocation_entry __user *urelocs; | |
1643 | struct drm_i915_gem_relocation_entry *relocs; | |
1644 | unsigned long size; | |
1645 | unsigned long copied; | |
e6a84468 | 1646 | |
2889caa9 CW |
1647 | if (nreloc == 0) |
1648 | continue; | |
e6a84468 | 1649 | |
2889caa9 CW |
1650 | err = check_relocations(&eb->exec[i]); |
1651 | if (err) | |
1652 | goto err; | |
d23db88c | 1653 | |
2889caa9 CW |
1654 | urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr); |
1655 | size = nreloc * sizeof(*relocs); | |
d23db88c | 1656 | |
0ee931c4 | 1657 | relocs = kvmalloc_array(size, 1, GFP_KERNEL); |
2889caa9 | 1658 | if (!relocs) { |
2889caa9 CW |
1659 | err = -ENOMEM; |
1660 | goto err; | |
1661 | } | |
d23db88c | 1662 | |
2889caa9 CW |
1663 | /* copy_from_user is limited to < 4GiB */ |
1664 | copied = 0; | |
1665 | do { | |
1666 | unsigned int len = | |
1667 | min_t(u64, BIT_ULL(31), size - copied); | |
1668 | ||
1669 | if (__copy_from_user((char *)relocs + copied, | |
908a6105 | 1670 | (char __user *)urelocs + copied, |
2889caa9 | 1671 | len)) { |
fddcd00a | 1672 | end_user: |
0b2c8f8b | 1673 | user_access_end(); |
8f4faed0 | 1674 | end: |
2889caa9 CW |
1675 | kvfree(relocs); |
1676 | err = -EFAULT; | |
1677 | goto err; | |
1678 | } | |
91b2db6f | 1679 | |
2889caa9 CW |
1680 | copied += len; |
1681 | } while (copied < size); | |
506a8e87 | 1682 | |
2889caa9 CW |
1683 | /* |
1684 | * As we do not update the known relocation offsets after | |
1685 | * relocating (due to the complexities in lock handling), | |
1686 | * we need to mark them as invalid now so that we force the | |
1687 | * relocation processing next time. Just in case the target | |
1688 | * object is evicted and then rebound into its old | |
1689 | * presumed_offset before the next execbuffer - if that | |
1690 | * happened we would make the mistake of assuming that the | |
1691 | * relocations were valid. | |
1692 | */ | |
594cc251 | 1693 | if (!user_access_begin(urelocs, size)) |
8f4faed0 | 1694 | goto end; |
594cc251 | 1695 | |
2889caa9 CW |
1696 | for (copied = 0; copied < nreloc; copied++) |
1697 | unsafe_put_user(-1, | |
1698 | &urelocs[copied].presumed_offset, | |
1699 | end_user); | |
2889caa9 | 1700 | user_access_end(); |
d23db88c | 1701 | |
2889caa9 CW |
1702 | eb->exec[i].relocs_ptr = (uintptr_t)relocs; |
1703 | } | |
edf4427b | 1704 | |
2889caa9 | 1705 | return 0; |
101b506a | 1706 | |
2889caa9 CW |
1707 | err: |
1708 | while (i--) { | |
1709 | struct drm_i915_gem_relocation_entry *relocs = | |
1710 | u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr); | |
1711 | if (eb->exec[i].relocation_count) | |
1712 | kvfree(relocs); | |
1713 | } | |
1714 | return err; | |
d23db88c CW |
1715 | } |
1716 | ||
2889caa9 | 1717 | static int eb_prefault_relocations(const struct i915_execbuffer *eb) |
54cf91dc | 1718 | { |
2889caa9 CW |
1719 | const unsigned int count = eb->buffer_count; |
1720 | unsigned int i; | |
54cf91dc | 1721 | |
4f044a88 | 1722 | if (unlikely(i915_modparams.prefault_disable)) |
2889caa9 | 1723 | return 0; |
54cf91dc | 1724 | |
2889caa9 CW |
1725 | for (i = 0; i < count; i++) { |
1726 | int err; | |
54cf91dc | 1727 | |
2889caa9 CW |
1728 | err = check_relocations(&eb->exec[i]); |
1729 | if (err) | |
1730 | return err; | |
1731 | } | |
a415d355 | 1732 | |
2889caa9 | 1733 | return 0; |
54cf91dc CW |
1734 | } |
1735 | ||
2889caa9 | 1736 | static noinline int eb_relocate_slow(struct i915_execbuffer *eb) |
54cf91dc | 1737 | { |
650bc635 | 1738 | struct drm_device *dev = &eb->i915->drm; |
2889caa9 | 1739 | bool have_copy = false; |
27173f1f | 1740 | struct i915_vma *vma; |
2889caa9 CW |
1741 | int err = 0; |
1742 | ||
1743 | repeat: | |
1744 | if (signal_pending(current)) { | |
1745 | err = -ERESTARTSYS; | |
1746 | goto out; | |
1747 | } | |
27173f1f | 1748 | |
67731b87 | 1749 | /* We may process another execbuffer during the unlock... */ |
2889caa9 | 1750 | eb_reset_vmas(eb); |
54cf91dc CW |
1751 | mutex_unlock(&dev->struct_mutex); |
1752 | ||
2889caa9 CW |
1753 | /* |
1754 | * We take 3 passes through the slowpatch. | |
1755 | * | |
1756 | * 1 - we try to just prefault all the user relocation entries and | |
1757 | * then attempt to reuse the atomic pagefault disabled fast path again. | |
1758 | * | |
1759 | * 2 - we copy the user entries to a local buffer here outside of the | |
1760 | * local and allow ourselves to wait upon any rendering before | |
1761 | * relocations | |
1762 | * | |
1763 | * 3 - we already have a local copy of the relocation entries, but | |
1764 | * were interrupted (EAGAIN) whilst waiting for the objects, try again. | |
1765 | */ | |
1766 | if (!err) { | |
1767 | err = eb_prefault_relocations(eb); | |
1768 | } else if (!have_copy) { | |
1769 | err = eb_copy_relocations(eb); | |
1770 | have_copy = err == 0; | |
1771 | } else { | |
1772 | cond_resched(); | |
1773 | err = 0; | |
54cf91dc | 1774 | } |
2889caa9 CW |
1775 | if (err) { |
1776 | mutex_lock(&dev->struct_mutex); | |
1777 | goto out; | |
54cf91dc CW |
1778 | } |
1779 | ||
8a2421bd CW |
1780 | /* A frequent cause for EAGAIN are currently unavailable client pages */ |
1781 | flush_workqueue(eb->i915->mm.userptr_wq); | |
1782 | ||
2889caa9 CW |
1783 | err = i915_mutex_lock_interruptible(dev); |
1784 | if (err) { | |
54cf91dc | 1785 | mutex_lock(&dev->struct_mutex); |
2889caa9 | 1786 | goto out; |
54cf91dc CW |
1787 | } |
1788 | ||
67731b87 | 1789 | /* reacquire the objects */ |
2889caa9 CW |
1790 | err = eb_lookup_vmas(eb); |
1791 | if (err) | |
3b96eff4 | 1792 | goto err; |
67731b87 | 1793 | |
c7c6e46f CW |
1794 | GEM_BUG_ON(!eb->batch); |
1795 | ||
2889caa9 CW |
1796 | list_for_each_entry(vma, &eb->relocs, reloc_link) { |
1797 | if (!have_copy) { | |
1798 | pagefault_disable(); | |
1799 | err = eb_relocate_vma(eb, vma); | |
1800 | pagefault_enable(); | |
1801 | if (err) | |
1802 | goto repeat; | |
1803 | } else { | |
1804 | err = eb_relocate_vma_slow(eb, vma); | |
1805 | if (err) | |
1806 | goto err; | |
1807 | } | |
54cf91dc CW |
1808 | } |
1809 | ||
2889caa9 CW |
1810 | /* |
1811 | * Leave the user relocations as are, this is the painfully slow path, | |
54cf91dc CW |
1812 | * and we want to avoid the complication of dropping the lock whilst |
1813 | * having buffers reserved in the aperture and so causing spurious | |
1814 | * ENOSPC for random operations. | |
1815 | */ | |
1816 | ||
1817 | err: | |
2889caa9 CW |
1818 | if (err == -EAGAIN) |
1819 | goto repeat; | |
1820 | ||
1821 | out: | |
1822 | if (have_copy) { | |
1823 | const unsigned int count = eb->buffer_count; | |
1824 | unsigned int i; | |
1825 | ||
1826 | for (i = 0; i < count; i++) { | |
1827 | const struct drm_i915_gem_exec_object2 *entry = | |
1828 | &eb->exec[i]; | |
1829 | struct drm_i915_gem_relocation_entry *relocs; | |
1830 | ||
1831 | if (!entry->relocation_count) | |
1832 | continue; | |
1833 | ||
1834 | relocs = u64_to_ptr(typeof(*relocs), entry->relocs_ptr); | |
1835 | kvfree(relocs); | |
1836 | } | |
1837 | } | |
1838 | ||
1f727d9e | 1839 | return err; |
54cf91dc CW |
1840 | } |
1841 | ||
2889caa9 | 1842 | static int eb_relocate(struct i915_execbuffer *eb) |
54cf91dc | 1843 | { |
2889caa9 CW |
1844 | if (eb_lookup_vmas(eb)) |
1845 | goto slow; | |
1846 | ||
1847 | /* The objects are in their final locations, apply the relocations. */ | |
1848 | if (eb->args->flags & __EXEC_HAS_RELOC) { | |
1849 | struct i915_vma *vma; | |
1850 | ||
1851 | list_for_each_entry(vma, &eb->relocs, reloc_link) { | |
1852 | if (eb_relocate_vma(eb, vma)) | |
1853 | goto slow; | |
1854 | } | |
1855 | } | |
1856 | ||
1857 | return 0; | |
1858 | ||
1859 | slow: | |
1860 | return eb_relocate_slow(eb); | |
1861 | } | |
1862 | ||
2889caa9 CW |
1863 | static int eb_move_to_gpu(struct i915_execbuffer *eb) |
1864 | { | |
1865 | const unsigned int count = eb->buffer_count; | |
6951e589 | 1866 | struct ww_acquire_ctx acquire; |
2889caa9 | 1867 | unsigned int i; |
6951e589 CW |
1868 | int err = 0; |
1869 | ||
1870 | ww_acquire_init(&acquire, &reservation_ww_class); | |
54cf91dc | 1871 | |
2889caa9 | 1872 | for (i = 0; i < count; i++) { |
6951e589 CW |
1873 | struct i915_vma *vma = eb->vma[i]; |
1874 | ||
1875 | err = ww_mutex_lock_interruptible(&vma->resv->lock, &acquire); | |
1876 | if (!err) | |
1877 | continue; | |
1878 | ||
1879 | GEM_BUG_ON(err == -EALREADY); /* No duplicate vma */ | |
1880 | ||
1881 | if (err == -EDEADLK) { | |
1882 | GEM_BUG_ON(i == 0); | |
1883 | do { | |
1884 | int j = i - 1; | |
1885 | ||
1886 | ww_mutex_unlock(&eb->vma[j]->resv->lock); | |
1887 | ||
1888 | swap(eb->flags[i], eb->flags[j]); | |
1889 | swap(eb->vma[i], eb->vma[j]); | |
1890 | eb->vma[i]->exec_flags = &eb->flags[i]; | |
1891 | } while (--i); | |
1892 | GEM_BUG_ON(vma != eb->vma[0]); | |
1893 | vma->exec_flags = &eb->flags[0]; | |
1894 | ||
1895 | err = ww_mutex_lock_slow_interruptible(&vma->resv->lock, | |
1896 | &acquire); | |
1897 | } | |
1898 | if (err) | |
1899 | break; | |
1900 | } | |
1901 | ww_acquire_done(&acquire); | |
1902 | ||
1903 | while (i--) { | |
c7c6e46f CW |
1904 | unsigned int flags = eb->flags[i]; |
1905 | struct i915_vma *vma = eb->vma[i]; | |
27173f1f | 1906 | struct drm_i915_gem_object *obj = vma->obj; |
03ade511 | 1907 | |
6951e589 CW |
1908 | assert_vma_held(vma); |
1909 | ||
c7c6e46f | 1910 | if (flags & EXEC_OBJECT_CAPTURE) { |
e61e0f51 | 1911 | struct i915_capture_list *capture; |
b0fd47ad CW |
1912 | |
1913 | capture = kmalloc(sizeof(*capture), GFP_KERNEL); | |
6951e589 CW |
1914 | if (capture) { |
1915 | capture->next = eb->request->capture_list; | |
1916 | capture->vma = vma; | |
1917 | eb->request->capture_list = capture; | |
1918 | } | |
b0fd47ad CW |
1919 | } |
1920 | ||
b8f55be6 CW |
1921 | /* |
1922 | * If the GPU is not _reading_ through the CPU cache, we need | |
1923 | * to make sure that any writes (both previous GPU writes from | |
1924 | * before a change in snooping levels and normal CPU writes) | |
1925 | * caught in that cache are flushed to main memory. | |
1926 | * | |
1927 | * We want to say | |
1928 | * obj->cache_dirty && | |
1929 | * !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ) | |
1930 | * but gcc's optimiser doesn't handle that as well and emits | |
1931 | * two jumps instead of one. Maybe one day... | |
1932 | */ | |
1933 | if (unlikely(obj->cache_dirty & ~obj->cache_coherent)) { | |
0f46daa1 | 1934 | if (i915_gem_clflush_object(obj, 0)) |
c7c6e46f | 1935 | flags &= ~EXEC_OBJECT_ASYNC; |
0f46daa1 CW |
1936 | } |
1937 | ||
6951e589 CW |
1938 | if (err == 0 && !(flags & EXEC_OBJECT_ASYNC)) { |
1939 | err = i915_request_await_object | |
1940 | (eb->request, obj, flags & EXEC_OBJECT_WRITE); | |
1941 | } | |
2889caa9 | 1942 | |
6951e589 CW |
1943 | if (err == 0) |
1944 | err = i915_vma_move_to_active(vma, eb->request, flags); | |
c7c6e46f | 1945 | |
6951e589 | 1946 | i915_vma_unlock(vma); |
2889caa9 | 1947 | |
c7c6e46f CW |
1948 | __eb_unreserve_vma(vma, flags); |
1949 | vma->exec_flags = NULL; | |
1950 | ||
1951 | if (unlikely(flags & __EXEC_OBJECT_HAS_REF)) | |
dade2a61 | 1952 | i915_vma_put(vma); |
c59a333f | 1953 | } |
6951e589 CW |
1954 | ww_acquire_fini(&acquire); |
1955 | ||
1956 | if (unlikely(err)) | |
1957 | goto err_skip; | |
1958 | ||
2889caa9 | 1959 | eb->exec = NULL; |
c59a333f | 1960 | |
dcd79934 | 1961 | /* Unconditionally flush any chipset caches (for streaming writes). */ |
baea429d | 1962 | intel_gt_chipset_flush(eb->engine->gt); |
2113184c | 1963 | return 0; |
6951e589 CW |
1964 | |
1965 | err_skip: | |
1966 | i915_request_skip(eb->request, err); | |
1967 | return err; | |
54cf91dc CW |
1968 | } |
1969 | ||
2889caa9 | 1970 | static bool i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec) |
54cf91dc | 1971 | { |
650bc635 | 1972 | if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS) |
ed5982e6 DV |
1973 | return false; |
1974 | ||
2f5945bc | 1975 | /* Kernel clipping was a DRI1 misfeature */ |
cf6e7bac JE |
1976 | if (!(exec->flags & I915_EXEC_FENCE_ARRAY)) { |
1977 | if (exec->num_cliprects || exec->cliprects_ptr) | |
1978 | return false; | |
1979 | } | |
2f5945bc CW |
1980 | |
1981 | if (exec->DR4 == 0xffffffff) { | |
1982 | DRM_DEBUG("UXA submitting garbage DR4, fixing up\n"); | |
1983 | exec->DR4 = 0; | |
1984 | } | |
1985 | if (exec->DR1 || exec->DR4) | |
1986 | return false; | |
1987 | ||
1988 | if ((exec->batch_start_offset | exec->batch_len) & 0x7) | |
1989 | return false; | |
1990 | ||
1991 | return true; | |
54cf91dc CW |
1992 | } |
1993 | ||
e61e0f51 | 1994 | static int i915_reset_gen7_sol_offsets(struct i915_request *rq) |
ae662d31 | 1995 | { |
73dec95e TU |
1996 | u32 *cs; |
1997 | int i; | |
ae662d31 | 1998 | |
8a68d464 | 1999 | if (!IS_GEN(rq->i915, 7) || rq->engine->id != RCS0) { |
9d662da8 DV |
2000 | DRM_DEBUG("sol reset is gen7/rcs only\n"); |
2001 | return -EINVAL; | |
2002 | } | |
ae662d31 | 2003 | |
e61e0f51 | 2004 | cs = intel_ring_begin(rq, 4 * 2 + 2); |
73dec95e TU |
2005 | if (IS_ERR(cs)) |
2006 | return PTR_ERR(cs); | |
ae662d31 | 2007 | |
2889caa9 | 2008 | *cs++ = MI_LOAD_REGISTER_IMM(4); |
ae662d31 | 2009 | for (i = 0; i < 4; i++) { |
73dec95e TU |
2010 | *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i)); |
2011 | *cs++ = 0; | |
ae662d31 | 2012 | } |
2889caa9 | 2013 | *cs++ = MI_NOOP; |
e61e0f51 | 2014 | intel_ring_advance(rq, cs); |
ae662d31 EA |
2015 | |
2016 | return 0; | |
2017 | } | |
2018 | ||
650bc635 | 2019 | static struct i915_vma *eb_parse(struct i915_execbuffer *eb, bool is_master) |
71745376 | 2020 | { |
b40d7378 | 2021 | struct intel_engine_pool_node *pool; |
17cabf57 | 2022 | struct i915_vma *vma; |
2889caa9 | 2023 | int err; |
71745376 | 2024 | |
b40d7378 CW |
2025 | pool = intel_engine_pool_get(&eb->engine->pool, eb->batch_len); |
2026 | if (IS_ERR(pool)) | |
2027 | return ERR_CAST(pool); | |
71745376 | 2028 | |
2889caa9 | 2029 | err = intel_engine_cmd_parser(eb->engine, |
650bc635 | 2030 | eb->batch->obj, |
b40d7378 | 2031 | pool->obj, |
650bc635 CW |
2032 | eb->batch_start_offset, |
2033 | eb->batch_len, | |
33a051a5 | 2034 | is_master); |
2889caa9 CW |
2035 | if (err) { |
2036 | if (err == -EACCES) /* unhandled chained batch */ | |
058d88c4 CW |
2037 | vma = NULL; |
2038 | else | |
2889caa9 | 2039 | vma = ERR_PTR(err); |
b40d7378 | 2040 | goto err; |
058d88c4 | 2041 | } |
71745376 | 2042 | |
b40d7378 | 2043 | vma = i915_gem_object_ggtt_pin(pool->obj, NULL, 0, 0, 0); |
058d88c4 | 2044 | if (IS_ERR(vma)) |
b40d7378 | 2045 | goto err; |
de4e783a | 2046 | |
c7c6e46f CW |
2047 | eb->vma[eb->buffer_count] = i915_vma_get(vma); |
2048 | eb->flags[eb->buffer_count] = | |
2049 | __EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_REF; | |
2050 | vma->exec_flags = &eb->flags[eb->buffer_count]; | |
2051 | eb->buffer_count++; | |
71745376 | 2052 | |
b40d7378 CW |
2053 | vma->private = pool; |
2054 | return vma; | |
2055 | ||
2056 | err: | |
2057 | intel_engine_pool_put(pool); | |
058d88c4 | 2058 | return vma; |
71745376 | 2059 | } |
5c6c6003 | 2060 | |
c8659efa | 2061 | static void |
e61e0f51 | 2062 | add_to_client(struct i915_request *rq, struct drm_file *file) |
c8659efa | 2063 | { |
e61e0f51 CW |
2064 | rq->file_priv = file->driver_priv; |
2065 | list_add_tail(&rq->client_link, &rq->file_priv->mm.request_list); | |
c8659efa CW |
2066 | } |
2067 | ||
2889caa9 | 2068 | static int eb_submit(struct i915_execbuffer *eb) |
78382593 | 2069 | { |
2889caa9 | 2070 | int err; |
78382593 | 2071 | |
2889caa9 CW |
2072 | err = eb_move_to_gpu(eb); |
2073 | if (err) | |
2074 | return err; | |
78382593 | 2075 | |
650bc635 | 2076 | if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) { |
2889caa9 CW |
2077 | err = i915_reset_gen7_sol_offsets(eb->request); |
2078 | if (err) | |
2079 | return err; | |
78382593 OM |
2080 | } |
2081 | ||
85474441 CW |
2082 | /* |
2083 | * After we completed waiting for other engines (using HW semaphores) | |
2084 | * then we can signal that this request/batch is ready to run. This | |
2085 | * allows us to determine if the batch is still waiting on the GPU | |
2086 | * or actually running by checking the breadcrumb. | |
2087 | */ | |
2088 | if (eb->engine->emit_init_breadcrumb) { | |
2089 | err = eb->engine->emit_init_breadcrumb(eb->request); | |
2090 | if (err) | |
2091 | return err; | |
2092 | } | |
2093 | ||
2889caa9 | 2094 | err = eb->engine->emit_bb_start(eb->request, |
650bc635 CW |
2095 | eb->batch->node.start + |
2096 | eb->batch_start_offset, | |
2097 | eb->batch_len, | |
2889caa9 CW |
2098 | eb->batch_flags); |
2099 | if (err) | |
2100 | return err; | |
78382593 | 2101 | |
2f5945bc | 2102 | return 0; |
78382593 OM |
2103 | } |
2104 | ||
d5b2a3a4 CW |
2105 | static int num_vcs_engines(const struct drm_i915_private *i915) |
2106 | { | |
2107 | return hweight64(INTEL_INFO(i915)->engine_mask & | |
2108 | GENMASK_ULL(VCS0 + I915_MAX_VCS - 1, VCS0)); | |
2109 | } | |
2110 | ||
204bcfef | 2111 | /* |
a8ebba75 | 2112 | * Find one BSD ring to dispatch the corresponding BSD command. |
c80ff16e | 2113 | * The engine index is returned. |
a8ebba75 | 2114 | */ |
de1add36 | 2115 | static unsigned int |
c80ff16e CW |
2116 | gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv, |
2117 | struct drm_file *file) | |
a8ebba75 | 2118 | { |
a8ebba75 ZY |
2119 | struct drm_i915_file_private *file_priv = file->driver_priv; |
2120 | ||
de1add36 | 2121 | /* Check whether the file_priv has already selected one ring. */ |
6f633402 | 2122 | if ((int)file_priv->bsd_engine < 0) |
6b86f900 | 2123 | file_priv->bsd_engine = get_random_int() & 1; |
d23db88c | 2124 | |
c80ff16e | 2125 | return file_priv->bsd_engine; |
d23db88c CW |
2126 | } |
2127 | ||
5e2a0419 | 2128 | static const enum intel_engine_id user_ring_map[] = { |
8a68d464 CW |
2129 | [I915_EXEC_DEFAULT] = RCS0, |
2130 | [I915_EXEC_RENDER] = RCS0, | |
2131 | [I915_EXEC_BLT] = BCS0, | |
2132 | [I915_EXEC_BSD] = VCS0, | |
2133 | [I915_EXEC_VEBOX] = VECS0 | |
de1add36 TU |
2134 | }; |
2135 | ||
5e2a0419 | 2136 | static int eb_pin_context(struct i915_execbuffer *eb, struct intel_context *ce) |
de1add36 | 2137 | { |
8f2a1057 | 2138 | int err; |
de1add36 | 2139 | |
8f2a1057 CW |
2140 | /* |
2141 | * ABI: Before userspace accesses the GPU (e.g. execbuffer), report | |
2142 | * EIO if the GPU is already wedged. | |
2143 | */ | |
cb823ed9 | 2144 | err = intel_gt_terminally_wedged(ce->engine->gt); |
8f2a1057 CW |
2145 | if (err) |
2146 | return err; | |
2147 | ||
2148 | /* | |
2149 | * Pinning the contexts may generate requests in order to acquire | |
2150 | * GGTT space, so do this first before we reserve a seqno for | |
2151 | * ourselves. | |
2152 | */ | |
fa9f6681 | 2153 | err = intel_context_pin(ce); |
fa9f6681 CW |
2154 | if (err) |
2155 | return err; | |
8f2a1057 | 2156 | |
a4e57f90 CW |
2157 | /* |
2158 | * Take a local wakeref for preparing to dispatch the execbuf as | |
2159 | * we expect to access the hardware fairly frequently in the | |
2160 | * process, and require the engine to be kept awake between accesses. | |
2161 | * Upon dispatch, we acquire another prolonged wakeref that we hold | |
2162 | * until the timeline is idle, which in turn releases the wakeref | |
2163 | * taken on the engine, and the parent device. | |
2164 | */ | |
2165 | err = intel_context_timeline_lock(ce); | |
2166 | if (err) | |
2167 | goto err_unpin; | |
2168 | ||
2169 | intel_context_enter(ce); | |
2170 | intel_context_timeline_unlock(ce); | |
2171 | ||
5e2a0419 | 2172 | eb->engine = ce->engine; |
8f2a1057 CW |
2173 | eb->context = ce; |
2174 | return 0; | |
a4e57f90 CW |
2175 | |
2176 | err_unpin: | |
2177 | intel_context_unpin(ce); | |
2178 | return err; | |
8f2a1057 CW |
2179 | } |
2180 | ||
2181 | static void eb_unpin_context(struct i915_execbuffer *eb) | |
2182 | { | |
a4e57f90 CW |
2183 | struct intel_context *ce = eb->context; |
2184 | struct intel_timeline *tl = ce->ring->timeline; | |
2185 | ||
2186 | mutex_lock(&tl->mutex); | |
2187 | intel_context_exit(ce); | |
2188 | mutex_unlock(&tl->mutex); | |
2189 | ||
2190 | intel_context_unpin(ce); | |
8f2a1057 | 2191 | } |
de1add36 | 2192 | |
5e2a0419 CW |
2193 | static unsigned int |
2194 | eb_select_legacy_ring(struct i915_execbuffer *eb, | |
2195 | struct drm_file *file, | |
2196 | struct drm_i915_gem_execbuffer2 *args) | |
de1add36 | 2197 | { |
8f2a1057 | 2198 | struct drm_i915_private *i915 = eb->i915; |
de1add36 | 2199 | unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK; |
de1add36 | 2200 | |
5e2a0419 CW |
2201 | if (user_ring_id != I915_EXEC_BSD && |
2202 | (args->flags & I915_EXEC_BSD_MASK)) { | |
de1add36 TU |
2203 | DRM_DEBUG("execbuf with non bsd ring but with invalid " |
2204 | "bsd dispatch flags: %d\n", (int)(args->flags)); | |
5e2a0419 | 2205 | return -1; |
de1add36 TU |
2206 | } |
2207 | ||
d5b2a3a4 | 2208 | if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(i915) > 1) { |
de1add36 TU |
2209 | unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK; |
2210 | ||
2211 | if (bsd_idx == I915_EXEC_BSD_DEFAULT) { | |
8f2a1057 | 2212 | bsd_idx = gen8_dispatch_bsd_engine(i915, file); |
de1add36 TU |
2213 | } else if (bsd_idx >= I915_EXEC_BSD_RING1 && |
2214 | bsd_idx <= I915_EXEC_BSD_RING2) { | |
d9da6aa0 | 2215 | bsd_idx >>= I915_EXEC_BSD_SHIFT; |
de1add36 TU |
2216 | bsd_idx--; |
2217 | } else { | |
2218 | DRM_DEBUG("execbuf with unknown bsd ring: %u\n", | |
2219 | bsd_idx); | |
5e2a0419 | 2220 | return -1; |
de1add36 TU |
2221 | } |
2222 | ||
5e2a0419 | 2223 | return _VCS(bsd_idx); |
de1add36 TU |
2224 | } |
2225 | ||
5e2a0419 CW |
2226 | if (user_ring_id >= ARRAY_SIZE(user_ring_map)) { |
2227 | DRM_DEBUG("execbuf with unknown ring: %u\n", user_ring_id); | |
2228 | return -1; | |
de1add36 TU |
2229 | } |
2230 | ||
5e2a0419 CW |
2231 | return user_ring_map[user_ring_id]; |
2232 | } | |
2233 | ||
2234 | static int | |
2235 | eb_select_engine(struct i915_execbuffer *eb, | |
2236 | struct drm_file *file, | |
2237 | struct drm_i915_gem_execbuffer2 *args) | |
2238 | { | |
2239 | struct intel_context *ce; | |
2240 | unsigned int idx; | |
2241 | int err; | |
2242 | ||
976b55f0 CW |
2243 | if (i915_gem_context_user_engines(eb->gem_context)) |
2244 | idx = args->flags & I915_EXEC_RING_MASK; | |
2245 | else | |
2246 | idx = eb_select_legacy_ring(eb, file, args); | |
5e2a0419 CW |
2247 | |
2248 | ce = i915_gem_context_get_engine(eb->gem_context, idx); | |
2249 | if (IS_ERR(ce)) | |
2250 | return PTR_ERR(ce); | |
2251 | ||
2252 | err = eb_pin_context(eb, ce); | |
2253 | intel_context_put(ce); | |
2254 | ||
2255 | return err; | |
de1add36 TU |
2256 | } |
2257 | ||
cf6e7bac JE |
2258 | static void |
2259 | __free_fence_array(struct drm_syncobj **fences, unsigned int n) | |
2260 | { | |
2261 | while (n--) | |
2262 | drm_syncobj_put(ptr_mask_bits(fences[n], 2)); | |
2263 | kvfree(fences); | |
2264 | } | |
2265 | ||
2266 | static struct drm_syncobj ** | |
2267 | get_fence_array(struct drm_i915_gem_execbuffer2 *args, | |
2268 | struct drm_file *file) | |
2269 | { | |
d710fc16 | 2270 | const unsigned long nfences = args->num_cliprects; |
cf6e7bac JE |
2271 | struct drm_i915_gem_exec_fence __user *user; |
2272 | struct drm_syncobj **fences; | |
d710fc16 | 2273 | unsigned long n; |
cf6e7bac JE |
2274 | int err; |
2275 | ||
2276 | if (!(args->flags & I915_EXEC_FENCE_ARRAY)) | |
2277 | return NULL; | |
2278 | ||
d710fc16 CW |
2279 | /* Check multiplication overflow for access_ok() and kvmalloc_array() */ |
2280 | BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long)); | |
2281 | if (nfences > min_t(unsigned long, | |
2282 | ULONG_MAX / sizeof(*user), | |
2283 | SIZE_MAX / sizeof(*fences))) | |
cf6e7bac JE |
2284 | return ERR_PTR(-EINVAL); |
2285 | ||
2286 | user = u64_to_user_ptr(args->cliprects_ptr); | |
96d4f267 | 2287 | if (!access_ok(user, nfences * sizeof(*user))) |
cf6e7bac JE |
2288 | return ERR_PTR(-EFAULT); |
2289 | ||
d710fc16 | 2290 | fences = kvmalloc_array(nfences, sizeof(*fences), |
0ee931c4 | 2291 | __GFP_NOWARN | GFP_KERNEL); |
cf6e7bac JE |
2292 | if (!fences) |
2293 | return ERR_PTR(-ENOMEM); | |
2294 | ||
2295 | for (n = 0; n < nfences; n++) { | |
2296 | struct drm_i915_gem_exec_fence fence; | |
2297 | struct drm_syncobj *syncobj; | |
2298 | ||
2299 | if (__copy_from_user(&fence, user++, sizeof(fence))) { | |
2300 | err = -EFAULT; | |
2301 | goto err; | |
2302 | } | |
2303 | ||
ebcaa1ff TU |
2304 | if (fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS) { |
2305 | err = -EINVAL; | |
2306 | goto err; | |
2307 | } | |
2308 | ||
cf6e7bac JE |
2309 | syncobj = drm_syncobj_find(file, fence.handle); |
2310 | if (!syncobj) { | |
2311 | DRM_DEBUG("Invalid syncobj handle provided\n"); | |
2312 | err = -ENOENT; | |
2313 | goto err; | |
2314 | } | |
2315 | ||
ebcaa1ff TU |
2316 | BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) & |
2317 | ~__I915_EXEC_FENCE_UNKNOWN_FLAGS); | |
2318 | ||
cf6e7bac JE |
2319 | fences[n] = ptr_pack_bits(syncobj, fence.flags, 2); |
2320 | } | |
2321 | ||
2322 | return fences; | |
2323 | ||
2324 | err: | |
2325 | __free_fence_array(fences, n); | |
2326 | return ERR_PTR(err); | |
2327 | } | |
2328 | ||
2329 | static void | |
2330 | put_fence_array(struct drm_i915_gem_execbuffer2 *args, | |
2331 | struct drm_syncobj **fences) | |
2332 | { | |
2333 | if (fences) | |
2334 | __free_fence_array(fences, args->num_cliprects); | |
2335 | } | |
2336 | ||
2337 | static int | |
2338 | await_fence_array(struct i915_execbuffer *eb, | |
2339 | struct drm_syncobj **fences) | |
2340 | { | |
2341 | const unsigned int nfences = eb->args->num_cliprects; | |
2342 | unsigned int n; | |
2343 | int err; | |
2344 | ||
2345 | for (n = 0; n < nfences; n++) { | |
2346 | struct drm_syncobj *syncobj; | |
2347 | struct dma_fence *fence; | |
2348 | unsigned int flags; | |
2349 | ||
2350 | syncobj = ptr_unpack_bits(fences[n], &flags, 2); | |
2351 | if (!(flags & I915_EXEC_FENCE_WAIT)) | |
2352 | continue; | |
2353 | ||
afca4216 | 2354 | fence = drm_syncobj_fence_get(syncobj); |
cf6e7bac JE |
2355 | if (!fence) |
2356 | return -EINVAL; | |
2357 | ||
e61e0f51 | 2358 | err = i915_request_await_dma_fence(eb->request, fence); |
cf6e7bac JE |
2359 | dma_fence_put(fence); |
2360 | if (err < 0) | |
2361 | return err; | |
2362 | } | |
2363 | ||
2364 | return 0; | |
2365 | } | |
2366 | ||
2367 | static void | |
2368 | signal_fence_array(struct i915_execbuffer *eb, | |
2369 | struct drm_syncobj **fences) | |
2370 | { | |
2371 | const unsigned int nfences = eb->args->num_cliprects; | |
2372 | struct dma_fence * const fence = &eb->request->fence; | |
2373 | unsigned int n; | |
2374 | ||
2375 | for (n = 0; n < nfences; n++) { | |
2376 | struct drm_syncobj *syncobj; | |
2377 | unsigned int flags; | |
2378 | ||
2379 | syncobj = ptr_unpack_bits(fences[n], &flags, 2); | |
2380 | if (!(flags & I915_EXEC_FENCE_SIGNAL)) | |
2381 | continue; | |
2382 | ||
0b258ed1 | 2383 | drm_syncobj_replace_fence(syncobj, fence); |
cf6e7bac JE |
2384 | } |
2385 | } | |
2386 | ||
54cf91dc | 2387 | static int |
650bc635 | 2388 | i915_gem_do_execbuffer(struct drm_device *dev, |
54cf91dc CW |
2389 | struct drm_file *file, |
2390 | struct drm_i915_gem_execbuffer2 *args, | |
cf6e7bac JE |
2391 | struct drm_i915_gem_exec_object2 *exec, |
2392 | struct drm_syncobj **fences) | |
54cf91dc | 2393 | { |
650bc635 | 2394 | struct i915_execbuffer eb; |
fec0445c | 2395 | struct dma_fence *in_fence = NULL; |
a88b6e4c | 2396 | struct dma_fence *exec_fence = NULL; |
fec0445c CW |
2397 | struct sync_file *out_fence = NULL; |
2398 | int out_fence_fd = -1; | |
2889caa9 | 2399 | int err; |
432e58ed | 2400 | |
74c1c694 | 2401 | BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS); |
2889caa9 CW |
2402 | BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS & |
2403 | ~__EXEC_OBJECT_UNKNOWN_FLAGS); | |
54cf91dc | 2404 | |
650bc635 CW |
2405 | eb.i915 = to_i915(dev); |
2406 | eb.file = file; | |
2407 | eb.args = args; | |
7dd4f672 | 2408 | if (DBG_FORCE_RELOC || !(args->flags & I915_EXEC_NO_RELOC)) |
2889caa9 | 2409 | args->flags |= __EXEC_HAS_RELOC; |
c7c6e46f | 2410 | |
650bc635 | 2411 | eb.exec = exec; |
170fa29b CW |
2412 | eb.vma = (struct i915_vma **)(exec + args->buffer_count + 1); |
2413 | eb.vma[0] = NULL; | |
c7c6e46f CW |
2414 | eb.flags = (unsigned int *)(eb.vma + args->buffer_count + 1); |
2415 | ||
2889caa9 | 2416 | eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS; |
650bc635 CW |
2417 | reloc_cache_init(&eb.reloc_cache, eb.i915); |
2418 | ||
2889caa9 | 2419 | eb.buffer_count = args->buffer_count; |
650bc635 CW |
2420 | eb.batch_start_offset = args->batch_start_offset; |
2421 | eb.batch_len = args->batch_len; | |
2422 | ||
2889caa9 | 2423 | eb.batch_flags = 0; |
d7d4eedd | 2424 | if (args->flags & I915_EXEC_SECURE) { |
b3ac9f25 | 2425 | if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN)) |
d7d4eedd CW |
2426 | return -EPERM; |
2427 | ||
2889caa9 | 2428 | eb.batch_flags |= I915_DISPATCH_SECURE; |
d7d4eedd | 2429 | } |
b45305fc | 2430 | if (args->flags & I915_EXEC_IS_PINNED) |
2889caa9 | 2431 | eb.batch_flags |= I915_DISPATCH_PINNED; |
54cf91dc | 2432 | |
fec0445c CW |
2433 | if (args->flags & I915_EXEC_FENCE_IN) { |
2434 | in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2)); | |
4a04e371 DCS |
2435 | if (!in_fence) |
2436 | return -EINVAL; | |
fec0445c CW |
2437 | } |
2438 | ||
a88b6e4c CW |
2439 | if (args->flags & I915_EXEC_FENCE_SUBMIT) { |
2440 | if (in_fence) { | |
2441 | err = -EINVAL; | |
2442 | goto err_in_fence; | |
2443 | } | |
2444 | ||
2445 | exec_fence = sync_file_get_fence(lower_32_bits(args->rsvd2)); | |
2446 | if (!exec_fence) { | |
2447 | err = -EINVAL; | |
2448 | goto err_in_fence; | |
2449 | } | |
2450 | } | |
2451 | ||
fec0445c CW |
2452 | if (args->flags & I915_EXEC_FENCE_OUT) { |
2453 | out_fence_fd = get_unused_fd_flags(O_CLOEXEC); | |
2454 | if (out_fence_fd < 0) { | |
2889caa9 | 2455 | err = out_fence_fd; |
a88b6e4c | 2456 | goto err_exec_fence; |
fec0445c CW |
2457 | } |
2458 | } | |
2459 | ||
4d470f73 CW |
2460 | err = eb_create(&eb); |
2461 | if (err) | |
2462 | goto err_out_fence; | |
2463 | ||
2464 | GEM_BUG_ON(!eb.lut_size); | |
2889caa9 | 2465 | |
1acfc104 CW |
2466 | err = eb_select_context(&eb); |
2467 | if (unlikely(err)) | |
2468 | goto err_destroy; | |
2469 | ||
2889caa9 CW |
2470 | err = i915_mutex_lock_interruptible(dev); |
2471 | if (err) | |
a4e57f90 | 2472 | goto err_context; |
f65c9168 | 2473 | |
8f2a1057 | 2474 | err = eb_select_engine(&eb, file, args); |
d6f328bf CW |
2475 | if (unlikely(err)) |
2476 | goto err_unlock; | |
2477 | ||
8f2a1057 CW |
2478 | err = eb_wait_for_ring(&eb); /* may temporarily drop struct_mutex */ |
2479 | if (unlikely(err)) | |
2480 | goto err_engine; | |
2481 | ||
2889caa9 | 2482 | err = eb_relocate(&eb); |
1f727d9e | 2483 | if (err) { |
2889caa9 CW |
2484 | /* |
2485 | * If the user expects the execobject.offset and | |
2486 | * reloc.presumed_offset to be an exact match, | |
2487 | * as for using NO_RELOC, then we cannot update | |
2488 | * the execobject.offset until we have completed | |
2489 | * relocation. | |
2490 | */ | |
2491 | args->flags &= ~__EXEC_HAS_RELOC; | |
2889caa9 | 2492 | goto err_vma; |
1f727d9e | 2493 | } |
54cf91dc | 2494 | |
c7c6e46f | 2495 | if (unlikely(*eb.batch->exec_flags & EXEC_OBJECT_WRITE)) { |
ff240199 | 2496 | DRM_DEBUG("Attempting to use self-modifying batch buffer\n"); |
2889caa9 CW |
2497 | err = -EINVAL; |
2498 | goto err_vma; | |
54cf91dc | 2499 | } |
650bc635 CW |
2500 | if (eb.batch_start_offset > eb.batch->size || |
2501 | eb.batch_len > eb.batch->size - eb.batch_start_offset) { | |
0b537272 | 2502 | DRM_DEBUG("Attempting to use out-of-bounds batch\n"); |
2889caa9 CW |
2503 | err = -EINVAL; |
2504 | goto err_vma; | |
0b537272 | 2505 | } |
54cf91dc | 2506 | |
3dbf26ed | 2507 | if (eb_use_cmdparser(&eb)) { |
59bfa124 CW |
2508 | struct i915_vma *vma; |
2509 | ||
650bc635 | 2510 | vma = eb_parse(&eb, drm_is_current_master(file)); |
59bfa124 | 2511 | if (IS_ERR(vma)) { |
2889caa9 CW |
2512 | err = PTR_ERR(vma); |
2513 | goto err_vma; | |
78a42377 | 2514 | } |
17cabf57 | 2515 | |
59bfa124 | 2516 | if (vma) { |
c7c7372e RP |
2517 | /* |
2518 | * Batch parsed and accepted: | |
2519 | * | |
2520 | * Set the DISPATCH_SECURE bit to remove the NON_SECURE | |
2521 | * bit from MI_BATCH_BUFFER_START commands issued in | |
2522 | * the dispatch_execbuffer implementations. We | |
2523 | * specifically don't want that set on batches the | |
2524 | * command parser has accepted. | |
2525 | */ | |
2889caa9 | 2526 | eb.batch_flags |= I915_DISPATCH_SECURE; |
650bc635 CW |
2527 | eb.batch_start_offset = 0; |
2528 | eb.batch = vma; | |
c7c7372e | 2529 | } |
351e3db2 BV |
2530 | } |
2531 | ||
650bc635 CW |
2532 | if (eb.batch_len == 0) |
2533 | eb.batch_len = eb.batch->size - eb.batch_start_offset; | |
78a42377 | 2534 | |
2889caa9 CW |
2535 | /* |
2536 | * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure | |
d7d4eedd | 2537 | * batch" bit. Hence we need to pin secure batches into the global gtt. |
28cf5415 | 2538 | * hsw should have this fixed, but bdw mucks it up again. */ |
2889caa9 | 2539 | if (eb.batch_flags & I915_DISPATCH_SECURE) { |
058d88c4 | 2540 | struct i915_vma *vma; |
59bfa124 | 2541 | |
da51a1e7 DV |
2542 | /* |
2543 | * So on first glance it looks freaky that we pin the batch here | |
2544 | * outside of the reservation loop. But: | |
2545 | * - The batch is already pinned into the relevant ppgtt, so we | |
2546 | * already have the backing storage fully allocated. | |
2547 | * - No other BO uses the global gtt (well contexts, but meh), | |
fd0753cf | 2548 | * so we don't really have issues with multiple objects not |
da51a1e7 DV |
2549 | * fitting due to fragmentation. |
2550 | * So this is actually safe. | |
2551 | */ | |
2889caa9 | 2552 | vma = i915_gem_object_ggtt_pin(eb.batch->obj, NULL, 0, 0, 0); |
058d88c4 | 2553 | if (IS_ERR(vma)) { |
2889caa9 CW |
2554 | err = PTR_ERR(vma); |
2555 | goto err_vma; | |
058d88c4 | 2556 | } |
d7d4eedd | 2557 | |
650bc635 | 2558 | eb.batch = vma; |
59bfa124 | 2559 | } |
d7d4eedd | 2560 | |
7dd4f672 CW |
2561 | /* All GPU relocation batches must be submitted prior to the user rq */ |
2562 | GEM_BUG_ON(eb.reloc_cache.rq); | |
2563 | ||
0c8dac88 | 2564 | /* Allocate a request for this batch buffer nice and early. */ |
8f2a1057 | 2565 | eb.request = i915_request_create(eb.context); |
650bc635 | 2566 | if (IS_ERR(eb.request)) { |
2889caa9 | 2567 | err = PTR_ERR(eb.request); |
0c8dac88 | 2568 | goto err_batch_unpin; |
26827088 | 2569 | } |
0c8dac88 | 2570 | |
fec0445c | 2571 | if (in_fence) { |
e61e0f51 | 2572 | err = i915_request_await_dma_fence(eb.request, in_fence); |
2889caa9 | 2573 | if (err < 0) |
fec0445c CW |
2574 | goto err_request; |
2575 | } | |
2576 | ||
a88b6e4c CW |
2577 | if (exec_fence) { |
2578 | err = i915_request_await_execution(eb.request, exec_fence, | |
2579 | eb.engine->bond_execute); | |
2580 | if (err < 0) | |
2581 | goto err_request; | |
2582 | } | |
2583 | ||
cf6e7bac JE |
2584 | if (fences) { |
2585 | err = await_fence_array(&eb, fences); | |
2586 | if (err) | |
2587 | goto err_request; | |
2588 | } | |
2589 | ||
fec0445c | 2590 | if (out_fence_fd != -1) { |
650bc635 | 2591 | out_fence = sync_file_create(&eb.request->fence); |
fec0445c | 2592 | if (!out_fence) { |
2889caa9 | 2593 | err = -ENOMEM; |
fec0445c CW |
2594 | goto err_request; |
2595 | } | |
2596 | } | |
2597 | ||
2889caa9 CW |
2598 | /* |
2599 | * Whilst this request exists, batch_obj will be on the | |
17f298cf CW |
2600 | * active_list, and so will hold the active reference. Only when this |
2601 | * request is retired will the the batch_obj be moved onto the | |
2602 | * inactive_list and lose its active reference. Hence we do not need | |
2603 | * to explicitly hold another reference here. | |
2604 | */ | |
650bc635 | 2605 | eb.request->batch = eb.batch; |
b40d7378 CW |
2606 | if (eb.batch->private) |
2607 | intel_engine_pool_mark_active(eb.batch->private, eb.request); | |
5f19e2bf | 2608 | |
e61e0f51 | 2609 | trace_i915_request_queue(eb.request, eb.batch_flags); |
2889caa9 | 2610 | err = eb_submit(&eb); |
aa9b7810 | 2611 | err_request: |
650bc635 | 2612 | add_to_client(eb.request, file); |
8f2a1057 | 2613 | i915_request_add(eb.request); |
c8659efa | 2614 | |
cf6e7bac JE |
2615 | if (fences) |
2616 | signal_fence_array(&eb, fences); | |
2617 | ||
fec0445c | 2618 | if (out_fence) { |
2889caa9 | 2619 | if (err == 0) { |
fec0445c | 2620 | fd_install(out_fence_fd, out_fence->file); |
b6a88e4a | 2621 | args->rsvd2 &= GENMASK_ULL(31, 0); /* keep in-fence */ |
fec0445c CW |
2622 | args->rsvd2 |= (u64)out_fence_fd << 32; |
2623 | out_fence_fd = -1; | |
2624 | } else { | |
2625 | fput(out_fence->file); | |
2626 | } | |
2627 | } | |
54cf91dc | 2628 | |
0c8dac88 | 2629 | err_batch_unpin: |
2889caa9 | 2630 | if (eb.batch_flags & I915_DISPATCH_SECURE) |
650bc635 | 2631 | i915_vma_unpin(eb.batch); |
b40d7378 CW |
2632 | if (eb.batch->private) |
2633 | intel_engine_pool_put(eb.batch->private); | |
2889caa9 CW |
2634 | err_vma: |
2635 | if (eb.exec) | |
2636 | eb_release_vmas(&eb); | |
8f2a1057 CW |
2637 | err_engine: |
2638 | eb_unpin_context(&eb); | |
d6f328bf | 2639 | err_unlock: |
54cf91dc | 2640 | mutex_unlock(&dev->struct_mutex); |
a4e57f90 | 2641 | err_context: |
8f2a1057 | 2642 | i915_gem_context_put(eb.gem_context); |
1acfc104 | 2643 | err_destroy: |
2889caa9 | 2644 | eb_destroy(&eb); |
4d470f73 | 2645 | err_out_fence: |
fec0445c CW |
2646 | if (out_fence_fd != -1) |
2647 | put_unused_fd(out_fence_fd); | |
a88b6e4c CW |
2648 | err_exec_fence: |
2649 | dma_fence_put(exec_fence); | |
4a04e371 | 2650 | err_in_fence: |
fec0445c | 2651 | dma_fence_put(in_fence); |
2889caa9 | 2652 | return err; |
54cf91dc CW |
2653 | } |
2654 | ||
d710fc16 CW |
2655 | static size_t eb_element_size(void) |
2656 | { | |
2657 | return (sizeof(struct drm_i915_gem_exec_object2) + | |
2658 | sizeof(struct i915_vma *) + | |
2659 | sizeof(unsigned int)); | |
2660 | } | |
2661 | ||
2662 | static bool check_buffer_count(size_t count) | |
2663 | { | |
2664 | const size_t sz = eb_element_size(); | |
2665 | ||
2666 | /* | |
2667 | * When using LUT_HANDLE, we impose a limit of INT_MAX for the lookup | |
2668 | * array size (see eb_create()). Otherwise, we can accept an array as | |
2669 | * large as can be addressed (though use large arrays at your peril)! | |
2670 | */ | |
2671 | ||
2672 | return !(count < 1 || count > INT_MAX || count > SIZE_MAX / sz - 1); | |
2673 | } | |
2674 | ||
54cf91dc CW |
2675 | /* |
2676 | * Legacy execbuffer just creates an exec2 list from the original exec object | |
2677 | * list array and passes it to the real function. | |
2678 | */ | |
2679 | int | |
6a20fe7b VS |
2680 | i915_gem_execbuffer_ioctl(struct drm_device *dev, void *data, |
2681 | struct drm_file *file) | |
54cf91dc CW |
2682 | { |
2683 | struct drm_i915_gem_execbuffer *args = data; | |
2684 | struct drm_i915_gem_execbuffer2 exec2; | |
2685 | struct drm_i915_gem_exec_object *exec_list = NULL; | |
2686 | struct drm_i915_gem_exec_object2 *exec2_list = NULL; | |
d710fc16 | 2687 | const size_t count = args->buffer_count; |
2889caa9 CW |
2688 | unsigned int i; |
2689 | int err; | |
54cf91dc | 2690 | |
d710fc16 CW |
2691 | if (!check_buffer_count(count)) { |
2692 | DRM_DEBUG("execbuf2 with %zd buffers\n", count); | |
54cf91dc CW |
2693 | return -EINVAL; |
2694 | } | |
2695 | ||
2889caa9 CW |
2696 | exec2.buffers_ptr = args->buffers_ptr; |
2697 | exec2.buffer_count = args->buffer_count; | |
2698 | exec2.batch_start_offset = args->batch_start_offset; | |
2699 | exec2.batch_len = args->batch_len; | |
2700 | exec2.DR1 = args->DR1; | |
2701 | exec2.DR4 = args->DR4; | |
2702 | exec2.num_cliprects = args->num_cliprects; | |
2703 | exec2.cliprects_ptr = args->cliprects_ptr; | |
2704 | exec2.flags = I915_EXEC_RENDER; | |
2705 | i915_execbuffer2_set_context_id(exec2, 0); | |
2706 | ||
2707 | if (!i915_gem_check_execbuffer(&exec2)) | |
2708 | return -EINVAL; | |
2709 | ||
54cf91dc | 2710 | /* Copy in the exec list from userland */ |
d710fc16 | 2711 | exec_list = kvmalloc_array(count, sizeof(*exec_list), |
0ee931c4 | 2712 | __GFP_NOWARN | GFP_KERNEL); |
d710fc16 | 2713 | exec2_list = kvmalloc_array(count + 1, eb_element_size(), |
0ee931c4 | 2714 | __GFP_NOWARN | GFP_KERNEL); |
54cf91dc | 2715 | if (exec_list == NULL || exec2_list == NULL) { |
ff240199 | 2716 | DRM_DEBUG("Failed to allocate exec list for %d buffers\n", |
54cf91dc | 2717 | args->buffer_count); |
2098105e MH |
2718 | kvfree(exec_list); |
2719 | kvfree(exec2_list); | |
54cf91dc CW |
2720 | return -ENOMEM; |
2721 | } | |
2889caa9 | 2722 | err = copy_from_user(exec_list, |
3ed605bc | 2723 | u64_to_user_ptr(args->buffers_ptr), |
d710fc16 | 2724 | sizeof(*exec_list) * count); |
2889caa9 | 2725 | if (err) { |
ff240199 | 2726 | DRM_DEBUG("copy %d exec entries failed %d\n", |
2889caa9 | 2727 | args->buffer_count, err); |
2098105e MH |
2728 | kvfree(exec_list); |
2729 | kvfree(exec2_list); | |
54cf91dc CW |
2730 | return -EFAULT; |
2731 | } | |
2732 | ||
2733 | for (i = 0; i < args->buffer_count; i++) { | |
2734 | exec2_list[i].handle = exec_list[i].handle; | |
2735 | exec2_list[i].relocation_count = exec_list[i].relocation_count; | |
2736 | exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr; | |
2737 | exec2_list[i].alignment = exec_list[i].alignment; | |
2738 | exec2_list[i].offset = exec_list[i].offset; | |
f0836b72 | 2739 | if (INTEL_GEN(to_i915(dev)) < 4) |
54cf91dc CW |
2740 | exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE; |
2741 | else | |
2742 | exec2_list[i].flags = 0; | |
2743 | } | |
2744 | ||
cf6e7bac | 2745 | err = i915_gem_do_execbuffer(dev, file, &exec2, exec2_list, NULL); |
2889caa9 | 2746 | if (exec2.flags & __EXEC_HAS_RELOC) { |
9aab8bff | 2747 | struct drm_i915_gem_exec_object __user *user_exec_list = |
3ed605bc | 2748 | u64_to_user_ptr(args->buffers_ptr); |
9aab8bff | 2749 | |
54cf91dc | 2750 | /* Copy the new buffer offsets back to the user's exec list. */ |
9aab8bff | 2751 | for (i = 0; i < args->buffer_count; i++) { |
2889caa9 CW |
2752 | if (!(exec2_list[i].offset & UPDATE)) |
2753 | continue; | |
2754 | ||
934acce3 | 2755 | exec2_list[i].offset = |
2889caa9 CW |
2756 | gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); |
2757 | exec2_list[i].offset &= PIN_OFFSET_MASK; | |
2758 | if (__copy_to_user(&user_exec_list[i].offset, | |
2759 | &exec2_list[i].offset, | |
2760 | sizeof(user_exec_list[i].offset))) | |
9aab8bff | 2761 | break; |
54cf91dc CW |
2762 | } |
2763 | } | |
2764 | ||
2098105e MH |
2765 | kvfree(exec_list); |
2766 | kvfree(exec2_list); | |
2889caa9 | 2767 | return err; |
54cf91dc CW |
2768 | } |
2769 | ||
2770 | int | |
6a20fe7b VS |
2771 | i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data, |
2772 | struct drm_file *file) | |
54cf91dc CW |
2773 | { |
2774 | struct drm_i915_gem_execbuffer2 *args = data; | |
2889caa9 | 2775 | struct drm_i915_gem_exec_object2 *exec2_list; |
cf6e7bac | 2776 | struct drm_syncobj **fences = NULL; |
d710fc16 | 2777 | const size_t count = args->buffer_count; |
2889caa9 | 2778 | int err; |
54cf91dc | 2779 | |
d710fc16 CW |
2780 | if (!check_buffer_count(count)) { |
2781 | DRM_DEBUG("execbuf2 with %zd buffers\n", count); | |
54cf91dc CW |
2782 | return -EINVAL; |
2783 | } | |
2784 | ||
2889caa9 CW |
2785 | if (!i915_gem_check_execbuffer(args)) |
2786 | return -EINVAL; | |
2787 | ||
2788 | /* Allocate an extra slot for use by the command parser */ | |
d710fc16 | 2789 | exec2_list = kvmalloc_array(count + 1, eb_element_size(), |
0ee931c4 | 2790 | __GFP_NOWARN | GFP_KERNEL); |
54cf91dc | 2791 | if (exec2_list == NULL) { |
d710fc16 CW |
2792 | DRM_DEBUG("Failed to allocate exec list for %zd buffers\n", |
2793 | count); | |
54cf91dc CW |
2794 | return -ENOMEM; |
2795 | } | |
2889caa9 CW |
2796 | if (copy_from_user(exec2_list, |
2797 | u64_to_user_ptr(args->buffers_ptr), | |
d710fc16 CW |
2798 | sizeof(*exec2_list) * count)) { |
2799 | DRM_DEBUG("copy %zd exec entries failed\n", count); | |
2098105e | 2800 | kvfree(exec2_list); |
54cf91dc CW |
2801 | return -EFAULT; |
2802 | } | |
2803 | ||
cf6e7bac JE |
2804 | if (args->flags & I915_EXEC_FENCE_ARRAY) { |
2805 | fences = get_fence_array(args, file); | |
2806 | if (IS_ERR(fences)) { | |
2807 | kvfree(exec2_list); | |
2808 | return PTR_ERR(fences); | |
2809 | } | |
2810 | } | |
2811 | ||
2812 | err = i915_gem_do_execbuffer(dev, file, args, exec2_list, fences); | |
2889caa9 CW |
2813 | |
2814 | /* | |
2815 | * Now that we have begun execution of the batchbuffer, we ignore | |
2816 | * any new error after this point. Also given that we have already | |
2817 | * updated the associated relocations, we try to write out the current | |
2818 | * object locations irrespective of any error. | |
2819 | */ | |
2820 | if (args->flags & __EXEC_HAS_RELOC) { | |
d593d992 | 2821 | struct drm_i915_gem_exec_object2 __user *user_exec_list = |
2889caa9 CW |
2822 | u64_to_user_ptr(args->buffers_ptr); |
2823 | unsigned int i; | |
9aab8bff | 2824 | |
2889caa9 | 2825 | /* Copy the new buffer offsets back to the user's exec list. */ |
594cc251 LT |
2826 | /* |
2827 | * Note: count * sizeof(*user_exec_list) does not overflow, | |
2828 | * because we checked 'count' in check_buffer_count(). | |
2829 | * | |
2830 | * And this range already got effectively checked earlier | |
2831 | * when we did the "copy_from_user()" above. | |
2832 | */ | |
2833 | if (!user_access_begin(user_exec_list, count * sizeof(*user_exec_list))) | |
8f4faed0 | 2834 | goto end; |
594cc251 | 2835 | |
9aab8bff | 2836 | for (i = 0; i < args->buffer_count; i++) { |
2889caa9 CW |
2837 | if (!(exec2_list[i].offset & UPDATE)) |
2838 | continue; | |
2839 | ||
934acce3 | 2840 | exec2_list[i].offset = |
2889caa9 CW |
2841 | gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); |
2842 | unsafe_put_user(exec2_list[i].offset, | |
2843 | &user_exec_list[i].offset, | |
2844 | end_user); | |
54cf91dc | 2845 | } |
2889caa9 CW |
2846 | end_user: |
2847 | user_access_end(); | |
8f4faed0 | 2848 | end:; |
54cf91dc CW |
2849 | } |
2850 | ||
2889caa9 | 2851 | args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS; |
cf6e7bac | 2852 | put_fence_array(args, fences); |
2098105e | 2853 | kvfree(exec2_list); |
2889caa9 | 2854 | return err; |
54cf91dc | 2855 | } |