Commit | Line | Data |
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54cf91dc | 1 | /* |
10be98a7 | 2 | * SPDX-License-Identifier: MIT |
54cf91dc | 3 | * |
10be98a7 | 4 | * Copyright © 2008,2010 Intel Corporation |
54cf91dc CW |
5 | */ |
6 | ||
daedaa33 | 7 | #include <linux/intel-iommu.h> |
ad778f89 | 8 | #include <linux/reservation.h> |
fec0445c | 9 | #include <linux/sync_file.h> |
ad778f89 CW |
10 | #include <linux/uaccess.h> |
11 | ||
cf6e7bac | 12 | #include <drm/drm_syncobj.h> |
760285e7 | 13 | #include <drm/i915_drm.h> |
ad778f89 | 14 | |
df0566a6 JN |
15 | #include "display/intel_frontbuffer.h" |
16 | ||
afa13085 | 17 | #include "gem/i915_gem_ioctls.h" |
10be98a7 | 18 | #include "gt/intel_context.h" |
baea429d | 19 | #include "gt/intel_gt.h" |
8f2a1057 CW |
20 | #include "gt/intel_gt_pm.h" |
21 | ||
10be98a7 | 22 | #include "i915_gem_ioctls.h" |
57822dc6 | 23 | #include "i915_gem_clflush.h" |
10be98a7 | 24 | #include "i915_gem_context.h" |
54cf91dc CW |
25 | #include "i915_trace.h" |
26 | #include "intel_drv.h" | |
27 | ||
7dd4f672 CW |
28 | enum { |
29 | FORCE_CPU_RELOC = 1, | |
30 | FORCE_GTT_RELOC, | |
31 | FORCE_GPU_RELOC, | |
32 | #define DBG_FORCE_RELOC 0 /* choose one of the above! */ | |
33 | }; | |
d50415cc | 34 | |
dade2a61 CW |
35 | #define __EXEC_OBJECT_HAS_REF BIT(31) |
36 | #define __EXEC_OBJECT_HAS_PIN BIT(30) | |
37 | #define __EXEC_OBJECT_HAS_FENCE BIT(29) | |
38 | #define __EXEC_OBJECT_NEEDS_MAP BIT(28) | |
39 | #define __EXEC_OBJECT_NEEDS_BIAS BIT(27) | |
40 | #define __EXEC_OBJECT_INTERNAL_FLAGS (~0u << 27) /* all of the above */ | |
2889caa9 CW |
41 | #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE) |
42 | ||
43 | #define __EXEC_HAS_RELOC BIT(31) | |
44 | #define __EXEC_VALIDATED BIT(30) | |
74c1c694 | 45 | #define __EXEC_INTERNAL_FLAGS (~0u << 30) |
2889caa9 | 46 | #define UPDATE PIN_OFFSET_FIXED |
d23db88c CW |
47 | |
48 | #define BATCH_OFFSET_BIAS (256*1024) | |
a415d355 | 49 | |
650bc635 | 50 | #define __I915_EXEC_ILLEGAL_FLAGS \ |
08e3e21a LDM |
51 | (__I915_EXEC_UNKNOWN_FLAGS | \ |
52 | I915_EXEC_CONSTANTS_MASK | \ | |
53 | I915_EXEC_RESOURCE_STREAMER) | |
5b043f4e | 54 | |
d20ac620 CW |
55 | /* Catch emission of unexpected errors for CI! */ |
56 | #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) | |
57 | #undef EINVAL | |
58 | #define EINVAL ({ \ | |
59 | DRM_DEBUG_DRIVER("EINVAL at %s:%d\n", __func__, __LINE__); \ | |
60 | 22; \ | |
61 | }) | |
62 | #endif | |
63 | ||
2889caa9 CW |
64 | /** |
65 | * DOC: User command execution | |
66 | * | |
67 | * Userspace submits commands to be executed on the GPU as an instruction | |
68 | * stream within a GEM object we call a batchbuffer. This instructions may | |
69 | * refer to other GEM objects containing auxiliary state such as kernels, | |
70 | * samplers, render targets and even secondary batchbuffers. Userspace does | |
71 | * not know where in the GPU memory these objects reside and so before the | |
72 | * batchbuffer is passed to the GPU for execution, those addresses in the | |
73 | * batchbuffer and auxiliary objects are updated. This is known as relocation, | |
74 | * or patching. To try and avoid having to relocate each object on the next | |
75 | * execution, userspace is told the location of those objects in this pass, | |
76 | * but this remains just a hint as the kernel may choose a new location for | |
77 | * any object in the future. | |
78 | * | |
99d7e4ee KR |
79 | * At the level of talking to the hardware, submitting a batchbuffer for the |
80 | * GPU to execute is to add content to a buffer from which the HW | |
81 | * command streamer is reading. | |
82 | * | |
83 | * 1. Add a command to load the HW context. For Logical Ring Contexts, i.e. | |
84 | * Execlists, this command is not placed on the same buffer as the | |
85 | * remaining items. | |
86 | * | |
87 | * 2. Add a command to invalidate caches to the buffer. | |
88 | * | |
89 | * 3. Add a batchbuffer start command to the buffer; the start command is | |
90 | * essentially a token together with the GPU address of the batchbuffer | |
91 | * to be executed. | |
92 | * | |
93 | * 4. Add a pipeline flush to the buffer. | |
94 | * | |
95 | * 5. Add a memory write command to the buffer to record when the GPU | |
96 | * is done executing the batchbuffer. The memory write writes the | |
97 | * global sequence number of the request, ``i915_request::global_seqno``; | |
98 | * the i915 driver uses the current value in the register to determine | |
99 | * if the GPU has completed the batchbuffer. | |
100 | * | |
101 | * 6. Add a user interrupt command to the buffer. This command instructs | |
102 | * the GPU to issue an interrupt when the command, pipeline flush and | |
103 | * memory write are completed. | |
104 | * | |
105 | * 7. Inform the hardware of the additional commands added to the buffer | |
106 | * (by updating the tail pointer). | |
107 | * | |
2889caa9 CW |
108 | * Processing an execbuf ioctl is conceptually split up into a few phases. |
109 | * | |
110 | * 1. Validation - Ensure all the pointers, handles and flags are valid. | |
111 | * 2. Reservation - Assign GPU address space for every object | |
112 | * 3. Relocation - Update any addresses to point to the final locations | |
113 | * 4. Serialisation - Order the request with respect to its dependencies | |
114 | * 5. Construction - Construct a request to execute the batchbuffer | |
115 | * 6. Submission (at some point in the future execution) | |
116 | * | |
117 | * Reserving resources for the execbuf is the most complicated phase. We | |
118 | * neither want to have to migrate the object in the address space, nor do | |
119 | * we want to have to update any relocations pointing to this object. Ideally, | |
120 | * we want to leave the object where it is and for all the existing relocations | |
121 | * to match. If the object is given a new address, or if userspace thinks the | |
122 | * object is elsewhere, we have to parse all the relocation entries and update | |
123 | * the addresses. Userspace can set the I915_EXEC_NORELOC flag to hint that | |
124 | * all the target addresses in all of its objects match the value in the | |
125 | * relocation entries and that they all match the presumed offsets given by the | |
126 | * list of execbuffer objects. Using this knowledge, we know that if we haven't | |
127 | * moved any buffers, all the relocation entries are valid and we can skip | |
128 | * the update. (If userspace is wrong, the likely outcome is an impromptu GPU | |
129 | * hang.) The requirement for using I915_EXEC_NO_RELOC are: | |
130 | * | |
131 | * The addresses written in the objects must match the corresponding | |
132 | * reloc.presumed_offset which in turn must match the corresponding | |
133 | * execobject.offset. | |
134 | * | |
135 | * Any render targets written to in the batch must be flagged with | |
136 | * EXEC_OBJECT_WRITE. | |
137 | * | |
138 | * To avoid stalling, execobject.offset should match the current | |
139 | * address of that object within the active context. | |
140 | * | |
141 | * The reservation is done is multiple phases. First we try and keep any | |
142 | * object already bound in its current location - so as long as meets the | |
143 | * constraints imposed by the new execbuffer. Any object left unbound after the | |
144 | * first pass is then fitted into any available idle space. If an object does | |
145 | * not fit, all objects are removed from the reservation and the process rerun | |
146 | * after sorting the objects into a priority order (more difficult to fit | |
147 | * objects are tried first). Failing that, the entire VM is cleared and we try | |
148 | * to fit the execbuf once last time before concluding that it simply will not | |
149 | * fit. | |
150 | * | |
151 | * A small complication to all of this is that we allow userspace not only to | |
152 | * specify an alignment and a size for the object in the address space, but | |
153 | * we also allow userspace to specify the exact offset. This objects are | |
154 | * simpler to place (the location is known a priori) all we have to do is make | |
155 | * sure the space is available. | |
156 | * | |
157 | * Once all the objects are in place, patching up the buried pointers to point | |
158 | * to the final locations is a fairly simple job of walking over the relocation | |
159 | * entry arrays, looking up the right address and rewriting the value into | |
160 | * the object. Simple! ... The relocation entries are stored in user memory | |
161 | * and so to access them we have to copy them into a local buffer. That copy | |
162 | * has to avoid taking any pagefaults as they may lead back to a GEM object | |
163 | * requiring the struct_mutex (i.e. recursive deadlock). So once again we split | |
164 | * the relocation into multiple passes. First we try to do everything within an | |
165 | * atomic context (avoid the pagefaults) which requires that we never wait. If | |
166 | * we detect that we may wait, or if we need to fault, then we have to fallback | |
167 | * to a slower path. The slowpath has to drop the mutex. (Can you hear alarm | |
168 | * bells yet?) Dropping the mutex means that we lose all the state we have | |
169 | * built up so far for the execbuf and we must reset any global data. However, | |
170 | * we do leave the objects pinned in their final locations - which is a | |
171 | * potential issue for concurrent execbufs. Once we have left the mutex, we can | |
172 | * allocate and copy all the relocation entries into a large array at our | |
173 | * leisure, reacquire the mutex, reclaim all the objects and other state and | |
174 | * then proceed to update any incorrect addresses with the objects. | |
175 | * | |
176 | * As we process the relocation entries, we maintain a record of whether the | |
177 | * object is being written to. Using NORELOC, we expect userspace to provide | |
178 | * this information instead. We also check whether we can skip the relocation | |
179 | * by comparing the expected value inside the relocation entry with the target's | |
180 | * final address. If they differ, we have to map the current object and rewrite | |
181 | * the 4 or 8 byte pointer within. | |
182 | * | |
183 | * Serialising an execbuf is quite simple according to the rules of the GEM | |
184 | * ABI. Execution within each context is ordered by the order of submission. | |
185 | * Writes to any GEM object are in order of submission and are exclusive. Reads | |
186 | * from a GEM object are unordered with respect to other reads, but ordered by | |
187 | * writes. A write submitted after a read cannot occur before the read, and | |
188 | * similarly any read submitted after a write cannot occur before the write. | |
189 | * Writes are ordered between engines such that only one write occurs at any | |
190 | * time (completing any reads beforehand) - using semaphores where available | |
191 | * and CPU serialisation otherwise. Other GEM access obey the same rules, any | |
192 | * write (either via mmaps using set-domain, or via pwrite) must flush all GPU | |
193 | * reads before starting, and any read (either using set-domain or pread) must | |
194 | * flush all GPU writes before starting. (Note we only employ a barrier before, | |
195 | * we currently rely on userspace not concurrently starting a new execution | |
196 | * whilst reading or writing to an object. This may be an advantage or not | |
197 | * depending on how much you trust userspace not to shoot themselves in the | |
198 | * foot.) Serialisation may just result in the request being inserted into | |
199 | * a DAG awaiting its turn, but most simple is to wait on the CPU until | |
200 | * all dependencies are resolved. | |
201 | * | |
202 | * After all of that, is just a matter of closing the request and handing it to | |
203 | * the hardware (well, leaving it in a queue to be executed). However, we also | |
204 | * offer the ability for batchbuffers to be run with elevated privileges so | |
205 | * that they access otherwise hidden registers. (Used to adjust L3 cache etc.) | |
206 | * Before any batch is given extra privileges we first must check that it | |
207 | * contains no nefarious instructions, we check that each instruction is from | |
208 | * our whitelist and all registers are also from an allowed list. We first | |
209 | * copy the user's batchbuffer to a shadow (so that the user doesn't have | |
210 | * access to it, either by the CPU or GPU as we scan it) and then parse each | |
211 | * instruction. If everything is ok, we set a flag telling the hardware to run | |
212 | * the batchbuffer in trusted mode, otherwise the ioctl is rejected. | |
213 | */ | |
214 | ||
650bc635 | 215 | struct i915_execbuffer { |
2889caa9 CW |
216 | struct drm_i915_private *i915; /** i915 backpointer */ |
217 | struct drm_file *file; /** per-file lookup tables and limits */ | |
218 | struct drm_i915_gem_execbuffer2 *args; /** ioctl parameters */ | |
219 | struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */ | |
c7c6e46f CW |
220 | struct i915_vma **vma; |
221 | unsigned int *flags; | |
2889caa9 CW |
222 | |
223 | struct intel_engine_cs *engine; /** engine to queue the request to */ | |
8f2a1057 CW |
224 | struct intel_context *context; /* logical state for the request */ |
225 | struct i915_gem_context *gem_context; /** caller's context */ | |
2889caa9 | 226 | |
e61e0f51 | 227 | struct i915_request *request; /** our request to build */ |
2889caa9 CW |
228 | struct i915_vma *batch; /** identity of the batch obj/vma */ |
229 | ||
230 | /** actual size of execobj[] as we may extend it for the cmdparser */ | |
231 | unsigned int buffer_count; | |
232 | ||
233 | /** list of vma not yet bound during reservation phase */ | |
234 | struct list_head unbound; | |
235 | ||
236 | /** list of vma that have execobj.relocation_count */ | |
237 | struct list_head relocs; | |
238 | ||
239 | /** | |
240 | * Track the most recently used object for relocations, as we | |
241 | * frequently have to perform multiple relocations within the same | |
242 | * obj/page | |
243 | */ | |
650bc635 | 244 | struct reloc_cache { |
2889caa9 CW |
245 | struct drm_mm_node node; /** temporary GTT binding */ |
246 | unsigned long vaddr; /** Current kmap address */ | |
247 | unsigned long page; /** Currently mapped page index */ | |
7dd4f672 | 248 | unsigned int gen; /** Cached value of INTEL_GEN */ |
650bc635 | 249 | bool use_64bit_reloc : 1; |
2889caa9 CW |
250 | bool has_llc : 1; |
251 | bool has_fence : 1; | |
252 | bool needs_unfenced : 1; | |
7dd4f672 | 253 | |
e61e0f51 | 254 | struct i915_request *rq; |
7dd4f672 CW |
255 | u32 *rq_cmd; |
256 | unsigned int rq_size; | |
650bc635 | 257 | } reloc_cache; |
2889caa9 CW |
258 | |
259 | u64 invalid_flags; /** Set of execobj.flags that are invalid */ | |
260 | u32 context_flags; /** Set of execobj.flags to insert from the ctx */ | |
261 | ||
262 | u32 batch_start_offset; /** Location within object of batch */ | |
263 | u32 batch_len; /** Length of batch within object */ | |
264 | u32 batch_flags; /** Flags composed for emit_bb_start() */ | |
265 | ||
266 | /** | |
267 | * Indicate either the size of the hastable used to resolve | |
268 | * relocation handles, or if negative that we are using a direct | |
269 | * index into the execobj[]. | |
270 | */ | |
271 | int lut_size; | |
272 | struct hlist_head *buckets; /** ht for relocation handles */ | |
67731b87 CW |
273 | }; |
274 | ||
c7c6e46f | 275 | #define exec_entry(EB, VMA) (&(EB)->exec[(VMA)->exec_flags - (EB)->flags]) |
4ff4b44c | 276 | |
2889caa9 CW |
277 | /* |
278 | * Used to convert any address to canonical form. | |
279 | * Starting from gen8, some commands (e.g. STATE_BASE_ADDRESS, | |
280 | * MI_LOAD_REGISTER_MEM and others, see Broadwell PRM Vol2a) require the | |
281 | * addresses to be in a canonical form: | |
282 | * "GraphicsAddress[63:48] are ignored by the HW and assumed to be in correct | |
283 | * canonical form [63:48] == [47]." | |
284 | */ | |
285 | #define GEN8_HIGH_ADDRESS_BIT 47 | |
286 | static inline u64 gen8_canonical_addr(u64 address) | |
287 | { | |
288 | return sign_extend64(address, GEN8_HIGH_ADDRESS_BIT); | |
289 | } | |
290 | ||
291 | static inline u64 gen8_noncanonical_addr(u64 address) | |
292 | { | |
293 | return address & GENMASK_ULL(GEN8_HIGH_ADDRESS_BIT, 0); | |
294 | } | |
295 | ||
3dbf26ed CW |
296 | static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb) |
297 | { | |
439e2ee4 | 298 | return intel_engine_needs_cmd_parser(eb->engine) && eb->batch_len; |
3dbf26ed CW |
299 | } |
300 | ||
650bc635 | 301 | static int eb_create(struct i915_execbuffer *eb) |
67731b87 | 302 | { |
2889caa9 CW |
303 | if (!(eb->args->flags & I915_EXEC_HANDLE_LUT)) { |
304 | unsigned int size = 1 + ilog2(eb->buffer_count); | |
4ff4b44c | 305 | |
2889caa9 CW |
306 | /* |
307 | * Without a 1:1 association between relocation handles and | |
308 | * the execobject[] index, we instead create a hashtable. | |
309 | * We size it dynamically based on available memory, starting | |
310 | * first with 1:1 assocative hash and scaling back until | |
311 | * the allocation succeeds. | |
312 | * | |
313 | * Later on we use a positive lut_size to indicate we are | |
314 | * using this hashtable, and a negative value to indicate a | |
315 | * direct lookup. | |
316 | */ | |
4ff4b44c | 317 | do { |
0d95c883 | 318 | gfp_t flags; |
4d470f73 CW |
319 | |
320 | /* While we can still reduce the allocation size, don't | |
321 | * raise a warning and allow the allocation to fail. | |
322 | * On the last pass though, we want to try as hard | |
323 | * as possible to perform the allocation and warn | |
324 | * if it fails. | |
325 | */ | |
0ee931c4 | 326 | flags = GFP_KERNEL; |
4d470f73 CW |
327 | if (size > 1) |
328 | flags |= __GFP_NORETRY | __GFP_NOWARN; | |
329 | ||
4ff4b44c | 330 | eb->buckets = kzalloc(sizeof(struct hlist_head) << size, |
4d470f73 | 331 | flags); |
4ff4b44c CW |
332 | if (eb->buckets) |
333 | break; | |
334 | } while (--size); | |
335 | ||
4d470f73 CW |
336 | if (unlikely(!size)) |
337 | return -ENOMEM; | |
eef90ccb | 338 | |
2889caa9 | 339 | eb->lut_size = size; |
650bc635 | 340 | } else { |
2889caa9 | 341 | eb->lut_size = -eb->buffer_count; |
650bc635 | 342 | } |
eef90ccb | 343 | |
650bc635 | 344 | return 0; |
67731b87 CW |
345 | } |
346 | ||
2889caa9 CW |
347 | static bool |
348 | eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry, | |
c7c6e46f CW |
349 | const struct i915_vma *vma, |
350 | unsigned int flags) | |
2889caa9 | 351 | { |
2889caa9 CW |
352 | if (vma->node.size < entry->pad_to_size) |
353 | return true; | |
354 | ||
355 | if (entry->alignment && !IS_ALIGNED(vma->node.start, entry->alignment)) | |
356 | return true; | |
357 | ||
c7c6e46f | 358 | if (flags & EXEC_OBJECT_PINNED && |
2889caa9 CW |
359 | vma->node.start != entry->offset) |
360 | return true; | |
361 | ||
c7c6e46f | 362 | if (flags & __EXEC_OBJECT_NEEDS_BIAS && |
2889caa9 CW |
363 | vma->node.start < BATCH_OFFSET_BIAS) |
364 | return true; | |
365 | ||
c7c6e46f | 366 | if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) && |
2889caa9 CW |
367 | (vma->node.start + vma->node.size - 1) >> 32) |
368 | return true; | |
369 | ||
1d033beb CW |
370 | if (flags & __EXEC_OBJECT_NEEDS_MAP && |
371 | !i915_vma_is_map_and_fenceable(vma)) | |
372 | return true; | |
373 | ||
2889caa9 CW |
374 | return false; |
375 | } | |
376 | ||
c7c6e46f | 377 | static inline bool |
2889caa9 | 378 | eb_pin_vma(struct i915_execbuffer *eb, |
c7c6e46f | 379 | const struct drm_i915_gem_exec_object2 *entry, |
2889caa9 CW |
380 | struct i915_vma *vma) |
381 | { | |
c7c6e46f CW |
382 | unsigned int exec_flags = *vma->exec_flags; |
383 | u64 pin_flags; | |
2889caa9 | 384 | |
616d9cee | 385 | if (vma->node.size) |
c7c6e46f | 386 | pin_flags = vma->node.start; |
616d9cee | 387 | else |
c7c6e46f | 388 | pin_flags = entry->offset & PIN_OFFSET_MASK; |
616d9cee | 389 | |
c7c6e46f CW |
390 | pin_flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED; |
391 | if (unlikely(exec_flags & EXEC_OBJECT_NEEDS_GTT)) | |
392 | pin_flags |= PIN_GLOBAL; | |
616d9cee | 393 | |
c7c6e46f CW |
394 | if (unlikely(i915_vma_pin(vma, 0, 0, pin_flags))) |
395 | return false; | |
2889caa9 | 396 | |
c7c6e46f | 397 | if (unlikely(exec_flags & EXEC_OBJECT_NEEDS_FENCE)) { |
3bd40735 | 398 | if (unlikely(i915_vma_pin_fence(vma))) { |
2889caa9 | 399 | i915_vma_unpin(vma); |
c7c6e46f | 400 | return false; |
2889caa9 CW |
401 | } |
402 | ||
3bd40735 | 403 | if (vma->fence) |
c7c6e46f | 404 | exec_flags |= __EXEC_OBJECT_HAS_FENCE; |
2889caa9 CW |
405 | } |
406 | ||
c7c6e46f CW |
407 | *vma->exec_flags = exec_flags | __EXEC_OBJECT_HAS_PIN; |
408 | return !eb_vma_misplaced(entry, vma, exec_flags); | |
2889caa9 CW |
409 | } |
410 | ||
c7c6e46f | 411 | static inline void __eb_unreserve_vma(struct i915_vma *vma, unsigned int flags) |
d55495b4 | 412 | { |
c7c6e46f | 413 | GEM_BUG_ON(!(flags & __EXEC_OBJECT_HAS_PIN)); |
2889caa9 | 414 | |
c7c6e46f | 415 | if (unlikely(flags & __EXEC_OBJECT_HAS_FENCE)) |
3bd40735 | 416 | __i915_vma_unpin_fence(vma); |
d55495b4 | 417 | |
2889caa9 | 418 | __i915_vma_unpin(vma); |
d55495b4 CW |
419 | } |
420 | ||
2889caa9 | 421 | static inline void |
c7c6e46f | 422 | eb_unreserve_vma(struct i915_vma *vma, unsigned int *flags) |
d55495b4 | 423 | { |
c7c6e46f | 424 | if (!(*flags & __EXEC_OBJECT_HAS_PIN)) |
2889caa9 | 425 | return; |
d55495b4 | 426 | |
c7c6e46f CW |
427 | __eb_unreserve_vma(vma, *flags); |
428 | *flags &= ~__EXEC_OBJECT_RESERVED; | |
d55495b4 CW |
429 | } |
430 | ||
2889caa9 CW |
431 | static int |
432 | eb_validate_vma(struct i915_execbuffer *eb, | |
433 | struct drm_i915_gem_exec_object2 *entry, | |
434 | struct i915_vma *vma) | |
67731b87 | 435 | { |
2889caa9 CW |
436 | if (unlikely(entry->flags & eb->invalid_flags)) |
437 | return -EINVAL; | |
d55495b4 | 438 | |
2889caa9 CW |
439 | if (unlikely(entry->alignment && !is_power_of_2(entry->alignment))) |
440 | return -EINVAL; | |
441 | ||
442 | /* | |
443 | * Offset can be used as input (EXEC_OBJECT_PINNED), reject | |
444 | * any non-page-aligned or non-canonical addresses. | |
445 | */ | |
446 | if (unlikely(entry->flags & EXEC_OBJECT_PINNED && | |
6fc4e48f | 447 | entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK))) |
2889caa9 CW |
448 | return -EINVAL; |
449 | ||
450 | /* pad_to_size was once a reserved field, so sanitize it */ | |
451 | if (entry->flags & EXEC_OBJECT_PAD_TO_SIZE) { | |
452 | if (unlikely(offset_in_page(entry->pad_to_size))) | |
453 | return -EINVAL; | |
454 | } else { | |
455 | entry->pad_to_size = 0; | |
d55495b4 CW |
456 | } |
457 | ||
c7c6e46f | 458 | if (unlikely(vma->exec_flags)) { |
2889caa9 CW |
459 | DRM_DEBUG("Object [handle %d, index %d] appears more than once in object list\n", |
460 | entry->handle, (int)(entry - eb->exec)); | |
461 | return -EINVAL; | |
462 | } | |
463 | ||
464 | /* | |
465 | * From drm_mm perspective address space is continuous, | |
466 | * so from this point we're always using non-canonical | |
467 | * form internally. | |
468 | */ | |
469 | entry->offset = gen8_noncanonical_addr(entry->offset); | |
470 | ||
c7c6e46f CW |
471 | if (!eb->reloc_cache.has_fence) { |
472 | entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE; | |
473 | } else { | |
474 | if ((entry->flags & EXEC_OBJECT_NEEDS_FENCE || | |
475 | eb->reloc_cache.needs_unfenced) && | |
476 | i915_gem_object_is_tiled(vma->obj)) | |
477 | entry->flags |= EXEC_OBJECT_NEEDS_GTT | __EXEC_OBJECT_NEEDS_MAP; | |
478 | } | |
479 | ||
480 | if (!(entry->flags & EXEC_OBJECT_PINNED)) | |
481 | entry->flags |= eb->context_flags; | |
482 | ||
2889caa9 | 483 | return 0; |
67731b87 CW |
484 | } |
485 | ||
2889caa9 | 486 | static int |
746c8f14 CW |
487 | eb_add_vma(struct i915_execbuffer *eb, |
488 | unsigned int i, unsigned batch_idx, | |
489 | struct i915_vma *vma) | |
59bfa124 | 490 | { |
c7c6e46f | 491 | struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; |
2889caa9 CW |
492 | int err; |
493 | ||
494 | GEM_BUG_ON(i915_vma_is_closed(vma)); | |
495 | ||
496 | if (!(eb->args->flags & __EXEC_VALIDATED)) { | |
497 | err = eb_validate_vma(eb, entry, vma); | |
498 | if (unlikely(err)) | |
499 | return err; | |
4ff4b44c | 500 | } |
4ff4b44c | 501 | |
4d470f73 | 502 | if (eb->lut_size > 0) { |
2889caa9 | 503 | vma->exec_handle = entry->handle; |
4ff4b44c | 504 | hlist_add_head(&vma->exec_node, |
2889caa9 CW |
505 | &eb->buckets[hash_32(entry->handle, |
506 | eb->lut_size)]); | |
4ff4b44c | 507 | } |
59bfa124 | 508 | |
2889caa9 CW |
509 | if (entry->relocation_count) |
510 | list_add_tail(&vma->reloc_link, &eb->relocs); | |
511 | ||
2889caa9 CW |
512 | /* |
513 | * Stash a pointer from the vma to execobj, so we can query its flags, | |
514 | * size, alignment etc as provided by the user. Also we stash a pointer | |
515 | * to the vma inside the execobj so that we can use a direct lookup | |
516 | * to find the right target VMA when doing relocations. | |
517 | */ | |
c7c6e46f | 518 | eb->vma[i] = vma; |
d1b48c1e | 519 | eb->flags[i] = entry->flags; |
c7c6e46f | 520 | vma->exec_flags = &eb->flags[i]; |
2889caa9 | 521 | |
746c8f14 CW |
522 | /* |
523 | * SNA is doing fancy tricks with compressing batch buffers, which leads | |
524 | * to negative relocation deltas. Usually that works out ok since the | |
525 | * relocate address is still positive, except when the batch is placed | |
526 | * very low in the GTT. Ensure this doesn't happen. | |
527 | * | |
528 | * Note that actual hangs have only been observed on gen7, but for | |
529 | * paranoia do it everywhere. | |
530 | */ | |
531 | if (i == batch_idx) { | |
827db9d8 CW |
532 | if (entry->relocation_count && |
533 | !(eb->flags[i] & EXEC_OBJECT_PINNED)) | |
746c8f14 CW |
534 | eb->flags[i] |= __EXEC_OBJECT_NEEDS_BIAS; |
535 | if (eb->reloc_cache.has_fence) | |
536 | eb->flags[i] |= EXEC_OBJECT_NEEDS_FENCE; | |
537 | ||
538 | eb->batch = vma; | |
539 | } | |
540 | ||
2889caa9 | 541 | err = 0; |
c7c6e46f | 542 | if (eb_pin_vma(eb, entry, vma)) { |
2889caa9 CW |
543 | if (entry->offset != vma->node.start) { |
544 | entry->offset = vma->node.start | UPDATE; | |
545 | eb->args->flags |= __EXEC_HAS_RELOC; | |
546 | } | |
c7c6e46f CW |
547 | } else { |
548 | eb_unreserve_vma(vma, vma->exec_flags); | |
549 | ||
550 | list_add_tail(&vma->exec_link, &eb->unbound); | |
551 | if (drm_mm_node_allocated(&vma->node)) | |
552 | err = i915_vma_unbind(vma); | |
ed2f3532 CW |
553 | if (unlikely(err)) |
554 | vma->exec_flags = NULL; | |
2889caa9 CW |
555 | } |
556 | return err; | |
557 | } | |
558 | ||
559 | static inline int use_cpu_reloc(const struct reloc_cache *cache, | |
560 | const struct drm_i915_gem_object *obj) | |
561 | { | |
562 | if (!i915_gem_object_has_struct_page(obj)) | |
563 | return false; | |
564 | ||
7dd4f672 CW |
565 | if (DBG_FORCE_RELOC == FORCE_CPU_RELOC) |
566 | return true; | |
567 | ||
568 | if (DBG_FORCE_RELOC == FORCE_GTT_RELOC) | |
569 | return false; | |
2889caa9 CW |
570 | |
571 | return (cache->has_llc || | |
572 | obj->cache_dirty || | |
573 | obj->cache_level != I915_CACHE_NONE); | |
574 | } | |
575 | ||
576 | static int eb_reserve_vma(const struct i915_execbuffer *eb, | |
577 | struct i915_vma *vma) | |
578 | { | |
c7c6e46f CW |
579 | struct drm_i915_gem_exec_object2 *entry = exec_entry(eb, vma); |
580 | unsigned int exec_flags = *vma->exec_flags; | |
581 | u64 pin_flags; | |
2889caa9 CW |
582 | int err; |
583 | ||
c7c6e46f CW |
584 | pin_flags = PIN_USER | PIN_NONBLOCK; |
585 | if (exec_flags & EXEC_OBJECT_NEEDS_GTT) | |
586 | pin_flags |= PIN_GLOBAL; | |
2889caa9 CW |
587 | |
588 | /* | |
589 | * Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset, | |
590 | * limit address to the first 4GBs for unflagged objects. | |
591 | */ | |
c7c6e46f CW |
592 | if (!(exec_flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) |
593 | pin_flags |= PIN_ZONE_4G; | |
2889caa9 | 594 | |
c7c6e46f CW |
595 | if (exec_flags & __EXEC_OBJECT_NEEDS_MAP) |
596 | pin_flags |= PIN_MAPPABLE; | |
2889caa9 | 597 | |
c7c6e46f CW |
598 | if (exec_flags & EXEC_OBJECT_PINNED) { |
599 | pin_flags |= entry->offset | PIN_OFFSET_FIXED; | |
600 | pin_flags &= ~PIN_NONBLOCK; /* force overlapping checks */ | |
601 | } else if (exec_flags & __EXEC_OBJECT_NEEDS_BIAS) { | |
602 | pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS; | |
2889caa9 CW |
603 | } |
604 | ||
c7c6e46f CW |
605 | err = i915_vma_pin(vma, |
606 | entry->pad_to_size, entry->alignment, | |
607 | pin_flags); | |
2889caa9 CW |
608 | if (err) |
609 | return err; | |
610 | ||
611 | if (entry->offset != vma->node.start) { | |
612 | entry->offset = vma->node.start | UPDATE; | |
613 | eb->args->flags |= __EXEC_HAS_RELOC; | |
614 | } | |
615 | ||
c7c6e46f | 616 | if (unlikely(exec_flags & EXEC_OBJECT_NEEDS_FENCE)) { |
3bd40735 | 617 | err = i915_vma_pin_fence(vma); |
2889caa9 CW |
618 | if (unlikely(err)) { |
619 | i915_vma_unpin(vma); | |
620 | return err; | |
621 | } | |
622 | ||
3bd40735 | 623 | if (vma->fence) |
c7c6e46f | 624 | exec_flags |= __EXEC_OBJECT_HAS_FENCE; |
2889caa9 CW |
625 | } |
626 | ||
c7c6e46f CW |
627 | *vma->exec_flags = exec_flags | __EXEC_OBJECT_HAS_PIN; |
628 | GEM_BUG_ON(eb_vma_misplaced(entry, vma, exec_flags)); | |
1da7b54c | 629 | |
2889caa9 CW |
630 | return 0; |
631 | } | |
632 | ||
633 | static int eb_reserve(struct i915_execbuffer *eb) | |
634 | { | |
635 | const unsigned int count = eb->buffer_count; | |
636 | struct list_head last; | |
637 | struct i915_vma *vma; | |
638 | unsigned int i, pass; | |
639 | int err; | |
640 | ||
641 | /* | |
642 | * Attempt to pin all of the buffers into the GTT. | |
643 | * This is done in 3 phases: | |
644 | * | |
645 | * 1a. Unbind all objects that do not match the GTT constraints for | |
646 | * the execbuffer (fenceable, mappable, alignment etc). | |
647 | * 1b. Increment pin count for already bound objects. | |
648 | * 2. Bind new objects. | |
649 | * 3. Decrement pin count. | |
650 | * | |
651 | * This avoid unnecessary unbinding of later objects in order to make | |
652 | * room for the earlier objects *unless* we need to defragment. | |
653 | */ | |
654 | ||
655 | pass = 0; | |
656 | err = 0; | |
657 | do { | |
658 | list_for_each_entry(vma, &eb->unbound, exec_link) { | |
659 | err = eb_reserve_vma(eb, vma); | |
660 | if (err) | |
661 | break; | |
662 | } | |
663 | if (err != -ENOSPC) | |
664 | return err; | |
665 | ||
666 | /* Resort *all* the objects into priority order */ | |
667 | INIT_LIST_HEAD(&eb->unbound); | |
668 | INIT_LIST_HEAD(&last); | |
669 | for (i = 0; i < count; i++) { | |
c7c6e46f CW |
670 | unsigned int flags = eb->flags[i]; |
671 | struct i915_vma *vma = eb->vma[i]; | |
2889caa9 | 672 | |
c7c6e46f CW |
673 | if (flags & EXEC_OBJECT_PINNED && |
674 | flags & __EXEC_OBJECT_HAS_PIN) | |
2889caa9 CW |
675 | continue; |
676 | ||
c7c6e46f | 677 | eb_unreserve_vma(vma, &eb->flags[i]); |
2889caa9 | 678 | |
c7c6e46f | 679 | if (flags & EXEC_OBJECT_PINNED) |
35e882a4 | 680 | /* Pinned must have their slot */ |
2889caa9 | 681 | list_add(&vma->exec_link, &eb->unbound); |
c7c6e46f | 682 | else if (flags & __EXEC_OBJECT_NEEDS_MAP) |
35e882a4 | 683 | /* Map require the lowest 256MiB (aperture) */ |
2889caa9 | 684 | list_add_tail(&vma->exec_link, &eb->unbound); |
35e882a4 CW |
685 | else if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) |
686 | /* Prioritise 4GiB region for restricted bo */ | |
687 | list_add(&vma->exec_link, &last); | |
2889caa9 CW |
688 | else |
689 | list_add_tail(&vma->exec_link, &last); | |
690 | } | |
691 | list_splice_tail(&last, &eb->unbound); | |
692 | ||
693 | switch (pass++) { | |
694 | case 0: | |
695 | break; | |
696 | ||
697 | case 1: | |
698 | /* Too fragmented, unbind everything and retry */ | |
f5d974f9 | 699 | err = i915_gem_evict_vm(eb->context->vm); |
2889caa9 CW |
700 | if (err) |
701 | return err; | |
702 | break; | |
703 | ||
704 | default: | |
705 | return -ENOSPC; | |
706 | } | |
707 | } while (1); | |
4ff4b44c | 708 | } |
59bfa124 | 709 | |
2889caa9 CW |
710 | static unsigned int eb_batch_index(const struct i915_execbuffer *eb) |
711 | { | |
1a71cf2f CW |
712 | if (eb->args->flags & I915_EXEC_BATCH_FIRST) |
713 | return 0; | |
714 | else | |
715 | return eb->buffer_count - 1; | |
2889caa9 CW |
716 | } |
717 | ||
718 | static int eb_select_context(struct i915_execbuffer *eb) | |
719 | { | |
720 | struct i915_gem_context *ctx; | |
721 | ||
722 | ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1); | |
1acfc104 CW |
723 | if (unlikely(!ctx)) |
724 | return -ENOENT; | |
2889caa9 | 725 | |
8f2a1057 | 726 | eb->gem_context = ctx; |
f5d974f9 | 727 | if (ctx->vm) |
4f2c7337 | 728 | eb->invalid_flags |= EXEC_OBJECT_NEEDS_GTT; |
2889caa9 CW |
729 | |
730 | eb->context_flags = 0; | |
d3f3e5e4 | 731 | if (test_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags)) |
2889caa9 CW |
732 | eb->context_flags |= __EXEC_OBJECT_NEEDS_BIAS; |
733 | ||
734 | return 0; | |
735 | } | |
736 | ||
d6f328bf CW |
737 | static struct i915_request *__eb_wait_for_ring(struct intel_ring *ring) |
738 | { | |
739 | struct i915_request *rq; | |
740 | ||
741 | /* | |
742 | * Completely unscientific finger-in-the-air estimates for suitable | |
743 | * maximum user request size (to avoid blocking) and then backoff. | |
744 | */ | |
745 | if (intel_ring_update_space(ring) >= PAGE_SIZE) | |
746 | return NULL; | |
747 | ||
748 | /* | |
749 | * Find a request that after waiting upon, there will be at least half | |
750 | * the ring available. The hysteresis allows us to compete for the | |
751 | * shared ring and should mean that we sleep less often prior to | |
752 | * claiming our resources, but not so long that the ring completely | |
753 | * drains before we can submit our next request. | |
754 | */ | |
755 | list_for_each_entry(rq, &ring->request_list, ring_link) { | |
756 | if (__intel_ring_space(rq->postfix, | |
757 | ring->emit, ring->size) > ring->size / 2) | |
758 | break; | |
759 | } | |
760 | if (&rq->ring_link == &ring->request_list) | |
761 | return NULL; /* weird, we will check again later for real */ | |
762 | ||
763 | return i915_request_get(rq); | |
764 | } | |
765 | ||
766 | static int eb_wait_for_ring(const struct i915_execbuffer *eb) | |
767 | { | |
d6f328bf CW |
768 | struct i915_request *rq; |
769 | int ret = 0; | |
770 | ||
771 | /* | |
772 | * Apply a light amount of backpressure to prevent excessive hogs | |
773 | * from blocking waiting for space whilst holding struct_mutex and | |
774 | * keeping all of their resources pinned. | |
775 | */ | |
776 | ||
8f2a1057 | 777 | rq = __eb_wait_for_ring(eb->context->ring); |
d6f328bf CW |
778 | if (rq) { |
779 | mutex_unlock(&eb->i915->drm.struct_mutex); | |
780 | ||
781 | if (i915_request_wait(rq, | |
782 | I915_WAIT_INTERRUPTIBLE, | |
783 | MAX_SCHEDULE_TIMEOUT) < 0) | |
784 | ret = -EINTR; | |
785 | ||
786 | i915_request_put(rq); | |
787 | ||
788 | mutex_lock(&eb->i915->drm.struct_mutex); | |
789 | } | |
790 | ||
791 | return ret; | |
792 | } | |
793 | ||
2889caa9 | 794 | static int eb_lookup_vmas(struct i915_execbuffer *eb) |
3b96eff4 | 795 | { |
8f2a1057 | 796 | struct radix_tree_root *handles_vma = &eb->gem_context->handles_vma; |
ac70ebe8 | 797 | struct drm_i915_gem_object *obj; |
746c8f14 | 798 | unsigned int i, batch; |
2889caa9 | 799 | int err; |
3b96eff4 | 800 | |
8f2a1057 | 801 | if (unlikely(i915_gem_context_is_banned(eb->gem_context))) |
8bcbfb12 CW |
802 | return -EIO; |
803 | ||
2889caa9 CW |
804 | INIT_LIST_HEAD(&eb->relocs); |
805 | INIT_LIST_HEAD(&eb->unbound); | |
d55495b4 | 806 | |
746c8f14 CW |
807 | batch = eb_batch_index(eb); |
808 | ||
155ab883 CW |
809 | mutex_lock(&eb->gem_context->mutex); |
810 | if (unlikely(i915_gem_context_is_closed(eb->gem_context))) { | |
811 | err = -ENOENT; | |
812 | goto err_ctx; | |
813 | } | |
814 | ||
170fa29b CW |
815 | for (i = 0; i < eb->buffer_count; i++) { |
816 | u32 handle = eb->exec[i].handle; | |
d1b48c1e | 817 | struct i915_lut_handle *lut; |
170fa29b | 818 | struct i915_vma *vma; |
4ff4b44c | 819 | |
d1b48c1e CW |
820 | vma = radix_tree_lookup(handles_vma, handle); |
821 | if (likely(vma)) | |
170fa29b | 822 | goto add_vma; |
4ff4b44c | 823 | |
170fa29b | 824 | obj = i915_gem_object_lookup(eb->file, handle); |
4ff4b44c | 825 | if (unlikely(!obj)) { |
2889caa9 | 826 | err = -ENOENT; |
170fa29b | 827 | goto err_vma; |
3b96eff4 CW |
828 | } |
829 | ||
f5d974f9 | 830 | vma = i915_vma_instance(obj, eb->context->vm, NULL); |
772b5408 | 831 | if (IS_ERR(vma)) { |
2889caa9 | 832 | err = PTR_ERR(vma); |
170fa29b | 833 | goto err_obj; |
27173f1f BW |
834 | } |
835 | ||
13f1bfd3 | 836 | lut = i915_lut_handle_alloc(); |
d1b48c1e CW |
837 | if (unlikely(!lut)) { |
838 | err = -ENOMEM; | |
839 | goto err_obj; | |
840 | } | |
841 | ||
842 | err = radix_tree_insert(handles_vma, handle, vma); | |
843 | if (unlikely(err)) { | |
13f1bfd3 | 844 | i915_lut_handle_free(lut); |
d1b48c1e | 845 | goto err_obj; |
eef90ccb | 846 | } |
4ff4b44c | 847 | |
155ab883 CW |
848 | /* transfer ref to lut */ |
849 | if (!atomic_fetch_inc(&vma->open_count)) | |
3365e226 | 850 | i915_vma_reopen(vma); |
d1b48c1e | 851 | lut->handle = handle; |
155ab883 CW |
852 | lut->ctx = eb->gem_context; |
853 | ||
854 | i915_gem_object_lock(obj); | |
855 | list_add(&lut->obj_link, &obj->lut_list); | |
856 | i915_gem_object_unlock(obj); | |
d1b48c1e | 857 | |
170fa29b | 858 | add_vma: |
746c8f14 | 859 | err = eb_add_vma(eb, i, batch, vma); |
2889caa9 | 860 | if (unlikely(err)) |
ac70ebe8 | 861 | goto err_vma; |
dade2a61 | 862 | |
c7c6e46f CW |
863 | GEM_BUG_ON(vma != eb->vma[i]); |
864 | GEM_BUG_ON(vma->exec_flags != &eb->flags[i]); | |
746c8f14 CW |
865 | GEM_BUG_ON(drm_mm_node_allocated(&vma->node) && |
866 | eb_vma_misplaced(&eb->exec[i], vma, eb->flags[i])); | |
4ff4b44c CW |
867 | } |
868 | ||
155ab883 CW |
869 | mutex_unlock(&eb->gem_context->mutex); |
870 | ||
2889caa9 CW |
871 | eb->args->flags |= __EXEC_VALIDATED; |
872 | return eb_reserve(eb); | |
873 | ||
170fa29b | 874 | err_obj: |
ac70ebe8 | 875 | i915_gem_object_put(obj); |
170fa29b CW |
876 | err_vma: |
877 | eb->vma[i] = NULL; | |
155ab883 CW |
878 | err_ctx: |
879 | mutex_unlock(&eb->gem_context->mutex); | |
2889caa9 | 880 | return err; |
3b96eff4 CW |
881 | } |
882 | ||
4ff4b44c | 883 | static struct i915_vma * |
2889caa9 | 884 | eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle) |
67731b87 | 885 | { |
2889caa9 CW |
886 | if (eb->lut_size < 0) { |
887 | if (handle >= -eb->lut_size) | |
eef90ccb | 888 | return NULL; |
c7c6e46f | 889 | return eb->vma[handle]; |
eef90ccb CW |
890 | } else { |
891 | struct hlist_head *head; | |
aa45950b | 892 | struct i915_vma *vma; |
67731b87 | 893 | |
2889caa9 | 894 | head = &eb->buckets[hash_32(handle, eb->lut_size)]; |
aa45950b | 895 | hlist_for_each_entry(vma, head, exec_node) { |
27173f1f BW |
896 | if (vma->exec_handle == handle) |
897 | return vma; | |
eef90ccb CW |
898 | } |
899 | return NULL; | |
900 | } | |
67731b87 CW |
901 | } |
902 | ||
2889caa9 | 903 | static void eb_release_vmas(const struct i915_execbuffer *eb) |
a415d355 | 904 | { |
2889caa9 CW |
905 | const unsigned int count = eb->buffer_count; |
906 | unsigned int i; | |
907 | ||
908 | for (i = 0; i < count; i++) { | |
c7c6e46f CW |
909 | struct i915_vma *vma = eb->vma[i]; |
910 | unsigned int flags = eb->flags[i]; | |
650bc635 | 911 | |
2889caa9 | 912 | if (!vma) |
170fa29b | 913 | break; |
bcffc3fa | 914 | |
c7c6e46f CW |
915 | GEM_BUG_ON(vma->exec_flags != &eb->flags[i]); |
916 | vma->exec_flags = NULL; | |
917 | eb->vma[i] = NULL; | |
9e53d9be | 918 | |
c7c6e46f CW |
919 | if (flags & __EXEC_OBJECT_HAS_PIN) |
920 | __eb_unreserve_vma(vma, flags); | |
dade2a61 | 921 | |
c7c6e46f | 922 | if (flags & __EXEC_OBJECT_HAS_REF) |
dade2a61 | 923 | i915_vma_put(vma); |
2889caa9 | 924 | } |
dabdfe02 CW |
925 | } |
926 | ||
2889caa9 | 927 | static void eb_reset_vmas(const struct i915_execbuffer *eb) |
934acce3 | 928 | { |
2889caa9 | 929 | eb_release_vmas(eb); |
4d470f73 | 930 | if (eb->lut_size > 0) |
2889caa9 CW |
931 | memset(eb->buckets, 0, |
932 | sizeof(struct hlist_head) << eb->lut_size); | |
934acce3 MW |
933 | } |
934 | ||
2889caa9 | 935 | static void eb_destroy(const struct i915_execbuffer *eb) |
934acce3 | 936 | { |
7dd4f672 CW |
937 | GEM_BUG_ON(eb->reloc_cache.rq); |
938 | ||
4d470f73 | 939 | if (eb->lut_size > 0) |
2889caa9 | 940 | kfree(eb->buckets); |
934acce3 MW |
941 | } |
942 | ||
2889caa9 | 943 | static inline u64 |
d50415cc | 944 | relocation_target(const struct drm_i915_gem_relocation_entry *reloc, |
2889caa9 | 945 | const struct i915_vma *target) |
934acce3 | 946 | { |
2889caa9 | 947 | return gen8_canonical_addr((int)reloc->delta + target->node.start); |
934acce3 MW |
948 | } |
949 | ||
d50415cc CW |
950 | static void reloc_cache_init(struct reloc_cache *cache, |
951 | struct drm_i915_private *i915) | |
5032d871 | 952 | { |
31a39207 | 953 | cache->page = -1; |
d50415cc | 954 | cache->vaddr = 0; |
dfc5148f | 955 | /* Must be a variable in the struct to allow GCC to unroll. */ |
7dd4f672 | 956 | cache->gen = INTEL_GEN(i915); |
2889caa9 | 957 | cache->has_llc = HAS_LLC(i915); |
dfc5148f | 958 | cache->use_64bit_reloc = HAS_64BIT_RELOC(i915); |
7dd4f672 CW |
959 | cache->has_fence = cache->gen < 4; |
960 | cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment; | |
e8cb909a | 961 | cache->node.allocated = false; |
7dd4f672 CW |
962 | cache->rq = NULL; |
963 | cache->rq_size = 0; | |
d50415cc | 964 | } |
5032d871 | 965 | |
d50415cc CW |
966 | static inline void *unmask_page(unsigned long p) |
967 | { | |
968 | return (void *)(uintptr_t)(p & PAGE_MASK); | |
969 | } | |
970 | ||
971 | static inline unsigned int unmask_flags(unsigned long p) | |
972 | { | |
973 | return p & ~PAGE_MASK; | |
31a39207 CW |
974 | } |
975 | ||
d50415cc CW |
976 | #define KMAP 0x4 /* after CLFLUSH_FLAGS */ |
977 | ||
650bc635 CW |
978 | static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache) |
979 | { | |
980 | struct drm_i915_private *i915 = | |
981 | container_of(cache, struct i915_execbuffer, reloc_cache)->i915; | |
982 | return &i915->ggtt; | |
983 | } | |
984 | ||
7dd4f672 CW |
985 | static void reloc_gpu_flush(struct reloc_cache *cache) |
986 | { | |
987 | GEM_BUG_ON(cache->rq_size >= cache->rq->batch->obj->base.size / sizeof(u32)); | |
988 | cache->rq_cmd[cache->rq_size] = MI_BATCH_BUFFER_END; | |
a679f58d CW |
989 | |
990 | __i915_gem_object_flush_map(cache->rq->batch->obj, 0, cache->rq_size); | |
7dd4f672 | 991 | i915_gem_object_unpin_map(cache->rq->batch->obj); |
a679f58d | 992 | |
baea429d | 993 | intel_gt_chipset_flush(cache->rq->engine->gt); |
7dd4f672 | 994 | |
697b9a87 | 995 | i915_request_add(cache->rq); |
7dd4f672 CW |
996 | cache->rq = NULL; |
997 | } | |
998 | ||
650bc635 | 999 | static void reloc_cache_reset(struct reloc_cache *cache) |
31a39207 | 1000 | { |
d50415cc | 1001 | void *vaddr; |
5032d871 | 1002 | |
7dd4f672 CW |
1003 | if (cache->rq) |
1004 | reloc_gpu_flush(cache); | |
1005 | ||
31a39207 CW |
1006 | if (!cache->vaddr) |
1007 | return; | |
3c94ceee | 1008 | |
d50415cc CW |
1009 | vaddr = unmask_page(cache->vaddr); |
1010 | if (cache->vaddr & KMAP) { | |
1011 | if (cache->vaddr & CLFLUSH_AFTER) | |
1012 | mb(); | |
3c94ceee | 1013 | |
d50415cc | 1014 | kunmap_atomic(vaddr); |
f0e4a063 | 1015 | i915_gem_object_finish_access((struct drm_i915_gem_object *)cache->node.mm); |
d50415cc | 1016 | } else { |
576f0586 CW |
1017 | struct i915_ggtt *ggtt = cache_to_ggtt(cache); |
1018 | ||
1019 | intel_gt_flush_ggtt_writes(ggtt->vm.gt); | |
d50415cc | 1020 | io_mapping_unmap_atomic((void __iomem *)vaddr); |
e8cb909a | 1021 | |
576f0586 | 1022 | if (cache->node.allocated) { |
82ad6443 CW |
1023 | ggtt->vm.clear_range(&ggtt->vm, |
1024 | cache->node.start, | |
1025 | cache->node.size); | |
e8cb909a CW |
1026 | drm_mm_remove_node(&cache->node); |
1027 | } else { | |
1028 | i915_vma_unpin((struct i915_vma *)cache->node.mm); | |
3c94ceee | 1029 | } |
31a39207 | 1030 | } |
650bc635 CW |
1031 | |
1032 | cache->vaddr = 0; | |
1033 | cache->page = -1; | |
31a39207 CW |
1034 | } |
1035 | ||
1036 | static void *reloc_kmap(struct drm_i915_gem_object *obj, | |
1037 | struct reloc_cache *cache, | |
2889caa9 | 1038 | unsigned long page) |
31a39207 | 1039 | { |
d50415cc CW |
1040 | void *vaddr; |
1041 | ||
1042 | if (cache->vaddr) { | |
1043 | kunmap_atomic(unmask_page(cache->vaddr)); | |
1044 | } else { | |
1045 | unsigned int flushes; | |
2889caa9 | 1046 | int err; |
31a39207 | 1047 | |
f0e4a063 | 1048 | err = i915_gem_object_prepare_write(obj, &flushes); |
2889caa9 CW |
1049 | if (err) |
1050 | return ERR_PTR(err); | |
d50415cc CW |
1051 | |
1052 | BUILD_BUG_ON(KMAP & CLFLUSH_FLAGS); | |
1053 | BUILD_BUG_ON((KMAP | CLFLUSH_FLAGS) & PAGE_MASK); | |
3c94ceee | 1054 | |
d50415cc CW |
1055 | cache->vaddr = flushes | KMAP; |
1056 | cache->node.mm = (void *)obj; | |
1057 | if (flushes) | |
1058 | mb(); | |
3c94ceee BW |
1059 | } |
1060 | ||
d50415cc CW |
1061 | vaddr = kmap_atomic(i915_gem_object_get_dirty_page(obj, page)); |
1062 | cache->vaddr = unmask_flags(cache->vaddr) | (unsigned long)vaddr; | |
31a39207 | 1063 | cache->page = page; |
5032d871 | 1064 | |
d50415cc | 1065 | return vaddr; |
5032d871 RB |
1066 | } |
1067 | ||
d50415cc CW |
1068 | static void *reloc_iomap(struct drm_i915_gem_object *obj, |
1069 | struct reloc_cache *cache, | |
2889caa9 | 1070 | unsigned long page) |
5032d871 | 1071 | { |
650bc635 | 1072 | struct i915_ggtt *ggtt = cache_to_ggtt(cache); |
e8cb909a | 1073 | unsigned long offset; |
d50415cc | 1074 | void *vaddr; |
5032d871 | 1075 | |
d50415cc | 1076 | if (cache->vaddr) { |
576f0586 | 1077 | intel_gt_flush_ggtt_writes(ggtt->vm.gt); |
615e5000 | 1078 | io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr)); |
d50415cc CW |
1079 | } else { |
1080 | struct i915_vma *vma; | |
2889caa9 | 1081 | int err; |
5032d871 | 1082 | |
2889caa9 | 1083 | if (use_cpu_reloc(cache, obj)) |
d50415cc | 1084 | return NULL; |
3c94ceee | 1085 | |
6951e589 | 1086 | i915_gem_object_lock(obj); |
2889caa9 | 1087 | err = i915_gem_object_set_to_gtt_domain(obj, true); |
6951e589 | 1088 | i915_gem_object_unlock(obj); |
2889caa9 CW |
1089 | if (err) |
1090 | return ERR_PTR(err); | |
3c94ceee | 1091 | |
d50415cc | 1092 | vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, |
3c755c5b CW |
1093 | PIN_MAPPABLE | |
1094 | PIN_NONBLOCK | | |
1095 | PIN_NONFAULT); | |
e8cb909a CW |
1096 | if (IS_ERR(vma)) { |
1097 | memset(&cache->node, 0, sizeof(cache->node)); | |
2889caa9 | 1098 | err = drm_mm_insert_node_in_range |
82ad6443 | 1099 | (&ggtt->vm.mm, &cache->node, |
f51455d4 | 1100 | PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE, |
e8cb909a | 1101 | 0, ggtt->mappable_end, |
4e64e553 | 1102 | DRM_MM_INSERT_LOW); |
2889caa9 | 1103 | if (err) /* no inactive aperture space, use cpu reloc */ |
c92fa4fe | 1104 | return NULL; |
e8cb909a | 1105 | } else { |
2889caa9 CW |
1106 | err = i915_vma_put_fence(vma); |
1107 | if (err) { | |
e8cb909a | 1108 | i915_vma_unpin(vma); |
2889caa9 | 1109 | return ERR_PTR(err); |
e8cb909a | 1110 | } |
5032d871 | 1111 | |
e8cb909a CW |
1112 | cache->node.start = vma->node.start; |
1113 | cache->node.mm = (void *)vma; | |
3c94ceee | 1114 | } |
e8cb909a | 1115 | } |
3c94ceee | 1116 | |
e8cb909a CW |
1117 | offset = cache->node.start; |
1118 | if (cache->node.allocated) { | |
82ad6443 CW |
1119 | ggtt->vm.insert_page(&ggtt->vm, |
1120 | i915_gem_object_get_dma_address(obj, page), | |
1121 | offset, I915_CACHE_NONE, 0); | |
e8cb909a CW |
1122 | } else { |
1123 | offset += page << PAGE_SHIFT; | |
3c94ceee BW |
1124 | } |
1125 | ||
73ebd503 | 1126 | vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->iomap, |
650bc635 | 1127 | offset); |
d50415cc CW |
1128 | cache->page = page; |
1129 | cache->vaddr = (unsigned long)vaddr; | |
5032d871 | 1130 | |
d50415cc | 1131 | return vaddr; |
5032d871 RB |
1132 | } |
1133 | ||
d50415cc CW |
1134 | static void *reloc_vaddr(struct drm_i915_gem_object *obj, |
1135 | struct reloc_cache *cache, | |
2889caa9 | 1136 | unsigned long page) |
edf4427b | 1137 | { |
d50415cc | 1138 | void *vaddr; |
5032d871 | 1139 | |
d50415cc CW |
1140 | if (cache->page == page) { |
1141 | vaddr = unmask_page(cache->vaddr); | |
1142 | } else { | |
1143 | vaddr = NULL; | |
1144 | if ((cache->vaddr & KMAP) == 0) | |
1145 | vaddr = reloc_iomap(obj, cache, page); | |
1146 | if (!vaddr) | |
1147 | vaddr = reloc_kmap(obj, cache, page); | |
3c94ceee BW |
1148 | } |
1149 | ||
d50415cc | 1150 | return vaddr; |
edf4427b CW |
1151 | } |
1152 | ||
d50415cc | 1153 | static void clflush_write32(u32 *addr, u32 value, unsigned int flushes) |
edf4427b | 1154 | { |
d50415cc CW |
1155 | if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) { |
1156 | if (flushes & CLFLUSH_BEFORE) { | |
1157 | clflushopt(addr); | |
1158 | mb(); | |
1159 | } | |
edf4427b | 1160 | |
d50415cc | 1161 | *addr = value; |
edf4427b | 1162 | |
2889caa9 CW |
1163 | /* |
1164 | * Writes to the same cacheline are serialised by the CPU | |
d50415cc CW |
1165 | * (including clflush). On the write path, we only require |
1166 | * that it hits memory in an orderly fashion and place | |
1167 | * mb barriers at the start and end of the relocation phase | |
1168 | * to ensure ordering of clflush wrt to the system. | |
1169 | */ | |
1170 | if (flushes & CLFLUSH_AFTER) | |
1171 | clflushopt(addr); | |
1172 | } else | |
1173 | *addr = value; | |
edf4427b | 1174 | } |
edf4427b | 1175 | |
6951e589 CW |
1176 | static int reloc_move_to_gpu(struct i915_request *rq, struct i915_vma *vma) |
1177 | { | |
1178 | struct drm_i915_gem_object *obj = vma->obj; | |
1179 | int err; | |
1180 | ||
1181 | i915_vma_lock(vma); | |
1182 | ||
1183 | if (obj->cache_dirty & ~obj->cache_coherent) | |
1184 | i915_gem_clflush_object(obj, 0); | |
1185 | obj->write_domain = 0; | |
1186 | ||
1187 | err = i915_request_await_object(rq, vma->obj, true); | |
1188 | if (err == 0) | |
1189 | err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE); | |
1190 | ||
1191 | i915_vma_unlock(vma); | |
1192 | ||
1193 | return err; | |
1194 | } | |
1195 | ||
7dd4f672 CW |
1196 | static int __reloc_gpu_alloc(struct i915_execbuffer *eb, |
1197 | struct i915_vma *vma, | |
1198 | unsigned int len) | |
1199 | { | |
1200 | struct reloc_cache *cache = &eb->reloc_cache; | |
1201 | struct drm_i915_gem_object *obj; | |
e61e0f51 | 1202 | struct i915_request *rq; |
7dd4f672 CW |
1203 | struct i915_vma *batch; |
1204 | u32 *cmd; | |
1205 | int err; | |
1206 | ||
7dd4f672 CW |
1207 | obj = i915_gem_batch_pool_get(&eb->engine->batch_pool, PAGE_SIZE); |
1208 | if (IS_ERR(obj)) | |
1209 | return PTR_ERR(obj); | |
1210 | ||
1211 | cmd = i915_gem_object_pin_map(obj, | |
a575c676 CW |
1212 | cache->has_llc ? |
1213 | I915_MAP_FORCE_WB : | |
1214 | I915_MAP_FORCE_WC); | |
7dd4f672 CW |
1215 | i915_gem_object_unpin_pages(obj); |
1216 | if (IS_ERR(cmd)) | |
1217 | return PTR_ERR(cmd); | |
1218 | ||
7dd4f672 CW |
1219 | batch = i915_vma_instance(obj, vma->vm, NULL); |
1220 | if (IS_ERR(batch)) { | |
1221 | err = PTR_ERR(batch); | |
1222 | goto err_unmap; | |
1223 | } | |
1224 | ||
1225 | err = i915_vma_pin(batch, 0, 0, PIN_USER | PIN_NONBLOCK); | |
1226 | if (err) | |
1227 | goto err_unmap; | |
1228 | ||
8f2a1057 | 1229 | rq = i915_request_create(eb->context); |
7dd4f672 CW |
1230 | if (IS_ERR(rq)) { |
1231 | err = PTR_ERR(rq); | |
1232 | goto err_unpin; | |
1233 | } | |
1234 | ||
6951e589 | 1235 | err = reloc_move_to_gpu(rq, vma); |
7dd4f672 CW |
1236 | if (err) |
1237 | goto err_request; | |
1238 | ||
7dd4f672 CW |
1239 | err = eb->engine->emit_bb_start(rq, |
1240 | batch->node.start, PAGE_SIZE, | |
1241 | cache->gen > 5 ? 0 : I915_DISPATCH_SECURE); | |
1242 | if (err) | |
6951e589 | 1243 | goto skip_request; |
7dd4f672 | 1244 | |
6951e589 | 1245 | i915_vma_lock(batch); |
95ff7c7d | 1246 | GEM_BUG_ON(!reservation_object_test_signaled_rcu(batch->resv, true)); |
a5236978 | 1247 | err = i915_vma_move_to_active(batch, rq, 0); |
6951e589 | 1248 | i915_vma_unlock(batch); |
a5236978 CW |
1249 | if (err) |
1250 | goto skip_request; | |
7dd4f672 CW |
1251 | |
1252 | rq->batch = batch; | |
a5236978 | 1253 | i915_vma_unpin(batch); |
7dd4f672 CW |
1254 | |
1255 | cache->rq = rq; | |
1256 | cache->rq_cmd = cmd; | |
1257 | cache->rq_size = 0; | |
1258 | ||
1259 | /* Return with batch mapping (cmd) still pinned */ | |
1260 | return 0; | |
1261 | ||
a5236978 CW |
1262 | skip_request: |
1263 | i915_request_skip(rq, err); | |
7dd4f672 | 1264 | err_request: |
e61e0f51 | 1265 | i915_request_add(rq); |
7dd4f672 CW |
1266 | err_unpin: |
1267 | i915_vma_unpin(batch); | |
1268 | err_unmap: | |
1269 | i915_gem_object_unpin_map(obj); | |
1270 | return err; | |
1271 | } | |
1272 | ||
1273 | static u32 *reloc_gpu(struct i915_execbuffer *eb, | |
1274 | struct i915_vma *vma, | |
1275 | unsigned int len) | |
1276 | { | |
1277 | struct reloc_cache *cache = &eb->reloc_cache; | |
1278 | u32 *cmd; | |
1279 | ||
1280 | if (cache->rq_size > PAGE_SIZE/sizeof(u32) - (len + 1)) | |
1281 | reloc_gpu_flush(cache); | |
1282 | ||
1283 | if (unlikely(!cache->rq)) { | |
1284 | int err; | |
1285 | ||
3dbf26ed CW |
1286 | /* If we need to copy for the cmdparser, we will stall anyway */ |
1287 | if (eb_use_cmdparser(eb)) | |
1288 | return ERR_PTR(-EWOULDBLOCK); | |
1289 | ||
90cad095 CW |
1290 | if (!intel_engine_can_store_dword(eb->engine)) |
1291 | return ERR_PTR(-ENODEV); | |
1292 | ||
7dd4f672 CW |
1293 | err = __reloc_gpu_alloc(eb, vma, len); |
1294 | if (unlikely(err)) | |
1295 | return ERR_PTR(err); | |
1296 | } | |
1297 | ||
1298 | cmd = cache->rq_cmd + cache->rq_size; | |
1299 | cache->rq_size += len; | |
1300 | ||
1301 | return cmd; | |
1302 | } | |
1303 | ||
2889caa9 CW |
1304 | static u64 |
1305 | relocate_entry(struct i915_vma *vma, | |
d50415cc | 1306 | const struct drm_i915_gem_relocation_entry *reloc, |
2889caa9 CW |
1307 | struct i915_execbuffer *eb, |
1308 | const struct i915_vma *target) | |
edf4427b | 1309 | { |
d50415cc | 1310 | u64 offset = reloc->offset; |
2889caa9 CW |
1311 | u64 target_offset = relocation_target(reloc, target); |
1312 | bool wide = eb->reloc_cache.use_64bit_reloc; | |
d50415cc | 1313 | void *vaddr; |
edf4427b | 1314 | |
7dd4f672 CW |
1315 | if (!eb->reloc_cache.vaddr && |
1316 | (DBG_FORCE_RELOC == FORCE_GPU_RELOC || | |
90cad095 | 1317 | !reservation_object_test_signaled_rcu(vma->resv, true))) { |
7dd4f672 CW |
1318 | const unsigned int gen = eb->reloc_cache.gen; |
1319 | unsigned int len; | |
1320 | u32 *batch; | |
1321 | u64 addr; | |
1322 | ||
1323 | if (wide) | |
1324 | len = offset & 7 ? 8 : 5; | |
1325 | else if (gen >= 4) | |
1326 | len = 4; | |
f2f5c061 | 1327 | else |
a889580c | 1328 | len = 3; |
7dd4f672 CW |
1329 | |
1330 | batch = reloc_gpu(eb, vma, len); | |
1331 | if (IS_ERR(batch)) | |
1332 | goto repeat; | |
1333 | ||
1334 | addr = gen8_canonical_addr(vma->node.start + offset); | |
1335 | if (wide) { | |
1336 | if (offset & 7) { | |
1337 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1338 | *batch++ = lower_32_bits(addr); | |
1339 | *batch++ = upper_32_bits(addr); | |
1340 | *batch++ = lower_32_bits(target_offset); | |
1341 | ||
1342 | addr = gen8_canonical_addr(addr + 4); | |
1343 | ||
1344 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1345 | *batch++ = lower_32_bits(addr); | |
1346 | *batch++ = upper_32_bits(addr); | |
1347 | *batch++ = upper_32_bits(target_offset); | |
1348 | } else { | |
1349 | *batch++ = (MI_STORE_DWORD_IMM_GEN4 | (1 << 21)) + 1; | |
1350 | *batch++ = lower_32_bits(addr); | |
1351 | *batch++ = upper_32_bits(addr); | |
1352 | *batch++ = lower_32_bits(target_offset); | |
1353 | *batch++ = upper_32_bits(target_offset); | |
1354 | } | |
1355 | } else if (gen >= 6) { | |
1356 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1357 | *batch++ = 0; | |
1358 | *batch++ = addr; | |
1359 | *batch++ = target_offset; | |
1360 | } else if (gen >= 4) { | |
1361 | *batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT; | |
1362 | *batch++ = 0; | |
1363 | *batch++ = addr; | |
1364 | *batch++ = target_offset; | |
1365 | } else { | |
1366 | *batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL; | |
1367 | *batch++ = addr; | |
1368 | *batch++ = target_offset; | |
1369 | } | |
1370 | ||
1371 | goto out; | |
1372 | } | |
1373 | ||
d50415cc | 1374 | repeat: |
95ff7c7d | 1375 | vaddr = reloc_vaddr(vma->obj, &eb->reloc_cache, offset >> PAGE_SHIFT); |
d50415cc CW |
1376 | if (IS_ERR(vaddr)) |
1377 | return PTR_ERR(vaddr); | |
1378 | ||
1379 | clflush_write32(vaddr + offset_in_page(offset), | |
1380 | lower_32_bits(target_offset), | |
2889caa9 | 1381 | eb->reloc_cache.vaddr); |
d50415cc CW |
1382 | |
1383 | if (wide) { | |
1384 | offset += sizeof(u32); | |
1385 | target_offset >>= 32; | |
1386 | wide = false; | |
1387 | goto repeat; | |
edf4427b | 1388 | } |
edf4427b | 1389 | |
7dd4f672 | 1390 | out: |
2889caa9 | 1391 | return target->node.start | UPDATE; |
edf4427b | 1392 | } |
edf4427b | 1393 | |
2889caa9 CW |
1394 | static u64 |
1395 | eb_relocate_entry(struct i915_execbuffer *eb, | |
1396 | struct i915_vma *vma, | |
1397 | const struct drm_i915_gem_relocation_entry *reloc) | |
54cf91dc | 1398 | { |
507d977f | 1399 | struct i915_vma *target; |
2889caa9 | 1400 | int err; |
54cf91dc | 1401 | |
67731b87 | 1402 | /* we've already hold a reference to all valid objects */ |
507d977f CW |
1403 | target = eb_get_vma(eb, reloc->target_handle); |
1404 | if (unlikely(!target)) | |
54cf91dc | 1405 | return -ENOENT; |
e844b990 | 1406 | |
54cf91dc | 1407 | /* Validate that the target is in a valid r/w GPU domain */ |
b8f7ab17 | 1408 | if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) { |
ff240199 | 1409 | DRM_DEBUG("reloc with multiple write domains: " |
507d977f | 1410 | "target %d offset %d " |
54cf91dc | 1411 | "read %08x write %08x", |
507d977f | 1412 | reloc->target_handle, |
54cf91dc CW |
1413 | (int) reloc->offset, |
1414 | reloc->read_domains, | |
1415 | reloc->write_domain); | |
8b78f0e5 | 1416 | return -EINVAL; |
54cf91dc | 1417 | } |
4ca4a250 DV |
1418 | if (unlikely((reloc->write_domain | reloc->read_domains) |
1419 | & ~I915_GEM_GPU_DOMAINS)) { | |
ff240199 | 1420 | DRM_DEBUG("reloc with read/write non-GPU domains: " |
507d977f | 1421 | "target %d offset %d " |
54cf91dc | 1422 | "read %08x write %08x", |
507d977f | 1423 | reloc->target_handle, |
54cf91dc CW |
1424 | (int) reloc->offset, |
1425 | reloc->read_domains, | |
1426 | reloc->write_domain); | |
8b78f0e5 | 1427 | return -EINVAL; |
54cf91dc | 1428 | } |
54cf91dc | 1429 | |
2889caa9 | 1430 | if (reloc->write_domain) { |
c7c6e46f | 1431 | *target->exec_flags |= EXEC_OBJECT_WRITE; |
507d977f | 1432 | |
2889caa9 CW |
1433 | /* |
1434 | * Sandybridge PPGTT errata: We need a global gtt mapping | |
1435 | * for MI and pipe_control writes because the gpu doesn't | |
1436 | * properly redirect them through the ppgtt for non_secure | |
1437 | * batchbuffers. | |
1438 | */ | |
1439 | if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION && | |
cf819eff | 1440 | IS_GEN(eb->i915, 6)) { |
2889caa9 CW |
1441 | err = i915_vma_bind(target, target->obj->cache_level, |
1442 | PIN_GLOBAL); | |
1443 | if (WARN_ONCE(err, | |
1444 | "Unexpected failure to bind target VMA!")) | |
1445 | return err; | |
1446 | } | |
507d977f | 1447 | } |
54cf91dc | 1448 | |
2889caa9 CW |
1449 | /* |
1450 | * If the relocation already has the right value in it, no | |
54cf91dc CW |
1451 | * more work needs to be done. |
1452 | */ | |
7dd4f672 CW |
1453 | if (!DBG_FORCE_RELOC && |
1454 | gen8_canonical_addr(target->node.start) == reloc->presumed_offset) | |
67731b87 | 1455 | return 0; |
54cf91dc CW |
1456 | |
1457 | /* Check that the relocation address is valid... */ | |
3c94ceee | 1458 | if (unlikely(reloc->offset > |
507d977f | 1459 | vma->size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) { |
ff240199 | 1460 | DRM_DEBUG("Relocation beyond object bounds: " |
507d977f CW |
1461 | "target %d offset %d size %d.\n", |
1462 | reloc->target_handle, | |
1463 | (int)reloc->offset, | |
1464 | (int)vma->size); | |
8b78f0e5 | 1465 | return -EINVAL; |
54cf91dc | 1466 | } |
b8f7ab17 | 1467 | if (unlikely(reloc->offset & 3)) { |
ff240199 | 1468 | DRM_DEBUG("Relocation not 4-byte aligned: " |
507d977f CW |
1469 | "target %d offset %d.\n", |
1470 | reloc->target_handle, | |
1471 | (int)reloc->offset); | |
8b78f0e5 | 1472 | return -EINVAL; |
54cf91dc CW |
1473 | } |
1474 | ||
071750e5 CW |
1475 | /* |
1476 | * If we write into the object, we need to force the synchronisation | |
1477 | * barrier, either with an asynchronous clflush or if we executed the | |
1478 | * patching using the GPU (though that should be serialised by the | |
1479 | * timeline). To be completely sure, and since we are required to | |
1480 | * do relocations we are already stalling, disable the user's opt | |
0519bcb1 | 1481 | * out of our synchronisation. |
071750e5 | 1482 | */ |
c7c6e46f | 1483 | *vma->exec_flags &= ~EXEC_OBJECT_ASYNC; |
071750e5 | 1484 | |
54cf91dc | 1485 | /* and update the user's relocation entry */ |
2889caa9 | 1486 | return relocate_entry(vma, reloc, eb, target); |
54cf91dc CW |
1487 | } |
1488 | ||
2889caa9 | 1489 | static int eb_relocate_vma(struct i915_execbuffer *eb, struct i915_vma *vma) |
54cf91dc | 1490 | { |
1d83f442 | 1491 | #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry)) |
2889caa9 CW |
1492 | struct drm_i915_gem_relocation_entry stack[N_RELOC(512)]; |
1493 | struct drm_i915_gem_relocation_entry __user *urelocs; | |
c7c6e46f | 1494 | const struct drm_i915_gem_exec_object2 *entry = exec_entry(eb, vma); |
2889caa9 | 1495 | unsigned int remain; |
54cf91dc | 1496 | |
2889caa9 | 1497 | urelocs = u64_to_user_ptr(entry->relocs_ptr); |
1d83f442 | 1498 | remain = entry->relocation_count; |
2889caa9 CW |
1499 | if (unlikely(remain > N_RELOC(ULONG_MAX))) |
1500 | return -EINVAL; | |
ebc0808f | 1501 | |
2889caa9 CW |
1502 | /* |
1503 | * We must check that the entire relocation array is safe | |
1504 | * to read. However, if the array is not writable the user loses | |
1505 | * the updated relocation values. | |
1506 | */ | |
96d4f267 | 1507 | if (unlikely(!access_ok(urelocs, remain*sizeof(*urelocs)))) |
2889caa9 CW |
1508 | return -EFAULT; |
1509 | ||
1510 | do { | |
1511 | struct drm_i915_gem_relocation_entry *r = stack; | |
1512 | unsigned int count = | |
1513 | min_t(unsigned int, remain, ARRAY_SIZE(stack)); | |
1514 | unsigned int copied; | |
1d83f442 | 1515 | |
2889caa9 CW |
1516 | /* |
1517 | * This is the fast path and we cannot handle a pagefault | |
ebc0808f CW |
1518 | * whilst holding the struct mutex lest the user pass in the |
1519 | * relocations contained within a mmaped bo. For in such a case | |
1520 | * we, the page fault handler would call i915_gem_fault() and | |
1521 | * we would try to acquire the struct mutex again. Obviously | |
1522 | * this is bad and so lockdep complains vehemently. | |
1523 | */ | |
1524 | pagefault_disable(); | |
2889caa9 | 1525 | copied = __copy_from_user_inatomic(r, urelocs, count * sizeof(r[0])); |
ebc0808f | 1526 | pagefault_enable(); |
2889caa9 CW |
1527 | if (unlikely(copied)) { |
1528 | remain = -EFAULT; | |
31a39207 CW |
1529 | goto out; |
1530 | } | |
54cf91dc | 1531 | |
2889caa9 | 1532 | remain -= count; |
1d83f442 | 1533 | do { |
2889caa9 | 1534 | u64 offset = eb_relocate_entry(eb, vma, r); |
54cf91dc | 1535 | |
2889caa9 CW |
1536 | if (likely(offset == 0)) { |
1537 | } else if ((s64)offset < 0) { | |
1538 | remain = (int)offset; | |
31a39207 | 1539 | goto out; |
2889caa9 CW |
1540 | } else { |
1541 | /* | |
1542 | * Note that reporting an error now | |
1543 | * leaves everything in an inconsistent | |
1544 | * state as we have *already* changed | |
1545 | * the relocation value inside the | |
1546 | * object. As we have not changed the | |
1547 | * reloc.presumed_offset or will not | |
1548 | * change the execobject.offset, on the | |
1549 | * call we may not rewrite the value | |
1550 | * inside the object, leaving it | |
1551 | * dangling and causing a GPU hang. Unless | |
1552 | * userspace dynamically rebuilds the | |
1553 | * relocations on each execbuf rather than | |
1554 | * presume a static tree. | |
1555 | * | |
1556 | * We did previously check if the relocations | |
1557 | * were writable (access_ok), an error now | |
1558 | * would be a strange race with mprotect, | |
1559 | * having already demonstrated that we | |
1560 | * can read from this userspace address. | |
1561 | */ | |
1562 | offset = gen8_canonical_addr(offset & ~UPDATE); | |
fddcd00a CW |
1563 | if (unlikely(__put_user(offset, &urelocs[r-stack].presumed_offset))) { |
1564 | remain = -EFAULT; | |
1565 | goto out; | |
1566 | } | |
1d83f442 | 1567 | } |
2889caa9 CW |
1568 | } while (r++, --count); |
1569 | urelocs += ARRAY_SIZE(stack); | |
1570 | } while (remain); | |
31a39207 | 1571 | out: |
650bc635 | 1572 | reloc_cache_reset(&eb->reloc_cache); |
2889caa9 | 1573 | return remain; |
54cf91dc CW |
1574 | } |
1575 | ||
1576 | static int | |
2889caa9 | 1577 | eb_relocate_vma_slow(struct i915_execbuffer *eb, struct i915_vma *vma) |
54cf91dc | 1578 | { |
c7c6e46f | 1579 | const struct drm_i915_gem_exec_object2 *entry = exec_entry(eb, vma); |
2889caa9 CW |
1580 | struct drm_i915_gem_relocation_entry *relocs = |
1581 | u64_to_ptr(typeof(*relocs), entry->relocs_ptr); | |
1582 | unsigned int i; | |
1583 | int err; | |
54cf91dc CW |
1584 | |
1585 | for (i = 0; i < entry->relocation_count; i++) { | |
2889caa9 | 1586 | u64 offset = eb_relocate_entry(eb, vma, &relocs[i]); |
d4aeee77 | 1587 | |
2889caa9 CW |
1588 | if ((s64)offset < 0) { |
1589 | err = (int)offset; | |
1590 | goto err; | |
1591 | } | |
54cf91dc | 1592 | } |
2889caa9 CW |
1593 | err = 0; |
1594 | err: | |
1595 | reloc_cache_reset(&eb->reloc_cache); | |
1596 | return err; | |
edf4427b CW |
1597 | } |
1598 | ||
2889caa9 | 1599 | static int check_relocations(const struct drm_i915_gem_exec_object2 *entry) |
1690e1eb | 1600 | { |
2889caa9 CW |
1601 | const char __user *addr, *end; |
1602 | unsigned long size; | |
1603 | char __maybe_unused c; | |
1690e1eb | 1604 | |
2889caa9 CW |
1605 | size = entry->relocation_count; |
1606 | if (size == 0) | |
1607 | return 0; | |
7788a765 | 1608 | |
2889caa9 CW |
1609 | if (size > N_RELOC(ULONG_MAX)) |
1610 | return -EINVAL; | |
9a5a53b3 | 1611 | |
2889caa9 CW |
1612 | addr = u64_to_user_ptr(entry->relocs_ptr); |
1613 | size *= sizeof(struct drm_i915_gem_relocation_entry); | |
96d4f267 | 1614 | if (!access_ok(addr, size)) |
2889caa9 | 1615 | return -EFAULT; |
1690e1eb | 1616 | |
2889caa9 CW |
1617 | end = addr + size; |
1618 | for (; addr < end; addr += PAGE_SIZE) { | |
1619 | int err = __get_user(c, addr); | |
1620 | if (err) | |
1621 | return err; | |
ed5982e6 | 1622 | } |
2889caa9 | 1623 | return __get_user(c, end - 1); |
7788a765 | 1624 | } |
1690e1eb | 1625 | |
2889caa9 | 1626 | static int eb_copy_relocations(const struct i915_execbuffer *eb) |
d23db88c | 1627 | { |
2889caa9 CW |
1628 | const unsigned int count = eb->buffer_count; |
1629 | unsigned int i; | |
1630 | int err; | |
e6a84468 | 1631 | |
2889caa9 CW |
1632 | for (i = 0; i < count; i++) { |
1633 | const unsigned int nreloc = eb->exec[i].relocation_count; | |
1634 | struct drm_i915_gem_relocation_entry __user *urelocs; | |
1635 | struct drm_i915_gem_relocation_entry *relocs; | |
1636 | unsigned long size; | |
1637 | unsigned long copied; | |
e6a84468 | 1638 | |
2889caa9 CW |
1639 | if (nreloc == 0) |
1640 | continue; | |
e6a84468 | 1641 | |
2889caa9 CW |
1642 | err = check_relocations(&eb->exec[i]); |
1643 | if (err) | |
1644 | goto err; | |
d23db88c | 1645 | |
2889caa9 CW |
1646 | urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr); |
1647 | size = nreloc * sizeof(*relocs); | |
d23db88c | 1648 | |
0ee931c4 | 1649 | relocs = kvmalloc_array(size, 1, GFP_KERNEL); |
2889caa9 | 1650 | if (!relocs) { |
2889caa9 CW |
1651 | err = -ENOMEM; |
1652 | goto err; | |
1653 | } | |
d23db88c | 1654 | |
2889caa9 CW |
1655 | /* copy_from_user is limited to < 4GiB */ |
1656 | copied = 0; | |
1657 | do { | |
1658 | unsigned int len = | |
1659 | min_t(u64, BIT_ULL(31), size - copied); | |
1660 | ||
1661 | if (__copy_from_user((char *)relocs + copied, | |
908a6105 | 1662 | (char __user *)urelocs + copied, |
2889caa9 | 1663 | len)) { |
fddcd00a | 1664 | end_user: |
0b2c8f8b | 1665 | user_access_end(); |
8f4faed0 | 1666 | end: |
2889caa9 CW |
1667 | kvfree(relocs); |
1668 | err = -EFAULT; | |
1669 | goto err; | |
1670 | } | |
91b2db6f | 1671 | |
2889caa9 CW |
1672 | copied += len; |
1673 | } while (copied < size); | |
506a8e87 | 1674 | |
2889caa9 CW |
1675 | /* |
1676 | * As we do not update the known relocation offsets after | |
1677 | * relocating (due to the complexities in lock handling), | |
1678 | * we need to mark them as invalid now so that we force the | |
1679 | * relocation processing next time. Just in case the target | |
1680 | * object is evicted and then rebound into its old | |
1681 | * presumed_offset before the next execbuffer - if that | |
1682 | * happened we would make the mistake of assuming that the | |
1683 | * relocations were valid. | |
1684 | */ | |
594cc251 | 1685 | if (!user_access_begin(urelocs, size)) |
8f4faed0 | 1686 | goto end; |
594cc251 | 1687 | |
2889caa9 CW |
1688 | for (copied = 0; copied < nreloc; copied++) |
1689 | unsafe_put_user(-1, | |
1690 | &urelocs[copied].presumed_offset, | |
1691 | end_user); | |
2889caa9 | 1692 | user_access_end(); |
d23db88c | 1693 | |
2889caa9 CW |
1694 | eb->exec[i].relocs_ptr = (uintptr_t)relocs; |
1695 | } | |
edf4427b | 1696 | |
2889caa9 | 1697 | return 0; |
101b506a | 1698 | |
2889caa9 CW |
1699 | err: |
1700 | while (i--) { | |
1701 | struct drm_i915_gem_relocation_entry *relocs = | |
1702 | u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr); | |
1703 | if (eb->exec[i].relocation_count) | |
1704 | kvfree(relocs); | |
1705 | } | |
1706 | return err; | |
d23db88c CW |
1707 | } |
1708 | ||
2889caa9 | 1709 | static int eb_prefault_relocations(const struct i915_execbuffer *eb) |
54cf91dc | 1710 | { |
2889caa9 CW |
1711 | const unsigned int count = eb->buffer_count; |
1712 | unsigned int i; | |
54cf91dc | 1713 | |
4f044a88 | 1714 | if (unlikely(i915_modparams.prefault_disable)) |
2889caa9 | 1715 | return 0; |
54cf91dc | 1716 | |
2889caa9 CW |
1717 | for (i = 0; i < count; i++) { |
1718 | int err; | |
54cf91dc | 1719 | |
2889caa9 CW |
1720 | err = check_relocations(&eb->exec[i]); |
1721 | if (err) | |
1722 | return err; | |
1723 | } | |
a415d355 | 1724 | |
2889caa9 | 1725 | return 0; |
54cf91dc CW |
1726 | } |
1727 | ||
2889caa9 | 1728 | static noinline int eb_relocate_slow(struct i915_execbuffer *eb) |
54cf91dc | 1729 | { |
650bc635 | 1730 | struct drm_device *dev = &eb->i915->drm; |
2889caa9 | 1731 | bool have_copy = false; |
27173f1f | 1732 | struct i915_vma *vma; |
2889caa9 CW |
1733 | int err = 0; |
1734 | ||
1735 | repeat: | |
1736 | if (signal_pending(current)) { | |
1737 | err = -ERESTARTSYS; | |
1738 | goto out; | |
1739 | } | |
27173f1f | 1740 | |
67731b87 | 1741 | /* We may process another execbuffer during the unlock... */ |
2889caa9 | 1742 | eb_reset_vmas(eb); |
54cf91dc CW |
1743 | mutex_unlock(&dev->struct_mutex); |
1744 | ||
2889caa9 CW |
1745 | /* |
1746 | * We take 3 passes through the slowpatch. | |
1747 | * | |
1748 | * 1 - we try to just prefault all the user relocation entries and | |
1749 | * then attempt to reuse the atomic pagefault disabled fast path again. | |
1750 | * | |
1751 | * 2 - we copy the user entries to a local buffer here outside of the | |
1752 | * local and allow ourselves to wait upon any rendering before | |
1753 | * relocations | |
1754 | * | |
1755 | * 3 - we already have a local copy of the relocation entries, but | |
1756 | * were interrupted (EAGAIN) whilst waiting for the objects, try again. | |
1757 | */ | |
1758 | if (!err) { | |
1759 | err = eb_prefault_relocations(eb); | |
1760 | } else if (!have_copy) { | |
1761 | err = eb_copy_relocations(eb); | |
1762 | have_copy = err == 0; | |
1763 | } else { | |
1764 | cond_resched(); | |
1765 | err = 0; | |
54cf91dc | 1766 | } |
2889caa9 CW |
1767 | if (err) { |
1768 | mutex_lock(&dev->struct_mutex); | |
1769 | goto out; | |
54cf91dc CW |
1770 | } |
1771 | ||
8a2421bd CW |
1772 | /* A frequent cause for EAGAIN are currently unavailable client pages */ |
1773 | flush_workqueue(eb->i915->mm.userptr_wq); | |
1774 | ||
2889caa9 CW |
1775 | err = i915_mutex_lock_interruptible(dev); |
1776 | if (err) { | |
54cf91dc | 1777 | mutex_lock(&dev->struct_mutex); |
2889caa9 | 1778 | goto out; |
54cf91dc CW |
1779 | } |
1780 | ||
67731b87 | 1781 | /* reacquire the objects */ |
2889caa9 CW |
1782 | err = eb_lookup_vmas(eb); |
1783 | if (err) | |
3b96eff4 | 1784 | goto err; |
67731b87 | 1785 | |
c7c6e46f CW |
1786 | GEM_BUG_ON(!eb->batch); |
1787 | ||
2889caa9 CW |
1788 | list_for_each_entry(vma, &eb->relocs, reloc_link) { |
1789 | if (!have_copy) { | |
1790 | pagefault_disable(); | |
1791 | err = eb_relocate_vma(eb, vma); | |
1792 | pagefault_enable(); | |
1793 | if (err) | |
1794 | goto repeat; | |
1795 | } else { | |
1796 | err = eb_relocate_vma_slow(eb, vma); | |
1797 | if (err) | |
1798 | goto err; | |
1799 | } | |
54cf91dc CW |
1800 | } |
1801 | ||
2889caa9 CW |
1802 | /* |
1803 | * Leave the user relocations as are, this is the painfully slow path, | |
54cf91dc CW |
1804 | * and we want to avoid the complication of dropping the lock whilst |
1805 | * having buffers reserved in the aperture and so causing spurious | |
1806 | * ENOSPC for random operations. | |
1807 | */ | |
1808 | ||
1809 | err: | |
2889caa9 CW |
1810 | if (err == -EAGAIN) |
1811 | goto repeat; | |
1812 | ||
1813 | out: | |
1814 | if (have_copy) { | |
1815 | const unsigned int count = eb->buffer_count; | |
1816 | unsigned int i; | |
1817 | ||
1818 | for (i = 0; i < count; i++) { | |
1819 | const struct drm_i915_gem_exec_object2 *entry = | |
1820 | &eb->exec[i]; | |
1821 | struct drm_i915_gem_relocation_entry *relocs; | |
1822 | ||
1823 | if (!entry->relocation_count) | |
1824 | continue; | |
1825 | ||
1826 | relocs = u64_to_ptr(typeof(*relocs), entry->relocs_ptr); | |
1827 | kvfree(relocs); | |
1828 | } | |
1829 | } | |
1830 | ||
1f727d9e | 1831 | return err; |
54cf91dc CW |
1832 | } |
1833 | ||
2889caa9 | 1834 | static int eb_relocate(struct i915_execbuffer *eb) |
54cf91dc | 1835 | { |
2889caa9 CW |
1836 | if (eb_lookup_vmas(eb)) |
1837 | goto slow; | |
1838 | ||
1839 | /* The objects are in their final locations, apply the relocations. */ | |
1840 | if (eb->args->flags & __EXEC_HAS_RELOC) { | |
1841 | struct i915_vma *vma; | |
1842 | ||
1843 | list_for_each_entry(vma, &eb->relocs, reloc_link) { | |
1844 | if (eb_relocate_vma(eb, vma)) | |
1845 | goto slow; | |
1846 | } | |
1847 | } | |
1848 | ||
1849 | return 0; | |
1850 | ||
1851 | slow: | |
1852 | return eb_relocate_slow(eb); | |
1853 | } | |
1854 | ||
2889caa9 CW |
1855 | static int eb_move_to_gpu(struct i915_execbuffer *eb) |
1856 | { | |
1857 | const unsigned int count = eb->buffer_count; | |
6951e589 | 1858 | struct ww_acquire_ctx acquire; |
2889caa9 | 1859 | unsigned int i; |
6951e589 CW |
1860 | int err = 0; |
1861 | ||
1862 | ww_acquire_init(&acquire, &reservation_ww_class); | |
54cf91dc | 1863 | |
2889caa9 | 1864 | for (i = 0; i < count; i++) { |
6951e589 CW |
1865 | struct i915_vma *vma = eb->vma[i]; |
1866 | ||
1867 | err = ww_mutex_lock_interruptible(&vma->resv->lock, &acquire); | |
1868 | if (!err) | |
1869 | continue; | |
1870 | ||
1871 | GEM_BUG_ON(err == -EALREADY); /* No duplicate vma */ | |
1872 | ||
1873 | if (err == -EDEADLK) { | |
1874 | GEM_BUG_ON(i == 0); | |
1875 | do { | |
1876 | int j = i - 1; | |
1877 | ||
1878 | ww_mutex_unlock(&eb->vma[j]->resv->lock); | |
1879 | ||
1880 | swap(eb->flags[i], eb->flags[j]); | |
1881 | swap(eb->vma[i], eb->vma[j]); | |
1882 | eb->vma[i]->exec_flags = &eb->flags[i]; | |
1883 | } while (--i); | |
1884 | GEM_BUG_ON(vma != eb->vma[0]); | |
1885 | vma->exec_flags = &eb->flags[0]; | |
1886 | ||
1887 | err = ww_mutex_lock_slow_interruptible(&vma->resv->lock, | |
1888 | &acquire); | |
1889 | } | |
1890 | if (err) | |
1891 | break; | |
1892 | } | |
1893 | ww_acquire_done(&acquire); | |
1894 | ||
1895 | while (i--) { | |
c7c6e46f CW |
1896 | unsigned int flags = eb->flags[i]; |
1897 | struct i915_vma *vma = eb->vma[i]; | |
27173f1f | 1898 | struct drm_i915_gem_object *obj = vma->obj; |
03ade511 | 1899 | |
6951e589 CW |
1900 | assert_vma_held(vma); |
1901 | ||
c7c6e46f | 1902 | if (flags & EXEC_OBJECT_CAPTURE) { |
e61e0f51 | 1903 | struct i915_capture_list *capture; |
b0fd47ad CW |
1904 | |
1905 | capture = kmalloc(sizeof(*capture), GFP_KERNEL); | |
6951e589 CW |
1906 | if (capture) { |
1907 | capture->next = eb->request->capture_list; | |
1908 | capture->vma = vma; | |
1909 | eb->request->capture_list = capture; | |
1910 | } | |
b0fd47ad CW |
1911 | } |
1912 | ||
b8f55be6 CW |
1913 | /* |
1914 | * If the GPU is not _reading_ through the CPU cache, we need | |
1915 | * to make sure that any writes (both previous GPU writes from | |
1916 | * before a change in snooping levels and normal CPU writes) | |
1917 | * caught in that cache are flushed to main memory. | |
1918 | * | |
1919 | * We want to say | |
1920 | * obj->cache_dirty && | |
1921 | * !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ) | |
1922 | * but gcc's optimiser doesn't handle that as well and emits | |
1923 | * two jumps instead of one. Maybe one day... | |
1924 | */ | |
1925 | if (unlikely(obj->cache_dirty & ~obj->cache_coherent)) { | |
0f46daa1 | 1926 | if (i915_gem_clflush_object(obj, 0)) |
c7c6e46f | 1927 | flags &= ~EXEC_OBJECT_ASYNC; |
0f46daa1 CW |
1928 | } |
1929 | ||
6951e589 CW |
1930 | if (err == 0 && !(flags & EXEC_OBJECT_ASYNC)) { |
1931 | err = i915_request_await_object | |
1932 | (eb->request, obj, flags & EXEC_OBJECT_WRITE); | |
1933 | } | |
2889caa9 | 1934 | |
6951e589 CW |
1935 | if (err == 0) |
1936 | err = i915_vma_move_to_active(vma, eb->request, flags); | |
c7c6e46f | 1937 | |
6951e589 | 1938 | i915_vma_unlock(vma); |
2889caa9 | 1939 | |
c7c6e46f CW |
1940 | __eb_unreserve_vma(vma, flags); |
1941 | vma->exec_flags = NULL; | |
1942 | ||
1943 | if (unlikely(flags & __EXEC_OBJECT_HAS_REF)) | |
dade2a61 | 1944 | i915_vma_put(vma); |
c59a333f | 1945 | } |
6951e589 CW |
1946 | ww_acquire_fini(&acquire); |
1947 | ||
1948 | if (unlikely(err)) | |
1949 | goto err_skip; | |
1950 | ||
2889caa9 | 1951 | eb->exec = NULL; |
c59a333f | 1952 | |
dcd79934 | 1953 | /* Unconditionally flush any chipset caches (for streaming writes). */ |
baea429d | 1954 | intel_gt_chipset_flush(eb->engine->gt); |
2113184c | 1955 | return 0; |
6951e589 CW |
1956 | |
1957 | err_skip: | |
1958 | i915_request_skip(eb->request, err); | |
1959 | return err; | |
54cf91dc CW |
1960 | } |
1961 | ||
2889caa9 | 1962 | static bool i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec) |
54cf91dc | 1963 | { |
650bc635 | 1964 | if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS) |
ed5982e6 DV |
1965 | return false; |
1966 | ||
2f5945bc | 1967 | /* Kernel clipping was a DRI1 misfeature */ |
cf6e7bac JE |
1968 | if (!(exec->flags & I915_EXEC_FENCE_ARRAY)) { |
1969 | if (exec->num_cliprects || exec->cliprects_ptr) | |
1970 | return false; | |
1971 | } | |
2f5945bc CW |
1972 | |
1973 | if (exec->DR4 == 0xffffffff) { | |
1974 | DRM_DEBUG("UXA submitting garbage DR4, fixing up\n"); | |
1975 | exec->DR4 = 0; | |
1976 | } | |
1977 | if (exec->DR1 || exec->DR4) | |
1978 | return false; | |
1979 | ||
1980 | if ((exec->batch_start_offset | exec->batch_len) & 0x7) | |
1981 | return false; | |
1982 | ||
1983 | return true; | |
54cf91dc CW |
1984 | } |
1985 | ||
e61e0f51 | 1986 | static int i915_reset_gen7_sol_offsets(struct i915_request *rq) |
ae662d31 | 1987 | { |
73dec95e TU |
1988 | u32 *cs; |
1989 | int i; | |
ae662d31 | 1990 | |
8a68d464 | 1991 | if (!IS_GEN(rq->i915, 7) || rq->engine->id != RCS0) { |
9d662da8 DV |
1992 | DRM_DEBUG("sol reset is gen7/rcs only\n"); |
1993 | return -EINVAL; | |
1994 | } | |
ae662d31 | 1995 | |
e61e0f51 | 1996 | cs = intel_ring_begin(rq, 4 * 2 + 2); |
73dec95e TU |
1997 | if (IS_ERR(cs)) |
1998 | return PTR_ERR(cs); | |
ae662d31 | 1999 | |
2889caa9 | 2000 | *cs++ = MI_LOAD_REGISTER_IMM(4); |
ae662d31 | 2001 | for (i = 0; i < 4; i++) { |
73dec95e TU |
2002 | *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i)); |
2003 | *cs++ = 0; | |
ae662d31 | 2004 | } |
2889caa9 | 2005 | *cs++ = MI_NOOP; |
e61e0f51 | 2006 | intel_ring_advance(rq, cs); |
ae662d31 EA |
2007 | |
2008 | return 0; | |
2009 | } | |
2010 | ||
650bc635 | 2011 | static struct i915_vma *eb_parse(struct i915_execbuffer *eb, bool is_master) |
71745376 | 2012 | { |
71745376 | 2013 | struct drm_i915_gem_object *shadow_batch_obj; |
17cabf57 | 2014 | struct i915_vma *vma; |
2889caa9 | 2015 | int err; |
71745376 | 2016 | |
650bc635 CW |
2017 | shadow_batch_obj = i915_gem_batch_pool_get(&eb->engine->batch_pool, |
2018 | PAGE_ALIGN(eb->batch_len)); | |
71745376 | 2019 | if (IS_ERR(shadow_batch_obj)) |
59bfa124 | 2020 | return ERR_CAST(shadow_batch_obj); |
71745376 | 2021 | |
2889caa9 | 2022 | err = intel_engine_cmd_parser(eb->engine, |
650bc635 | 2023 | eb->batch->obj, |
33a051a5 | 2024 | shadow_batch_obj, |
650bc635 CW |
2025 | eb->batch_start_offset, |
2026 | eb->batch_len, | |
33a051a5 | 2027 | is_master); |
2889caa9 CW |
2028 | if (err) { |
2029 | if (err == -EACCES) /* unhandled chained batch */ | |
058d88c4 CW |
2030 | vma = NULL; |
2031 | else | |
2889caa9 | 2032 | vma = ERR_PTR(err); |
058d88c4 CW |
2033 | goto out; |
2034 | } | |
71745376 | 2035 | |
058d88c4 CW |
2036 | vma = i915_gem_object_ggtt_pin(shadow_batch_obj, NULL, 0, 0, 0); |
2037 | if (IS_ERR(vma)) | |
2038 | goto out; | |
de4e783a | 2039 | |
c7c6e46f CW |
2040 | eb->vma[eb->buffer_count] = i915_vma_get(vma); |
2041 | eb->flags[eb->buffer_count] = | |
2042 | __EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_REF; | |
2043 | vma->exec_flags = &eb->flags[eb->buffer_count]; | |
2044 | eb->buffer_count++; | |
71745376 | 2045 | |
058d88c4 | 2046 | out: |
de4e783a | 2047 | i915_gem_object_unpin_pages(shadow_batch_obj); |
058d88c4 | 2048 | return vma; |
71745376 | 2049 | } |
5c6c6003 | 2050 | |
c8659efa | 2051 | static void |
e61e0f51 | 2052 | add_to_client(struct i915_request *rq, struct drm_file *file) |
c8659efa | 2053 | { |
e61e0f51 CW |
2054 | rq->file_priv = file->driver_priv; |
2055 | list_add_tail(&rq->client_link, &rq->file_priv->mm.request_list); | |
c8659efa CW |
2056 | } |
2057 | ||
2889caa9 | 2058 | static int eb_submit(struct i915_execbuffer *eb) |
78382593 | 2059 | { |
2889caa9 | 2060 | int err; |
78382593 | 2061 | |
2889caa9 CW |
2062 | err = eb_move_to_gpu(eb); |
2063 | if (err) | |
2064 | return err; | |
78382593 | 2065 | |
650bc635 | 2066 | if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) { |
2889caa9 CW |
2067 | err = i915_reset_gen7_sol_offsets(eb->request); |
2068 | if (err) | |
2069 | return err; | |
78382593 OM |
2070 | } |
2071 | ||
85474441 CW |
2072 | /* |
2073 | * After we completed waiting for other engines (using HW semaphores) | |
2074 | * then we can signal that this request/batch is ready to run. This | |
2075 | * allows us to determine if the batch is still waiting on the GPU | |
2076 | * or actually running by checking the breadcrumb. | |
2077 | */ | |
2078 | if (eb->engine->emit_init_breadcrumb) { | |
2079 | err = eb->engine->emit_init_breadcrumb(eb->request); | |
2080 | if (err) | |
2081 | return err; | |
2082 | } | |
2083 | ||
2889caa9 | 2084 | err = eb->engine->emit_bb_start(eb->request, |
650bc635 CW |
2085 | eb->batch->node.start + |
2086 | eb->batch_start_offset, | |
2087 | eb->batch_len, | |
2889caa9 CW |
2088 | eb->batch_flags); |
2089 | if (err) | |
2090 | return err; | |
78382593 | 2091 | |
2f5945bc | 2092 | return 0; |
78382593 OM |
2093 | } |
2094 | ||
204bcfef | 2095 | /* |
a8ebba75 | 2096 | * Find one BSD ring to dispatch the corresponding BSD command. |
c80ff16e | 2097 | * The engine index is returned. |
a8ebba75 | 2098 | */ |
de1add36 | 2099 | static unsigned int |
c80ff16e CW |
2100 | gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv, |
2101 | struct drm_file *file) | |
a8ebba75 | 2102 | { |
a8ebba75 ZY |
2103 | struct drm_i915_file_private *file_priv = file->driver_priv; |
2104 | ||
de1add36 | 2105 | /* Check whether the file_priv has already selected one ring. */ |
6f633402 JL |
2106 | if ((int)file_priv->bsd_engine < 0) |
2107 | file_priv->bsd_engine = atomic_fetch_xor(1, | |
2108 | &dev_priv->mm.bsd_engine_dispatch_index); | |
d23db88c | 2109 | |
c80ff16e | 2110 | return file_priv->bsd_engine; |
d23db88c CW |
2111 | } |
2112 | ||
5e2a0419 | 2113 | static const enum intel_engine_id user_ring_map[] = { |
8a68d464 CW |
2114 | [I915_EXEC_DEFAULT] = RCS0, |
2115 | [I915_EXEC_RENDER] = RCS0, | |
2116 | [I915_EXEC_BLT] = BCS0, | |
2117 | [I915_EXEC_BSD] = VCS0, | |
2118 | [I915_EXEC_VEBOX] = VECS0 | |
de1add36 TU |
2119 | }; |
2120 | ||
5e2a0419 | 2121 | static int eb_pin_context(struct i915_execbuffer *eb, struct intel_context *ce) |
de1add36 | 2122 | { |
8f2a1057 | 2123 | int err; |
de1add36 | 2124 | |
8f2a1057 CW |
2125 | /* |
2126 | * ABI: Before userspace accesses the GPU (e.g. execbuffer), report | |
2127 | * EIO if the GPU is already wedged. | |
2128 | */ | |
cb823ed9 | 2129 | err = intel_gt_terminally_wedged(ce->engine->gt); |
8f2a1057 CW |
2130 | if (err) |
2131 | return err; | |
2132 | ||
2133 | /* | |
2134 | * Pinning the contexts may generate requests in order to acquire | |
2135 | * GGTT space, so do this first before we reserve a seqno for | |
2136 | * ourselves. | |
2137 | */ | |
fa9f6681 | 2138 | err = intel_context_pin(ce); |
fa9f6681 CW |
2139 | if (err) |
2140 | return err; | |
8f2a1057 | 2141 | |
5e2a0419 | 2142 | eb->engine = ce->engine; |
8f2a1057 CW |
2143 | eb->context = ce; |
2144 | return 0; | |
2145 | } | |
2146 | ||
2147 | static void eb_unpin_context(struct i915_execbuffer *eb) | |
2148 | { | |
2149 | intel_context_unpin(eb->context); | |
2150 | } | |
de1add36 | 2151 | |
5e2a0419 CW |
2152 | static unsigned int |
2153 | eb_select_legacy_ring(struct i915_execbuffer *eb, | |
2154 | struct drm_file *file, | |
2155 | struct drm_i915_gem_execbuffer2 *args) | |
de1add36 | 2156 | { |
8f2a1057 | 2157 | struct drm_i915_private *i915 = eb->i915; |
de1add36 | 2158 | unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK; |
de1add36 | 2159 | |
5e2a0419 CW |
2160 | if (user_ring_id != I915_EXEC_BSD && |
2161 | (args->flags & I915_EXEC_BSD_MASK)) { | |
de1add36 TU |
2162 | DRM_DEBUG("execbuf with non bsd ring but with invalid " |
2163 | "bsd dispatch flags: %d\n", (int)(args->flags)); | |
5e2a0419 | 2164 | return -1; |
de1add36 TU |
2165 | } |
2166 | ||
8f2a1057 | 2167 | if (user_ring_id == I915_EXEC_BSD && HAS_ENGINE(i915, VCS1)) { |
de1add36 TU |
2168 | unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK; |
2169 | ||
2170 | if (bsd_idx == I915_EXEC_BSD_DEFAULT) { | |
8f2a1057 | 2171 | bsd_idx = gen8_dispatch_bsd_engine(i915, file); |
de1add36 TU |
2172 | } else if (bsd_idx >= I915_EXEC_BSD_RING1 && |
2173 | bsd_idx <= I915_EXEC_BSD_RING2) { | |
d9da6aa0 | 2174 | bsd_idx >>= I915_EXEC_BSD_SHIFT; |
de1add36 TU |
2175 | bsd_idx--; |
2176 | } else { | |
2177 | DRM_DEBUG("execbuf with unknown bsd ring: %u\n", | |
2178 | bsd_idx); | |
5e2a0419 | 2179 | return -1; |
de1add36 TU |
2180 | } |
2181 | ||
5e2a0419 | 2182 | return _VCS(bsd_idx); |
de1add36 TU |
2183 | } |
2184 | ||
5e2a0419 CW |
2185 | if (user_ring_id >= ARRAY_SIZE(user_ring_map)) { |
2186 | DRM_DEBUG("execbuf with unknown ring: %u\n", user_ring_id); | |
2187 | return -1; | |
de1add36 TU |
2188 | } |
2189 | ||
5e2a0419 CW |
2190 | return user_ring_map[user_ring_id]; |
2191 | } | |
2192 | ||
2193 | static int | |
2194 | eb_select_engine(struct i915_execbuffer *eb, | |
2195 | struct drm_file *file, | |
2196 | struct drm_i915_gem_execbuffer2 *args) | |
2197 | { | |
2198 | struct intel_context *ce; | |
2199 | unsigned int idx; | |
2200 | int err; | |
2201 | ||
976b55f0 CW |
2202 | if (i915_gem_context_user_engines(eb->gem_context)) |
2203 | idx = args->flags & I915_EXEC_RING_MASK; | |
2204 | else | |
2205 | idx = eb_select_legacy_ring(eb, file, args); | |
5e2a0419 CW |
2206 | |
2207 | ce = i915_gem_context_get_engine(eb->gem_context, idx); | |
2208 | if (IS_ERR(ce)) | |
2209 | return PTR_ERR(ce); | |
2210 | ||
2211 | err = eb_pin_context(eb, ce); | |
2212 | intel_context_put(ce); | |
2213 | ||
2214 | return err; | |
de1add36 TU |
2215 | } |
2216 | ||
cf6e7bac JE |
2217 | static void |
2218 | __free_fence_array(struct drm_syncobj **fences, unsigned int n) | |
2219 | { | |
2220 | while (n--) | |
2221 | drm_syncobj_put(ptr_mask_bits(fences[n], 2)); | |
2222 | kvfree(fences); | |
2223 | } | |
2224 | ||
2225 | static struct drm_syncobj ** | |
2226 | get_fence_array(struct drm_i915_gem_execbuffer2 *args, | |
2227 | struct drm_file *file) | |
2228 | { | |
d710fc16 | 2229 | const unsigned long nfences = args->num_cliprects; |
cf6e7bac JE |
2230 | struct drm_i915_gem_exec_fence __user *user; |
2231 | struct drm_syncobj **fences; | |
d710fc16 | 2232 | unsigned long n; |
cf6e7bac JE |
2233 | int err; |
2234 | ||
2235 | if (!(args->flags & I915_EXEC_FENCE_ARRAY)) | |
2236 | return NULL; | |
2237 | ||
d710fc16 CW |
2238 | /* Check multiplication overflow for access_ok() and kvmalloc_array() */ |
2239 | BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long)); | |
2240 | if (nfences > min_t(unsigned long, | |
2241 | ULONG_MAX / sizeof(*user), | |
2242 | SIZE_MAX / sizeof(*fences))) | |
cf6e7bac JE |
2243 | return ERR_PTR(-EINVAL); |
2244 | ||
2245 | user = u64_to_user_ptr(args->cliprects_ptr); | |
96d4f267 | 2246 | if (!access_ok(user, nfences * sizeof(*user))) |
cf6e7bac JE |
2247 | return ERR_PTR(-EFAULT); |
2248 | ||
d710fc16 | 2249 | fences = kvmalloc_array(nfences, sizeof(*fences), |
0ee931c4 | 2250 | __GFP_NOWARN | GFP_KERNEL); |
cf6e7bac JE |
2251 | if (!fences) |
2252 | return ERR_PTR(-ENOMEM); | |
2253 | ||
2254 | for (n = 0; n < nfences; n++) { | |
2255 | struct drm_i915_gem_exec_fence fence; | |
2256 | struct drm_syncobj *syncobj; | |
2257 | ||
2258 | if (__copy_from_user(&fence, user++, sizeof(fence))) { | |
2259 | err = -EFAULT; | |
2260 | goto err; | |
2261 | } | |
2262 | ||
ebcaa1ff TU |
2263 | if (fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS) { |
2264 | err = -EINVAL; | |
2265 | goto err; | |
2266 | } | |
2267 | ||
cf6e7bac JE |
2268 | syncobj = drm_syncobj_find(file, fence.handle); |
2269 | if (!syncobj) { | |
2270 | DRM_DEBUG("Invalid syncobj handle provided\n"); | |
2271 | err = -ENOENT; | |
2272 | goto err; | |
2273 | } | |
2274 | ||
ebcaa1ff TU |
2275 | BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) & |
2276 | ~__I915_EXEC_FENCE_UNKNOWN_FLAGS); | |
2277 | ||
cf6e7bac JE |
2278 | fences[n] = ptr_pack_bits(syncobj, fence.flags, 2); |
2279 | } | |
2280 | ||
2281 | return fences; | |
2282 | ||
2283 | err: | |
2284 | __free_fence_array(fences, n); | |
2285 | return ERR_PTR(err); | |
2286 | } | |
2287 | ||
2288 | static void | |
2289 | put_fence_array(struct drm_i915_gem_execbuffer2 *args, | |
2290 | struct drm_syncobj **fences) | |
2291 | { | |
2292 | if (fences) | |
2293 | __free_fence_array(fences, args->num_cliprects); | |
2294 | } | |
2295 | ||
2296 | static int | |
2297 | await_fence_array(struct i915_execbuffer *eb, | |
2298 | struct drm_syncobj **fences) | |
2299 | { | |
2300 | const unsigned int nfences = eb->args->num_cliprects; | |
2301 | unsigned int n; | |
2302 | int err; | |
2303 | ||
2304 | for (n = 0; n < nfences; n++) { | |
2305 | struct drm_syncobj *syncobj; | |
2306 | struct dma_fence *fence; | |
2307 | unsigned int flags; | |
2308 | ||
2309 | syncobj = ptr_unpack_bits(fences[n], &flags, 2); | |
2310 | if (!(flags & I915_EXEC_FENCE_WAIT)) | |
2311 | continue; | |
2312 | ||
afca4216 | 2313 | fence = drm_syncobj_fence_get(syncobj); |
cf6e7bac JE |
2314 | if (!fence) |
2315 | return -EINVAL; | |
2316 | ||
e61e0f51 | 2317 | err = i915_request_await_dma_fence(eb->request, fence); |
cf6e7bac JE |
2318 | dma_fence_put(fence); |
2319 | if (err < 0) | |
2320 | return err; | |
2321 | } | |
2322 | ||
2323 | return 0; | |
2324 | } | |
2325 | ||
2326 | static void | |
2327 | signal_fence_array(struct i915_execbuffer *eb, | |
2328 | struct drm_syncobj **fences) | |
2329 | { | |
2330 | const unsigned int nfences = eb->args->num_cliprects; | |
2331 | struct dma_fence * const fence = &eb->request->fence; | |
2332 | unsigned int n; | |
2333 | ||
2334 | for (n = 0; n < nfences; n++) { | |
2335 | struct drm_syncobj *syncobj; | |
2336 | unsigned int flags; | |
2337 | ||
2338 | syncobj = ptr_unpack_bits(fences[n], &flags, 2); | |
2339 | if (!(flags & I915_EXEC_FENCE_SIGNAL)) | |
2340 | continue; | |
2341 | ||
0b258ed1 | 2342 | drm_syncobj_replace_fence(syncobj, fence); |
cf6e7bac JE |
2343 | } |
2344 | } | |
2345 | ||
54cf91dc | 2346 | static int |
650bc635 | 2347 | i915_gem_do_execbuffer(struct drm_device *dev, |
54cf91dc CW |
2348 | struct drm_file *file, |
2349 | struct drm_i915_gem_execbuffer2 *args, | |
cf6e7bac JE |
2350 | struct drm_i915_gem_exec_object2 *exec, |
2351 | struct drm_syncobj **fences) | |
54cf91dc | 2352 | { |
650bc635 | 2353 | struct i915_execbuffer eb; |
fec0445c | 2354 | struct dma_fence *in_fence = NULL; |
a88b6e4c | 2355 | struct dma_fence *exec_fence = NULL; |
fec0445c CW |
2356 | struct sync_file *out_fence = NULL; |
2357 | int out_fence_fd = -1; | |
2889caa9 | 2358 | int err; |
432e58ed | 2359 | |
74c1c694 | 2360 | BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS); |
2889caa9 CW |
2361 | BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS & |
2362 | ~__EXEC_OBJECT_UNKNOWN_FLAGS); | |
54cf91dc | 2363 | |
650bc635 CW |
2364 | eb.i915 = to_i915(dev); |
2365 | eb.file = file; | |
2366 | eb.args = args; | |
7dd4f672 | 2367 | if (DBG_FORCE_RELOC || !(args->flags & I915_EXEC_NO_RELOC)) |
2889caa9 | 2368 | args->flags |= __EXEC_HAS_RELOC; |
c7c6e46f | 2369 | |
650bc635 | 2370 | eb.exec = exec; |
170fa29b CW |
2371 | eb.vma = (struct i915_vma **)(exec + args->buffer_count + 1); |
2372 | eb.vma[0] = NULL; | |
c7c6e46f CW |
2373 | eb.flags = (unsigned int *)(eb.vma + args->buffer_count + 1); |
2374 | ||
2889caa9 | 2375 | eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS; |
650bc635 CW |
2376 | reloc_cache_init(&eb.reloc_cache, eb.i915); |
2377 | ||
2889caa9 | 2378 | eb.buffer_count = args->buffer_count; |
650bc635 CW |
2379 | eb.batch_start_offset = args->batch_start_offset; |
2380 | eb.batch_len = args->batch_len; | |
2381 | ||
2889caa9 | 2382 | eb.batch_flags = 0; |
d7d4eedd | 2383 | if (args->flags & I915_EXEC_SECURE) { |
b3ac9f25 | 2384 | if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN)) |
d7d4eedd CW |
2385 | return -EPERM; |
2386 | ||
2889caa9 | 2387 | eb.batch_flags |= I915_DISPATCH_SECURE; |
d7d4eedd | 2388 | } |
b45305fc | 2389 | if (args->flags & I915_EXEC_IS_PINNED) |
2889caa9 | 2390 | eb.batch_flags |= I915_DISPATCH_PINNED; |
54cf91dc | 2391 | |
fec0445c CW |
2392 | if (args->flags & I915_EXEC_FENCE_IN) { |
2393 | in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2)); | |
4a04e371 DCS |
2394 | if (!in_fence) |
2395 | return -EINVAL; | |
fec0445c CW |
2396 | } |
2397 | ||
a88b6e4c CW |
2398 | if (args->flags & I915_EXEC_FENCE_SUBMIT) { |
2399 | if (in_fence) { | |
2400 | err = -EINVAL; | |
2401 | goto err_in_fence; | |
2402 | } | |
2403 | ||
2404 | exec_fence = sync_file_get_fence(lower_32_bits(args->rsvd2)); | |
2405 | if (!exec_fence) { | |
2406 | err = -EINVAL; | |
2407 | goto err_in_fence; | |
2408 | } | |
2409 | } | |
2410 | ||
fec0445c CW |
2411 | if (args->flags & I915_EXEC_FENCE_OUT) { |
2412 | out_fence_fd = get_unused_fd_flags(O_CLOEXEC); | |
2413 | if (out_fence_fd < 0) { | |
2889caa9 | 2414 | err = out_fence_fd; |
a88b6e4c | 2415 | goto err_exec_fence; |
fec0445c CW |
2416 | } |
2417 | } | |
2418 | ||
4d470f73 CW |
2419 | err = eb_create(&eb); |
2420 | if (err) | |
2421 | goto err_out_fence; | |
2422 | ||
2423 | GEM_BUG_ON(!eb.lut_size); | |
2889caa9 | 2424 | |
1acfc104 CW |
2425 | err = eb_select_context(&eb); |
2426 | if (unlikely(err)) | |
2427 | goto err_destroy; | |
2428 | ||
2889caa9 CW |
2429 | /* |
2430 | * Take a local wakeref for preparing to dispatch the execbuf as | |
67d97da3 CW |
2431 | * we expect to access the hardware fairly frequently in the |
2432 | * process. Upon first dispatch, we acquire another prolonged | |
2433 | * wakeref that we hold until the GPU has been idle for at least | |
2434 | * 100ms. | |
2435 | */ | |
0c91621c | 2436 | intel_gt_pm_get(&eb.i915->gt); |
1acfc104 | 2437 | |
2889caa9 CW |
2438 | err = i915_mutex_lock_interruptible(dev); |
2439 | if (err) | |
2440 | goto err_rpm; | |
f65c9168 | 2441 | |
8f2a1057 | 2442 | err = eb_select_engine(&eb, file, args); |
d6f328bf CW |
2443 | if (unlikely(err)) |
2444 | goto err_unlock; | |
2445 | ||
8f2a1057 CW |
2446 | err = eb_wait_for_ring(&eb); /* may temporarily drop struct_mutex */ |
2447 | if (unlikely(err)) | |
2448 | goto err_engine; | |
2449 | ||
2889caa9 | 2450 | err = eb_relocate(&eb); |
1f727d9e | 2451 | if (err) { |
2889caa9 CW |
2452 | /* |
2453 | * If the user expects the execobject.offset and | |
2454 | * reloc.presumed_offset to be an exact match, | |
2455 | * as for using NO_RELOC, then we cannot update | |
2456 | * the execobject.offset until we have completed | |
2457 | * relocation. | |
2458 | */ | |
2459 | args->flags &= ~__EXEC_HAS_RELOC; | |
2889caa9 | 2460 | goto err_vma; |
1f727d9e | 2461 | } |
54cf91dc | 2462 | |
c7c6e46f | 2463 | if (unlikely(*eb.batch->exec_flags & EXEC_OBJECT_WRITE)) { |
ff240199 | 2464 | DRM_DEBUG("Attempting to use self-modifying batch buffer\n"); |
2889caa9 CW |
2465 | err = -EINVAL; |
2466 | goto err_vma; | |
54cf91dc | 2467 | } |
650bc635 CW |
2468 | if (eb.batch_start_offset > eb.batch->size || |
2469 | eb.batch_len > eb.batch->size - eb.batch_start_offset) { | |
0b537272 | 2470 | DRM_DEBUG("Attempting to use out-of-bounds batch\n"); |
2889caa9 CW |
2471 | err = -EINVAL; |
2472 | goto err_vma; | |
0b537272 | 2473 | } |
54cf91dc | 2474 | |
3dbf26ed | 2475 | if (eb_use_cmdparser(&eb)) { |
59bfa124 CW |
2476 | struct i915_vma *vma; |
2477 | ||
650bc635 | 2478 | vma = eb_parse(&eb, drm_is_current_master(file)); |
59bfa124 | 2479 | if (IS_ERR(vma)) { |
2889caa9 CW |
2480 | err = PTR_ERR(vma); |
2481 | goto err_vma; | |
78a42377 | 2482 | } |
17cabf57 | 2483 | |
59bfa124 | 2484 | if (vma) { |
c7c7372e RP |
2485 | /* |
2486 | * Batch parsed and accepted: | |
2487 | * | |
2488 | * Set the DISPATCH_SECURE bit to remove the NON_SECURE | |
2489 | * bit from MI_BATCH_BUFFER_START commands issued in | |
2490 | * the dispatch_execbuffer implementations. We | |
2491 | * specifically don't want that set on batches the | |
2492 | * command parser has accepted. | |
2493 | */ | |
2889caa9 | 2494 | eb.batch_flags |= I915_DISPATCH_SECURE; |
650bc635 CW |
2495 | eb.batch_start_offset = 0; |
2496 | eb.batch = vma; | |
c7c7372e | 2497 | } |
351e3db2 BV |
2498 | } |
2499 | ||
650bc635 CW |
2500 | if (eb.batch_len == 0) |
2501 | eb.batch_len = eb.batch->size - eb.batch_start_offset; | |
78a42377 | 2502 | |
2889caa9 CW |
2503 | /* |
2504 | * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure | |
d7d4eedd | 2505 | * batch" bit. Hence we need to pin secure batches into the global gtt. |
28cf5415 | 2506 | * hsw should have this fixed, but bdw mucks it up again. */ |
2889caa9 | 2507 | if (eb.batch_flags & I915_DISPATCH_SECURE) { |
058d88c4 | 2508 | struct i915_vma *vma; |
59bfa124 | 2509 | |
da51a1e7 DV |
2510 | /* |
2511 | * So on first glance it looks freaky that we pin the batch here | |
2512 | * outside of the reservation loop. But: | |
2513 | * - The batch is already pinned into the relevant ppgtt, so we | |
2514 | * already have the backing storage fully allocated. | |
2515 | * - No other BO uses the global gtt (well contexts, but meh), | |
fd0753cf | 2516 | * so we don't really have issues with multiple objects not |
da51a1e7 DV |
2517 | * fitting due to fragmentation. |
2518 | * So this is actually safe. | |
2519 | */ | |
2889caa9 | 2520 | vma = i915_gem_object_ggtt_pin(eb.batch->obj, NULL, 0, 0, 0); |
058d88c4 | 2521 | if (IS_ERR(vma)) { |
2889caa9 CW |
2522 | err = PTR_ERR(vma); |
2523 | goto err_vma; | |
058d88c4 | 2524 | } |
d7d4eedd | 2525 | |
650bc635 | 2526 | eb.batch = vma; |
59bfa124 | 2527 | } |
d7d4eedd | 2528 | |
7dd4f672 CW |
2529 | /* All GPU relocation batches must be submitted prior to the user rq */ |
2530 | GEM_BUG_ON(eb.reloc_cache.rq); | |
2531 | ||
0c8dac88 | 2532 | /* Allocate a request for this batch buffer nice and early. */ |
8f2a1057 | 2533 | eb.request = i915_request_create(eb.context); |
650bc635 | 2534 | if (IS_ERR(eb.request)) { |
2889caa9 | 2535 | err = PTR_ERR(eb.request); |
0c8dac88 | 2536 | goto err_batch_unpin; |
26827088 | 2537 | } |
0c8dac88 | 2538 | |
fec0445c | 2539 | if (in_fence) { |
e61e0f51 | 2540 | err = i915_request_await_dma_fence(eb.request, in_fence); |
2889caa9 | 2541 | if (err < 0) |
fec0445c CW |
2542 | goto err_request; |
2543 | } | |
2544 | ||
a88b6e4c CW |
2545 | if (exec_fence) { |
2546 | err = i915_request_await_execution(eb.request, exec_fence, | |
2547 | eb.engine->bond_execute); | |
2548 | if (err < 0) | |
2549 | goto err_request; | |
2550 | } | |
2551 | ||
cf6e7bac JE |
2552 | if (fences) { |
2553 | err = await_fence_array(&eb, fences); | |
2554 | if (err) | |
2555 | goto err_request; | |
2556 | } | |
2557 | ||
fec0445c | 2558 | if (out_fence_fd != -1) { |
650bc635 | 2559 | out_fence = sync_file_create(&eb.request->fence); |
fec0445c | 2560 | if (!out_fence) { |
2889caa9 | 2561 | err = -ENOMEM; |
fec0445c CW |
2562 | goto err_request; |
2563 | } | |
2564 | } | |
2565 | ||
2889caa9 CW |
2566 | /* |
2567 | * Whilst this request exists, batch_obj will be on the | |
17f298cf CW |
2568 | * active_list, and so will hold the active reference. Only when this |
2569 | * request is retired will the the batch_obj be moved onto the | |
2570 | * inactive_list and lose its active reference. Hence we do not need | |
2571 | * to explicitly hold another reference here. | |
2572 | */ | |
650bc635 | 2573 | eb.request->batch = eb.batch; |
5f19e2bf | 2574 | |
e61e0f51 | 2575 | trace_i915_request_queue(eb.request, eb.batch_flags); |
2889caa9 | 2576 | err = eb_submit(&eb); |
aa9b7810 | 2577 | err_request: |
650bc635 | 2578 | add_to_client(eb.request, file); |
8f2a1057 | 2579 | i915_request_add(eb.request); |
c8659efa | 2580 | |
cf6e7bac JE |
2581 | if (fences) |
2582 | signal_fence_array(&eb, fences); | |
2583 | ||
fec0445c | 2584 | if (out_fence) { |
2889caa9 | 2585 | if (err == 0) { |
fec0445c | 2586 | fd_install(out_fence_fd, out_fence->file); |
b6a88e4a | 2587 | args->rsvd2 &= GENMASK_ULL(31, 0); /* keep in-fence */ |
fec0445c CW |
2588 | args->rsvd2 |= (u64)out_fence_fd << 32; |
2589 | out_fence_fd = -1; | |
2590 | } else { | |
2591 | fput(out_fence->file); | |
2592 | } | |
2593 | } | |
54cf91dc | 2594 | |
0c8dac88 | 2595 | err_batch_unpin: |
2889caa9 | 2596 | if (eb.batch_flags & I915_DISPATCH_SECURE) |
650bc635 | 2597 | i915_vma_unpin(eb.batch); |
2889caa9 CW |
2598 | err_vma: |
2599 | if (eb.exec) | |
2600 | eb_release_vmas(&eb); | |
8f2a1057 CW |
2601 | err_engine: |
2602 | eb_unpin_context(&eb); | |
d6f328bf | 2603 | err_unlock: |
54cf91dc | 2604 | mutex_unlock(&dev->struct_mutex); |
2889caa9 | 2605 | err_rpm: |
0c91621c | 2606 | intel_gt_pm_put(&eb.i915->gt); |
8f2a1057 | 2607 | i915_gem_context_put(eb.gem_context); |
1acfc104 | 2608 | err_destroy: |
2889caa9 | 2609 | eb_destroy(&eb); |
4d470f73 | 2610 | err_out_fence: |
fec0445c CW |
2611 | if (out_fence_fd != -1) |
2612 | put_unused_fd(out_fence_fd); | |
a88b6e4c CW |
2613 | err_exec_fence: |
2614 | dma_fence_put(exec_fence); | |
4a04e371 | 2615 | err_in_fence: |
fec0445c | 2616 | dma_fence_put(in_fence); |
2889caa9 | 2617 | return err; |
54cf91dc CW |
2618 | } |
2619 | ||
d710fc16 CW |
2620 | static size_t eb_element_size(void) |
2621 | { | |
2622 | return (sizeof(struct drm_i915_gem_exec_object2) + | |
2623 | sizeof(struct i915_vma *) + | |
2624 | sizeof(unsigned int)); | |
2625 | } | |
2626 | ||
2627 | static bool check_buffer_count(size_t count) | |
2628 | { | |
2629 | const size_t sz = eb_element_size(); | |
2630 | ||
2631 | /* | |
2632 | * When using LUT_HANDLE, we impose a limit of INT_MAX for the lookup | |
2633 | * array size (see eb_create()). Otherwise, we can accept an array as | |
2634 | * large as can be addressed (though use large arrays at your peril)! | |
2635 | */ | |
2636 | ||
2637 | return !(count < 1 || count > INT_MAX || count > SIZE_MAX / sz - 1); | |
2638 | } | |
2639 | ||
54cf91dc CW |
2640 | /* |
2641 | * Legacy execbuffer just creates an exec2 list from the original exec object | |
2642 | * list array and passes it to the real function. | |
2643 | */ | |
2644 | int | |
6a20fe7b VS |
2645 | i915_gem_execbuffer_ioctl(struct drm_device *dev, void *data, |
2646 | struct drm_file *file) | |
54cf91dc CW |
2647 | { |
2648 | struct drm_i915_gem_execbuffer *args = data; | |
2649 | struct drm_i915_gem_execbuffer2 exec2; | |
2650 | struct drm_i915_gem_exec_object *exec_list = NULL; | |
2651 | struct drm_i915_gem_exec_object2 *exec2_list = NULL; | |
d710fc16 | 2652 | const size_t count = args->buffer_count; |
2889caa9 CW |
2653 | unsigned int i; |
2654 | int err; | |
54cf91dc | 2655 | |
d710fc16 CW |
2656 | if (!check_buffer_count(count)) { |
2657 | DRM_DEBUG("execbuf2 with %zd buffers\n", count); | |
54cf91dc CW |
2658 | return -EINVAL; |
2659 | } | |
2660 | ||
2889caa9 CW |
2661 | exec2.buffers_ptr = args->buffers_ptr; |
2662 | exec2.buffer_count = args->buffer_count; | |
2663 | exec2.batch_start_offset = args->batch_start_offset; | |
2664 | exec2.batch_len = args->batch_len; | |
2665 | exec2.DR1 = args->DR1; | |
2666 | exec2.DR4 = args->DR4; | |
2667 | exec2.num_cliprects = args->num_cliprects; | |
2668 | exec2.cliprects_ptr = args->cliprects_ptr; | |
2669 | exec2.flags = I915_EXEC_RENDER; | |
2670 | i915_execbuffer2_set_context_id(exec2, 0); | |
2671 | ||
2672 | if (!i915_gem_check_execbuffer(&exec2)) | |
2673 | return -EINVAL; | |
2674 | ||
54cf91dc | 2675 | /* Copy in the exec list from userland */ |
d710fc16 | 2676 | exec_list = kvmalloc_array(count, sizeof(*exec_list), |
0ee931c4 | 2677 | __GFP_NOWARN | GFP_KERNEL); |
d710fc16 | 2678 | exec2_list = kvmalloc_array(count + 1, eb_element_size(), |
0ee931c4 | 2679 | __GFP_NOWARN | GFP_KERNEL); |
54cf91dc | 2680 | if (exec_list == NULL || exec2_list == NULL) { |
ff240199 | 2681 | DRM_DEBUG("Failed to allocate exec list for %d buffers\n", |
54cf91dc | 2682 | args->buffer_count); |
2098105e MH |
2683 | kvfree(exec_list); |
2684 | kvfree(exec2_list); | |
54cf91dc CW |
2685 | return -ENOMEM; |
2686 | } | |
2889caa9 | 2687 | err = copy_from_user(exec_list, |
3ed605bc | 2688 | u64_to_user_ptr(args->buffers_ptr), |
d710fc16 | 2689 | sizeof(*exec_list) * count); |
2889caa9 | 2690 | if (err) { |
ff240199 | 2691 | DRM_DEBUG("copy %d exec entries failed %d\n", |
2889caa9 | 2692 | args->buffer_count, err); |
2098105e MH |
2693 | kvfree(exec_list); |
2694 | kvfree(exec2_list); | |
54cf91dc CW |
2695 | return -EFAULT; |
2696 | } | |
2697 | ||
2698 | for (i = 0; i < args->buffer_count; i++) { | |
2699 | exec2_list[i].handle = exec_list[i].handle; | |
2700 | exec2_list[i].relocation_count = exec_list[i].relocation_count; | |
2701 | exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr; | |
2702 | exec2_list[i].alignment = exec_list[i].alignment; | |
2703 | exec2_list[i].offset = exec_list[i].offset; | |
f0836b72 | 2704 | if (INTEL_GEN(to_i915(dev)) < 4) |
54cf91dc CW |
2705 | exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE; |
2706 | else | |
2707 | exec2_list[i].flags = 0; | |
2708 | } | |
2709 | ||
cf6e7bac | 2710 | err = i915_gem_do_execbuffer(dev, file, &exec2, exec2_list, NULL); |
2889caa9 | 2711 | if (exec2.flags & __EXEC_HAS_RELOC) { |
9aab8bff | 2712 | struct drm_i915_gem_exec_object __user *user_exec_list = |
3ed605bc | 2713 | u64_to_user_ptr(args->buffers_ptr); |
9aab8bff | 2714 | |
54cf91dc | 2715 | /* Copy the new buffer offsets back to the user's exec list. */ |
9aab8bff | 2716 | for (i = 0; i < args->buffer_count; i++) { |
2889caa9 CW |
2717 | if (!(exec2_list[i].offset & UPDATE)) |
2718 | continue; | |
2719 | ||
934acce3 | 2720 | exec2_list[i].offset = |
2889caa9 CW |
2721 | gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); |
2722 | exec2_list[i].offset &= PIN_OFFSET_MASK; | |
2723 | if (__copy_to_user(&user_exec_list[i].offset, | |
2724 | &exec2_list[i].offset, | |
2725 | sizeof(user_exec_list[i].offset))) | |
9aab8bff | 2726 | break; |
54cf91dc CW |
2727 | } |
2728 | } | |
2729 | ||
2098105e MH |
2730 | kvfree(exec_list); |
2731 | kvfree(exec2_list); | |
2889caa9 | 2732 | return err; |
54cf91dc CW |
2733 | } |
2734 | ||
2735 | int | |
6a20fe7b VS |
2736 | i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data, |
2737 | struct drm_file *file) | |
54cf91dc CW |
2738 | { |
2739 | struct drm_i915_gem_execbuffer2 *args = data; | |
2889caa9 | 2740 | struct drm_i915_gem_exec_object2 *exec2_list; |
cf6e7bac | 2741 | struct drm_syncobj **fences = NULL; |
d710fc16 | 2742 | const size_t count = args->buffer_count; |
2889caa9 | 2743 | int err; |
54cf91dc | 2744 | |
d710fc16 CW |
2745 | if (!check_buffer_count(count)) { |
2746 | DRM_DEBUG("execbuf2 with %zd buffers\n", count); | |
54cf91dc CW |
2747 | return -EINVAL; |
2748 | } | |
2749 | ||
2889caa9 CW |
2750 | if (!i915_gem_check_execbuffer(args)) |
2751 | return -EINVAL; | |
2752 | ||
2753 | /* Allocate an extra slot for use by the command parser */ | |
d710fc16 | 2754 | exec2_list = kvmalloc_array(count + 1, eb_element_size(), |
0ee931c4 | 2755 | __GFP_NOWARN | GFP_KERNEL); |
54cf91dc | 2756 | if (exec2_list == NULL) { |
d710fc16 CW |
2757 | DRM_DEBUG("Failed to allocate exec list for %zd buffers\n", |
2758 | count); | |
54cf91dc CW |
2759 | return -ENOMEM; |
2760 | } | |
2889caa9 CW |
2761 | if (copy_from_user(exec2_list, |
2762 | u64_to_user_ptr(args->buffers_ptr), | |
d710fc16 CW |
2763 | sizeof(*exec2_list) * count)) { |
2764 | DRM_DEBUG("copy %zd exec entries failed\n", count); | |
2098105e | 2765 | kvfree(exec2_list); |
54cf91dc CW |
2766 | return -EFAULT; |
2767 | } | |
2768 | ||
cf6e7bac JE |
2769 | if (args->flags & I915_EXEC_FENCE_ARRAY) { |
2770 | fences = get_fence_array(args, file); | |
2771 | if (IS_ERR(fences)) { | |
2772 | kvfree(exec2_list); | |
2773 | return PTR_ERR(fences); | |
2774 | } | |
2775 | } | |
2776 | ||
2777 | err = i915_gem_do_execbuffer(dev, file, args, exec2_list, fences); | |
2889caa9 CW |
2778 | |
2779 | /* | |
2780 | * Now that we have begun execution of the batchbuffer, we ignore | |
2781 | * any new error after this point. Also given that we have already | |
2782 | * updated the associated relocations, we try to write out the current | |
2783 | * object locations irrespective of any error. | |
2784 | */ | |
2785 | if (args->flags & __EXEC_HAS_RELOC) { | |
d593d992 | 2786 | struct drm_i915_gem_exec_object2 __user *user_exec_list = |
2889caa9 CW |
2787 | u64_to_user_ptr(args->buffers_ptr); |
2788 | unsigned int i; | |
9aab8bff | 2789 | |
2889caa9 | 2790 | /* Copy the new buffer offsets back to the user's exec list. */ |
594cc251 LT |
2791 | /* |
2792 | * Note: count * sizeof(*user_exec_list) does not overflow, | |
2793 | * because we checked 'count' in check_buffer_count(). | |
2794 | * | |
2795 | * And this range already got effectively checked earlier | |
2796 | * when we did the "copy_from_user()" above. | |
2797 | */ | |
2798 | if (!user_access_begin(user_exec_list, count * sizeof(*user_exec_list))) | |
8f4faed0 | 2799 | goto end; |
594cc251 | 2800 | |
9aab8bff | 2801 | for (i = 0; i < args->buffer_count; i++) { |
2889caa9 CW |
2802 | if (!(exec2_list[i].offset & UPDATE)) |
2803 | continue; | |
2804 | ||
934acce3 | 2805 | exec2_list[i].offset = |
2889caa9 CW |
2806 | gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); |
2807 | unsafe_put_user(exec2_list[i].offset, | |
2808 | &user_exec_list[i].offset, | |
2809 | end_user); | |
54cf91dc | 2810 | } |
2889caa9 CW |
2811 | end_user: |
2812 | user_access_end(); | |
8f4faed0 | 2813 | end:; |
54cf91dc CW |
2814 | } |
2815 | ||
2889caa9 | 2816 | args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS; |
cf6e7bac | 2817 | put_fence_array(args, fences); |
2098105e | 2818 | kvfree(exec2_list); |
2889caa9 | 2819 | return err; |
54cf91dc | 2820 | } |