Commit | Line | Data |
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54cf91dc | 1 | /* |
10be98a7 | 2 | * SPDX-License-Identifier: MIT |
54cf91dc | 3 | * |
10be98a7 | 4 | * Copyright © 2008,2010 Intel Corporation |
54cf91dc CW |
5 | */ |
6 | ||
daedaa33 | 7 | #include <linux/intel-iommu.h> |
ad778f89 | 8 | #include <linux/reservation.h> |
fec0445c | 9 | #include <linux/sync_file.h> |
ad778f89 CW |
10 | #include <linux/uaccess.h> |
11 | ||
cf6e7bac | 12 | #include <drm/drm_syncobj.h> |
760285e7 | 13 | #include <drm/i915_drm.h> |
ad778f89 | 14 | |
afa13085 | 15 | #include "gem/i915_gem_ioctls.h" |
10be98a7 | 16 | #include "gt/intel_context.h" |
8f2a1057 CW |
17 | #include "gt/intel_gt_pm.h" |
18 | ||
10be98a7 | 19 | #include "i915_gem_ioctls.h" |
57822dc6 | 20 | #include "i915_gem_clflush.h" |
10be98a7 | 21 | #include "i915_gem_context.h" |
54cf91dc CW |
22 | #include "i915_trace.h" |
23 | #include "intel_drv.h" | |
5d723d7a | 24 | #include "intel_frontbuffer.h" |
54cf91dc | 25 | |
7dd4f672 CW |
26 | enum { |
27 | FORCE_CPU_RELOC = 1, | |
28 | FORCE_GTT_RELOC, | |
29 | FORCE_GPU_RELOC, | |
30 | #define DBG_FORCE_RELOC 0 /* choose one of the above! */ | |
31 | }; | |
d50415cc | 32 | |
dade2a61 CW |
33 | #define __EXEC_OBJECT_HAS_REF BIT(31) |
34 | #define __EXEC_OBJECT_HAS_PIN BIT(30) | |
35 | #define __EXEC_OBJECT_HAS_FENCE BIT(29) | |
36 | #define __EXEC_OBJECT_NEEDS_MAP BIT(28) | |
37 | #define __EXEC_OBJECT_NEEDS_BIAS BIT(27) | |
38 | #define __EXEC_OBJECT_INTERNAL_FLAGS (~0u << 27) /* all of the above */ | |
2889caa9 CW |
39 | #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE) |
40 | ||
41 | #define __EXEC_HAS_RELOC BIT(31) | |
42 | #define __EXEC_VALIDATED BIT(30) | |
74c1c694 | 43 | #define __EXEC_INTERNAL_FLAGS (~0u << 30) |
2889caa9 | 44 | #define UPDATE PIN_OFFSET_FIXED |
d23db88c CW |
45 | |
46 | #define BATCH_OFFSET_BIAS (256*1024) | |
a415d355 | 47 | |
650bc635 | 48 | #define __I915_EXEC_ILLEGAL_FLAGS \ |
08e3e21a LDM |
49 | (__I915_EXEC_UNKNOWN_FLAGS | \ |
50 | I915_EXEC_CONSTANTS_MASK | \ | |
51 | I915_EXEC_RESOURCE_STREAMER) | |
5b043f4e | 52 | |
d20ac620 CW |
53 | /* Catch emission of unexpected errors for CI! */ |
54 | #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) | |
55 | #undef EINVAL | |
56 | #define EINVAL ({ \ | |
57 | DRM_DEBUG_DRIVER("EINVAL at %s:%d\n", __func__, __LINE__); \ | |
58 | 22; \ | |
59 | }) | |
60 | #endif | |
61 | ||
2889caa9 CW |
62 | /** |
63 | * DOC: User command execution | |
64 | * | |
65 | * Userspace submits commands to be executed on the GPU as an instruction | |
66 | * stream within a GEM object we call a batchbuffer. This instructions may | |
67 | * refer to other GEM objects containing auxiliary state such as kernels, | |
68 | * samplers, render targets and even secondary batchbuffers. Userspace does | |
69 | * not know where in the GPU memory these objects reside and so before the | |
70 | * batchbuffer is passed to the GPU for execution, those addresses in the | |
71 | * batchbuffer and auxiliary objects are updated. This is known as relocation, | |
72 | * or patching. To try and avoid having to relocate each object on the next | |
73 | * execution, userspace is told the location of those objects in this pass, | |
74 | * but this remains just a hint as the kernel may choose a new location for | |
75 | * any object in the future. | |
76 | * | |
99d7e4ee KR |
77 | * At the level of talking to the hardware, submitting a batchbuffer for the |
78 | * GPU to execute is to add content to a buffer from which the HW | |
79 | * command streamer is reading. | |
80 | * | |
81 | * 1. Add a command to load the HW context. For Logical Ring Contexts, i.e. | |
82 | * Execlists, this command is not placed on the same buffer as the | |
83 | * remaining items. | |
84 | * | |
85 | * 2. Add a command to invalidate caches to the buffer. | |
86 | * | |
87 | * 3. Add a batchbuffer start command to the buffer; the start command is | |
88 | * essentially a token together with the GPU address of the batchbuffer | |
89 | * to be executed. | |
90 | * | |
91 | * 4. Add a pipeline flush to the buffer. | |
92 | * | |
93 | * 5. Add a memory write command to the buffer to record when the GPU | |
94 | * is done executing the batchbuffer. The memory write writes the | |
95 | * global sequence number of the request, ``i915_request::global_seqno``; | |
96 | * the i915 driver uses the current value in the register to determine | |
97 | * if the GPU has completed the batchbuffer. | |
98 | * | |
99 | * 6. Add a user interrupt command to the buffer. This command instructs | |
100 | * the GPU to issue an interrupt when the command, pipeline flush and | |
101 | * memory write are completed. | |
102 | * | |
103 | * 7. Inform the hardware of the additional commands added to the buffer | |
104 | * (by updating the tail pointer). | |
105 | * | |
2889caa9 CW |
106 | * Processing an execbuf ioctl is conceptually split up into a few phases. |
107 | * | |
108 | * 1. Validation - Ensure all the pointers, handles and flags are valid. | |
109 | * 2. Reservation - Assign GPU address space for every object | |
110 | * 3. Relocation - Update any addresses to point to the final locations | |
111 | * 4. Serialisation - Order the request with respect to its dependencies | |
112 | * 5. Construction - Construct a request to execute the batchbuffer | |
113 | * 6. Submission (at some point in the future execution) | |
114 | * | |
115 | * Reserving resources for the execbuf is the most complicated phase. We | |
116 | * neither want to have to migrate the object in the address space, nor do | |
117 | * we want to have to update any relocations pointing to this object. Ideally, | |
118 | * we want to leave the object where it is and for all the existing relocations | |
119 | * to match. If the object is given a new address, or if userspace thinks the | |
120 | * object is elsewhere, we have to parse all the relocation entries and update | |
121 | * the addresses. Userspace can set the I915_EXEC_NORELOC flag to hint that | |
122 | * all the target addresses in all of its objects match the value in the | |
123 | * relocation entries and that they all match the presumed offsets given by the | |
124 | * list of execbuffer objects. Using this knowledge, we know that if we haven't | |
125 | * moved any buffers, all the relocation entries are valid and we can skip | |
126 | * the update. (If userspace is wrong, the likely outcome is an impromptu GPU | |
127 | * hang.) The requirement for using I915_EXEC_NO_RELOC are: | |
128 | * | |
129 | * The addresses written in the objects must match the corresponding | |
130 | * reloc.presumed_offset which in turn must match the corresponding | |
131 | * execobject.offset. | |
132 | * | |
133 | * Any render targets written to in the batch must be flagged with | |
134 | * EXEC_OBJECT_WRITE. | |
135 | * | |
136 | * To avoid stalling, execobject.offset should match the current | |
137 | * address of that object within the active context. | |
138 | * | |
139 | * The reservation is done is multiple phases. First we try and keep any | |
140 | * object already bound in its current location - so as long as meets the | |
141 | * constraints imposed by the new execbuffer. Any object left unbound after the | |
142 | * first pass is then fitted into any available idle space. If an object does | |
143 | * not fit, all objects are removed from the reservation and the process rerun | |
144 | * after sorting the objects into a priority order (more difficult to fit | |
145 | * objects are tried first). Failing that, the entire VM is cleared and we try | |
146 | * to fit the execbuf once last time before concluding that it simply will not | |
147 | * fit. | |
148 | * | |
149 | * A small complication to all of this is that we allow userspace not only to | |
150 | * specify an alignment and a size for the object in the address space, but | |
151 | * we also allow userspace to specify the exact offset. This objects are | |
152 | * simpler to place (the location is known a priori) all we have to do is make | |
153 | * sure the space is available. | |
154 | * | |
155 | * Once all the objects are in place, patching up the buried pointers to point | |
156 | * to the final locations is a fairly simple job of walking over the relocation | |
157 | * entry arrays, looking up the right address and rewriting the value into | |
158 | * the object. Simple! ... The relocation entries are stored in user memory | |
159 | * and so to access them we have to copy them into a local buffer. That copy | |
160 | * has to avoid taking any pagefaults as they may lead back to a GEM object | |
161 | * requiring the struct_mutex (i.e. recursive deadlock). So once again we split | |
162 | * the relocation into multiple passes. First we try to do everything within an | |
163 | * atomic context (avoid the pagefaults) which requires that we never wait. If | |
164 | * we detect that we may wait, or if we need to fault, then we have to fallback | |
165 | * to a slower path. The slowpath has to drop the mutex. (Can you hear alarm | |
166 | * bells yet?) Dropping the mutex means that we lose all the state we have | |
167 | * built up so far for the execbuf and we must reset any global data. However, | |
168 | * we do leave the objects pinned in their final locations - which is a | |
169 | * potential issue for concurrent execbufs. Once we have left the mutex, we can | |
170 | * allocate and copy all the relocation entries into a large array at our | |
171 | * leisure, reacquire the mutex, reclaim all the objects and other state and | |
172 | * then proceed to update any incorrect addresses with the objects. | |
173 | * | |
174 | * As we process the relocation entries, we maintain a record of whether the | |
175 | * object is being written to. Using NORELOC, we expect userspace to provide | |
176 | * this information instead. We also check whether we can skip the relocation | |
177 | * by comparing the expected value inside the relocation entry with the target's | |
178 | * final address. If they differ, we have to map the current object and rewrite | |
179 | * the 4 or 8 byte pointer within. | |
180 | * | |
181 | * Serialising an execbuf is quite simple according to the rules of the GEM | |
182 | * ABI. Execution within each context is ordered by the order of submission. | |
183 | * Writes to any GEM object are in order of submission and are exclusive. Reads | |
184 | * from a GEM object are unordered with respect to other reads, but ordered by | |
185 | * writes. A write submitted after a read cannot occur before the read, and | |
186 | * similarly any read submitted after a write cannot occur before the write. | |
187 | * Writes are ordered between engines such that only one write occurs at any | |
188 | * time (completing any reads beforehand) - using semaphores where available | |
189 | * and CPU serialisation otherwise. Other GEM access obey the same rules, any | |
190 | * write (either via mmaps using set-domain, or via pwrite) must flush all GPU | |
191 | * reads before starting, and any read (either using set-domain or pread) must | |
192 | * flush all GPU writes before starting. (Note we only employ a barrier before, | |
193 | * we currently rely on userspace not concurrently starting a new execution | |
194 | * whilst reading or writing to an object. This may be an advantage or not | |
195 | * depending on how much you trust userspace not to shoot themselves in the | |
196 | * foot.) Serialisation may just result in the request being inserted into | |
197 | * a DAG awaiting its turn, but most simple is to wait on the CPU until | |
198 | * all dependencies are resolved. | |
199 | * | |
200 | * After all of that, is just a matter of closing the request and handing it to | |
201 | * the hardware (well, leaving it in a queue to be executed). However, we also | |
202 | * offer the ability for batchbuffers to be run with elevated privileges so | |
203 | * that they access otherwise hidden registers. (Used to adjust L3 cache etc.) | |
204 | * Before any batch is given extra privileges we first must check that it | |
205 | * contains no nefarious instructions, we check that each instruction is from | |
206 | * our whitelist and all registers are also from an allowed list. We first | |
207 | * copy the user's batchbuffer to a shadow (so that the user doesn't have | |
208 | * access to it, either by the CPU or GPU as we scan it) and then parse each | |
209 | * instruction. If everything is ok, we set a flag telling the hardware to run | |
210 | * the batchbuffer in trusted mode, otherwise the ioctl is rejected. | |
211 | */ | |
212 | ||
650bc635 | 213 | struct i915_execbuffer { |
2889caa9 CW |
214 | struct drm_i915_private *i915; /** i915 backpointer */ |
215 | struct drm_file *file; /** per-file lookup tables and limits */ | |
216 | struct drm_i915_gem_execbuffer2 *args; /** ioctl parameters */ | |
217 | struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */ | |
c7c6e46f CW |
218 | struct i915_vma **vma; |
219 | unsigned int *flags; | |
2889caa9 CW |
220 | |
221 | struct intel_engine_cs *engine; /** engine to queue the request to */ | |
8f2a1057 CW |
222 | struct intel_context *context; /* logical state for the request */ |
223 | struct i915_gem_context *gem_context; /** caller's context */ | |
2889caa9 CW |
224 | struct i915_address_space *vm; /** GTT and vma for the request */ |
225 | ||
e61e0f51 | 226 | struct i915_request *request; /** our request to build */ |
2889caa9 CW |
227 | struct i915_vma *batch; /** identity of the batch obj/vma */ |
228 | ||
229 | /** actual size of execobj[] as we may extend it for the cmdparser */ | |
230 | unsigned int buffer_count; | |
231 | ||
232 | /** list of vma not yet bound during reservation phase */ | |
233 | struct list_head unbound; | |
234 | ||
235 | /** list of vma that have execobj.relocation_count */ | |
236 | struct list_head relocs; | |
237 | ||
238 | /** | |
239 | * Track the most recently used object for relocations, as we | |
240 | * frequently have to perform multiple relocations within the same | |
241 | * obj/page | |
242 | */ | |
650bc635 | 243 | struct reloc_cache { |
2889caa9 CW |
244 | struct drm_mm_node node; /** temporary GTT binding */ |
245 | unsigned long vaddr; /** Current kmap address */ | |
246 | unsigned long page; /** Currently mapped page index */ | |
7dd4f672 | 247 | unsigned int gen; /** Cached value of INTEL_GEN */ |
650bc635 | 248 | bool use_64bit_reloc : 1; |
2889caa9 CW |
249 | bool has_llc : 1; |
250 | bool has_fence : 1; | |
251 | bool needs_unfenced : 1; | |
7dd4f672 | 252 | |
e61e0f51 | 253 | struct i915_request *rq; |
7dd4f672 CW |
254 | u32 *rq_cmd; |
255 | unsigned int rq_size; | |
650bc635 | 256 | } reloc_cache; |
2889caa9 CW |
257 | |
258 | u64 invalid_flags; /** Set of execobj.flags that are invalid */ | |
259 | u32 context_flags; /** Set of execobj.flags to insert from the ctx */ | |
260 | ||
261 | u32 batch_start_offset; /** Location within object of batch */ | |
262 | u32 batch_len; /** Length of batch within object */ | |
263 | u32 batch_flags; /** Flags composed for emit_bb_start() */ | |
264 | ||
265 | /** | |
266 | * Indicate either the size of the hastable used to resolve | |
267 | * relocation handles, or if negative that we are using a direct | |
268 | * index into the execobj[]. | |
269 | */ | |
270 | int lut_size; | |
271 | struct hlist_head *buckets; /** ht for relocation handles */ | |
67731b87 CW |
272 | }; |
273 | ||
c7c6e46f | 274 | #define exec_entry(EB, VMA) (&(EB)->exec[(VMA)->exec_flags - (EB)->flags]) |
4ff4b44c | 275 | |
2889caa9 CW |
276 | /* |
277 | * Used to convert any address to canonical form. | |
278 | * Starting from gen8, some commands (e.g. STATE_BASE_ADDRESS, | |
279 | * MI_LOAD_REGISTER_MEM and others, see Broadwell PRM Vol2a) require the | |
280 | * addresses to be in a canonical form: | |
281 | * "GraphicsAddress[63:48] are ignored by the HW and assumed to be in correct | |
282 | * canonical form [63:48] == [47]." | |
283 | */ | |
284 | #define GEN8_HIGH_ADDRESS_BIT 47 | |
285 | static inline u64 gen8_canonical_addr(u64 address) | |
286 | { | |
287 | return sign_extend64(address, GEN8_HIGH_ADDRESS_BIT); | |
288 | } | |
289 | ||
290 | static inline u64 gen8_noncanonical_addr(u64 address) | |
291 | { | |
292 | return address & GENMASK_ULL(GEN8_HIGH_ADDRESS_BIT, 0); | |
293 | } | |
294 | ||
3dbf26ed CW |
295 | static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb) |
296 | { | |
439e2ee4 | 297 | return intel_engine_needs_cmd_parser(eb->engine) && eb->batch_len; |
3dbf26ed CW |
298 | } |
299 | ||
650bc635 | 300 | static int eb_create(struct i915_execbuffer *eb) |
67731b87 | 301 | { |
2889caa9 CW |
302 | if (!(eb->args->flags & I915_EXEC_HANDLE_LUT)) { |
303 | unsigned int size = 1 + ilog2(eb->buffer_count); | |
4ff4b44c | 304 | |
2889caa9 CW |
305 | /* |
306 | * Without a 1:1 association between relocation handles and | |
307 | * the execobject[] index, we instead create a hashtable. | |
308 | * We size it dynamically based on available memory, starting | |
309 | * first with 1:1 assocative hash and scaling back until | |
310 | * the allocation succeeds. | |
311 | * | |
312 | * Later on we use a positive lut_size to indicate we are | |
313 | * using this hashtable, and a negative value to indicate a | |
314 | * direct lookup. | |
315 | */ | |
4ff4b44c | 316 | do { |
0d95c883 | 317 | gfp_t flags; |
4d470f73 CW |
318 | |
319 | /* While we can still reduce the allocation size, don't | |
320 | * raise a warning and allow the allocation to fail. | |
321 | * On the last pass though, we want to try as hard | |
322 | * as possible to perform the allocation and warn | |
323 | * if it fails. | |
324 | */ | |
0ee931c4 | 325 | flags = GFP_KERNEL; |
4d470f73 CW |
326 | if (size > 1) |
327 | flags |= __GFP_NORETRY | __GFP_NOWARN; | |
328 | ||
4ff4b44c | 329 | eb->buckets = kzalloc(sizeof(struct hlist_head) << size, |
4d470f73 | 330 | flags); |
4ff4b44c CW |
331 | if (eb->buckets) |
332 | break; | |
333 | } while (--size); | |
334 | ||
4d470f73 CW |
335 | if (unlikely(!size)) |
336 | return -ENOMEM; | |
eef90ccb | 337 | |
2889caa9 | 338 | eb->lut_size = size; |
650bc635 | 339 | } else { |
2889caa9 | 340 | eb->lut_size = -eb->buffer_count; |
650bc635 | 341 | } |
eef90ccb | 342 | |
650bc635 | 343 | return 0; |
67731b87 CW |
344 | } |
345 | ||
2889caa9 CW |
346 | static bool |
347 | eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry, | |
c7c6e46f CW |
348 | const struct i915_vma *vma, |
349 | unsigned int flags) | |
2889caa9 | 350 | { |
2889caa9 CW |
351 | if (vma->node.size < entry->pad_to_size) |
352 | return true; | |
353 | ||
354 | if (entry->alignment && !IS_ALIGNED(vma->node.start, entry->alignment)) | |
355 | return true; | |
356 | ||
c7c6e46f | 357 | if (flags & EXEC_OBJECT_PINNED && |
2889caa9 CW |
358 | vma->node.start != entry->offset) |
359 | return true; | |
360 | ||
c7c6e46f | 361 | if (flags & __EXEC_OBJECT_NEEDS_BIAS && |
2889caa9 CW |
362 | vma->node.start < BATCH_OFFSET_BIAS) |
363 | return true; | |
364 | ||
c7c6e46f | 365 | if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) && |
2889caa9 CW |
366 | (vma->node.start + vma->node.size - 1) >> 32) |
367 | return true; | |
368 | ||
1d033beb CW |
369 | if (flags & __EXEC_OBJECT_NEEDS_MAP && |
370 | !i915_vma_is_map_and_fenceable(vma)) | |
371 | return true; | |
372 | ||
2889caa9 CW |
373 | return false; |
374 | } | |
375 | ||
c7c6e46f | 376 | static inline bool |
2889caa9 | 377 | eb_pin_vma(struct i915_execbuffer *eb, |
c7c6e46f | 378 | const struct drm_i915_gem_exec_object2 *entry, |
2889caa9 CW |
379 | struct i915_vma *vma) |
380 | { | |
c7c6e46f CW |
381 | unsigned int exec_flags = *vma->exec_flags; |
382 | u64 pin_flags; | |
2889caa9 | 383 | |
616d9cee | 384 | if (vma->node.size) |
c7c6e46f | 385 | pin_flags = vma->node.start; |
616d9cee | 386 | else |
c7c6e46f | 387 | pin_flags = entry->offset & PIN_OFFSET_MASK; |
616d9cee | 388 | |
c7c6e46f CW |
389 | pin_flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED; |
390 | if (unlikely(exec_flags & EXEC_OBJECT_NEEDS_GTT)) | |
391 | pin_flags |= PIN_GLOBAL; | |
616d9cee | 392 | |
c7c6e46f CW |
393 | if (unlikely(i915_vma_pin(vma, 0, 0, pin_flags))) |
394 | return false; | |
2889caa9 | 395 | |
c7c6e46f | 396 | if (unlikely(exec_flags & EXEC_OBJECT_NEEDS_FENCE)) { |
3bd40735 | 397 | if (unlikely(i915_vma_pin_fence(vma))) { |
2889caa9 | 398 | i915_vma_unpin(vma); |
c7c6e46f | 399 | return false; |
2889caa9 CW |
400 | } |
401 | ||
3bd40735 | 402 | if (vma->fence) |
c7c6e46f | 403 | exec_flags |= __EXEC_OBJECT_HAS_FENCE; |
2889caa9 CW |
404 | } |
405 | ||
c7c6e46f CW |
406 | *vma->exec_flags = exec_flags | __EXEC_OBJECT_HAS_PIN; |
407 | return !eb_vma_misplaced(entry, vma, exec_flags); | |
2889caa9 CW |
408 | } |
409 | ||
c7c6e46f | 410 | static inline void __eb_unreserve_vma(struct i915_vma *vma, unsigned int flags) |
d55495b4 | 411 | { |
c7c6e46f | 412 | GEM_BUG_ON(!(flags & __EXEC_OBJECT_HAS_PIN)); |
2889caa9 | 413 | |
c7c6e46f | 414 | if (unlikely(flags & __EXEC_OBJECT_HAS_FENCE)) |
3bd40735 | 415 | __i915_vma_unpin_fence(vma); |
d55495b4 | 416 | |
2889caa9 | 417 | __i915_vma_unpin(vma); |
d55495b4 CW |
418 | } |
419 | ||
2889caa9 | 420 | static inline void |
c7c6e46f | 421 | eb_unreserve_vma(struct i915_vma *vma, unsigned int *flags) |
d55495b4 | 422 | { |
c7c6e46f | 423 | if (!(*flags & __EXEC_OBJECT_HAS_PIN)) |
2889caa9 | 424 | return; |
d55495b4 | 425 | |
c7c6e46f CW |
426 | __eb_unreserve_vma(vma, *flags); |
427 | *flags &= ~__EXEC_OBJECT_RESERVED; | |
d55495b4 CW |
428 | } |
429 | ||
2889caa9 CW |
430 | static int |
431 | eb_validate_vma(struct i915_execbuffer *eb, | |
432 | struct drm_i915_gem_exec_object2 *entry, | |
433 | struct i915_vma *vma) | |
67731b87 | 434 | { |
2889caa9 CW |
435 | if (unlikely(entry->flags & eb->invalid_flags)) |
436 | return -EINVAL; | |
d55495b4 | 437 | |
2889caa9 CW |
438 | if (unlikely(entry->alignment && !is_power_of_2(entry->alignment))) |
439 | return -EINVAL; | |
440 | ||
441 | /* | |
442 | * Offset can be used as input (EXEC_OBJECT_PINNED), reject | |
443 | * any non-page-aligned or non-canonical addresses. | |
444 | */ | |
445 | if (unlikely(entry->flags & EXEC_OBJECT_PINNED && | |
6fc4e48f | 446 | entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK))) |
2889caa9 CW |
447 | return -EINVAL; |
448 | ||
449 | /* pad_to_size was once a reserved field, so sanitize it */ | |
450 | if (entry->flags & EXEC_OBJECT_PAD_TO_SIZE) { | |
451 | if (unlikely(offset_in_page(entry->pad_to_size))) | |
452 | return -EINVAL; | |
453 | } else { | |
454 | entry->pad_to_size = 0; | |
d55495b4 CW |
455 | } |
456 | ||
c7c6e46f | 457 | if (unlikely(vma->exec_flags)) { |
2889caa9 CW |
458 | DRM_DEBUG("Object [handle %d, index %d] appears more than once in object list\n", |
459 | entry->handle, (int)(entry - eb->exec)); | |
460 | return -EINVAL; | |
461 | } | |
462 | ||
463 | /* | |
464 | * From drm_mm perspective address space is continuous, | |
465 | * so from this point we're always using non-canonical | |
466 | * form internally. | |
467 | */ | |
468 | entry->offset = gen8_noncanonical_addr(entry->offset); | |
469 | ||
c7c6e46f CW |
470 | if (!eb->reloc_cache.has_fence) { |
471 | entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE; | |
472 | } else { | |
473 | if ((entry->flags & EXEC_OBJECT_NEEDS_FENCE || | |
474 | eb->reloc_cache.needs_unfenced) && | |
475 | i915_gem_object_is_tiled(vma->obj)) | |
476 | entry->flags |= EXEC_OBJECT_NEEDS_GTT | __EXEC_OBJECT_NEEDS_MAP; | |
477 | } | |
478 | ||
479 | if (!(entry->flags & EXEC_OBJECT_PINNED)) | |
480 | entry->flags |= eb->context_flags; | |
481 | ||
2889caa9 | 482 | return 0; |
67731b87 CW |
483 | } |
484 | ||
2889caa9 | 485 | static int |
746c8f14 CW |
486 | eb_add_vma(struct i915_execbuffer *eb, |
487 | unsigned int i, unsigned batch_idx, | |
488 | struct i915_vma *vma) | |
59bfa124 | 489 | { |
c7c6e46f | 490 | struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; |
2889caa9 CW |
491 | int err; |
492 | ||
493 | GEM_BUG_ON(i915_vma_is_closed(vma)); | |
494 | ||
495 | if (!(eb->args->flags & __EXEC_VALIDATED)) { | |
496 | err = eb_validate_vma(eb, entry, vma); | |
497 | if (unlikely(err)) | |
498 | return err; | |
4ff4b44c | 499 | } |
4ff4b44c | 500 | |
4d470f73 | 501 | if (eb->lut_size > 0) { |
2889caa9 | 502 | vma->exec_handle = entry->handle; |
4ff4b44c | 503 | hlist_add_head(&vma->exec_node, |
2889caa9 CW |
504 | &eb->buckets[hash_32(entry->handle, |
505 | eb->lut_size)]); | |
4ff4b44c | 506 | } |
59bfa124 | 507 | |
2889caa9 CW |
508 | if (entry->relocation_count) |
509 | list_add_tail(&vma->reloc_link, &eb->relocs); | |
510 | ||
2889caa9 CW |
511 | /* |
512 | * Stash a pointer from the vma to execobj, so we can query its flags, | |
513 | * size, alignment etc as provided by the user. Also we stash a pointer | |
514 | * to the vma inside the execobj so that we can use a direct lookup | |
515 | * to find the right target VMA when doing relocations. | |
516 | */ | |
c7c6e46f | 517 | eb->vma[i] = vma; |
d1b48c1e | 518 | eb->flags[i] = entry->flags; |
c7c6e46f | 519 | vma->exec_flags = &eb->flags[i]; |
2889caa9 | 520 | |
746c8f14 CW |
521 | /* |
522 | * SNA is doing fancy tricks with compressing batch buffers, which leads | |
523 | * to negative relocation deltas. Usually that works out ok since the | |
524 | * relocate address is still positive, except when the batch is placed | |
525 | * very low in the GTT. Ensure this doesn't happen. | |
526 | * | |
527 | * Note that actual hangs have only been observed on gen7, but for | |
528 | * paranoia do it everywhere. | |
529 | */ | |
530 | if (i == batch_idx) { | |
827db9d8 CW |
531 | if (entry->relocation_count && |
532 | !(eb->flags[i] & EXEC_OBJECT_PINNED)) | |
746c8f14 CW |
533 | eb->flags[i] |= __EXEC_OBJECT_NEEDS_BIAS; |
534 | if (eb->reloc_cache.has_fence) | |
535 | eb->flags[i] |= EXEC_OBJECT_NEEDS_FENCE; | |
536 | ||
537 | eb->batch = vma; | |
538 | } | |
539 | ||
2889caa9 | 540 | err = 0; |
c7c6e46f | 541 | if (eb_pin_vma(eb, entry, vma)) { |
2889caa9 CW |
542 | if (entry->offset != vma->node.start) { |
543 | entry->offset = vma->node.start | UPDATE; | |
544 | eb->args->flags |= __EXEC_HAS_RELOC; | |
545 | } | |
c7c6e46f CW |
546 | } else { |
547 | eb_unreserve_vma(vma, vma->exec_flags); | |
548 | ||
549 | list_add_tail(&vma->exec_link, &eb->unbound); | |
550 | if (drm_mm_node_allocated(&vma->node)) | |
551 | err = i915_vma_unbind(vma); | |
ed2f3532 CW |
552 | if (unlikely(err)) |
553 | vma->exec_flags = NULL; | |
2889caa9 CW |
554 | } |
555 | return err; | |
556 | } | |
557 | ||
558 | static inline int use_cpu_reloc(const struct reloc_cache *cache, | |
559 | const struct drm_i915_gem_object *obj) | |
560 | { | |
561 | if (!i915_gem_object_has_struct_page(obj)) | |
562 | return false; | |
563 | ||
7dd4f672 CW |
564 | if (DBG_FORCE_RELOC == FORCE_CPU_RELOC) |
565 | return true; | |
566 | ||
567 | if (DBG_FORCE_RELOC == FORCE_GTT_RELOC) | |
568 | return false; | |
2889caa9 CW |
569 | |
570 | return (cache->has_llc || | |
571 | obj->cache_dirty || | |
572 | obj->cache_level != I915_CACHE_NONE); | |
573 | } | |
574 | ||
575 | static int eb_reserve_vma(const struct i915_execbuffer *eb, | |
576 | struct i915_vma *vma) | |
577 | { | |
c7c6e46f CW |
578 | struct drm_i915_gem_exec_object2 *entry = exec_entry(eb, vma); |
579 | unsigned int exec_flags = *vma->exec_flags; | |
580 | u64 pin_flags; | |
2889caa9 CW |
581 | int err; |
582 | ||
c7c6e46f CW |
583 | pin_flags = PIN_USER | PIN_NONBLOCK; |
584 | if (exec_flags & EXEC_OBJECT_NEEDS_GTT) | |
585 | pin_flags |= PIN_GLOBAL; | |
2889caa9 CW |
586 | |
587 | /* | |
588 | * Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset, | |
589 | * limit address to the first 4GBs for unflagged objects. | |
590 | */ | |
c7c6e46f CW |
591 | if (!(exec_flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) |
592 | pin_flags |= PIN_ZONE_4G; | |
2889caa9 | 593 | |
c7c6e46f CW |
594 | if (exec_flags & __EXEC_OBJECT_NEEDS_MAP) |
595 | pin_flags |= PIN_MAPPABLE; | |
2889caa9 | 596 | |
c7c6e46f CW |
597 | if (exec_flags & EXEC_OBJECT_PINNED) { |
598 | pin_flags |= entry->offset | PIN_OFFSET_FIXED; | |
599 | pin_flags &= ~PIN_NONBLOCK; /* force overlapping checks */ | |
600 | } else if (exec_flags & __EXEC_OBJECT_NEEDS_BIAS) { | |
601 | pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS; | |
2889caa9 CW |
602 | } |
603 | ||
c7c6e46f CW |
604 | err = i915_vma_pin(vma, |
605 | entry->pad_to_size, entry->alignment, | |
606 | pin_flags); | |
2889caa9 CW |
607 | if (err) |
608 | return err; | |
609 | ||
610 | if (entry->offset != vma->node.start) { | |
611 | entry->offset = vma->node.start | UPDATE; | |
612 | eb->args->flags |= __EXEC_HAS_RELOC; | |
613 | } | |
614 | ||
c7c6e46f | 615 | if (unlikely(exec_flags & EXEC_OBJECT_NEEDS_FENCE)) { |
3bd40735 | 616 | err = i915_vma_pin_fence(vma); |
2889caa9 CW |
617 | if (unlikely(err)) { |
618 | i915_vma_unpin(vma); | |
619 | return err; | |
620 | } | |
621 | ||
3bd40735 | 622 | if (vma->fence) |
c7c6e46f | 623 | exec_flags |= __EXEC_OBJECT_HAS_FENCE; |
2889caa9 CW |
624 | } |
625 | ||
c7c6e46f CW |
626 | *vma->exec_flags = exec_flags | __EXEC_OBJECT_HAS_PIN; |
627 | GEM_BUG_ON(eb_vma_misplaced(entry, vma, exec_flags)); | |
1da7b54c | 628 | |
2889caa9 CW |
629 | return 0; |
630 | } | |
631 | ||
632 | static int eb_reserve(struct i915_execbuffer *eb) | |
633 | { | |
634 | const unsigned int count = eb->buffer_count; | |
635 | struct list_head last; | |
636 | struct i915_vma *vma; | |
637 | unsigned int i, pass; | |
638 | int err; | |
639 | ||
640 | /* | |
641 | * Attempt to pin all of the buffers into the GTT. | |
642 | * This is done in 3 phases: | |
643 | * | |
644 | * 1a. Unbind all objects that do not match the GTT constraints for | |
645 | * the execbuffer (fenceable, mappable, alignment etc). | |
646 | * 1b. Increment pin count for already bound objects. | |
647 | * 2. Bind new objects. | |
648 | * 3. Decrement pin count. | |
649 | * | |
650 | * This avoid unnecessary unbinding of later objects in order to make | |
651 | * room for the earlier objects *unless* we need to defragment. | |
652 | */ | |
653 | ||
654 | pass = 0; | |
655 | err = 0; | |
656 | do { | |
657 | list_for_each_entry(vma, &eb->unbound, exec_link) { | |
658 | err = eb_reserve_vma(eb, vma); | |
659 | if (err) | |
660 | break; | |
661 | } | |
662 | if (err != -ENOSPC) | |
663 | return err; | |
664 | ||
665 | /* Resort *all* the objects into priority order */ | |
666 | INIT_LIST_HEAD(&eb->unbound); | |
667 | INIT_LIST_HEAD(&last); | |
668 | for (i = 0; i < count; i++) { | |
c7c6e46f CW |
669 | unsigned int flags = eb->flags[i]; |
670 | struct i915_vma *vma = eb->vma[i]; | |
2889caa9 | 671 | |
c7c6e46f CW |
672 | if (flags & EXEC_OBJECT_PINNED && |
673 | flags & __EXEC_OBJECT_HAS_PIN) | |
2889caa9 CW |
674 | continue; |
675 | ||
c7c6e46f | 676 | eb_unreserve_vma(vma, &eb->flags[i]); |
2889caa9 | 677 | |
c7c6e46f | 678 | if (flags & EXEC_OBJECT_PINNED) |
35e882a4 | 679 | /* Pinned must have their slot */ |
2889caa9 | 680 | list_add(&vma->exec_link, &eb->unbound); |
c7c6e46f | 681 | else if (flags & __EXEC_OBJECT_NEEDS_MAP) |
35e882a4 | 682 | /* Map require the lowest 256MiB (aperture) */ |
2889caa9 | 683 | list_add_tail(&vma->exec_link, &eb->unbound); |
35e882a4 CW |
684 | else if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) |
685 | /* Prioritise 4GiB region for restricted bo */ | |
686 | list_add(&vma->exec_link, &last); | |
2889caa9 CW |
687 | else |
688 | list_add_tail(&vma->exec_link, &last); | |
689 | } | |
690 | list_splice_tail(&last, &eb->unbound); | |
691 | ||
692 | switch (pass++) { | |
693 | case 0: | |
694 | break; | |
695 | ||
696 | case 1: | |
697 | /* Too fragmented, unbind everything and retry */ | |
698 | err = i915_gem_evict_vm(eb->vm); | |
699 | if (err) | |
700 | return err; | |
701 | break; | |
702 | ||
703 | default: | |
704 | return -ENOSPC; | |
705 | } | |
706 | } while (1); | |
4ff4b44c | 707 | } |
59bfa124 | 708 | |
2889caa9 CW |
709 | static unsigned int eb_batch_index(const struct i915_execbuffer *eb) |
710 | { | |
1a71cf2f CW |
711 | if (eb->args->flags & I915_EXEC_BATCH_FIRST) |
712 | return 0; | |
713 | else | |
714 | return eb->buffer_count - 1; | |
2889caa9 CW |
715 | } |
716 | ||
717 | static int eb_select_context(struct i915_execbuffer *eb) | |
718 | { | |
719 | struct i915_gem_context *ctx; | |
720 | ||
721 | ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1); | |
1acfc104 CW |
722 | if (unlikely(!ctx)) |
723 | return -ENOENT; | |
2889caa9 | 724 | |
8f2a1057 | 725 | eb->gem_context = ctx; |
4f2c7337 CW |
726 | if (ctx->ppgtt) { |
727 | eb->vm = &ctx->ppgtt->vm; | |
728 | eb->invalid_flags |= EXEC_OBJECT_NEEDS_GTT; | |
729 | } else { | |
730 | eb->vm = &eb->i915->ggtt.vm; | |
731 | } | |
2889caa9 CW |
732 | |
733 | eb->context_flags = 0; | |
d3f3e5e4 | 734 | if (test_bit(UCONTEXT_NO_ZEROMAP, &ctx->user_flags)) |
2889caa9 CW |
735 | eb->context_flags |= __EXEC_OBJECT_NEEDS_BIAS; |
736 | ||
737 | return 0; | |
738 | } | |
739 | ||
d6f328bf CW |
740 | static struct i915_request *__eb_wait_for_ring(struct intel_ring *ring) |
741 | { | |
742 | struct i915_request *rq; | |
743 | ||
744 | /* | |
745 | * Completely unscientific finger-in-the-air estimates for suitable | |
746 | * maximum user request size (to avoid blocking) and then backoff. | |
747 | */ | |
748 | if (intel_ring_update_space(ring) >= PAGE_SIZE) | |
749 | return NULL; | |
750 | ||
751 | /* | |
752 | * Find a request that after waiting upon, there will be at least half | |
753 | * the ring available. The hysteresis allows us to compete for the | |
754 | * shared ring and should mean that we sleep less often prior to | |
755 | * claiming our resources, but not so long that the ring completely | |
756 | * drains before we can submit our next request. | |
757 | */ | |
758 | list_for_each_entry(rq, &ring->request_list, ring_link) { | |
759 | if (__intel_ring_space(rq->postfix, | |
760 | ring->emit, ring->size) > ring->size / 2) | |
761 | break; | |
762 | } | |
763 | if (&rq->ring_link == &ring->request_list) | |
764 | return NULL; /* weird, we will check again later for real */ | |
765 | ||
766 | return i915_request_get(rq); | |
767 | } | |
768 | ||
769 | static int eb_wait_for_ring(const struct i915_execbuffer *eb) | |
770 | { | |
d6f328bf CW |
771 | struct i915_request *rq; |
772 | int ret = 0; | |
773 | ||
774 | /* | |
775 | * Apply a light amount of backpressure to prevent excessive hogs | |
776 | * from blocking waiting for space whilst holding struct_mutex and | |
777 | * keeping all of their resources pinned. | |
778 | */ | |
779 | ||
8f2a1057 | 780 | rq = __eb_wait_for_ring(eb->context->ring); |
d6f328bf CW |
781 | if (rq) { |
782 | mutex_unlock(&eb->i915->drm.struct_mutex); | |
783 | ||
784 | if (i915_request_wait(rq, | |
785 | I915_WAIT_INTERRUPTIBLE, | |
786 | MAX_SCHEDULE_TIMEOUT) < 0) | |
787 | ret = -EINTR; | |
788 | ||
789 | i915_request_put(rq); | |
790 | ||
791 | mutex_lock(&eb->i915->drm.struct_mutex); | |
792 | } | |
793 | ||
794 | return ret; | |
795 | } | |
796 | ||
2889caa9 | 797 | static int eb_lookup_vmas(struct i915_execbuffer *eb) |
3b96eff4 | 798 | { |
8f2a1057 | 799 | struct radix_tree_root *handles_vma = &eb->gem_context->handles_vma; |
ac70ebe8 | 800 | struct drm_i915_gem_object *obj; |
746c8f14 | 801 | unsigned int i, batch; |
2889caa9 | 802 | int err; |
3b96eff4 | 803 | |
8f2a1057 | 804 | if (unlikely(i915_gem_context_is_closed(eb->gem_context))) |
8bcbfb12 CW |
805 | return -ENOENT; |
806 | ||
8f2a1057 | 807 | if (unlikely(i915_gem_context_is_banned(eb->gem_context))) |
8bcbfb12 CW |
808 | return -EIO; |
809 | ||
2889caa9 CW |
810 | INIT_LIST_HEAD(&eb->relocs); |
811 | INIT_LIST_HEAD(&eb->unbound); | |
d55495b4 | 812 | |
746c8f14 CW |
813 | batch = eb_batch_index(eb); |
814 | ||
170fa29b CW |
815 | for (i = 0; i < eb->buffer_count; i++) { |
816 | u32 handle = eb->exec[i].handle; | |
d1b48c1e | 817 | struct i915_lut_handle *lut; |
170fa29b | 818 | struct i915_vma *vma; |
4ff4b44c | 819 | |
d1b48c1e CW |
820 | vma = radix_tree_lookup(handles_vma, handle); |
821 | if (likely(vma)) | |
170fa29b | 822 | goto add_vma; |
4ff4b44c | 823 | |
170fa29b | 824 | obj = i915_gem_object_lookup(eb->file, handle); |
4ff4b44c | 825 | if (unlikely(!obj)) { |
2889caa9 | 826 | err = -ENOENT; |
170fa29b | 827 | goto err_vma; |
3b96eff4 CW |
828 | } |
829 | ||
650bc635 | 830 | vma = i915_vma_instance(obj, eb->vm, NULL); |
772b5408 | 831 | if (IS_ERR(vma)) { |
2889caa9 | 832 | err = PTR_ERR(vma); |
170fa29b | 833 | goto err_obj; |
27173f1f BW |
834 | } |
835 | ||
13f1bfd3 | 836 | lut = i915_lut_handle_alloc(); |
d1b48c1e CW |
837 | if (unlikely(!lut)) { |
838 | err = -ENOMEM; | |
839 | goto err_obj; | |
840 | } | |
841 | ||
842 | err = radix_tree_insert(handles_vma, handle, vma); | |
843 | if (unlikely(err)) { | |
13f1bfd3 | 844 | i915_lut_handle_free(lut); |
d1b48c1e | 845 | goto err_obj; |
eef90ccb | 846 | } |
4ff4b44c | 847 | |
ac70ebe8 | 848 | /* transfer ref to ctx */ |
3365e226 CW |
849 | if (!vma->open_count++) |
850 | i915_vma_reopen(vma); | |
d1b48c1e | 851 | list_add(&lut->obj_link, &obj->lut_list); |
8f2a1057 CW |
852 | list_add(&lut->ctx_link, &eb->gem_context->handles_list); |
853 | lut->ctx = eb->gem_context; | |
d1b48c1e CW |
854 | lut->handle = handle; |
855 | ||
170fa29b | 856 | add_vma: |
746c8f14 | 857 | err = eb_add_vma(eb, i, batch, vma); |
2889caa9 | 858 | if (unlikely(err)) |
ac70ebe8 | 859 | goto err_vma; |
dade2a61 | 860 | |
c7c6e46f CW |
861 | GEM_BUG_ON(vma != eb->vma[i]); |
862 | GEM_BUG_ON(vma->exec_flags != &eb->flags[i]); | |
746c8f14 CW |
863 | GEM_BUG_ON(drm_mm_node_allocated(&vma->node) && |
864 | eb_vma_misplaced(&eb->exec[i], vma, eb->flags[i])); | |
4ff4b44c CW |
865 | } |
866 | ||
2889caa9 CW |
867 | eb->args->flags |= __EXEC_VALIDATED; |
868 | return eb_reserve(eb); | |
869 | ||
170fa29b | 870 | err_obj: |
ac70ebe8 | 871 | i915_gem_object_put(obj); |
170fa29b CW |
872 | err_vma: |
873 | eb->vma[i] = NULL; | |
2889caa9 | 874 | return err; |
3b96eff4 CW |
875 | } |
876 | ||
4ff4b44c | 877 | static struct i915_vma * |
2889caa9 | 878 | eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle) |
67731b87 | 879 | { |
2889caa9 CW |
880 | if (eb->lut_size < 0) { |
881 | if (handle >= -eb->lut_size) | |
eef90ccb | 882 | return NULL; |
c7c6e46f | 883 | return eb->vma[handle]; |
eef90ccb CW |
884 | } else { |
885 | struct hlist_head *head; | |
aa45950b | 886 | struct i915_vma *vma; |
67731b87 | 887 | |
2889caa9 | 888 | head = &eb->buckets[hash_32(handle, eb->lut_size)]; |
aa45950b | 889 | hlist_for_each_entry(vma, head, exec_node) { |
27173f1f BW |
890 | if (vma->exec_handle == handle) |
891 | return vma; | |
eef90ccb CW |
892 | } |
893 | return NULL; | |
894 | } | |
67731b87 CW |
895 | } |
896 | ||
2889caa9 | 897 | static void eb_release_vmas(const struct i915_execbuffer *eb) |
a415d355 | 898 | { |
2889caa9 CW |
899 | const unsigned int count = eb->buffer_count; |
900 | unsigned int i; | |
901 | ||
902 | for (i = 0; i < count; i++) { | |
c7c6e46f CW |
903 | struct i915_vma *vma = eb->vma[i]; |
904 | unsigned int flags = eb->flags[i]; | |
650bc635 | 905 | |
2889caa9 | 906 | if (!vma) |
170fa29b | 907 | break; |
bcffc3fa | 908 | |
c7c6e46f CW |
909 | GEM_BUG_ON(vma->exec_flags != &eb->flags[i]); |
910 | vma->exec_flags = NULL; | |
911 | eb->vma[i] = NULL; | |
9e53d9be | 912 | |
c7c6e46f CW |
913 | if (flags & __EXEC_OBJECT_HAS_PIN) |
914 | __eb_unreserve_vma(vma, flags); | |
dade2a61 | 915 | |
c7c6e46f | 916 | if (flags & __EXEC_OBJECT_HAS_REF) |
dade2a61 | 917 | i915_vma_put(vma); |
2889caa9 | 918 | } |
dabdfe02 CW |
919 | } |
920 | ||
2889caa9 | 921 | static void eb_reset_vmas(const struct i915_execbuffer *eb) |
934acce3 | 922 | { |
2889caa9 | 923 | eb_release_vmas(eb); |
4d470f73 | 924 | if (eb->lut_size > 0) |
2889caa9 CW |
925 | memset(eb->buckets, 0, |
926 | sizeof(struct hlist_head) << eb->lut_size); | |
934acce3 MW |
927 | } |
928 | ||
2889caa9 | 929 | static void eb_destroy(const struct i915_execbuffer *eb) |
934acce3 | 930 | { |
7dd4f672 CW |
931 | GEM_BUG_ON(eb->reloc_cache.rq); |
932 | ||
4d470f73 | 933 | if (eb->lut_size > 0) |
2889caa9 | 934 | kfree(eb->buckets); |
934acce3 MW |
935 | } |
936 | ||
2889caa9 | 937 | static inline u64 |
d50415cc | 938 | relocation_target(const struct drm_i915_gem_relocation_entry *reloc, |
2889caa9 | 939 | const struct i915_vma *target) |
934acce3 | 940 | { |
2889caa9 | 941 | return gen8_canonical_addr((int)reloc->delta + target->node.start); |
934acce3 MW |
942 | } |
943 | ||
d50415cc CW |
944 | static void reloc_cache_init(struct reloc_cache *cache, |
945 | struct drm_i915_private *i915) | |
5032d871 | 946 | { |
31a39207 | 947 | cache->page = -1; |
d50415cc | 948 | cache->vaddr = 0; |
dfc5148f | 949 | /* Must be a variable in the struct to allow GCC to unroll. */ |
7dd4f672 | 950 | cache->gen = INTEL_GEN(i915); |
2889caa9 | 951 | cache->has_llc = HAS_LLC(i915); |
dfc5148f | 952 | cache->use_64bit_reloc = HAS_64BIT_RELOC(i915); |
7dd4f672 CW |
953 | cache->has_fence = cache->gen < 4; |
954 | cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment; | |
e8cb909a | 955 | cache->node.allocated = false; |
7dd4f672 CW |
956 | cache->rq = NULL; |
957 | cache->rq_size = 0; | |
d50415cc | 958 | } |
5032d871 | 959 | |
d50415cc CW |
960 | static inline void *unmask_page(unsigned long p) |
961 | { | |
962 | return (void *)(uintptr_t)(p & PAGE_MASK); | |
963 | } | |
964 | ||
965 | static inline unsigned int unmask_flags(unsigned long p) | |
966 | { | |
967 | return p & ~PAGE_MASK; | |
31a39207 CW |
968 | } |
969 | ||
d50415cc CW |
970 | #define KMAP 0x4 /* after CLFLUSH_FLAGS */ |
971 | ||
650bc635 CW |
972 | static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache) |
973 | { | |
974 | struct drm_i915_private *i915 = | |
975 | container_of(cache, struct i915_execbuffer, reloc_cache)->i915; | |
976 | return &i915->ggtt; | |
977 | } | |
978 | ||
7dd4f672 CW |
979 | static void reloc_gpu_flush(struct reloc_cache *cache) |
980 | { | |
981 | GEM_BUG_ON(cache->rq_size >= cache->rq->batch->obj->base.size / sizeof(u32)); | |
982 | cache->rq_cmd[cache->rq_size] = MI_BATCH_BUFFER_END; | |
a679f58d CW |
983 | |
984 | __i915_gem_object_flush_map(cache->rq->batch->obj, 0, cache->rq_size); | |
7dd4f672 | 985 | i915_gem_object_unpin_map(cache->rq->batch->obj); |
a679f58d | 986 | |
7dd4f672 CW |
987 | i915_gem_chipset_flush(cache->rq->i915); |
988 | ||
697b9a87 | 989 | i915_request_add(cache->rq); |
7dd4f672 CW |
990 | cache->rq = NULL; |
991 | } | |
992 | ||
650bc635 | 993 | static void reloc_cache_reset(struct reloc_cache *cache) |
31a39207 | 994 | { |
d50415cc | 995 | void *vaddr; |
5032d871 | 996 | |
7dd4f672 CW |
997 | if (cache->rq) |
998 | reloc_gpu_flush(cache); | |
999 | ||
31a39207 CW |
1000 | if (!cache->vaddr) |
1001 | return; | |
3c94ceee | 1002 | |
d50415cc CW |
1003 | vaddr = unmask_page(cache->vaddr); |
1004 | if (cache->vaddr & KMAP) { | |
1005 | if (cache->vaddr & CLFLUSH_AFTER) | |
1006 | mb(); | |
3c94ceee | 1007 | |
d50415cc | 1008 | kunmap_atomic(vaddr); |
f0e4a063 | 1009 | i915_gem_object_finish_access((struct drm_i915_gem_object *)cache->node.mm); |
d50415cc | 1010 | } else { |
e8cb909a | 1011 | wmb(); |
d50415cc | 1012 | io_mapping_unmap_atomic((void __iomem *)vaddr); |
e8cb909a | 1013 | if (cache->node.allocated) { |
650bc635 | 1014 | struct i915_ggtt *ggtt = cache_to_ggtt(cache); |
e8cb909a | 1015 | |
82ad6443 CW |
1016 | ggtt->vm.clear_range(&ggtt->vm, |
1017 | cache->node.start, | |
1018 | cache->node.size); | |
e8cb909a CW |
1019 | drm_mm_remove_node(&cache->node); |
1020 | } else { | |
1021 | i915_vma_unpin((struct i915_vma *)cache->node.mm); | |
3c94ceee | 1022 | } |
31a39207 | 1023 | } |
650bc635 CW |
1024 | |
1025 | cache->vaddr = 0; | |
1026 | cache->page = -1; | |
31a39207 CW |
1027 | } |
1028 | ||
1029 | static void *reloc_kmap(struct drm_i915_gem_object *obj, | |
1030 | struct reloc_cache *cache, | |
2889caa9 | 1031 | unsigned long page) |
31a39207 | 1032 | { |
d50415cc CW |
1033 | void *vaddr; |
1034 | ||
1035 | if (cache->vaddr) { | |
1036 | kunmap_atomic(unmask_page(cache->vaddr)); | |
1037 | } else { | |
1038 | unsigned int flushes; | |
2889caa9 | 1039 | int err; |
31a39207 | 1040 | |
f0e4a063 | 1041 | err = i915_gem_object_prepare_write(obj, &flushes); |
2889caa9 CW |
1042 | if (err) |
1043 | return ERR_PTR(err); | |
d50415cc CW |
1044 | |
1045 | BUILD_BUG_ON(KMAP & CLFLUSH_FLAGS); | |
1046 | BUILD_BUG_ON((KMAP | CLFLUSH_FLAGS) & PAGE_MASK); | |
3c94ceee | 1047 | |
d50415cc CW |
1048 | cache->vaddr = flushes | KMAP; |
1049 | cache->node.mm = (void *)obj; | |
1050 | if (flushes) | |
1051 | mb(); | |
3c94ceee BW |
1052 | } |
1053 | ||
d50415cc CW |
1054 | vaddr = kmap_atomic(i915_gem_object_get_dirty_page(obj, page)); |
1055 | cache->vaddr = unmask_flags(cache->vaddr) | (unsigned long)vaddr; | |
31a39207 | 1056 | cache->page = page; |
5032d871 | 1057 | |
d50415cc | 1058 | return vaddr; |
5032d871 RB |
1059 | } |
1060 | ||
d50415cc CW |
1061 | static void *reloc_iomap(struct drm_i915_gem_object *obj, |
1062 | struct reloc_cache *cache, | |
2889caa9 | 1063 | unsigned long page) |
5032d871 | 1064 | { |
650bc635 | 1065 | struct i915_ggtt *ggtt = cache_to_ggtt(cache); |
e8cb909a | 1066 | unsigned long offset; |
d50415cc | 1067 | void *vaddr; |
5032d871 | 1068 | |
d50415cc | 1069 | if (cache->vaddr) { |
615e5000 | 1070 | io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr)); |
d50415cc CW |
1071 | } else { |
1072 | struct i915_vma *vma; | |
2889caa9 | 1073 | int err; |
5032d871 | 1074 | |
2889caa9 | 1075 | if (use_cpu_reloc(cache, obj)) |
d50415cc | 1076 | return NULL; |
3c94ceee | 1077 | |
2889caa9 CW |
1078 | err = i915_gem_object_set_to_gtt_domain(obj, true); |
1079 | if (err) | |
1080 | return ERR_PTR(err); | |
3c94ceee | 1081 | |
d50415cc | 1082 | vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, |
3c755c5b CW |
1083 | PIN_MAPPABLE | |
1084 | PIN_NONBLOCK | | |
1085 | PIN_NONFAULT); | |
e8cb909a CW |
1086 | if (IS_ERR(vma)) { |
1087 | memset(&cache->node, 0, sizeof(cache->node)); | |
2889caa9 | 1088 | err = drm_mm_insert_node_in_range |
82ad6443 | 1089 | (&ggtt->vm.mm, &cache->node, |
f51455d4 | 1090 | PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE, |
e8cb909a | 1091 | 0, ggtt->mappable_end, |
4e64e553 | 1092 | DRM_MM_INSERT_LOW); |
2889caa9 | 1093 | if (err) /* no inactive aperture space, use cpu reloc */ |
c92fa4fe | 1094 | return NULL; |
e8cb909a | 1095 | } else { |
2889caa9 CW |
1096 | err = i915_vma_put_fence(vma); |
1097 | if (err) { | |
e8cb909a | 1098 | i915_vma_unpin(vma); |
2889caa9 | 1099 | return ERR_PTR(err); |
e8cb909a | 1100 | } |
5032d871 | 1101 | |
e8cb909a CW |
1102 | cache->node.start = vma->node.start; |
1103 | cache->node.mm = (void *)vma; | |
3c94ceee | 1104 | } |
e8cb909a | 1105 | } |
3c94ceee | 1106 | |
e8cb909a CW |
1107 | offset = cache->node.start; |
1108 | if (cache->node.allocated) { | |
fc099090 | 1109 | wmb(); |
82ad6443 CW |
1110 | ggtt->vm.insert_page(&ggtt->vm, |
1111 | i915_gem_object_get_dma_address(obj, page), | |
1112 | offset, I915_CACHE_NONE, 0); | |
e8cb909a CW |
1113 | } else { |
1114 | offset += page << PAGE_SHIFT; | |
3c94ceee BW |
1115 | } |
1116 | ||
73ebd503 | 1117 | vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->iomap, |
650bc635 | 1118 | offset); |
d50415cc CW |
1119 | cache->page = page; |
1120 | cache->vaddr = (unsigned long)vaddr; | |
5032d871 | 1121 | |
d50415cc | 1122 | return vaddr; |
5032d871 RB |
1123 | } |
1124 | ||
d50415cc CW |
1125 | static void *reloc_vaddr(struct drm_i915_gem_object *obj, |
1126 | struct reloc_cache *cache, | |
2889caa9 | 1127 | unsigned long page) |
edf4427b | 1128 | { |
d50415cc | 1129 | void *vaddr; |
5032d871 | 1130 | |
d50415cc CW |
1131 | if (cache->page == page) { |
1132 | vaddr = unmask_page(cache->vaddr); | |
1133 | } else { | |
1134 | vaddr = NULL; | |
1135 | if ((cache->vaddr & KMAP) == 0) | |
1136 | vaddr = reloc_iomap(obj, cache, page); | |
1137 | if (!vaddr) | |
1138 | vaddr = reloc_kmap(obj, cache, page); | |
3c94ceee BW |
1139 | } |
1140 | ||
d50415cc | 1141 | return vaddr; |
edf4427b CW |
1142 | } |
1143 | ||
d50415cc | 1144 | static void clflush_write32(u32 *addr, u32 value, unsigned int flushes) |
edf4427b | 1145 | { |
d50415cc CW |
1146 | if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) { |
1147 | if (flushes & CLFLUSH_BEFORE) { | |
1148 | clflushopt(addr); | |
1149 | mb(); | |
1150 | } | |
edf4427b | 1151 | |
d50415cc | 1152 | *addr = value; |
edf4427b | 1153 | |
2889caa9 CW |
1154 | /* |
1155 | * Writes to the same cacheline are serialised by the CPU | |
d50415cc CW |
1156 | * (including clflush). On the write path, we only require |
1157 | * that it hits memory in an orderly fashion and place | |
1158 | * mb barriers at the start and end of the relocation phase | |
1159 | * to ensure ordering of clflush wrt to the system. | |
1160 | */ | |
1161 | if (flushes & CLFLUSH_AFTER) | |
1162 | clflushopt(addr); | |
1163 | } else | |
1164 | *addr = value; | |
edf4427b | 1165 | } |
edf4427b | 1166 | |
7dd4f672 CW |
1167 | static int __reloc_gpu_alloc(struct i915_execbuffer *eb, |
1168 | struct i915_vma *vma, | |
1169 | unsigned int len) | |
1170 | { | |
1171 | struct reloc_cache *cache = &eb->reloc_cache; | |
1172 | struct drm_i915_gem_object *obj; | |
e61e0f51 | 1173 | struct i915_request *rq; |
7dd4f672 CW |
1174 | struct i915_vma *batch; |
1175 | u32 *cmd; | |
1176 | int err; | |
1177 | ||
46223993 CW |
1178 | if (DBG_FORCE_RELOC == FORCE_GPU_RELOC) { |
1179 | obj = vma->obj; | |
1180 | if (obj->cache_dirty & ~obj->cache_coherent) | |
1181 | i915_gem_clflush_object(obj, 0); | |
1182 | obj->write_domain = 0; | |
1183 | } | |
1184 | ||
c0a51fd0 | 1185 | GEM_BUG_ON(vma->obj->write_domain & I915_GEM_DOMAIN_CPU); |
7dd4f672 CW |
1186 | |
1187 | obj = i915_gem_batch_pool_get(&eb->engine->batch_pool, PAGE_SIZE); | |
1188 | if (IS_ERR(obj)) | |
1189 | return PTR_ERR(obj); | |
1190 | ||
1191 | cmd = i915_gem_object_pin_map(obj, | |
a575c676 CW |
1192 | cache->has_llc ? |
1193 | I915_MAP_FORCE_WB : | |
1194 | I915_MAP_FORCE_WC); | |
7dd4f672 CW |
1195 | i915_gem_object_unpin_pages(obj); |
1196 | if (IS_ERR(cmd)) | |
1197 | return PTR_ERR(cmd); | |
1198 | ||
7dd4f672 CW |
1199 | batch = i915_vma_instance(obj, vma->vm, NULL); |
1200 | if (IS_ERR(batch)) { | |
1201 | err = PTR_ERR(batch); | |
1202 | goto err_unmap; | |
1203 | } | |
1204 | ||
1205 | err = i915_vma_pin(batch, 0, 0, PIN_USER | PIN_NONBLOCK); | |
1206 | if (err) | |
1207 | goto err_unmap; | |
1208 | ||
8f2a1057 | 1209 | rq = i915_request_create(eb->context); |
7dd4f672 CW |
1210 | if (IS_ERR(rq)) { |
1211 | err = PTR_ERR(rq); | |
1212 | goto err_unpin; | |
1213 | } | |
1214 | ||
e61e0f51 | 1215 | err = i915_request_await_object(rq, vma->obj, true); |
7dd4f672 CW |
1216 | if (err) |
1217 | goto err_request; | |
1218 | ||
7dd4f672 CW |
1219 | err = eb->engine->emit_bb_start(rq, |
1220 | batch->node.start, PAGE_SIZE, | |
1221 | cache->gen > 5 ? 0 : I915_DISPATCH_SECURE); | |
1222 | if (err) | |
1223 | goto err_request; | |
1224 | ||
95ff7c7d | 1225 | GEM_BUG_ON(!reservation_object_test_signaled_rcu(batch->resv, true)); |
a5236978 CW |
1226 | err = i915_vma_move_to_active(batch, rq, 0); |
1227 | if (err) | |
1228 | goto skip_request; | |
7dd4f672 | 1229 | |
a5236978 CW |
1230 | err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE); |
1231 | if (err) | |
1232 | goto skip_request; | |
7dd4f672 CW |
1233 | |
1234 | rq->batch = batch; | |
a5236978 | 1235 | i915_vma_unpin(batch); |
7dd4f672 CW |
1236 | |
1237 | cache->rq = rq; | |
1238 | cache->rq_cmd = cmd; | |
1239 | cache->rq_size = 0; | |
1240 | ||
1241 | /* Return with batch mapping (cmd) still pinned */ | |
1242 | return 0; | |
1243 | ||
a5236978 CW |
1244 | skip_request: |
1245 | i915_request_skip(rq, err); | |
7dd4f672 | 1246 | err_request: |
e61e0f51 | 1247 | i915_request_add(rq); |
7dd4f672 CW |
1248 | err_unpin: |
1249 | i915_vma_unpin(batch); | |
1250 | err_unmap: | |
1251 | i915_gem_object_unpin_map(obj); | |
1252 | return err; | |
1253 | } | |
1254 | ||
1255 | static u32 *reloc_gpu(struct i915_execbuffer *eb, | |
1256 | struct i915_vma *vma, | |
1257 | unsigned int len) | |
1258 | { | |
1259 | struct reloc_cache *cache = &eb->reloc_cache; | |
1260 | u32 *cmd; | |
1261 | ||
1262 | if (cache->rq_size > PAGE_SIZE/sizeof(u32) - (len + 1)) | |
1263 | reloc_gpu_flush(cache); | |
1264 | ||
1265 | if (unlikely(!cache->rq)) { | |
1266 | int err; | |
1267 | ||
3dbf26ed CW |
1268 | /* If we need to copy for the cmdparser, we will stall anyway */ |
1269 | if (eb_use_cmdparser(eb)) | |
1270 | return ERR_PTR(-EWOULDBLOCK); | |
1271 | ||
90cad095 CW |
1272 | if (!intel_engine_can_store_dword(eb->engine)) |
1273 | return ERR_PTR(-ENODEV); | |
1274 | ||
7dd4f672 CW |
1275 | err = __reloc_gpu_alloc(eb, vma, len); |
1276 | if (unlikely(err)) | |
1277 | return ERR_PTR(err); | |
1278 | } | |
1279 | ||
1280 | cmd = cache->rq_cmd + cache->rq_size; | |
1281 | cache->rq_size += len; | |
1282 | ||
1283 | return cmd; | |
1284 | } | |
1285 | ||
2889caa9 CW |
1286 | static u64 |
1287 | relocate_entry(struct i915_vma *vma, | |
d50415cc | 1288 | const struct drm_i915_gem_relocation_entry *reloc, |
2889caa9 CW |
1289 | struct i915_execbuffer *eb, |
1290 | const struct i915_vma *target) | |
edf4427b | 1291 | { |
d50415cc | 1292 | u64 offset = reloc->offset; |
2889caa9 CW |
1293 | u64 target_offset = relocation_target(reloc, target); |
1294 | bool wide = eb->reloc_cache.use_64bit_reloc; | |
d50415cc | 1295 | void *vaddr; |
edf4427b | 1296 | |
7dd4f672 CW |
1297 | if (!eb->reloc_cache.vaddr && |
1298 | (DBG_FORCE_RELOC == FORCE_GPU_RELOC || | |
90cad095 | 1299 | !reservation_object_test_signaled_rcu(vma->resv, true))) { |
7dd4f672 CW |
1300 | const unsigned int gen = eb->reloc_cache.gen; |
1301 | unsigned int len; | |
1302 | u32 *batch; | |
1303 | u64 addr; | |
1304 | ||
1305 | if (wide) | |
1306 | len = offset & 7 ? 8 : 5; | |
1307 | else if (gen >= 4) | |
1308 | len = 4; | |
f2f5c061 | 1309 | else |
a889580c | 1310 | len = 3; |
7dd4f672 CW |
1311 | |
1312 | batch = reloc_gpu(eb, vma, len); | |
1313 | if (IS_ERR(batch)) | |
1314 | goto repeat; | |
1315 | ||
1316 | addr = gen8_canonical_addr(vma->node.start + offset); | |
1317 | if (wide) { | |
1318 | if (offset & 7) { | |
1319 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1320 | *batch++ = lower_32_bits(addr); | |
1321 | *batch++ = upper_32_bits(addr); | |
1322 | *batch++ = lower_32_bits(target_offset); | |
1323 | ||
1324 | addr = gen8_canonical_addr(addr + 4); | |
1325 | ||
1326 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1327 | *batch++ = lower_32_bits(addr); | |
1328 | *batch++ = upper_32_bits(addr); | |
1329 | *batch++ = upper_32_bits(target_offset); | |
1330 | } else { | |
1331 | *batch++ = (MI_STORE_DWORD_IMM_GEN4 | (1 << 21)) + 1; | |
1332 | *batch++ = lower_32_bits(addr); | |
1333 | *batch++ = upper_32_bits(addr); | |
1334 | *batch++ = lower_32_bits(target_offset); | |
1335 | *batch++ = upper_32_bits(target_offset); | |
1336 | } | |
1337 | } else if (gen >= 6) { | |
1338 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1339 | *batch++ = 0; | |
1340 | *batch++ = addr; | |
1341 | *batch++ = target_offset; | |
1342 | } else if (gen >= 4) { | |
1343 | *batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT; | |
1344 | *batch++ = 0; | |
1345 | *batch++ = addr; | |
1346 | *batch++ = target_offset; | |
1347 | } else { | |
1348 | *batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL; | |
1349 | *batch++ = addr; | |
1350 | *batch++ = target_offset; | |
1351 | } | |
1352 | ||
1353 | goto out; | |
1354 | } | |
1355 | ||
d50415cc | 1356 | repeat: |
95ff7c7d | 1357 | vaddr = reloc_vaddr(vma->obj, &eb->reloc_cache, offset >> PAGE_SHIFT); |
d50415cc CW |
1358 | if (IS_ERR(vaddr)) |
1359 | return PTR_ERR(vaddr); | |
1360 | ||
1361 | clflush_write32(vaddr + offset_in_page(offset), | |
1362 | lower_32_bits(target_offset), | |
2889caa9 | 1363 | eb->reloc_cache.vaddr); |
d50415cc CW |
1364 | |
1365 | if (wide) { | |
1366 | offset += sizeof(u32); | |
1367 | target_offset >>= 32; | |
1368 | wide = false; | |
1369 | goto repeat; | |
edf4427b | 1370 | } |
edf4427b | 1371 | |
7dd4f672 | 1372 | out: |
2889caa9 | 1373 | return target->node.start | UPDATE; |
edf4427b | 1374 | } |
edf4427b | 1375 | |
2889caa9 CW |
1376 | static u64 |
1377 | eb_relocate_entry(struct i915_execbuffer *eb, | |
1378 | struct i915_vma *vma, | |
1379 | const struct drm_i915_gem_relocation_entry *reloc) | |
54cf91dc | 1380 | { |
507d977f | 1381 | struct i915_vma *target; |
2889caa9 | 1382 | int err; |
54cf91dc | 1383 | |
67731b87 | 1384 | /* we've already hold a reference to all valid objects */ |
507d977f CW |
1385 | target = eb_get_vma(eb, reloc->target_handle); |
1386 | if (unlikely(!target)) | |
54cf91dc | 1387 | return -ENOENT; |
e844b990 | 1388 | |
54cf91dc | 1389 | /* Validate that the target is in a valid r/w GPU domain */ |
b8f7ab17 | 1390 | if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) { |
ff240199 | 1391 | DRM_DEBUG("reloc with multiple write domains: " |
507d977f | 1392 | "target %d offset %d " |
54cf91dc | 1393 | "read %08x write %08x", |
507d977f | 1394 | reloc->target_handle, |
54cf91dc CW |
1395 | (int) reloc->offset, |
1396 | reloc->read_domains, | |
1397 | reloc->write_domain); | |
8b78f0e5 | 1398 | return -EINVAL; |
54cf91dc | 1399 | } |
4ca4a250 DV |
1400 | if (unlikely((reloc->write_domain | reloc->read_domains) |
1401 | & ~I915_GEM_GPU_DOMAINS)) { | |
ff240199 | 1402 | DRM_DEBUG("reloc with read/write non-GPU domains: " |
507d977f | 1403 | "target %d offset %d " |
54cf91dc | 1404 | "read %08x write %08x", |
507d977f | 1405 | reloc->target_handle, |
54cf91dc CW |
1406 | (int) reloc->offset, |
1407 | reloc->read_domains, | |
1408 | reloc->write_domain); | |
8b78f0e5 | 1409 | return -EINVAL; |
54cf91dc | 1410 | } |
54cf91dc | 1411 | |
2889caa9 | 1412 | if (reloc->write_domain) { |
c7c6e46f | 1413 | *target->exec_flags |= EXEC_OBJECT_WRITE; |
507d977f | 1414 | |
2889caa9 CW |
1415 | /* |
1416 | * Sandybridge PPGTT errata: We need a global gtt mapping | |
1417 | * for MI and pipe_control writes because the gpu doesn't | |
1418 | * properly redirect them through the ppgtt for non_secure | |
1419 | * batchbuffers. | |
1420 | */ | |
1421 | if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION && | |
cf819eff | 1422 | IS_GEN(eb->i915, 6)) { |
2889caa9 CW |
1423 | err = i915_vma_bind(target, target->obj->cache_level, |
1424 | PIN_GLOBAL); | |
1425 | if (WARN_ONCE(err, | |
1426 | "Unexpected failure to bind target VMA!")) | |
1427 | return err; | |
1428 | } | |
507d977f | 1429 | } |
54cf91dc | 1430 | |
2889caa9 CW |
1431 | /* |
1432 | * If the relocation already has the right value in it, no | |
54cf91dc CW |
1433 | * more work needs to be done. |
1434 | */ | |
7dd4f672 CW |
1435 | if (!DBG_FORCE_RELOC && |
1436 | gen8_canonical_addr(target->node.start) == reloc->presumed_offset) | |
67731b87 | 1437 | return 0; |
54cf91dc CW |
1438 | |
1439 | /* Check that the relocation address is valid... */ | |
3c94ceee | 1440 | if (unlikely(reloc->offset > |
507d977f | 1441 | vma->size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) { |
ff240199 | 1442 | DRM_DEBUG("Relocation beyond object bounds: " |
507d977f CW |
1443 | "target %d offset %d size %d.\n", |
1444 | reloc->target_handle, | |
1445 | (int)reloc->offset, | |
1446 | (int)vma->size); | |
8b78f0e5 | 1447 | return -EINVAL; |
54cf91dc | 1448 | } |
b8f7ab17 | 1449 | if (unlikely(reloc->offset & 3)) { |
ff240199 | 1450 | DRM_DEBUG("Relocation not 4-byte aligned: " |
507d977f CW |
1451 | "target %d offset %d.\n", |
1452 | reloc->target_handle, | |
1453 | (int)reloc->offset); | |
8b78f0e5 | 1454 | return -EINVAL; |
54cf91dc CW |
1455 | } |
1456 | ||
071750e5 CW |
1457 | /* |
1458 | * If we write into the object, we need to force the synchronisation | |
1459 | * barrier, either with an asynchronous clflush or if we executed the | |
1460 | * patching using the GPU (though that should be serialised by the | |
1461 | * timeline). To be completely sure, and since we are required to | |
1462 | * do relocations we are already stalling, disable the user's opt | |
0519bcb1 | 1463 | * out of our synchronisation. |
071750e5 | 1464 | */ |
c7c6e46f | 1465 | *vma->exec_flags &= ~EXEC_OBJECT_ASYNC; |
071750e5 | 1466 | |
54cf91dc | 1467 | /* and update the user's relocation entry */ |
2889caa9 | 1468 | return relocate_entry(vma, reloc, eb, target); |
54cf91dc CW |
1469 | } |
1470 | ||
2889caa9 | 1471 | static int eb_relocate_vma(struct i915_execbuffer *eb, struct i915_vma *vma) |
54cf91dc | 1472 | { |
1d83f442 | 1473 | #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry)) |
2889caa9 CW |
1474 | struct drm_i915_gem_relocation_entry stack[N_RELOC(512)]; |
1475 | struct drm_i915_gem_relocation_entry __user *urelocs; | |
c7c6e46f | 1476 | const struct drm_i915_gem_exec_object2 *entry = exec_entry(eb, vma); |
2889caa9 | 1477 | unsigned int remain; |
54cf91dc | 1478 | |
2889caa9 | 1479 | urelocs = u64_to_user_ptr(entry->relocs_ptr); |
1d83f442 | 1480 | remain = entry->relocation_count; |
2889caa9 CW |
1481 | if (unlikely(remain > N_RELOC(ULONG_MAX))) |
1482 | return -EINVAL; | |
ebc0808f | 1483 | |
2889caa9 CW |
1484 | /* |
1485 | * We must check that the entire relocation array is safe | |
1486 | * to read. However, if the array is not writable the user loses | |
1487 | * the updated relocation values. | |
1488 | */ | |
96d4f267 | 1489 | if (unlikely(!access_ok(urelocs, remain*sizeof(*urelocs)))) |
2889caa9 CW |
1490 | return -EFAULT; |
1491 | ||
1492 | do { | |
1493 | struct drm_i915_gem_relocation_entry *r = stack; | |
1494 | unsigned int count = | |
1495 | min_t(unsigned int, remain, ARRAY_SIZE(stack)); | |
1496 | unsigned int copied; | |
1d83f442 | 1497 | |
2889caa9 CW |
1498 | /* |
1499 | * This is the fast path and we cannot handle a pagefault | |
ebc0808f CW |
1500 | * whilst holding the struct mutex lest the user pass in the |
1501 | * relocations contained within a mmaped bo. For in such a case | |
1502 | * we, the page fault handler would call i915_gem_fault() and | |
1503 | * we would try to acquire the struct mutex again. Obviously | |
1504 | * this is bad and so lockdep complains vehemently. | |
1505 | */ | |
1506 | pagefault_disable(); | |
2889caa9 | 1507 | copied = __copy_from_user_inatomic(r, urelocs, count * sizeof(r[0])); |
ebc0808f | 1508 | pagefault_enable(); |
2889caa9 CW |
1509 | if (unlikely(copied)) { |
1510 | remain = -EFAULT; | |
31a39207 CW |
1511 | goto out; |
1512 | } | |
54cf91dc | 1513 | |
2889caa9 | 1514 | remain -= count; |
1d83f442 | 1515 | do { |
2889caa9 | 1516 | u64 offset = eb_relocate_entry(eb, vma, r); |
54cf91dc | 1517 | |
2889caa9 CW |
1518 | if (likely(offset == 0)) { |
1519 | } else if ((s64)offset < 0) { | |
1520 | remain = (int)offset; | |
31a39207 | 1521 | goto out; |
2889caa9 CW |
1522 | } else { |
1523 | /* | |
1524 | * Note that reporting an error now | |
1525 | * leaves everything in an inconsistent | |
1526 | * state as we have *already* changed | |
1527 | * the relocation value inside the | |
1528 | * object. As we have not changed the | |
1529 | * reloc.presumed_offset or will not | |
1530 | * change the execobject.offset, on the | |
1531 | * call we may not rewrite the value | |
1532 | * inside the object, leaving it | |
1533 | * dangling and causing a GPU hang. Unless | |
1534 | * userspace dynamically rebuilds the | |
1535 | * relocations on each execbuf rather than | |
1536 | * presume a static tree. | |
1537 | * | |
1538 | * We did previously check if the relocations | |
1539 | * were writable (access_ok), an error now | |
1540 | * would be a strange race with mprotect, | |
1541 | * having already demonstrated that we | |
1542 | * can read from this userspace address. | |
1543 | */ | |
1544 | offset = gen8_canonical_addr(offset & ~UPDATE); | |
fddcd00a CW |
1545 | if (unlikely(__put_user(offset, &urelocs[r-stack].presumed_offset))) { |
1546 | remain = -EFAULT; | |
1547 | goto out; | |
1548 | } | |
1d83f442 | 1549 | } |
2889caa9 CW |
1550 | } while (r++, --count); |
1551 | urelocs += ARRAY_SIZE(stack); | |
1552 | } while (remain); | |
31a39207 | 1553 | out: |
650bc635 | 1554 | reloc_cache_reset(&eb->reloc_cache); |
2889caa9 | 1555 | return remain; |
54cf91dc CW |
1556 | } |
1557 | ||
1558 | static int | |
2889caa9 | 1559 | eb_relocate_vma_slow(struct i915_execbuffer *eb, struct i915_vma *vma) |
54cf91dc | 1560 | { |
c7c6e46f | 1561 | const struct drm_i915_gem_exec_object2 *entry = exec_entry(eb, vma); |
2889caa9 CW |
1562 | struct drm_i915_gem_relocation_entry *relocs = |
1563 | u64_to_ptr(typeof(*relocs), entry->relocs_ptr); | |
1564 | unsigned int i; | |
1565 | int err; | |
54cf91dc CW |
1566 | |
1567 | for (i = 0; i < entry->relocation_count; i++) { | |
2889caa9 | 1568 | u64 offset = eb_relocate_entry(eb, vma, &relocs[i]); |
d4aeee77 | 1569 | |
2889caa9 CW |
1570 | if ((s64)offset < 0) { |
1571 | err = (int)offset; | |
1572 | goto err; | |
1573 | } | |
54cf91dc | 1574 | } |
2889caa9 CW |
1575 | err = 0; |
1576 | err: | |
1577 | reloc_cache_reset(&eb->reloc_cache); | |
1578 | return err; | |
edf4427b CW |
1579 | } |
1580 | ||
2889caa9 | 1581 | static int check_relocations(const struct drm_i915_gem_exec_object2 *entry) |
1690e1eb | 1582 | { |
2889caa9 CW |
1583 | const char __user *addr, *end; |
1584 | unsigned long size; | |
1585 | char __maybe_unused c; | |
1690e1eb | 1586 | |
2889caa9 CW |
1587 | size = entry->relocation_count; |
1588 | if (size == 0) | |
1589 | return 0; | |
7788a765 | 1590 | |
2889caa9 CW |
1591 | if (size > N_RELOC(ULONG_MAX)) |
1592 | return -EINVAL; | |
9a5a53b3 | 1593 | |
2889caa9 CW |
1594 | addr = u64_to_user_ptr(entry->relocs_ptr); |
1595 | size *= sizeof(struct drm_i915_gem_relocation_entry); | |
96d4f267 | 1596 | if (!access_ok(addr, size)) |
2889caa9 | 1597 | return -EFAULT; |
1690e1eb | 1598 | |
2889caa9 CW |
1599 | end = addr + size; |
1600 | for (; addr < end; addr += PAGE_SIZE) { | |
1601 | int err = __get_user(c, addr); | |
1602 | if (err) | |
1603 | return err; | |
ed5982e6 | 1604 | } |
2889caa9 | 1605 | return __get_user(c, end - 1); |
7788a765 | 1606 | } |
1690e1eb | 1607 | |
2889caa9 | 1608 | static int eb_copy_relocations(const struct i915_execbuffer *eb) |
d23db88c | 1609 | { |
2889caa9 CW |
1610 | const unsigned int count = eb->buffer_count; |
1611 | unsigned int i; | |
1612 | int err; | |
e6a84468 | 1613 | |
2889caa9 CW |
1614 | for (i = 0; i < count; i++) { |
1615 | const unsigned int nreloc = eb->exec[i].relocation_count; | |
1616 | struct drm_i915_gem_relocation_entry __user *urelocs; | |
1617 | struct drm_i915_gem_relocation_entry *relocs; | |
1618 | unsigned long size; | |
1619 | unsigned long copied; | |
e6a84468 | 1620 | |
2889caa9 CW |
1621 | if (nreloc == 0) |
1622 | continue; | |
e6a84468 | 1623 | |
2889caa9 CW |
1624 | err = check_relocations(&eb->exec[i]); |
1625 | if (err) | |
1626 | goto err; | |
d23db88c | 1627 | |
2889caa9 CW |
1628 | urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr); |
1629 | size = nreloc * sizeof(*relocs); | |
d23db88c | 1630 | |
0ee931c4 | 1631 | relocs = kvmalloc_array(size, 1, GFP_KERNEL); |
2889caa9 | 1632 | if (!relocs) { |
2889caa9 CW |
1633 | err = -ENOMEM; |
1634 | goto err; | |
1635 | } | |
d23db88c | 1636 | |
2889caa9 CW |
1637 | /* copy_from_user is limited to < 4GiB */ |
1638 | copied = 0; | |
1639 | do { | |
1640 | unsigned int len = | |
1641 | min_t(u64, BIT_ULL(31), size - copied); | |
1642 | ||
1643 | if (__copy_from_user((char *)relocs + copied, | |
908a6105 | 1644 | (char __user *)urelocs + copied, |
2889caa9 | 1645 | len)) { |
fddcd00a | 1646 | end_user: |
0b2c8f8b | 1647 | user_access_end(); |
8f4faed0 | 1648 | end: |
2889caa9 CW |
1649 | kvfree(relocs); |
1650 | err = -EFAULT; | |
1651 | goto err; | |
1652 | } | |
91b2db6f | 1653 | |
2889caa9 CW |
1654 | copied += len; |
1655 | } while (copied < size); | |
506a8e87 | 1656 | |
2889caa9 CW |
1657 | /* |
1658 | * As we do not update the known relocation offsets after | |
1659 | * relocating (due to the complexities in lock handling), | |
1660 | * we need to mark them as invalid now so that we force the | |
1661 | * relocation processing next time. Just in case the target | |
1662 | * object is evicted and then rebound into its old | |
1663 | * presumed_offset before the next execbuffer - if that | |
1664 | * happened we would make the mistake of assuming that the | |
1665 | * relocations were valid. | |
1666 | */ | |
594cc251 | 1667 | if (!user_access_begin(urelocs, size)) |
8f4faed0 | 1668 | goto end; |
594cc251 | 1669 | |
2889caa9 CW |
1670 | for (copied = 0; copied < nreloc; copied++) |
1671 | unsafe_put_user(-1, | |
1672 | &urelocs[copied].presumed_offset, | |
1673 | end_user); | |
2889caa9 | 1674 | user_access_end(); |
d23db88c | 1675 | |
2889caa9 CW |
1676 | eb->exec[i].relocs_ptr = (uintptr_t)relocs; |
1677 | } | |
edf4427b | 1678 | |
2889caa9 | 1679 | return 0; |
101b506a | 1680 | |
2889caa9 CW |
1681 | err: |
1682 | while (i--) { | |
1683 | struct drm_i915_gem_relocation_entry *relocs = | |
1684 | u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr); | |
1685 | if (eb->exec[i].relocation_count) | |
1686 | kvfree(relocs); | |
1687 | } | |
1688 | return err; | |
d23db88c CW |
1689 | } |
1690 | ||
2889caa9 | 1691 | static int eb_prefault_relocations(const struct i915_execbuffer *eb) |
54cf91dc | 1692 | { |
2889caa9 CW |
1693 | const unsigned int count = eb->buffer_count; |
1694 | unsigned int i; | |
54cf91dc | 1695 | |
4f044a88 | 1696 | if (unlikely(i915_modparams.prefault_disable)) |
2889caa9 | 1697 | return 0; |
54cf91dc | 1698 | |
2889caa9 CW |
1699 | for (i = 0; i < count; i++) { |
1700 | int err; | |
54cf91dc | 1701 | |
2889caa9 CW |
1702 | err = check_relocations(&eb->exec[i]); |
1703 | if (err) | |
1704 | return err; | |
1705 | } | |
a415d355 | 1706 | |
2889caa9 | 1707 | return 0; |
54cf91dc CW |
1708 | } |
1709 | ||
2889caa9 | 1710 | static noinline int eb_relocate_slow(struct i915_execbuffer *eb) |
54cf91dc | 1711 | { |
650bc635 | 1712 | struct drm_device *dev = &eb->i915->drm; |
2889caa9 | 1713 | bool have_copy = false; |
27173f1f | 1714 | struct i915_vma *vma; |
2889caa9 CW |
1715 | int err = 0; |
1716 | ||
1717 | repeat: | |
1718 | if (signal_pending(current)) { | |
1719 | err = -ERESTARTSYS; | |
1720 | goto out; | |
1721 | } | |
27173f1f | 1722 | |
67731b87 | 1723 | /* We may process another execbuffer during the unlock... */ |
2889caa9 | 1724 | eb_reset_vmas(eb); |
54cf91dc CW |
1725 | mutex_unlock(&dev->struct_mutex); |
1726 | ||
2889caa9 CW |
1727 | /* |
1728 | * We take 3 passes through the slowpatch. | |
1729 | * | |
1730 | * 1 - we try to just prefault all the user relocation entries and | |
1731 | * then attempt to reuse the atomic pagefault disabled fast path again. | |
1732 | * | |
1733 | * 2 - we copy the user entries to a local buffer here outside of the | |
1734 | * local and allow ourselves to wait upon any rendering before | |
1735 | * relocations | |
1736 | * | |
1737 | * 3 - we already have a local copy of the relocation entries, but | |
1738 | * were interrupted (EAGAIN) whilst waiting for the objects, try again. | |
1739 | */ | |
1740 | if (!err) { | |
1741 | err = eb_prefault_relocations(eb); | |
1742 | } else if (!have_copy) { | |
1743 | err = eb_copy_relocations(eb); | |
1744 | have_copy = err == 0; | |
1745 | } else { | |
1746 | cond_resched(); | |
1747 | err = 0; | |
54cf91dc | 1748 | } |
2889caa9 CW |
1749 | if (err) { |
1750 | mutex_lock(&dev->struct_mutex); | |
1751 | goto out; | |
54cf91dc CW |
1752 | } |
1753 | ||
8a2421bd CW |
1754 | /* A frequent cause for EAGAIN are currently unavailable client pages */ |
1755 | flush_workqueue(eb->i915->mm.userptr_wq); | |
1756 | ||
2889caa9 CW |
1757 | err = i915_mutex_lock_interruptible(dev); |
1758 | if (err) { | |
54cf91dc | 1759 | mutex_lock(&dev->struct_mutex); |
2889caa9 | 1760 | goto out; |
54cf91dc CW |
1761 | } |
1762 | ||
67731b87 | 1763 | /* reacquire the objects */ |
2889caa9 CW |
1764 | err = eb_lookup_vmas(eb); |
1765 | if (err) | |
3b96eff4 | 1766 | goto err; |
67731b87 | 1767 | |
c7c6e46f CW |
1768 | GEM_BUG_ON(!eb->batch); |
1769 | ||
2889caa9 CW |
1770 | list_for_each_entry(vma, &eb->relocs, reloc_link) { |
1771 | if (!have_copy) { | |
1772 | pagefault_disable(); | |
1773 | err = eb_relocate_vma(eb, vma); | |
1774 | pagefault_enable(); | |
1775 | if (err) | |
1776 | goto repeat; | |
1777 | } else { | |
1778 | err = eb_relocate_vma_slow(eb, vma); | |
1779 | if (err) | |
1780 | goto err; | |
1781 | } | |
54cf91dc CW |
1782 | } |
1783 | ||
2889caa9 CW |
1784 | /* |
1785 | * Leave the user relocations as are, this is the painfully slow path, | |
54cf91dc CW |
1786 | * and we want to avoid the complication of dropping the lock whilst |
1787 | * having buffers reserved in the aperture and so causing spurious | |
1788 | * ENOSPC for random operations. | |
1789 | */ | |
1790 | ||
1791 | err: | |
2889caa9 CW |
1792 | if (err == -EAGAIN) |
1793 | goto repeat; | |
1794 | ||
1795 | out: | |
1796 | if (have_copy) { | |
1797 | const unsigned int count = eb->buffer_count; | |
1798 | unsigned int i; | |
1799 | ||
1800 | for (i = 0; i < count; i++) { | |
1801 | const struct drm_i915_gem_exec_object2 *entry = | |
1802 | &eb->exec[i]; | |
1803 | struct drm_i915_gem_relocation_entry *relocs; | |
1804 | ||
1805 | if (!entry->relocation_count) | |
1806 | continue; | |
1807 | ||
1808 | relocs = u64_to_ptr(typeof(*relocs), entry->relocs_ptr); | |
1809 | kvfree(relocs); | |
1810 | } | |
1811 | } | |
1812 | ||
1f727d9e | 1813 | return err; |
54cf91dc CW |
1814 | } |
1815 | ||
2889caa9 | 1816 | static int eb_relocate(struct i915_execbuffer *eb) |
54cf91dc | 1817 | { |
2889caa9 CW |
1818 | if (eb_lookup_vmas(eb)) |
1819 | goto slow; | |
1820 | ||
1821 | /* The objects are in their final locations, apply the relocations. */ | |
1822 | if (eb->args->flags & __EXEC_HAS_RELOC) { | |
1823 | struct i915_vma *vma; | |
1824 | ||
1825 | list_for_each_entry(vma, &eb->relocs, reloc_link) { | |
1826 | if (eb_relocate_vma(eb, vma)) | |
1827 | goto slow; | |
1828 | } | |
1829 | } | |
1830 | ||
1831 | return 0; | |
1832 | ||
1833 | slow: | |
1834 | return eb_relocate_slow(eb); | |
1835 | } | |
1836 | ||
2889caa9 CW |
1837 | static int eb_move_to_gpu(struct i915_execbuffer *eb) |
1838 | { | |
1839 | const unsigned int count = eb->buffer_count; | |
1840 | unsigned int i; | |
1841 | int err; | |
54cf91dc | 1842 | |
2889caa9 | 1843 | for (i = 0; i < count; i++) { |
c7c6e46f CW |
1844 | unsigned int flags = eb->flags[i]; |
1845 | struct i915_vma *vma = eb->vma[i]; | |
27173f1f | 1846 | struct drm_i915_gem_object *obj = vma->obj; |
03ade511 | 1847 | |
c7c6e46f | 1848 | if (flags & EXEC_OBJECT_CAPTURE) { |
e61e0f51 | 1849 | struct i915_capture_list *capture; |
b0fd47ad CW |
1850 | |
1851 | capture = kmalloc(sizeof(*capture), GFP_KERNEL); | |
1852 | if (unlikely(!capture)) | |
1853 | return -ENOMEM; | |
1854 | ||
650bc635 | 1855 | capture->next = eb->request->capture_list; |
c7c6e46f | 1856 | capture->vma = eb->vma[i]; |
650bc635 | 1857 | eb->request->capture_list = capture; |
b0fd47ad CW |
1858 | } |
1859 | ||
b8f55be6 CW |
1860 | /* |
1861 | * If the GPU is not _reading_ through the CPU cache, we need | |
1862 | * to make sure that any writes (both previous GPU writes from | |
1863 | * before a change in snooping levels and normal CPU writes) | |
1864 | * caught in that cache are flushed to main memory. | |
1865 | * | |
1866 | * We want to say | |
1867 | * obj->cache_dirty && | |
1868 | * !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ) | |
1869 | * but gcc's optimiser doesn't handle that as well and emits | |
1870 | * two jumps instead of one. Maybe one day... | |
1871 | */ | |
1872 | if (unlikely(obj->cache_dirty & ~obj->cache_coherent)) { | |
0f46daa1 | 1873 | if (i915_gem_clflush_object(obj, 0)) |
c7c6e46f | 1874 | flags &= ~EXEC_OBJECT_ASYNC; |
0f46daa1 CW |
1875 | } |
1876 | ||
c7c6e46f CW |
1877 | if (flags & EXEC_OBJECT_ASYNC) |
1878 | continue; | |
77ae9957 | 1879 | |
e61e0f51 | 1880 | err = i915_request_await_object |
c7c6e46f | 1881 | (eb->request, obj, flags & EXEC_OBJECT_WRITE); |
2889caa9 CW |
1882 | if (err) |
1883 | return err; | |
2889caa9 CW |
1884 | } |
1885 | ||
1886 | for (i = 0; i < count; i++) { | |
c7c6e46f CW |
1887 | unsigned int flags = eb->flags[i]; |
1888 | struct i915_vma *vma = eb->vma[i]; | |
1889 | ||
a5236978 CW |
1890 | err = i915_vma_move_to_active(vma, eb->request, flags); |
1891 | if (unlikely(err)) { | |
1892 | i915_request_skip(eb->request, err); | |
1893 | return err; | |
1894 | } | |
2889caa9 | 1895 | |
c7c6e46f CW |
1896 | __eb_unreserve_vma(vma, flags); |
1897 | vma->exec_flags = NULL; | |
1898 | ||
1899 | if (unlikely(flags & __EXEC_OBJECT_HAS_REF)) | |
dade2a61 | 1900 | i915_vma_put(vma); |
c59a333f | 1901 | } |
2889caa9 | 1902 | eb->exec = NULL; |
c59a333f | 1903 | |
dcd79934 | 1904 | /* Unconditionally flush any chipset caches (for streaming writes). */ |
650bc635 | 1905 | i915_gem_chipset_flush(eb->i915); |
6ac42f41 | 1906 | |
2113184c | 1907 | return 0; |
54cf91dc CW |
1908 | } |
1909 | ||
2889caa9 | 1910 | static bool i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec) |
54cf91dc | 1911 | { |
650bc635 | 1912 | if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS) |
ed5982e6 DV |
1913 | return false; |
1914 | ||
2f5945bc | 1915 | /* Kernel clipping was a DRI1 misfeature */ |
cf6e7bac JE |
1916 | if (!(exec->flags & I915_EXEC_FENCE_ARRAY)) { |
1917 | if (exec->num_cliprects || exec->cliprects_ptr) | |
1918 | return false; | |
1919 | } | |
2f5945bc CW |
1920 | |
1921 | if (exec->DR4 == 0xffffffff) { | |
1922 | DRM_DEBUG("UXA submitting garbage DR4, fixing up\n"); | |
1923 | exec->DR4 = 0; | |
1924 | } | |
1925 | if (exec->DR1 || exec->DR4) | |
1926 | return false; | |
1927 | ||
1928 | if ((exec->batch_start_offset | exec->batch_len) & 0x7) | |
1929 | return false; | |
1930 | ||
1931 | return true; | |
54cf91dc CW |
1932 | } |
1933 | ||
e61e0f51 | 1934 | static int i915_reset_gen7_sol_offsets(struct i915_request *rq) |
ae662d31 | 1935 | { |
73dec95e TU |
1936 | u32 *cs; |
1937 | int i; | |
ae662d31 | 1938 | |
8a68d464 | 1939 | if (!IS_GEN(rq->i915, 7) || rq->engine->id != RCS0) { |
9d662da8 DV |
1940 | DRM_DEBUG("sol reset is gen7/rcs only\n"); |
1941 | return -EINVAL; | |
1942 | } | |
ae662d31 | 1943 | |
e61e0f51 | 1944 | cs = intel_ring_begin(rq, 4 * 2 + 2); |
73dec95e TU |
1945 | if (IS_ERR(cs)) |
1946 | return PTR_ERR(cs); | |
ae662d31 | 1947 | |
2889caa9 | 1948 | *cs++ = MI_LOAD_REGISTER_IMM(4); |
ae662d31 | 1949 | for (i = 0; i < 4; i++) { |
73dec95e TU |
1950 | *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i)); |
1951 | *cs++ = 0; | |
ae662d31 | 1952 | } |
2889caa9 | 1953 | *cs++ = MI_NOOP; |
e61e0f51 | 1954 | intel_ring_advance(rq, cs); |
ae662d31 EA |
1955 | |
1956 | return 0; | |
1957 | } | |
1958 | ||
650bc635 | 1959 | static struct i915_vma *eb_parse(struct i915_execbuffer *eb, bool is_master) |
71745376 | 1960 | { |
71745376 | 1961 | struct drm_i915_gem_object *shadow_batch_obj; |
17cabf57 | 1962 | struct i915_vma *vma; |
2889caa9 | 1963 | int err; |
71745376 | 1964 | |
650bc635 CW |
1965 | shadow_batch_obj = i915_gem_batch_pool_get(&eb->engine->batch_pool, |
1966 | PAGE_ALIGN(eb->batch_len)); | |
71745376 | 1967 | if (IS_ERR(shadow_batch_obj)) |
59bfa124 | 1968 | return ERR_CAST(shadow_batch_obj); |
71745376 | 1969 | |
2889caa9 | 1970 | err = intel_engine_cmd_parser(eb->engine, |
650bc635 | 1971 | eb->batch->obj, |
33a051a5 | 1972 | shadow_batch_obj, |
650bc635 CW |
1973 | eb->batch_start_offset, |
1974 | eb->batch_len, | |
33a051a5 | 1975 | is_master); |
2889caa9 CW |
1976 | if (err) { |
1977 | if (err == -EACCES) /* unhandled chained batch */ | |
058d88c4 CW |
1978 | vma = NULL; |
1979 | else | |
2889caa9 | 1980 | vma = ERR_PTR(err); |
058d88c4 CW |
1981 | goto out; |
1982 | } | |
71745376 | 1983 | |
058d88c4 CW |
1984 | vma = i915_gem_object_ggtt_pin(shadow_batch_obj, NULL, 0, 0, 0); |
1985 | if (IS_ERR(vma)) | |
1986 | goto out; | |
de4e783a | 1987 | |
c7c6e46f CW |
1988 | eb->vma[eb->buffer_count] = i915_vma_get(vma); |
1989 | eb->flags[eb->buffer_count] = | |
1990 | __EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_REF; | |
1991 | vma->exec_flags = &eb->flags[eb->buffer_count]; | |
1992 | eb->buffer_count++; | |
71745376 | 1993 | |
058d88c4 | 1994 | out: |
de4e783a | 1995 | i915_gem_object_unpin_pages(shadow_batch_obj); |
058d88c4 | 1996 | return vma; |
71745376 | 1997 | } |
5c6c6003 | 1998 | |
c8659efa | 1999 | static void |
e61e0f51 | 2000 | add_to_client(struct i915_request *rq, struct drm_file *file) |
c8659efa | 2001 | { |
e61e0f51 CW |
2002 | rq->file_priv = file->driver_priv; |
2003 | list_add_tail(&rq->client_link, &rq->file_priv->mm.request_list); | |
c8659efa CW |
2004 | } |
2005 | ||
2889caa9 | 2006 | static int eb_submit(struct i915_execbuffer *eb) |
78382593 | 2007 | { |
2889caa9 | 2008 | int err; |
78382593 | 2009 | |
2889caa9 CW |
2010 | err = eb_move_to_gpu(eb); |
2011 | if (err) | |
2012 | return err; | |
78382593 | 2013 | |
650bc635 | 2014 | if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) { |
2889caa9 CW |
2015 | err = i915_reset_gen7_sol_offsets(eb->request); |
2016 | if (err) | |
2017 | return err; | |
78382593 OM |
2018 | } |
2019 | ||
85474441 CW |
2020 | /* |
2021 | * After we completed waiting for other engines (using HW semaphores) | |
2022 | * then we can signal that this request/batch is ready to run. This | |
2023 | * allows us to determine if the batch is still waiting on the GPU | |
2024 | * or actually running by checking the breadcrumb. | |
2025 | */ | |
2026 | if (eb->engine->emit_init_breadcrumb) { | |
2027 | err = eb->engine->emit_init_breadcrumb(eb->request); | |
2028 | if (err) | |
2029 | return err; | |
2030 | } | |
2031 | ||
2889caa9 | 2032 | err = eb->engine->emit_bb_start(eb->request, |
650bc635 CW |
2033 | eb->batch->node.start + |
2034 | eb->batch_start_offset, | |
2035 | eb->batch_len, | |
2889caa9 CW |
2036 | eb->batch_flags); |
2037 | if (err) | |
2038 | return err; | |
78382593 | 2039 | |
2f5945bc | 2040 | return 0; |
78382593 OM |
2041 | } |
2042 | ||
204bcfef | 2043 | /* |
a8ebba75 | 2044 | * Find one BSD ring to dispatch the corresponding BSD command. |
c80ff16e | 2045 | * The engine index is returned. |
a8ebba75 | 2046 | */ |
de1add36 | 2047 | static unsigned int |
c80ff16e CW |
2048 | gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv, |
2049 | struct drm_file *file) | |
a8ebba75 | 2050 | { |
a8ebba75 ZY |
2051 | struct drm_i915_file_private *file_priv = file->driver_priv; |
2052 | ||
de1add36 | 2053 | /* Check whether the file_priv has already selected one ring. */ |
6f633402 JL |
2054 | if ((int)file_priv->bsd_engine < 0) |
2055 | file_priv->bsd_engine = atomic_fetch_xor(1, | |
2056 | &dev_priv->mm.bsd_engine_dispatch_index); | |
d23db88c | 2057 | |
c80ff16e | 2058 | return file_priv->bsd_engine; |
d23db88c CW |
2059 | } |
2060 | ||
5e2a0419 | 2061 | static const enum intel_engine_id user_ring_map[] = { |
8a68d464 CW |
2062 | [I915_EXEC_DEFAULT] = RCS0, |
2063 | [I915_EXEC_RENDER] = RCS0, | |
2064 | [I915_EXEC_BLT] = BCS0, | |
2065 | [I915_EXEC_BSD] = VCS0, | |
2066 | [I915_EXEC_VEBOX] = VECS0 | |
de1add36 TU |
2067 | }; |
2068 | ||
5e2a0419 | 2069 | static int eb_pin_context(struct i915_execbuffer *eb, struct intel_context *ce) |
de1add36 | 2070 | { |
8f2a1057 | 2071 | int err; |
de1add36 | 2072 | |
8f2a1057 CW |
2073 | /* |
2074 | * ABI: Before userspace accesses the GPU (e.g. execbuffer), report | |
2075 | * EIO if the GPU is already wedged. | |
2076 | */ | |
2077 | err = i915_terminally_wedged(eb->i915); | |
2078 | if (err) | |
2079 | return err; | |
2080 | ||
2081 | /* | |
2082 | * Pinning the contexts may generate requests in order to acquire | |
2083 | * GGTT space, so do this first before we reserve a seqno for | |
2084 | * ourselves. | |
2085 | */ | |
fa9f6681 | 2086 | err = intel_context_pin(ce); |
fa9f6681 CW |
2087 | if (err) |
2088 | return err; | |
8f2a1057 | 2089 | |
5e2a0419 | 2090 | eb->engine = ce->engine; |
8f2a1057 CW |
2091 | eb->context = ce; |
2092 | return 0; | |
2093 | } | |
2094 | ||
2095 | static void eb_unpin_context(struct i915_execbuffer *eb) | |
2096 | { | |
2097 | intel_context_unpin(eb->context); | |
2098 | } | |
de1add36 | 2099 | |
5e2a0419 CW |
2100 | static unsigned int |
2101 | eb_select_legacy_ring(struct i915_execbuffer *eb, | |
2102 | struct drm_file *file, | |
2103 | struct drm_i915_gem_execbuffer2 *args) | |
de1add36 | 2104 | { |
8f2a1057 | 2105 | struct drm_i915_private *i915 = eb->i915; |
de1add36 | 2106 | unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK; |
de1add36 | 2107 | |
5e2a0419 CW |
2108 | if (user_ring_id != I915_EXEC_BSD && |
2109 | (args->flags & I915_EXEC_BSD_MASK)) { | |
de1add36 TU |
2110 | DRM_DEBUG("execbuf with non bsd ring but with invalid " |
2111 | "bsd dispatch flags: %d\n", (int)(args->flags)); | |
5e2a0419 | 2112 | return -1; |
de1add36 TU |
2113 | } |
2114 | ||
8f2a1057 | 2115 | if (user_ring_id == I915_EXEC_BSD && HAS_ENGINE(i915, VCS1)) { |
de1add36 TU |
2116 | unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK; |
2117 | ||
2118 | if (bsd_idx == I915_EXEC_BSD_DEFAULT) { | |
8f2a1057 | 2119 | bsd_idx = gen8_dispatch_bsd_engine(i915, file); |
de1add36 TU |
2120 | } else if (bsd_idx >= I915_EXEC_BSD_RING1 && |
2121 | bsd_idx <= I915_EXEC_BSD_RING2) { | |
d9da6aa0 | 2122 | bsd_idx >>= I915_EXEC_BSD_SHIFT; |
de1add36 TU |
2123 | bsd_idx--; |
2124 | } else { | |
2125 | DRM_DEBUG("execbuf with unknown bsd ring: %u\n", | |
2126 | bsd_idx); | |
5e2a0419 | 2127 | return -1; |
de1add36 TU |
2128 | } |
2129 | ||
5e2a0419 | 2130 | return _VCS(bsd_idx); |
de1add36 TU |
2131 | } |
2132 | ||
5e2a0419 CW |
2133 | if (user_ring_id >= ARRAY_SIZE(user_ring_map)) { |
2134 | DRM_DEBUG("execbuf with unknown ring: %u\n", user_ring_id); | |
2135 | return -1; | |
de1add36 TU |
2136 | } |
2137 | ||
5e2a0419 CW |
2138 | return user_ring_map[user_ring_id]; |
2139 | } | |
2140 | ||
2141 | static int | |
2142 | eb_select_engine(struct i915_execbuffer *eb, | |
2143 | struct drm_file *file, | |
2144 | struct drm_i915_gem_execbuffer2 *args) | |
2145 | { | |
2146 | struct intel_context *ce; | |
2147 | unsigned int idx; | |
2148 | int err; | |
2149 | ||
976b55f0 CW |
2150 | if (i915_gem_context_user_engines(eb->gem_context)) |
2151 | idx = args->flags & I915_EXEC_RING_MASK; | |
2152 | else | |
2153 | idx = eb_select_legacy_ring(eb, file, args); | |
5e2a0419 CW |
2154 | |
2155 | ce = i915_gem_context_get_engine(eb->gem_context, idx); | |
2156 | if (IS_ERR(ce)) | |
2157 | return PTR_ERR(ce); | |
2158 | ||
2159 | err = eb_pin_context(eb, ce); | |
2160 | intel_context_put(ce); | |
2161 | ||
2162 | return err; | |
de1add36 TU |
2163 | } |
2164 | ||
cf6e7bac JE |
2165 | static void |
2166 | __free_fence_array(struct drm_syncobj **fences, unsigned int n) | |
2167 | { | |
2168 | while (n--) | |
2169 | drm_syncobj_put(ptr_mask_bits(fences[n], 2)); | |
2170 | kvfree(fences); | |
2171 | } | |
2172 | ||
2173 | static struct drm_syncobj ** | |
2174 | get_fence_array(struct drm_i915_gem_execbuffer2 *args, | |
2175 | struct drm_file *file) | |
2176 | { | |
d710fc16 | 2177 | const unsigned long nfences = args->num_cliprects; |
cf6e7bac JE |
2178 | struct drm_i915_gem_exec_fence __user *user; |
2179 | struct drm_syncobj **fences; | |
d710fc16 | 2180 | unsigned long n; |
cf6e7bac JE |
2181 | int err; |
2182 | ||
2183 | if (!(args->flags & I915_EXEC_FENCE_ARRAY)) | |
2184 | return NULL; | |
2185 | ||
d710fc16 CW |
2186 | /* Check multiplication overflow for access_ok() and kvmalloc_array() */ |
2187 | BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long)); | |
2188 | if (nfences > min_t(unsigned long, | |
2189 | ULONG_MAX / sizeof(*user), | |
2190 | SIZE_MAX / sizeof(*fences))) | |
cf6e7bac JE |
2191 | return ERR_PTR(-EINVAL); |
2192 | ||
2193 | user = u64_to_user_ptr(args->cliprects_ptr); | |
96d4f267 | 2194 | if (!access_ok(user, nfences * sizeof(*user))) |
cf6e7bac JE |
2195 | return ERR_PTR(-EFAULT); |
2196 | ||
d710fc16 | 2197 | fences = kvmalloc_array(nfences, sizeof(*fences), |
0ee931c4 | 2198 | __GFP_NOWARN | GFP_KERNEL); |
cf6e7bac JE |
2199 | if (!fences) |
2200 | return ERR_PTR(-ENOMEM); | |
2201 | ||
2202 | for (n = 0; n < nfences; n++) { | |
2203 | struct drm_i915_gem_exec_fence fence; | |
2204 | struct drm_syncobj *syncobj; | |
2205 | ||
2206 | if (__copy_from_user(&fence, user++, sizeof(fence))) { | |
2207 | err = -EFAULT; | |
2208 | goto err; | |
2209 | } | |
2210 | ||
ebcaa1ff TU |
2211 | if (fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS) { |
2212 | err = -EINVAL; | |
2213 | goto err; | |
2214 | } | |
2215 | ||
cf6e7bac JE |
2216 | syncobj = drm_syncobj_find(file, fence.handle); |
2217 | if (!syncobj) { | |
2218 | DRM_DEBUG("Invalid syncobj handle provided\n"); | |
2219 | err = -ENOENT; | |
2220 | goto err; | |
2221 | } | |
2222 | ||
ebcaa1ff TU |
2223 | BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) & |
2224 | ~__I915_EXEC_FENCE_UNKNOWN_FLAGS); | |
2225 | ||
cf6e7bac JE |
2226 | fences[n] = ptr_pack_bits(syncobj, fence.flags, 2); |
2227 | } | |
2228 | ||
2229 | return fences; | |
2230 | ||
2231 | err: | |
2232 | __free_fence_array(fences, n); | |
2233 | return ERR_PTR(err); | |
2234 | } | |
2235 | ||
2236 | static void | |
2237 | put_fence_array(struct drm_i915_gem_execbuffer2 *args, | |
2238 | struct drm_syncobj **fences) | |
2239 | { | |
2240 | if (fences) | |
2241 | __free_fence_array(fences, args->num_cliprects); | |
2242 | } | |
2243 | ||
2244 | static int | |
2245 | await_fence_array(struct i915_execbuffer *eb, | |
2246 | struct drm_syncobj **fences) | |
2247 | { | |
2248 | const unsigned int nfences = eb->args->num_cliprects; | |
2249 | unsigned int n; | |
2250 | int err; | |
2251 | ||
2252 | for (n = 0; n < nfences; n++) { | |
2253 | struct drm_syncobj *syncobj; | |
2254 | struct dma_fence *fence; | |
2255 | unsigned int flags; | |
2256 | ||
2257 | syncobj = ptr_unpack_bits(fences[n], &flags, 2); | |
2258 | if (!(flags & I915_EXEC_FENCE_WAIT)) | |
2259 | continue; | |
2260 | ||
afca4216 | 2261 | fence = drm_syncobj_fence_get(syncobj); |
cf6e7bac JE |
2262 | if (!fence) |
2263 | return -EINVAL; | |
2264 | ||
e61e0f51 | 2265 | err = i915_request_await_dma_fence(eb->request, fence); |
cf6e7bac JE |
2266 | dma_fence_put(fence); |
2267 | if (err < 0) | |
2268 | return err; | |
2269 | } | |
2270 | ||
2271 | return 0; | |
2272 | } | |
2273 | ||
2274 | static void | |
2275 | signal_fence_array(struct i915_execbuffer *eb, | |
2276 | struct drm_syncobj **fences) | |
2277 | { | |
2278 | const unsigned int nfences = eb->args->num_cliprects; | |
2279 | struct dma_fence * const fence = &eb->request->fence; | |
2280 | unsigned int n; | |
2281 | ||
2282 | for (n = 0; n < nfences; n++) { | |
2283 | struct drm_syncobj *syncobj; | |
2284 | unsigned int flags; | |
2285 | ||
2286 | syncobj = ptr_unpack_bits(fences[n], &flags, 2); | |
2287 | if (!(flags & I915_EXEC_FENCE_SIGNAL)) | |
2288 | continue; | |
2289 | ||
0b258ed1 | 2290 | drm_syncobj_replace_fence(syncobj, fence); |
cf6e7bac JE |
2291 | } |
2292 | } | |
2293 | ||
54cf91dc | 2294 | static int |
650bc635 | 2295 | i915_gem_do_execbuffer(struct drm_device *dev, |
54cf91dc CW |
2296 | struct drm_file *file, |
2297 | struct drm_i915_gem_execbuffer2 *args, | |
cf6e7bac JE |
2298 | struct drm_i915_gem_exec_object2 *exec, |
2299 | struct drm_syncobj **fences) | |
54cf91dc | 2300 | { |
650bc635 | 2301 | struct i915_execbuffer eb; |
fec0445c | 2302 | struct dma_fence *in_fence = NULL; |
a88b6e4c | 2303 | struct dma_fence *exec_fence = NULL; |
fec0445c CW |
2304 | struct sync_file *out_fence = NULL; |
2305 | int out_fence_fd = -1; | |
2889caa9 | 2306 | int err; |
432e58ed | 2307 | |
74c1c694 | 2308 | BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS); |
2889caa9 CW |
2309 | BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS & |
2310 | ~__EXEC_OBJECT_UNKNOWN_FLAGS); | |
54cf91dc | 2311 | |
650bc635 CW |
2312 | eb.i915 = to_i915(dev); |
2313 | eb.file = file; | |
2314 | eb.args = args; | |
7dd4f672 | 2315 | if (DBG_FORCE_RELOC || !(args->flags & I915_EXEC_NO_RELOC)) |
2889caa9 | 2316 | args->flags |= __EXEC_HAS_RELOC; |
c7c6e46f | 2317 | |
650bc635 | 2318 | eb.exec = exec; |
170fa29b CW |
2319 | eb.vma = (struct i915_vma **)(exec + args->buffer_count + 1); |
2320 | eb.vma[0] = NULL; | |
c7c6e46f CW |
2321 | eb.flags = (unsigned int *)(eb.vma + args->buffer_count + 1); |
2322 | ||
2889caa9 | 2323 | eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS; |
650bc635 CW |
2324 | reloc_cache_init(&eb.reloc_cache, eb.i915); |
2325 | ||
2889caa9 | 2326 | eb.buffer_count = args->buffer_count; |
650bc635 CW |
2327 | eb.batch_start_offset = args->batch_start_offset; |
2328 | eb.batch_len = args->batch_len; | |
2329 | ||
2889caa9 | 2330 | eb.batch_flags = 0; |
d7d4eedd | 2331 | if (args->flags & I915_EXEC_SECURE) { |
b3ac9f25 | 2332 | if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN)) |
d7d4eedd CW |
2333 | return -EPERM; |
2334 | ||
2889caa9 | 2335 | eb.batch_flags |= I915_DISPATCH_SECURE; |
d7d4eedd | 2336 | } |
b45305fc | 2337 | if (args->flags & I915_EXEC_IS_PINNED) |
2889caa9 | 2338 | eb.batch_flags |= I915_DISPATCH_PINNED; |
54cf91dc | 2339 | |
fec0445c CW |
2340 | if (args->flags & I915_EXEC_FENCE_IN) { |
2341 | in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2)); | |
4a04e371 DCS |
2342 | if (!in_fence) |
2343 | return -EINVAL; | |
fec0445c CW |
2344 | } |
2345 | ||
a88b6e4c CW |
2346 | if (args->flags & I915_EXEC_FENCE_SUBMIT) { |
2347 | if (in_fence) { | |
2348 | err = -EINVAL; | |
2349 | goto err_in_fence; | |
2350 | } | |
2351 | ||
2352 | exec_fence = sync_file_get_fence(lower_32_bits(args->rsvd2)); | |
2353 | if (!exec_fence) { | |
2354 | err = -EINVAL; | |
2355 | goto err_in_fence; | |
2356 | } | |
2357 | } | |
2358 | ||
fec0445c CW |
2359 | if (args->flags & I915_EXEC_FENCE_OUT) { |
2360 | out_fence_fd = get_unused_fd_flags(O_CLOEXEC); | |
2361 | if (out_fence_fd < 0) { | |
2889caa9 | 2362 | err = out_fence_fd; |
a88b6e4c | 2363 | goto err_exec_fence; |
fec0445c CW |
2364 | } |
2365 | } | |
2366 | ||
4d470f73 CW |
2367 | err = eb_create(&eb); |
2368 | if (err) | |
2369 | goto err_out_fence; | |
2370 | ||
2371 | GEM_BUG_ON(!eb.lut_size); | |
2889caa9 | 2372 | |
1acfc104 CW |
2373 | err = eb_select_context(&eb); |
2374 | if (unlikely(err)) | |
2375 | goto err_destroy; | |
2376 | ||
2889caa9 CW |
2377 | /* |
2378 | * Take a local wakeref for preparing to dispatch the execbuf as | |
67d97da3 CW |
2379 | * we expect to access the hardware fairly frequently in the |
2380 | * process. Upon first dispatch, we acquire another prolonged | |
2381 | * wakeref that we hold until the GPU has been idle for at least | |
2382 | * 100ms. | |
2383 | */ | |
8f2a1057 | 2384 | intel_gt_pm_get(eb.i915); |
1acfc104 | 2385 | |
2889caa9 CW |
2386 | err = i915_mutex_lock_interruptible(dev); |
2387 | if (err) | |
2388 | goto err_rpm; | |
f65c9168 | 2389 | |
8f2a1057 | 2390 | err = eb_select_engine(&eb, file, args); |
d6f328bf CW |
2391 | if (unlikely(err)) |
2392 | goto err_unlock; | |
2393 | ||
8f2a1057 CW |
2394 | err = eb_wait_for_ring(&eb); /* may temporarily drop struct_mutex */ |
2395 | if (unlikely(err)) | |
2396 | goto err_engine; | |
2397 | ||
2889caa9 | 2398 | err = eb_relocate(&eb); |
1f727d9e | 2399 | if (err) { |
2889caa9 CW |
2400 | /* |
2401 | * If the user expects the execobject.offset and | |
2402 | * reloc.presumed_offset to be an exact match, | |
2403 | * as for using NO_RELOC, then we cannot update | |
2404 | * the execobject.offset until we have completed | |
2405 | * relocation. | |
2406 | */ | |
2407 | args->flags &= ~__EXEC_HAS_RELOC; | |
2889caa9 | 2408 | goto err_vma; |
1f727d9e | 2409 | } |
54cf91dc | 2410 | |
c7c6e46f | 2411 | if (unlikely(*eb.batch->exec_flags & EXEC_OBJECT_WRITE)) { |
ff240199 | 2412 | DRM_DEBUG("Attempting to use self-modifying batch buffer\n"); |
2889caa9 CW |
2413 | err = -EINVAL; |
2414 | goto err_vma; | |
54cf91dc | 2415 | } |
650bc635 CW |
2416 | if (eb.batch_start_offset > eb.batch->size || |
2417 | eb.batch_len > eb.batch->size - eb.batch_start_offset) { | |
0b537272 | 2418 | DRM_DEBUG("Attempting to use out-of-bounds batch\n"); |
2889caa9 CW |
2419 | err = -EINVAL; |
2420 | goto err_vma; | |
0b537272 | 2421 | } |
54cf91dc | 2422 | |
3dbf26ed | 2423 | if (eb_use_cmdparser(&eb)) { |
59bfa124 CW |
2424 | struct i915_vma *vma; |
2425 | ||
650bc635 | 2426 | vma = eb_parse(&eb, drm_is_current_master(file)); |
59bfa124 | 2427 | if (IS_ERR(vma)) { |
2889caa9 CW |
2428 | err = PTR_ERR(vma); |
2429 | goto err_vma; | |
78a42377 | 2430 | } |
17cabf57 | 2431 | |
59bfa124 | 2432 | if (vma) { |
c7c7372e RP |
2433 | /* |
2434 | * Batch parsed and accepted: | |
2435 | * | |
2436 | * Set the DISPATCH_SECURE bit to remove the NON_SECURE | |
2437 | * bit from MI_BATCH_BUFFER_START commands issued in | |
2438 | * the dispatch_execbuffer implementations. We | |
2439 | * specifically don't want that set on batches the | |
2440 | * command parser has accepted. | |
2441 | */ | |
2889caa9 | 2442 | eb.batch_flags |= I915_DISPATCH_SECURE; |
650bc635 CW |
2443 | eb.batch_start_offset = 0; |
2444 | eb.batch = vma; | |
c7c7372e | 2445 | } |
351e3db2 BV |
2446 | } |
2447 | ||
650bc635 CW |
2448 | if (eb.batch_len == 0) |
2449 | eb.batch_len = eb.batch->size - eb.batch_start_offset; | |
78a42377 | 2450 | |
2889caa9 CW |
2451 | /* |
2452 | * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure | |
d7d4eedd | 2453 | * batch" bit. Hence we need to pin secure batches into the global gtt. |
28cf5415 | 2454 | * hsw should have this fixed, but bdw mucks it up again. */ |
2889caa9 | 2455 | if (eb.batch_flags & I915_DISPATCH_SECURE) { |
058d88c4 | 2456 | struct i915_vma *vma; |
59bfa124 | 2457 | |
da51a1e7 DV |
2458 | /* |
2459 | * So on first glance it looks freaky that we pin the batch here | |
2460 | * outside of the reservation loop. But: | |
2461 | * - The batch is already pinned into the relevant ppgtt, so we | |
2462 | * already have the backing storage fully allocated. | |
2463 | * - No other BO uses the global gtt (well contexts, but meh), | |
fd0753cf | 2464 | * so we don't really have issues with multiple objects not |
da51a1e7 DV |
2465 | * fitting due to fragmentation. |
2466 | * So this is actually safe. | |
2467 | */ | |
2889caa9 | 2468 | vma = i915_gem_object_ggtt_pin(eb.batch->obj, NULL, 0, 0, 0); |
058d88c4 | 2469 | if (IS_ERR(vma)) { |
2889caa9 CW |
2470 | err = PTR_ERR(vma); |
2471 | goto err_vma; | |
058d88c4 | 2472 | } |
d7d4eedd | 2473 | |
650bc635 | 2474 | eb.batch = vma; |
59bfa124 | 2475 | } |
d7d4eedd | 2476 | |
7dd4f672 CW |
2477 | /* All GPU relocation batches must be submitted prior to the user rq */ |
2478 | GEM_BUG_ON(eb.reloc_cache.rq); | |
2479 | ||
0c8dac88 | 2480 | /* Allocate a request for this batch buffer nice and early. */ |
8f2a1057 | 2481 | eb.request = i915_request_create(eb.context); |
650bc635 | 2482 | if (IS_ERR(eb.request)) { |
2889caa9 | 2483 | err = PTR_ERR(eb.request); |
0c8dac88 | 2484 | goto err_batch_unpin; |
26827088 | 2485 | } |
0c8dac88 | 2486 | |
fec0445c | 2487 | if (in_fence) { |
e61e0f51 | 2488 | err = i915_request_await_dma_fence(eb.request, in_fence); |
2889caa9 | 2489 | if (err < 0) |
fec0445c CW |
2490 | goto err_request; |
2491 | } | |
2492 | ||
a88b6e4c CW |
2493 | if (exec_fence) { |
2494 | err = i915_request_await_execution(eb.request, exec_fence, | |
2495 | eb.engine->bond_execute); | |
2496 | if (err < 0) | |
2497 | goto err_request; | |
2498 | } | |
2499 | ||
cf6e7bac JE |
2500 | if (fences) { |
2501 | err = await_fence_array(&eb, fences); | |
2502 | if (err) | |
2503 | goto err_request; | |
2504 | } | |
2505 | ||
fec0445c | 2506 | if (out_fence_fd != -1) { |
650bc635 | 2507 | out_fence = sync_file_create(&eb.request->fence); |
fec0445c | 2508 | if (!out_fence) { |
2889caa9 | 2509 | err = -ENOMEM; |
fec0445c CW |
2510 | goto err_request; |
2511 | } | |
2512 | } | |
2513 | ||
2889caa9 CW |
2514 | /* |
2515 | * Whilst this request exists, batch_obj will be on the | |
17f298cf CW |
2516 | * active_list, and so will hold the active reference. Only when this |
2517 | * request is retired will the the batch_obj be moved onto the | |
2518 | * inactive_list and lose its active reference. Hence we do not need | |
2519 | * to explicitly hold another reference here. | |
2520 | */ | |
650bc635 | 2521 | eb.request->batch = eb.batch; |
5f19e2bf | 2522 | |
e61e0f51 | 2523 | trace_i915_request_queue(eb.request, eb.batch_flags); |
2889caa9 | 2524 | err = eb_submit(&eb); |
aa9b7810 | 2525 | err_request: |
650bc635 | 2526 | add_to_client(eb.request, file); |
8f2a1057 | 2527 | i915_request_add(eb.request); |
c8659efa | 2528 | |
cf6e7bac JE |
2529 | if (fences) |
2530 | signal_fence_array(&eb, fences); | |
2531 | ||
fec0445c | 2532 | if (out_fence) { |
2889caa9 | 2533 | if (err == 0) { |
fec0445c | 2534 | fd_install(out_fence_fd, out_fence->file); |
b6a88e4a | 2535 | args->rsvd2 &= GENMASK_ULL(31, 0); /* keep in-fence */ |
fec0445c CW |
2536 | args->rsvd2 |= (u64)out_fence_fd << 32; |
2537 | out_fence_fd = -1; | |
2538 | } else { | |
2539 | fput(out_fence->file); | |
2540 | } | |
2541 | } | |
54cf91dc | 2542 | |
0c8dac88 | 2543 | err_batch_unpin: |
2889caa9 | 2544 | if (eb.batch_flags & I915_DISPATCH_SECURE) |
650bc635 | 2545 | i915_vma_unpin(eb.batch); |
2889caa9 CW |
2546 | err_vma: |
2547 | if (eb.exec) | |
2548 | eb_release_vmas(&eb); | |
8f2a1057 CW |
2549 | err_engine: |
2550 | eb_unpin_context(&eb); | |
d6f328bf | 2551 | err_unlock: |
54cf91dc | 2552 | mutex_unlock(&dev->struct_mutex); |
2889caa9 | 2553 | err_rpm: |
8f2a1057 CW |
2554 | intel_gt_pm_put(eb.i915); |
2555 | i915_gem_context_put(eb.gem_context); | |
1acfc104 | 2556 | err_destroy: |
2889caa9 | 2557 | eb_destroy(&eb); |
4d470f73 | 2558 | err_out_fence: |
fec0445c CW |
2559 | if (out_fence_fd != -1) |
2560 | put_unused_fd(out_fence_fd); | |
a88b6e4c CW |
2561 | err_exec_fence: |
2562 | dma_fence_put(exec_fence); | |
4a04e371 | 2563 | err_in_fence: |
fec0445c | 2564 | dma_fence_put(in_fence); |
2889caa9 | 2565 | return err; |
54cf91dc CW |
2566 | } |
2567 | ||
d710fc16 CW |
2568 | static size_t eb_element_size(void) |
2569 | { | |
2570 | return (sizeof(struct drm_i915_gem_exec_object2) + | |
2571 | sizeof(struct i915_vma *) + | |
2572 | sizeof(unsigned int)); | |
2573 | } | |
2574 | ||
2575 | static bool check_buffer_count(size_t count) | |
2576 | { | |
2577 | const size_t sz = eb_element_size(); | |
2578 | ||
2579 | /* | |
2580 | * When using LUT_HANDLE, we impose a limit of INT_MAX for the lookup | |
2581 | * array size (see eb_create()). Otherwise, we can accept an array as | |
2582 | * large as can be addressed (though use large arrays at your peril)! | |
2583 | */ | |
2584 | ||
2585 | return !(count < 1 || count > INT_MAX || count > SIZE_MAX / sz - 1); | |
2586 | } | |
2587 | ||
54cf91dc CW |
2588 | /* |
2589 | * Legacy execbuffer just creates an exec2 list from the original exec object | |
2590 | * list array and passes it to the real function. | |
2591 | */ | |
2592 | int | |
6a20fe7b VS |
2593 | i915_gem_execbuffer_ioctl(struct drm_device *dev, void *data, |
2594 | struct drm_file *file) | |
54cf91dc CW |
2595 | { |
2596 | struct drm_i915_gem_execbuffer *args = data; | |
2597 | struct drm_i915_gem_execbuffer2 exec2; | |
2598 | struct drm_i915_gem_exec_object *exec_list = NULL; | |
2599 | struct drm_i915_gem_exec_object2 *exec2_list = NULL; | |
d710fc16 | 2600 | const size_t count = args->buffer_count; |
2889caa9 CW |
2601 | unsigned int i; |
2602 | int err; | |
54cf91dc | 2603 | |
d710fc16 CW |
2604 | if (!check_buffer_count(count)) { |
2605 | DRM_DEBUG("execbuf2 with %zd buffers\n", count); | |
54cf91dc CW |
2606 | return -EINVAL; |
2607 | } | |
2608 | ||
2889caa9 CW |
2609 | exec2.buffers_ptr = args->buffers_ptr; |
2610 | exec2.buffer_count = args->buffer_count; | |
2611 | exec2.batch_start_offset = args->batch_start_offset; | |
2612 | exec2.batch_len = args->batch_len; | |
2613 | exec2.DR1 = args->DR1; | |
2614 | exec2.DR4 = args->DR4; | |
2615 | exec2.num_cliprects = args->num_cliprects; | |
2616 | exec2.cliprects_ptr = args->cliprects_ptr; | |
2617 | exec2.flags = I915_EXEC_RENDER; | |
2618 | i915_execbuffer2_set_context_id(exec2, 0); | |
2619 | ||
2620 | if (!i915_gem_check_execbuffer(&exec2)) | |
2621 | return -EINVAL; | |
2622 | ||
54cf91dc | 2623 | /* Copy in the exec list from userland */ |
d710fc16 | 2624 | exec_list = kvmalloc_array(count, sizeof(*exec_list), |
0ee931c4 | 2625 | __GFP_NOWARN | GFP_KERNEL); |
d710fc16 | 2626 | exec2_list = kvmalloc_array(count + 1, eb_element_size(), |
0ee931c4 | 2627 | __GFP_NOWARN | GFP_KERNEL); |
54cf91dc | 2628 | if (exec_list == NULL || exec2_list == NULL) { |
ff240199 | 2629 | DRM_DEBUG("Failed to allocate exec list for %d buffers\n", |
54cf91dc | 2630 | args->buffer_count); |
2098105e MH |
2631 | kvfree(exec_list); |
2632 | kvfree(exec2_list); | |
54cf91dc CW |
2633 | return -ENOMEM; |
2634 | } | |
2889caa9 | 2635 | err = copy_from_user(exec_list, |
3ed605bc | 2636 | u64_to_user_ptr(args->buffers_ptr), |
d710fc16 | 2637 | sizeof(*exec_list) * count); |
2889caa9 | 2638 | if (err) { |
ff240199 | 2639 | DRM_DEBUG("copy %d exec entries failed %d\n", |
2889caa9 | 2640 | args->buffer_count, err); |
2098105e MH |
2641 | kvfree(exec_list); |
2642 | kvfree(exec2_list); | |
54cf91dc CW |
2643 | return -EFAULT; |
2644 | } | |
2645 | ||
2646 | for (i = 0; i < args->buffer_count; i++) { | |
2647 | exec2_list[i].handle = exec_list[i].handle; | |
2648 | exec2_list[i].relocation_count = exec_list[i].relocation_count; | |
2649 | exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr; | |
2650 | exec2_list[i].alignment = exec_list[i].alignment; | |
2651 | exec2_list[i].offset = exec_list[i].offset; | |
f0836b72 | 2652 | if (INTEL_GEN(to_i915(dev)) < 4) |
54cf91dc CW |
2653 | exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE; |
2654 | else | |
2655 | exec2_list[i].flags = 0; | |
2656 | } | |
2657 | ||
cf6e7bac | 2658 | err = i915_gem_do_execbuffer(dev, file, &exec2, exec2_list, NULL); |
2889caa9 | 2659 | if (exec2.flags & __EXEC_HAS_RELOC) { |
9aab8bff | 2660 | struct drm_i915_gem_exec_object __user *user_exec_list = |
3ed605bc | 2661 | u64_to_user_ptr(args->buffers_ptr); |
9aab8bff | 2662 | |
54cf91dc | 2663 | /* Copy the new buffer offsets back to the user's exec list. */ |
9aab8bff | 2664 | for (i = 0; i < args->buffer_count; i++) { |
2889caa9 CW |
2665 | if (!(exec2_list[i].offset & UPDATE)) |
2666 | continue; | |
2667 | ||
934acce3 | 2668 | exec2_list[i].offset = |
2889caa9 CW |
2669 | gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); |
2670 | exec2_list[i].offset &= PIN_OFFSET_MASK; | |
2671 | if (__copy_to_user(&user_exec_list[i].offset, | |
2672 | &exec2_list[i].offset, | |
2673 | sizeof(user_exec_list[i].offset))) | |
9aab8bff | 2674 | break; |
54cf91dc CW |
2675 | } |
2676 | } | |
2677 | ||
2098105e MH |
2678 | kvfree(exec_list); |
2679 | kvfree(exec2_list); | |
2889caa9 | 2680 | return err; |
54cf91dc CW |
2681 | } |
2682 | ||
2683 | int | |
6a20fe7b VS |
2684 | i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data, |
2685 | struct drm_file *file) | |
54cf91dc CW |
2686 | { |
2687 | struct drm_i915_gem_execbuffer2 *args = data; | |
2889caa9 | 2688 | struct drm_i915_gem_exec_object2 *exec2_list; |
cf6e7bac | 2689 | struct drm_syncobj **fences = NULL; |
d710fc16 | 2690 | const size_t count = args->buffer_count; |
2889caa9 | 2691 | int err; |
54cf91dc | 2692 | |
d710fc16 CW |
2693 | if (!check_buffer_count(count)) { |
2694 | DRM_DEBUG("execbuf2 with %zd buffers\n", count); | |
54cf91dc CW |
2695 | return -EINVAL; |
2696 | } | |
2697 | ||
2889caa9 CW |
2698 | if (!i915_gem_check_execbuffer(args)) |
2699 | return -EINVAL; | |
2700 | ||
2701 | /* Allocate an extra slot for use by the command parser */ | |
d710fc16 | 2702 | exec2_list = kvmalloc_array(count + 1, eb_element_size(), |
0ee931c4 | 2703 | __GFP_NOWARN | GFP_KERNEL); |
54cf91dc | 2704 | if (exec2_list == NULL) { |
d710fc16 CW |
2705 | DRM_DEBUG("Failed to allocate exec list for %zd buffers\n", |
2706 | count); | |
54cf91dc CW |
2707 | return -ENOMEM; |
2708 | } | |
2889caa9 CW |
2709 | if (copy_from_user(exec2_list, |
2710 | u64_to_user_ptr(args->buffers_ptr), | |
d710fc16 CW |
2711 | sizeof(*exec2_list) * count)) { |
2712 | DRM_DEBUG("copy %zd exec entries failed\n", count); | |
2098105e | 2713 | kvfree(exec2_list); |
54cf91dc CW |
2714 | return -EFAULT; |
2715 | } | |
2716 | ||
cf6e7bac JE |
2717 | if (args->flags & I915_EXEC_FENCE_ARRAY) { |
2718 | fences = get_fence_array(args, file); | |
2719 | if (IS_ERR(fences)) { | |
2720 | kvfree(exec2_list); | |
2721 | return PTR_ERR(fences); | |
2722 | } | |
2723 | } | |
2724 | ||
2725 | err = i915_gem_do_execbuffer(dev, file, args, exec2_list, fences); | |
2889caa9 CW |
2726 | |
2727 | /* | |
2728 | * Now that we have begun execution of the batchbuffer, we ignore | |
2729 | * any new error after this point. Also given that we have already | |
2730 | * updated the associated relocations, we try to write out the current | |
2731 | * object locations irrespective of any error. | |
2732 | */ | |
2733 | if (args->flags & __EXEC_HAS_RELOC) { | |
d593d992 | 2734 | struct drm_i915_gem_exec_object2 __user *user_exec_list = |
2889caa9 CW |
2735 | u64_to_user_ptr(args->buffers_ptr); |
2736 | unsigned int i; | |
9aab8bff | 2737 | |
2889caa9 | 2738 | /* Copy the new buffer offsets back to the user's exec list. */ |
594cc251 LT |
2739 | /* |
2740 | * Note: count * sizeof(*user_exec_list) does not overflow, | |
2741 | * because we checked 'count' in check_buffer_count(). | |
2742 | * | |
2743 | * And this range already got effectively checked earlier | |
2744 | * when we did the "copy_from_user()" above. | |
2745 | */ | |
2746 | if (!user_access_begin(user_exec_list, count * sizeof(*user_exec_list))) | |
8f4faed0 | 2747 | goto end; |
594cc251 | 2748 | |
9aab8bff | 2749 | for (i = 0; i < args->buffer_count; i++) { |
2889caa9 CW |
2750 | if (!(exec2_list[i].offset & UPDATE)) |
2751 | continue; | |
2752 | ||
934acce3 | 2753 | exec2_list[i].offset = |
2889caa9 CW |
2754 | gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); |
2755 | unsafe_put_user(exec2_list[i].offset, | |
2756 | &user_exec_list[i].offset, | |
2757 | end_user); | |
54cf91dc | 2758 | } |
2889caa9 CW |
2759 | end_user: |
2760 | user_access_end(); | |
8f4faed0 | 2761 | end:; |
54cf91dc CW |
2762 | } |
2763 | ||
2889caa9 | 2764 | args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS; |
cf6e7bac | 2765 | put_fence_array(args, fences); |
2098105e | 2766 | kvfree(exec2_list); |
2889caa9 | 2767 | return err; |
54cf91dc | 2768 | } |