Commit | Line | Data |
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54cf91dc | 1 | /* |
10be98a7 | 2 | * SPDX-License-Identifier: MIT |
54cf91dc | 3 | * |
10be98a7 | 4 | * Copyright © 2008,2010 Intel Corporation |
54cf91dc CW |
5 | */ |
6 | ||
daedaa33 | 7 | #include <linux/intel-iommu.h> |
52791eee | 8 | #include <linux/dma-resv.h> |
fec0445c | 9 | #include <linux/sync_file.h> |
ad778f89 CW |
10 | #include <linux/uaccess.h> |
11 | ||
cf6e7bac | 12 | #include <drm/drm_syncobj.h> |
ad778f89 | 13 | |
df0566a6 JN |
14 | #include "display/intel_frontbuffer.h" |
15 | ||
afa13085 | 16 | #include "gem/i915_gem_ioctls.h" |
10be98a7 | 17 | #include "gt/intel_context.h" |
45233ab2 | 18 | #include "gt/intel_gpu_commands.h" |
baea429d | 19 | #include "gt/intel_gt.h" |
16e87459 | 20 | #include "gt/intel_gt_buffer_pool.h" |
8f2a1057 | 21 | #include "gt/intel_gt_pm.h" |
2871ea85 | 22 | #include "gt/intel_ring.h" |
8f2a1057 | 23 | |
d3ac8d42 DCS |
24 | #include "pxp/intel_pxp.h" |
25 | ||
23d639d7 | 26 | #include "i915_cmd_parser.h" |
6da4a2c4 | 27 | #include "i915_drv.h" |
57822dc6 | 28 | #include "i915_gem_clflush.h" |
10be98a7 | 29 | #include "i915_gem_context.h" |
6da4a2c4 | 30 | #include "i915_gem_ioctls.h" |
54cf91dc | 31 | #include "i915_trace.h" |
cda9edd0 | 32 | #include "i915_user_extensions.h" |
54cf91dc | 33 | |
7d6236bb CW |
34 | struct eb_vma { |
35 | struct i915_vma *vma; | |
36 | unsigned int flags; | |
37 | ||
38 | /** This vma's place in the execbuf reservation list */ | |
39 | struct drm_i915_gem_exec_object2 *exec; | |
40 | struct list_head bind_link; | |
41 | struct list_head reloc_link; | |
42 | ||
43 | struct hlist_node node; | |
44 | u32 handle; | |
45 | }; | |
46 | ||
ad5d95e4 DA |
47 | enum { |
48 | FORCE_CPU_RELOC = 1, | |
49 | FORCE_GTT_RELOC, | |
50 | FORCE_GPU_RELOC, | |
51 | #define DBG_FORCE_RELOC 0 /* choose one of the above! */ | |
52 | }; | |
53 | ||
bfaae47d ML |
54 | /* __EXEC_OBJECT_NO_RESERVE is BIT(31), defined in i915_vma.h */ |
55 | #define __EXEC_OBJECT_HAS_PIN BIT(30) | |
56 | #define __EXEC_OBJECT_HAS_FENCE BIT(29) | |
ed29c269 ML |
57 | #define __EXEC_OBJECT_USERPTR_INIT BIT(28) |
58 | #define __EXEC_OBJECT_NEEDS_MAP BIT(27) | |
59 | #define __EXEC_OBJECT_NEEDS_BIAS BIT(26) | |
60 | #define __EXEC_OBJECT_INTERNAL_FLAGS (~0u << 26) /* all of the above + */ | |
8ae275c2 | 61 | #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE) |
2889caa9 CW |
62 | |
63 | #define __EXEC_HAS_RELOC BIT(31) | |
2bf541ff | 64 | #define __EXEC_ENGINE_PINNED BIT(30) |
ed29c269 ML |
65 | #define __EXEC_USERPTR_USED BIT(29) |
66 | #define __EXEC_INTERNAL_FLAGS (~0u << 29) | |
2889caa9 | 67 | #define UPDATE PIN_OFFSET_FIXED |
d23db88c CW |
68 | |
69 | #define BATCH_OFFSET_BIAS (256*1024) | |
a415d355 | 70 | |
650bc635 | 71 | #define __I915_EXEC_ILLEGAL_FLAGS \ |
08e3e21a LDM |
72 | (__I915_EXEC_UNKNOWN_FLAGS | \ |
73 | I915_EXEC_CONSTANTS_MASK | \ | |
74 | I915_EXEC_RESOURCE_STREAMER) | |
5b043f4e | 75 | |
d20ac620 CW |
76 | /* Catch emission of unexpected errors for CI! */ |
77 | #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) | |
78 | #undef EINVAL | |
79 | #define EINVAL ({ \ | |
80 | DRM_DEBUG_DRIVER("EINVAL at %s:%d\n", __func__, __LINE__); \ | |
81 | 22; \ | |
82 | }) | |
83 | #endif | |
84 | ||
2889caa9 CW |
85 | /** |
86 | * DOC: User command execution | |
87 | * | |
88 | * Userspace submits commands to be executed on the GPU as an instruction | |
89 | * stream within a GEM object we call a batchbuffer. This instructions may | |
90 | * refer to other GEM objects containing auxiliary state such as kernels, | |
91 | * samplers, render targets and even secondary batchbuffers. Userspace does | |
92 | * not know where in the GPU memory these objects reside and so before the | |
93 | * batchbuffer is passed to the GPU for execution, those addresses in the | |
94 | * batchbuffer and auxiliary objects are updated. This is known as relocation, | |
95 | * or patching. To try and avoid having to relocate each object on the next | |
96 | * execution, userspace is told the location of those objects in this pass, | |
97 | * but this remains just a hint as the kernel may choose a new location for | |
98 | * any object in the future. | |
99 | * | |
99d7e4ee KR |
100 | * At the level of talking to the hardware, submitting a batchbuffer for the |
101 | * GPU to execute is to add content to a buffer from which the HW | |
102 | * command streamer is reading. | |
103 | * | |
104 | * 1. Add a command to load the HW context. For Logical Ring Contexts, i.e. | |
105 | * Execlists, this command is not placed on the same buffer as the | |
106 | * remaining items. | |
107 | * | |
108 | * 2. Add a command to invalidate caches to the buffer. | |
109 | * | |
110 | * 3. Add a batchbuffer start command to the buffer; the start command is | |
111 | * essentially a token together with the GPU address of the batchbuffer | |
112 | * to be executed. | |
113 | * | |
114 | * 4. Add a pipeline flush to the buffer. | |
115 | * | |
116 | * 5. Add a memory write command to the buffer to record when the GPU | |
117 | * is done executing the batchbuffer. The memory write writes the | |
118 | * global sequence number of the request, ``i915_request::global_seqno``; | |
119 | * the i915 driver uses the current value in the register to determine | |
120 | * if the GPU has completed the batchbuffer. | |
121 | * | |
122 | * 6. Add a user interrupt command to the buffer. This command instructs | |
123 | * the GPU to issue an interrupt when the command, pipeline flush and | |
124 | * memory write are completed. | |
125 | * | |
126 | * 7. Inform the hardware of the additional commands added to the buffer | |
127 | * (by updating the tail pointer). | |
128 | * | |
2889caa9 CW |
129 | * Processing an execbuf ioctl is conceptually split up into a few phases. |
130 | * | |
131 | * 1. Validation - Ensure all the pointers, handles and flags are valid. | |
132 | * 2. Reservation - Assign GPU address space for every object | |
133 | * 3. Relocation - Update any addresses to point to the final locations | |
134 | * 4. Serialisation - Order the request with respect to its dependencies | |
135 | * 5. Construction - Construct a request to execute the batchbuffer | |
136 | * 6. Submission (at some point in the future execution) | |
137 | * | |
138 | * Reserving resources for the execbuf is the most complicated phase. We | |
139 | * neither want to have to migrate the object in the address space, nor do | |
140 | * we want to have to update any relocations pointing to this object. Ideally, | |
141 | * we want to leave the object where it is and for all the existing relocations | |
142 | * to match. If the object is given a new address, or if userspace thinks the | |
143 | * object is elsewhere, we have to parse all the relocation entries and update | |
144 | * the addresses. Userspace can set the I915_EXEC_NORELOC flag to hint that | |
145 | * all the target addresses in all of its objects match the value in the | |
146 | * relocation entries and that they all match the presumed offsets given by the | |
147 | * list of execbuffer objects. Using this knowledge, we know that if we haven't | |
148 | * moved any buffers, all the relocation entries are valid and we can skip | |
149 | * the update. (If userspace is wrong, the likely outcome is an impromptu GPU | |
150 | * hang.) The requirement for using I915_EXEC_NO_RELOC are: | |
151 | * | |
152 | * The addresses written in the objects must match the corresponding | |
153 | * reloc.presumed_offset which in turn must match the corresponding | |
154 | * execobject.offset. | |
155 | * | |
156 | * Any render targets written to in the batch must be flagged with | |
157 | * EXEC_OBJECT_WRITE. | |
158 | * | |
159 | * To avoid stalling, execobject.offset should match the current | |
160 | * address of that object within the active context. | |
161 | * | |
162 | * The reservation is done is multiple phases. First we try and keep any | |
163 | * object already bound in its current location - so as long as meets the | |
164 | * constraints imposed by the new execbuffer. Any object left unbound after the | |
165 | * first pass is then fitted into any available idle space. If an object does | |
166 | * not fit, all objects are removed from the reservation and the process rerun | |
167 | * after sorting the objects into a priority order (more difficult to fit | |
168 | * objects are tried first). Failing that, the entire VM is cleared and we try | |
169 | * to fit the execbuf once last time before concluding that it simply will not | |
170 | * fit. | |
171 | * | |
172 | * A small complication to all of this is that we allow userspace not only to | |
173 | * specify an alignment and a size for the object in the address space, but | |
174 | * we also allow userspace to specify the exact offset. This objects are | |
175 | * simpler to place (the location is known a priori) all we have to do is make | |
176 | * sure the space is available. | |
177 | * | |
178 | * Once all the objects are in place, patching up the buried pointers to point | |
179 | * to the final locations is a fairly simple job of walking over the relocation | |
180 | * entry arrays, looking up the right address and rewriting the value into | |
181 | * the object. Simple! ... The relocation entries are stored in user memory | |
182 | * and so to access them we have to copy them into a local buffer. That copy | |
183 | * has to avoid taking any pagefaults as they may lead back to a GEM object | |
184 | * requiring the struct_mutex (i.e. recursive deadlock). So once again we split | |
185 | * the relocation into multiple passes. First we try to do everything within an | |
186 | * atomic context (avoid the pagefaults) which requires that we never wait. If | |
187 | * we detect that we may wait, or if we need to fault, then we have to fallback | |
188 | * to a slower path. The slowpath has to drop the mutex. (Can you hear alarm | |
189 | * bells yet?) Dropping the mutex means that we lose all the state we have | |
190 | * built up so far for the execbuf and we must reset any global data. However, | |
191 | * we do leave the objects pinned in their final locations - which is a | |
192 | * potential issue for concurrent execbufs. Once we have left the mutex, we can | |
193 | * allocate and copy all the relocation entries into a large array at our | |
194 | * leisure, reacquire the mutex, reclaim all the objects and other state and | |
195 | * then proceed to update any incorrect addresses with the objects. | |
196 | * | |
197 | * As we process the relocation entries, we maintain a record of whether the | |
198 | * object is being written to. Using NORELOC, we expect userspace to provide | |
199 | * this information instead. We also check whether we can skip the relocation | |
200 | * by comparing the expected value inside the relocation entry with the target's | |
201 | * final address. If they differ, we have to map the current object and rewrite | |
202 | * the 4 or 8 byte pointer within. | |
203 | * | |
204 | * Serialising an execbuf is quite simple according to the rules of the GEM | |
205 | * ABI. Execution within each context is ordered by the order of submission. | |
206 | * Writes to any GEM object are in order of submission and are exclusive. Reads | |
207 | * from a GEM object are unordered with respect to other reads, but ordered by | |
208 | * writes. A write submitted after a read cannot occur before the read, and | |
209 | * similarly any read submitted after a write cannot occur before the write. | |
210 | * Writes are ordered between engines such that only one write occurs at any | |
211 | * time (completing any reads beforehand) - using semaphores where available | |
212 | * and CPU serialisation otherwise. Other GEM access obey the same rules, any | |
213 | * write (either via mmaps using set-domain, or via pwrite) must flush all GPU | |
214 | * reads before starting, and any read (either using set-domain or pread) must | |
215 | * flush all GPU writes before starting. (Note we only employ a barrier before, | |
216 | * we currently rely on userspace not concurrently starting a new execution | |
217 | * whilst reading or writing to an object. This may be an advantage or not | |
218 | * depending on how much you trust userspace not to shoot themselves in the | |
219 | * foot.) Serialisation may just result in the request being inserted into | |
220 | * a DAG awaiting its turn, but most simple is to wait on the CPU until | |
221 | * all dependencies are resolved. | |
222 | * | |
223 | * After all of that, is just a matter of closing the request and handing it to | |
224 | * the hardware (well, leaving it in a queue to be executed). However, we also | |
225 | * offer the ability for batchbuffers to be run with elevated privileges so | |
226 | * that they access otherwise hidden registers. (Used to adjust L3 cache etc.) | |
227 | * Before any batch is given extra privileges we first must check that it | |
228 | * contains no nefarious instructions, we check that each instruction is from | |
229 | * our whitelist and all registers are also from an allowed list. We first | |
230 | * copy the user's batchbuffer to a shadow (so that the user doesn't have | |
231 | * access to it, either by the CPU or GPU as we scan it) and then parse each | |
232 | * instruction. If everything is ok, we set a flag telling the hardware to run | |
233 | * the batchbuffer in trusted mode, otherwise the ioctl is rejected. | |
234 | */ | |
235 | ||
13149e8b LL |
236 | struct eb_fence { |
237 | struct drm_syncobj *syncobj; /* Use with ptr_mask_bits() */ | |
238 | struct dma_fence *dma_fence; | |
239 | u64 value; | |
240 | struct dma_fence_chain *chain_fence; | |
241 | }; | |
242 | ||
650bc635 | 243 | struct i915_execbuffer { |
2889caa9 CW |
244 | struct drm_i915_private *i915; /** i915 backpointer */ |
245 | struct drm_file *file; /** per-file lookup tables and limits */ | |
246 | struct drm_i915_gem_execbuffer2 *args; /** ioctl parameters */ | |
247 | struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */ | |
7d6236bb | 248 | struct eb_vma *vma; |
2889caa9 | 249 | |
544460c3 | 250 | struct intel_gt *gt; /* gt for the execbuf */ |
8f2a1057 CW |
251 | struct intel_context *context; /* logical state for the request */ |
252 | struct i915_gem_context *gem_context; /** caller's context */ | |
2889caa9 | 253 | |
544460c3 MB |
254 | /** our requests to build */ |
255 | struct i915_request *requests[MAX_ENGINE_INSTANCE + 1]; | |
256 | /** identity of the batch obj/vma */ | |
257 | struct eb_vma *batches[MAX_ENGINE_INSTANCE + 1]; | |
32d94048 | 258 | struct i915_vma *trampoline; /** trampoline used for chaining */ |
2889caa9 | 259 | |
544460c3 MB |
260 | /** used for excl fence in dma_resv objects when > 1 BB submitted */ |
261 | struct dma_fence *composite_fence; | |
262 | ||
2889caa9 CW |
263 | /** actual size of execobj[] as we may extend it for the cmdparser */ |
264 | unsigned int buffer_count; | |
265 | ||
544460c3 MB |
266 | /* number of batches in execbuf IOCTL */ |
267 | unsigned int num_batches; | |
268 | ||
2889caa9 CW |
269 | /** list of vma not yet bound during reservation phase */ |
270 | struct list_head unbound; | |
271 | ||
272 | /** list of vma that have execobj.relocation_count */ | |
273 | struct list_head relocs; | |
274 | ||
c43ce123 ML |
275 | struct i915_gem_ww_ctx ww; |
276 | ||
2889caa9 CW |
277 | /** |
278 | * Track the most recently used object for relocations, as we | |
279 | * frequently have to perform multiple relocations within the same | |
280 | * obj/page | |
281 | */ | |
650bc635 | 282 | struct reloc_cache { |
2889caa9 | 283 | struct drm_mm_node node; /** temporary GTT binding */ |
ad5d95e4 DA |
284 | unsigned long vaddr; /** Current kmap address */ |
285 | unsigned long page; /** Currently mapped page index */ | |
8802190f | 286 | unsigned int graphics_ver; /** Cached value of GRAPHICS_VER */ |
650bc635 | 287 | bool use_64bit_reloc : 1; |
2889caa9 CW |
288 | bool has_llc : 1; |
289 | bool has_fence : 1; | |
290 | bool needs_unfenced : 1; | |
650bc635 | 291 | } reloc_cache; |
2889caa9 CW |
292 | |
293 | u64 invalid_flags; /** Set of execobj.flags that are invalid */ | |
2889caa9 | 294 | |
544460c3 MB |
295 | /** Length of batch within object */ |
296 | u64 batch_len[MAX_ENGINE_INSTANCE + 1]; | |
2889caa9 | 297 | u32 batch_start_offset; /** Location within object of batch */ |
2889caa9 | 298 | u32 batch_flags; /** Flags composed for emit_bb_start() */ |
c43ce123 | 299 | struct intel_gt_buffer_pool_node *batch_pool; /** pool node for batch buffer */ |
2889caa9 CW |
300 | |
301 | /** | |
302 | * Indicate either the size of the hastable used to resolve | |
303 | * relocation handles, or if negative that we are using a direct | |
304 | * index into the execobj[]. | |
305 | */ | |
306 | int lut_size; | |
307 | struct hlist_head *buckets; /** ht for relocation handles */ | |
cda9edd0 | 308 | |
13149e8b LL |
309 | struct eb_fence *fences; |
310 | unsigned long num_fences; | |
67731b87 CW |
311 | }; |
312 | ||
8e4ba491 | 313 | static int eb_parse(struct i915_execbuffer *eb); |
544460c3 | 314 | static int eb_pin_engine(struct i915_execbuffer *eb, bool throttle); |
2bf541ff | 315 | static void eb_unpin_engine(struct i915_execbuffer *eb); |
8e4ba491 | 316 | |
3dbf26ed CW |
317 | static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb) |
318 | { | |
544460c3 MB |
319 | return intel_engine_requires_cmd_parser(eb->context->engine) || |
320 | (intel_engine_using_cmd_parser(eb->context->engine) && | |
435e8fc0 | 321 | eb->args->batch_len); |
3dbf26ed CW |
322 | } |
323 | ||
650bc635 | 324 | static int eb_create(struct i915_execbuffer *eb) |
67731b87 | 325 | { |
2889caa9 CW |
326 | if (!(eb->args->flags & I915_EXEC_HANDLE_LUT)) { |
327 | unsigned int size = 1 + ilog2(eb->buffer_count); | |
4ff4b44c | 328 | |
2889caa9 CW |
329 | /* |
330 | * Without a 1:1 association between relocation handles and | |
331 | * the execobject[] index, we instead create a hashtable. | |
332 | * We size it dynamically based on available memory, starting | |
333 | * first with 1:1 assocative hash and scaling back until | |
334 | * the allocation succeeds. | |
335 | * | |
336 | * Later on we use a positive lut_size to indicate we are | |
337 | * using this hashtable, and a negative value to indicate a | |
338 | * direct lookup. | |
339 | */ | |
4ff4b44c | 340 | do { |
0d95c883 | 341 | gfp_t flags; |
4d470f73 CW |
342 | |
343 | /* While we can still reduce the allocation size, don't | |
344 | * raise a warning and allow the allocation to fail. | |
345 | * On the last pass though, we want to try as hard | |
346 | * as possible to perform the allocation and warn | |
347 | * if it fails. | |
348 | */ | |
0ee931c4 | 349 | flags = GFP_KERNEL; |
4d470f73 CW |
350 | if (size > 1) |
351 | flags |= __GFP_NORETRY | __GFP_NOWARN; | |
352 | ||
4ff4b44c | 353 | eb->buckets = kzalloc(sizeof(struct hlist_head) << size, |
4d470f73 | 354 | flags); |
4ff4b44c CW |
355 | if (eb->buckets) |
356 | break; | |
357 | } while (--size); | |
358 | ||
8ae275c2 | 359 | if (unlikely(!size)) |
4d470f73 | 360 | return -ENOMEM; |
eef90ccb | 361 | |
2889caa9 | 362 | eb->lut_size = size; |
650bc635 | 363 | } else { |
2889caa9 | 364 | eb->lut_size = -eb->buffer_count; |
650bc635 | 365 | } |
eef90ccb | 366 | |
650bc635 | 367 | return 0; |
67731b87 CW |
368 | } |
369 | ||
2889caa9 CW |
370 | static bool |
371 | eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry, | |
c7c6e46f CW |
372 | const struct i915_vma *vma, |
373 | unsigned int flags) | |
2889caa9 | 374 | { |
2889caa9 CW |
375 | if (vma->node.size < entry->pad_to_size) |
376 | return true; | |
377 | ||
378 | if (entry->alignment && !IS_ALIGNED(vma->node.start, entry->alignment)) | |
379 | return true; | |
380 | ||
c7c6e46f | 381 | if (flags & EXEC_OBJECT_PINNED && |
2889caa9 CW |
382 | vma->node.start != entry->offset) |
383 | return true; | |
384 | ||
c7c6e46f | 385 | if (flags & __EXEC_OBJECT_NEEDS_BIAS && |
2889caa9 CW |
386 | vma->node.start < BATCH_OFFSET_BIAS) |
387 | return true; | |
388 | ||
c7c6e46f | 389 | if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) && |
5f22cc0b | 390 | (vma->node.start + vma->node.size + 4095) >> 32) |
2889caa9 CW |
391 | return true; |
392 | ||
1d033beb CW |
393 | if (flags & __EXEC_OBJECT_NEEDS_MAP && |
394 | !i915_vma_is_map_and_fenceable(vma)) | |
395 | return true; | |
396 | ||
2889caa9 CW |
397 | return false; |
398 | } | |
399 | ||
8a338f4b CW |
400 | static u64 eb_pin_flags(const struct drm_i915_gem_exec_object2 *entry, |
401 | unsigned int exec_flags) | |
402 | { | |
403 | u64 pin_flags = 0; | |
404 | ||
405 | if (exec_flags & EXEC_OBJECT_NEEDS_GTT) | |
406 | pin_flags |= PIN_GLOBAL; | |
407 | ||
408 | /* | |
409 | * Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset, | |
410 | * limit address to the first 4GBs for unflagged objects. | |
411 | */ | |
412 | if (!(exec_flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) | |
413 | pin_flags |= PIN_ZONE_4G; | |
414 | ||
415 | if (exec_flags & __EXEC_OBJECT_NEEDS_MAP) | |
416 | pin_flags |= PIN_MAPPABLE; | |
417 | ||
418 | if (exec_flags & EXEC_OBJECT_PINNED) | |
419 | pin_flags |= entry->offset | PIN_OFFSET_FIXED; | |
420 | else if (exec_flags & __EXEC_OBJECT_NEEDS_BIAS) | |
421 | pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS; | |
422 | ||
423 | return pin_flags; | |
424 | } | |
425 | ||
237647f4 | 426 | static inline int |
2889caa9 | 427 | eb_pin_vma(struct i915_execbuffer *eb, |
c7c6e46f | 428 | const struct drm_i915_gem_exec_object2 *entry, |
7d6236bb | 429 | struct eb_vma *ev) |
2889caa9 | 430 | { |
7d6236bb | 431 | struct i915_vma *vma = ev->vma; |
c7c6e46f | 432 | u64 pin_flags; |
237647f4 | 433 | int err; |
2889caa9 | 434 | |
616d9cee | 435 | if (vma->node.size) |
c7c6e46f | 436 | pin_flags = vma->node.start; |
616d9cee | 437 | else |
c7c6e46f | 438 | pin_flags = entry->offset & PIN_OFFSET_MASK; |
616d9cee | 439 | |
c7c6e46f | 440 | pin_flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED; |
7d6236bb | 441 | if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_GTT)) |
c7c6e46f | 442 | pin_flags |= PIN_GLOBAL; |
616d9cee | 443 | |
8a338f4b | 444 | /* Attempt to reuse the current location if available */ |
237647f4 ML |
445 | err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, pin_flags); |
446 | if (err == -EDEADLK) | |
447 | return err; | |
448 | ||
449 | if (unlikely(err)) { | |
8a338f4b | 450 | if (entry->flags & EXEC_OBJECT_PINNED) |
237647f4 | 451 | return err; |
8a338f4b CW |
452 | |
453 | /* Failing that pick any _free_ space if suitable */ | |
237647f4 | 454 | err = i915_vma_pin_ww(vma, &eb->ww, |
47b08693 ML |
455 | entry->pad_to_size, |
456 | entry->alignment, | |
457 | eb_pin_flags(entry, ev->flags) | | |
237647f4 ML |
458 | PIN_USER | PIN_NOEVICT); |
459 | if (unlikely(err)) | |
460 | return err; | |
8a338f4b | 461 | } |
2889caa9 | 462 | |
7d6236bb | 463 | if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) { |
237647f4 ML |
464 | err = i915_vma_pin_fence(vma); |
465 | if (unlikely(err)) { | |
2889caa9 | 466 | i915_vma_unpin(vma); |
237647f4 | 467 | return err; |
2889caa9 CW |
468 | } |
469 | ||
3bd40735 | 470 | if (vma->fence) |
7d6236bb | 471 | ev->flags |= __EXEC_OBJECT_HAS_FENCE; |
2889caa9 CW |
472 | } |
473 | ||
7d6236bb | 474 | ev->flags |= __EXEC_OBJECT_HAS_PIN; |
237647f4 ML |
475 | if (eb_vma_misplaced(entry, vma, ev->flags)) |
476 | return -EBADSLT; | |
477 | ||
478 | return 0; | |
2889caa9 CW |
479 | } |
480 | ||
8ae275c2 ML |
481 | static inline void |
482 | eb_unreserve_vma(struct eb_vma *ev) | |
483 | { | |
484 | if (!(ev->flags & __EXEC_OBJECT_HAS_PIN)) | |
485 | return; | |
486 | ||
c43ce123 ML |
487 | if (unlikely(ev->flags & __EXEC_OBJECT_HAS_FENCE)) |
488 | __i915_vma_unpin_fence(ev->vma); | |
489 | ||
490 | __i915_vma_unpin(ev->vma); | |
8ae275c2 ML |
491 | ev->flags &= ~__EXEC_OBJECT_RESERVED; |
492 | } | |
493 | ||
2889caa9 CW |
494 | static int |
495 | eb_validate_vma(struct i915_execbuffer *eb, | |
496 | struct drm_i915_gem_exec_object2 *entry, | |
497 | struct i915_vma *vma) | |
67731b87 | 498 | { |
2eb8e1a6 JE |
499 | /* Relocations are disallowed for all platforms after TGL-LP. This |
500 | * also covers all platforms with local memory. | |
501 | */ | |
502 | if (entry->relocation_count && | |
40e1956e | 503 | GRAPHICS_VER(eb->i915) >= 12 && !IS_TIGERLAKE(eb->i915)) |
2eb8e1a6 JE |
504 | return -EINVAL; |
505 | ||
2889caa9 CW |
506 | if (unlikely(entry->flags & eb->invalid_flags)) |
507 | return -EINVAL; | |
d55495b4 | 508 | |
2920516b MA |
509 | if (unlikely(entry->alignment && |
510 | !is_power_of_2_u64(entry->alignment))) | |
2889caa9 CW |
511 | return -EINVAL; |
512 | ||
513 | /* | |
514 | * Offset can be used as input (EXEC_OBJECT_PINNED), reject | |
515 | * any non-page-aligned or non-canonical addresses. | |
516 | */ | |
517 | if (unlikely(entry->flags & EXEC_OBJECT_PINNED && | |
6fc4e48f | 518 | entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK))) |
2889caa9 CW |
519 | return -EINVAL; |
520 | ||
521 | /* pad_to_size was once a reserved field, so sanitize it */ | |
522 | if (entry->flags & EXEC_OBJECT_PAD_TO_SIZE) { | |
523 | if (unlikely(offset_in_page(entry->pad_to_size))) | |
524 | return -EINVAL; | |
525 | } else { | |
526 | entry->pad_to_size = 0; | |
d55495b4 | 527 | } |
2889caa9 CW |
528 | /* |
529 | * From drm_mm perspective address space is continuous, | |
530 | * so from this point we're always using non-canonical | |
531 | * form internally. | |
532 | */ | |
533 | entry->offset = gen8_noncanonical_addr(entry->offset); | |
534 | ||
c7c6e46f CW |
535 | if (!eb->reloc_cache.has_fence) { |
536 | entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE; | |
537 | } else { | |
538 | if ((entry->flags & EXEC_OBJECT_NEEDS_FENCE || | |
539 | eb->reloc_cache.needs_unfenced) && | |
540 | i915_gem_object_is_tiled(vma->obj)) | |
541 | entry->flags |= EXEC_OBJECT_NEEDS_GTT | __EXEC_OBJECT_NEEDS_MAP; | |
542 | } | |
543 | ||
2889caa9 | 544 | return 0; |
67731b87 CW |
545 | } |
546 | ||
544460c3 MB |
547 | static inline bool |
548 | is_batch_buffer(struct i915_execbuffer *eb, unsigned int buffer_idx) | |
549 | { | |
550 | return eb->args->flags & I915_EXEC_BATCH_FIRST ? | |
551 | buffer_idx < eb->num_batches : | |
552 | buffer_idx >= eb->args->buffer_count - eb->num_batches; | |
553 | } | |
554 | ||
555 | static int | |
746c8f14 | 556 | eb_add_vma(struct i915_execbuffer *eb, |
544460c3 MB |
557 | unsigned int *current_batch, |
558 | unsigned int i, | |
746c8f14 | 559 | struct i915_vma *vma) |
59bfa124 | 560 | { |
544460c3 | 561 | struct drm_i915_private *i915 = eb->i915; |
c7c6e46f | 562 | struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; |
7d6236bb | 563 | struct eb_vma *ev = &eb->vma[i]; |
2889caa9 | 564 | |
93159e12 | 565 | ev->vma = vma; |
7d6236bb CW |
566 | ev->exec = entry; |
567 | ev->flags = entry->flags; | |
568 | ||
4d470f73 | 569 | if (eb->lut_size > 0) { |
7d6236bb CW |
570 | ev->handle = entry->handle; |
571 | hlist_add_head(&ev->node, | |
2889caa9 CW |
572 | &eb->buckets[hash_32(entry->handle, |
573 | eb->lut_size)]); | |
4ff4b44c | 574 | } |
59bfa124 | 575 | |
2889caa9 | 576 | if (entry->relocation_count) |
7d6236bb | 577 | list_add_tail(&ev->reloc_link, &eb->relocs); |
2889caa9 | 578 | |
746c8f14 CW |
579 | /* |
580 | * SNA is doing fancy tricks with compressing batch buffers, which leads | |
581 | * to negative relocation deltas. Usually that works out ok since the | |
582 | * relocate address is still positive, except when the batch is placed | |
583 | * very low in the GTT. Ensure this doesn't happen. | |
584 | * | |
585 | * Note that actual hangs have only been observed on gen7, but for | |
586 | * paranoia do it everywhere. | |
587 | */ | |
544460c3 | 588 | if (is_batch_buffer(eb, i)) { |
827db9d8 | 589 | if (entry->relocation_count && |
7d6236bb CW |
590 | !(ev->flags & EXEC_OBJECT_PINNED)) |
591 | ev->flags |= __EXEC_OBJECT_NEEDS_BIAS; | |
746c8f14 | 592 | if (eb->reloc_cache.has_fence) |
7d6236bb | 593 | ev->flags |= EXEC_OBJECT_NEEDS_FENCE; |
746c8f14 | 594 | |
544460c3 MB |
595 | eb->batches[*current_batch] = ev; |
596 | ||
597 | if (unlikely(ev->flags & EXEC_OBJECT_WRITE)) { | |
598 | drm_dbg(&i915->drm, | |
599 | "Attempting to use self-modifying batch buffer\n"); | |
600 | return -EINVAL; | |
601 | } | |
602 | ||
603 | if (range_overflows_t(u64, | |
604 | eb->batch_start_offset, | |
605 | eb->args->batch_len, | |
606 | ev->vma->size)) { | |
607 | drm_dbg(&i915->drm, "Attempting to use out-of-bounds batch\n"); | |
608 | return -EINVAL; | |
609 | } | |
610 | ||
611 | if (eb->args->batch_len == 0) | |
612 | eb->batch_len[*current_batch] = ev->vma->size - | |
613 | eb->batch_start_offset; | |
614 | else | |
615 | eb->batch_len[*current_batch] = eb->args->batch_len; | |
616 | if (unlikely(eb->batch_len[*current_batch] == 0)) { /* impossible! */ | |
617 | drm_dbg(&i915->drm, "Invalid batch length\n"); | |
618 | return -EINVAL; | |
619 | } | |
620 | ||
621 | ++*current_batch; | |
746c8f14 | 622 | } |
544460c3 MB |
623 | |
624 | return 0; | |
2889caa9 CW |
625 | } |
626 | ||
ad5d95e4 DA |
627 | static inline int use_cpu_reloc(const struct reloc_cache *cache, |
628 | const struct drm_i915_gem_object *obj) | |
629 | { | |
630 | if (!i915_gem_object_has_struct_page(obj)) | |
631 | return false; | |
632 | ||
633 | if (DBG_FORCE_RELOC == FORCE_CPU_RELOC) | |
634 | return true; | |
635 | ||
636 | if (DBG_FORCE_RELOC == FORCE_GTT_RELOC) | |
637 | return false; | |
638 | ||
639 | return (cache->has_llc || | |
640 | obj->cache_dirty || | |
641 | obj->cache_level != I915_CACHE_NONE); | |
642 | } | |
643 | ||
47b08693 | 644 | static int eb_reserve_vma(struct i915_execbuffer *eb, |
7d6236bb | 645 | struct eb_vma *ev, |
2920bb94 | 646 | u64 pin_flags) |
2889caa9 | 647 | { |
7d6236bb | 648 | struct drm_i915_gem_exec_object2 *entry = ev->exec; |
7d6236bb | 649 | struct i915_vma *vma = ev->vma; |
2889caa9 CW |
650 | int err; |
651 | ||
003d8b91 CW |
652 | if (drm_mm_node_allocated(&vma->node) && |
653 | eb_vma_misplaced(entry, vma, ev->flags)) { | |
654 | err = i915_vma_unbind(vma); | |
655 | if (err) | |
656 | return err; | |
657 | } | |
658 | ||
47b08693 | 659 | err = i915_vma_pin_ww(vma, &eb->ww, |
c7c6e46f | 660 | entry->pad_to_size, entry->alignment, |
8a338f4b | 661 | eb_pin_flags(entry, ev->flags) | pin_flags); |
2889caa9 CW |
662 | if (err) |
663 | return err; | |
664 | ||
665 | if (entry->offset != vma->node.start) { | |
666 | entry->offset = vma->node.start | UPDATE; | |
667 | eb->args->flags |= __EXEC_HAS_RELOC; | |
668 | } | |
669 | ||
8a338f4b | 670 | if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) { |
3bd40735 | 671 | err = i915_vma_pin_fence(vma); |
2889caa9 CW |
672 | if (unlikely(err)) { |
673 | i915_vma_unpin(vma); | |
674 | return err; | |
675 | } | |
676 | ||
3bd40735 | 677 | if (vma->fence) |
8a338f4b | 678 | ev->flags |= __EXEC_OBJECT_HAS_FENCE; |
2889caa9 CW |
679 | } |
680 | ||
8a338f4b | 681 | ev->flags |= __EXEC_OBJECT_HAS_PIN; |
7d6236bb | 682 | GEM_BUG_ON(eb_vma_misplaced(entry, vma, ev->flags)); |
1da7b54c | 683 | |
2889caa9 CW |
684 | return 0; |
685 | } | |
686 | ||
687 | static int eb_reserve(struct i915_execbuffer *eb) | |
688 | { | |
689 | const unsigned int count = eb->buffer_count; | |
2920bb94 | 690 | unsigned int pin_flags = PIN_USER | PIN_NONBLOCK; |
2889caa9 | 691 | struct list_head last; |
7d6236bb | 692 | struct eb_vma *ev; |
2889caa9 | 693 | unsigned int i, pass; |
ef398881 | 694 | int err = 0; |
2889caa9 CW |
695 | |
696 | /* | |
697 | * Attempt to pin all of the buffers into the GTT. | |
698 | * This is done in 3 phases: | |
699 | * | |
700 | * 1a. Unbind all objects that do not match the GTT constraints for | |
701 | * the execbuffer (fenceable, mappable, alignment etc). | |
702 | * 1b. Increment pin count for already bound objects. | |
703 | * 2. Bind new objects. | |
704 | * 3. Decrement pin count. | |
705 | * | |
706 | * This avoid unnecessary unbinding of later objects in order to make | |
707 | * room for the earlier objects *unless* we need to defragment. | |
708 | */ | |
2889caa9 | 709 | pass = 0; |
2889caa9 | 710 | do { |
7d6236bb CW |
711 | list_for_each_entry(ev, &eb->unbound, bind_link) { |
712 | err = eb_reserve_vma(eb, ev, pin_flags); | |
2889caa9 CW |
713 | if (err) |
714 | break; | |
715 | } | |
fd1500fc | 716 | if (err != -ENOSPC) |
c43ce123 | 717 | return err; |
2889caa9 CW |
718 | |
719 | /* Resort *all* the objects into priority order */ | |
720 | INIT_LIST_HEAD(&eb->unbound); | |
721 | INIT_LIST_HEAD(&last); | |
722 | for (i = 0; i < count; i++) { | |
7d6236bb | 723 | unsigned int flags; |
2889caa9 | 724 | |
7d6236bb CW |
725 | ev = &eb->vma[i]; |
726 | flags = ev->flags; | |
c7c6e46f CW |
727 | if (flags & EXEC_OBJECT_PINNED && |
728 | flags & __EXEC_OBJECT_HAS_PIN) | |
2889caa9 CW |
729 | continue; |
730 | ||
7d6236bb | 731 | eb_unreserve_vma(ev); |
2889caa9 | 732 | |
c7c6e46f | 733 | if (flags & EXEC_OBJECT_PINNED) |
35e882a4 | 734 | /* Pinned must have their slot */ |
7d6236bb | 735 | list_add(&ev->bind_link, &eb->unbound); |
c7c6e46f | 736 | else if (flags & __EXEC_OBJECT_NEEDS_MAP) |
35e882a4 | 737 | /* Map require the lowest 256MiB (aperture) */ |
7d6236bb | 738 | list_add_tail(&ev->bind_link, &eb->unbound); |
35e882a4 CW |
739 | else if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) |
740 | /* Prioritise 4GiB region for restricted bo */ | |
7d6236bb | 741 | list_add(&ev->bind_link, &last); |
2889caa9 | 742 | else |
7d6236bb | 743 | list_add_tail(&ev->bind_link, &last); |
2889caa9 CW |
744 | } |
745 | list_splice_tail(&last, &eb->unbound); | |
746 | ||
747 | switch (pass++) { | |
748 | case 0: | |
749 | break; | |
750 | ||
751 | case 1: | |
752 | /* Too fragmented, unbind everything and retry */ | |
2850748e | 753 | mutex_lock(&eb->context->vm->mutex); |
f5d974f9 | 754 | err = i915_gem_evict_vm(eb->context->vm); |
2850748e | 755 | mutex_unlock(&eb->context->vm->mutex); |
2889caa9 | 756 | if (err) |
c43ce123 | 757 | return err; |
2889caa9 CW |
758 | break; |
759 | ||
760 | default: | |
c43ce123 | 761 | return -ENOSPC; |
2889caa9 | 762 | } |
2920bb94 CW |
763 | |
764 | pin_flags = PIN_USER; | |
2889caa9 | 765 | } while (1); |
4ff4b44c | 766 | } |
59bfa124 | 767 | |
2889caa9 CW |
768 | static int eb_select_context(struct i915_execbuffer *eb) |
769 | { | |
770 | struct i915_gem_context *ctx; | |
771 | ||
772 | ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1); | |
046d1660 JE |
773 | if (unlikely(IS_ERR(ctx))) |
774 | return PTR_ERR(ctx); | |
2889caa9 | 775 | |
8f2a1057 | 776 | eb->gem_context = ctx; |
a82a9979 | 777 | if (i915_gem_context_has_full_ppgtt(ctx)) |
4f2c7337 | 778 | eb->invalid_flags |= EXEC_OBJECT_NEEDS_GTT; |
2889caa9 | 779 | |
2889caa9 CW |
780 | return 0; |
781 | } | |
782 | ||
93159e12 CW |
783 | static int __eb_add_lut(struct i915_execbuffer *eb, |
784 | u32 handle, struct i915_vma *vma) | |
3b96eff4 | 785 | { |
93159e12 CW |
786 | struct i915_gem_context *ctx = eb->gem_context; |
787 | struct i915_lut_handle *lut; | |
2889caa9 | 788 | int err; |
3b96eff4 | 789 | |
93159e12 CW |
790 | lut = i915_lut_handle_alloc(); |
791 | if (unlikely(!lut)) | |
792 | return -ENOMEM; | |
793 | ||
794 | i915_vma_get(vma); | |
795 | if (!atomic_fetch_inc(&vma->open_count)) | |
796 | i915_vma_reopen(vma); | |
797 | lut->handle = handle; | |
798 | lut->ctx = ctx; | |
799 | ||
800 | /* Check that the context hasn't been closed in the meantime */ | |
801 | err = -EINTR; | |
f7ce8639 | 802 | if (!mutex_lock_interruptible(&ctx->lut_mutex)) { |
e1068a9e | 803 | if (likely(!i915_gem_context_is_closed(ctx))) |
93159e12 | 804 | err = radix_tree_insert(&ctx->handles_vma, handle, vma); |
f7ce8639 CW |
805 | else |
806 | err = -ENOENT; | |
93159e12 CW |
807 | if (err == 0) { /* And nor has this handle */ |
808 | struct drm_i915_gem_object *obj = vma->obj; | |
809 | ||
096a42dd | 810 | spin_lock(&obj->lut_lock); |
93159e12 CW |
811 | if (idr_find(&eb->file->object_idr, handle) == obj) { |
812 | list_add(&lut->obj_link, &obj->lut_list); | |
813 | } else { | |
814 | radix_tree_delete(&ctx->handles_vma, handle); | |
815 | err = -ENOENT; | |
816 | } | |
096a42dd | 817 | spin_unlock(&obj->lut_lock); |
93159e12 | 818 | } |
f7ce8639 | 819 | mutex_unlock(&ctx->lut_mutex); |
93159e12 CW |
820 | } |
821 | if (unlikely(err)) | |
822 | goto err; | |
003d8b91 | 823 | |
93159e12 | 824 | return 0; |
d55495b4 | 825 | |
93159e12 | 826 | err: |
50689771 | 827 | i915_vma_close(vma); |
93159e12 CW |
828 | i915_vma_put(vma); |
829 | i915_lut_handle_free(lut); | |
830 | return err; | |
831 | } | |
746c8f14 | 832 | |
93159e12 CW |
833 | static struct i915_vma *eb_lookup_vma(struct i915_execbuffer *eb, u32 handle) |
834 | { | |
f7ce8639 CW |
835 | struct i915_address_space *vm = eb->context->vm; |
836 | ||
93159e12 CW |
837 | do { |
838 | struct drm_i915_gem_object *obj; | |
170fa29b | 839 | struct i915_vma *vma; |
93159e12 | 840 | int err; |
4ff4b44c | 841 | |
93159e12 CW |
842 | rcu_read_lock(); |
843 | vma = radix_tree_lookup(&eb->gem_context->handles_vma, handle); | |
f7ce8639 | 844 | if (likely(vma && vma->vm == vm)) |
93159e12 CW |
845 | vma = i915_vma_tryget(vma); |
846 | rcu_read_unlock(); | |
847 | if (likely(vma)) | |
848 | return vma; | |
4ff4b44c | 849 | |
170fa29b | 850 | obj = i915_gem_object_lookup(eb->file, handle); |
93159e12 CW |
851 | if (unlikely(!obj)) |
852 | return ERR_PTR(-ENOENT); | |
3b96eff4 | 853 | |
d3ac8d42 DCS |
854 | /* |
855 | * If the user has opted-in for protected-object tracking, make | |
856 | * sure the object encryption can be used. | |
857 | * We only need to do this when the object is first used with | |
858 | * this context, because the context itself will be banned when | |
859 | * the protected objects become invalid. | |
860 | */ | |
861 | if (i915_gem_context_uses_protected_content(eb->gem_context) && | |
862 | i915_gem_object_is_protected(obj)) { | |
ef6ba31d | 863 | err = intel_pxp_key_check(&vm->gt->pxp, obj, true); |
d3ac8d42 DCS |
864 | if (err) { |
865 | i915_gem_object_put(obj); | |
866 | return ERR_PTR(err); | |
867 | } | |
868 | } | |
869 | ||
f7ce8639 | 870 | vma = i915_vma_instance(obj, vm, NULL); |
772b5408 | 871 | if (IS_ERR(vma)) { |
93159e12 CW |
872 | i915_gem_object_put(obj); |
873 | return vma; | |
27173f1f BW |
874 | } |
875 | ||
93159e12 CW |
876 | err = __eb_add_lut(eb, handle, vma); |
877 | if (likely(!err)) | |
878 | return vma; | |
d1b48c1e | 879 | |
93159e12 CW |
880 | i915_gem_object_put(obj); |
881 | if (err != -EEXIST) | |
882 | return ERR_PTR(err); | |
883 | } while (1); | |
884 | } | |
4ff4b44c | 885 | |
93159e12 CW |
886 | static int eb_lookup_vmas(struct i915_execbuffer *eb) |
887 | { | |
544460c3 | 888 | unsigned int i, current_batch = 0; |
93159e12 | 889 | int err = 0; |
155ab883 | 890 | |
93159e12 | 891 | INIT_LIST_HEAD(&eb->relocs); |
93159e12 CW |
892 | |
893 | for (i = 0; i < eb->buffer_count; i++) { | |
894 | struct i915_vma *vma; | |
895 | ||
896 | vma = eb_lookup_vma(eb, eb->exec[i].handle); | |
897 | if (IS_ERR(vma)) { | |
898 | err = PTR_ERR(vma); | |
8e4ba491 | 899 | goto err; |
93159e12 | 900 | } |
d1b48c1e | 901 | |
003d8b91 | 902 | err = eb_validate_vma(eb, &eb->exec[i], vma); |
93159e12 CW |
903 | if (unlikely(err)) { |
904 | i915_vma_put(vma); | |
8e4ba491 | 905 | goto err; |
93159e12 | 906 | } |
dade2a61 | 907 | |
544460c3 MB |
908 | err = eb_add_vma(eb, ¤t_batch, i, vma); |
909 | if (err) | |
910 | return err; | |
ed29c269 ML |
911 | |
912 | if (i915_gem_object_is_userptr(vma->obj)) { | |
913 | err = i915_gem_object_userptr_submit_init(vma->obj); | |
914 | if (err) { | |
915 | if (i + 1 < eb->buffer_count) { | |
916 | /* | |
917 | * Execbuffer code expects last vma entry to be NULL, | |
918 | * since we already initialized this entry, | |
919 | * set the next value to NULL or we mess up | |
920 | * cleanup handling. | |
921 | */ | |
922 | eb->vma[i + 1].vma = NULL; | |
923 | } | |
924 | ||
925 | return err; | |
926 | } | |
927 | ||
928 | eb->vma[i].flags |= __EXEC_OBJECT_USERPTR_INIT; | |
929 | eb->args->flags |= __EXEC_USERPTR_USED; | |
930 | } | |
4ff4b44c CW |
931 | } |
932 | ||
8e4ba491 ML |
933 | return 0; |
934 | ||
935 | err: | |
7d6236bb | 936 | eb->vma[i].vma = NULL; |
2889caa9 | 937 | return err; |
3b96eff4 CW |
938 | } |
939 | ||
5cd57f67 | 940 | static int eb_lock_vmas(struct i915_execbuffer *eb) |
c43ce123 ML |
941 | { |
942 | unsigned int i; | |
943 | int err; | |
944 | ||
c43ce123 | 945 | for (i = 0; i < eb->buffer_count; i++) { |
c43ce123 ML |
946 | struct eb_vma *ev = &eb->vma[i]; |
947 | struct i915_vma *vma = ev->vma; | |
948 | ||
949 | err = i915_gem_object_lock(vma->obj, &eb->ww); | |
950 | if (err) | |
951 | return err; | |
5cd57f67 TH |
952 | } |
953 | ||
954 | return 0; | |
955 | } | |
956 | ||
957 | static int eb_validate_vmas(struct i915_execbuffer *eb) | |
958 | { | |
959 | unsigned int i; | |
960 | int err; | |
961 | ||
962 | INIT_LIST_HEAD(&eb->unbound); | |
963 | ||
964 | err = eb_lock_vmas(eb); | |
965 | if (err) | |
966 | return err; | |
967 | ||
968 | for (i = 0; i < eb->buffer_count; i++) { | |
969 | struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; | |
970 | struct eb_vma *ev = &eb->vma[i]; | |
971 | struct i915_vma *vma = ev->vma; | |
c43ce123 | 972 | |
237647f4 ML |
973 | err = eb_pin_vma(eb, entry, ev); |
974 | if (err == -EDEADLK) | |
975 | return err; | |
976 | ||
977 | if (!err) { | |
c43ce123 ML |
978 | if (entry->offset != vma->node.start) { |
979 | entry->offset = vma->node.start | UPDATE; | |
980 | eb->args->flags |= __EXEC_HAS_RELOC; | |
981 | } | |
982 | } else { | |
983 | eb_unreserve_vma(ev); | |
984 | ||
985 | list_add_tail(&ev->bind_link, &eb->unbound); | |
986 | if (drm_mm_node_allocated(&vma->node)) { | |
987 | err = i915_vma_unbind(vma); | |
988 | if (err) | |
989 | return err; | |
990 | } | |
991 | } | |
992 | ||
bfaae47d ML |
993 | if (!(ev->flags & EXEC_OBJECT_WRITE)) { |
994 | err = dma_resv_reserve_shared(vma->resv, 1); | |
995 | if (err) | |
996 | return err; | |
997 | } | |
998 | ||
c43ce123 ML |
999 | GEM_BUG_ON(drm_mm_node_allocated(&vma->node) && |
1000 | eb_vma_misplaced(&eb->exec[i], vma, ev->flags)); | |
1001 | } | |
1002 | ||
1003 | if (!list_empty(&eb->unbound)) | |
1004 | return eb_reserve(eb); | |
1005 | ||
1006 | return 0; | |
1007 | } | |
1008 | ||
7d6236bb | 1009 | static struct eb_vma * |
2889caa9 | 1010 | eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle) |
67731b87 | 1011 | { |
2889caa9 CW |
1012 | if (eb->lut_size < 0) { |
1013 | if (handle >= -eb->lut_size) | |
eef90ccb | 1014 | return NULL; |
7d6236bb | 1015 | return &eb->vma[handle]; |
eef90ccb CW |
1016 | } else { |
1017 | struct hlist_head *head; | |
7d6236bb | 1018 | struct eb_vma *ev; |
67731b87 | 1019 | |
2889caa9 | 1020 | head = &eb->buckets[hash_32(handle, eb->lut_size)]; |
7d6236bb CW |
1021 | hlist_for_each_entry(ev, head, node) { |
1022 | if (ev->handle == handle) | |
1023 | return ev; | |
eef90ccb CW |
1024 | } |
1025 | return NULL; | |
1026 | } | |
67731b87 CW |
1027 | } |
1028 | ||
b4b9731b | 1029 | static void eb_release_vmas(struct i915_execbuffer *eb, bool final) |
8ae275c2 ML |
1030 | { |
1031 | const unsigned int count = eb->buffer_count; | |
1032 | unsigned int i; | |
1033 | ||
1034 | for (i = 0; i < count; i++) { | |
1035 | struct eb_vma *ev = &eb->vma[i]; | |
1036 | struct i915_vma *vma = ev->vma; | |
1037 | ||
1038 | if (!vma) | |
1039 | break; | |
1040 | ||
c43ce123 | 1041 | eb_unreserve_vma(ev); |
8ae275c2 | 1042 | |
c43ce123 ML |
1043 | if (final) |
1044 | i915_vma_put(vma); | |
8ae275c2 | 1045 | } |
2bf541ff ML |
1046 | |
1047 | eb_unpin_engine(eb); | |
8ae275c2 ML |
1048 | } |
1049 | ||
2889caa9 | 1050 | static void eb_destroy(const struct i915_execbuffer *eb) |
934acce3 | 1051 | { |
4d470f73 | 1052 | if (eb->lut_size > 0) |
2889caa9 | 1053 | kfree(eb->buckets); |
934acce3 MW |
1054 | } |
1055 | ||
2889caa9 | 1056 | static inline u64 |
d50415cc | 1057 | relocation_target(const struct drm_i915_gem_relocation_entry *reloc, |
2889caa9 | 1058 | const struct i915_vma *target) |
934acce3 | 1059 | { |
2889caa9 | 1060 | return gen8_canonical_addr((int)reloc->delta + target->node.start); |
934acce3 MW |
1061 | } |
1062 | ||
d50415cc CW |
1063 | static void reloc_cache_init(struct reloc_cache *cache, |
1064 | struct drm_i915_private *i915) | |
5032d871 | 1065 | { |
ad5d95e4 DA |
1066 | cache->page = -1; |
1067 | cache->vaddr = 0; | |
dfc5148f | 1068 | /* Must be a variable in the struct to allow GCC to unroll. */ |
8802190f | 1069 | cache->graphics_ver = GRAPHICS_VER(i915); |
2889caa9 | 1070 | cache->has_llc = HAS_LLC(i915); |
dfc5148f | 1071 | cache->use_64bit_reloc = HAS_64BIT_RELOC(i915); |
8802190f | 1072 | cache->has_fence = cache->graphics_ver < 4; |
7dd4f672 | 1073 | cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment; |
4ee92c71 | 1074 | cache->node.flags = 0; |
d50415cc | 1075 | } |
5032d871 | 1076 | |
20561da3 DA |
1077 | static inline void *unmask_page(unsigned long p) |
1078 | { | |
1079 | return (void *)(uintptr_t)(p & PAGE_MASK); | |
1080 | } | |
1081 | ||
1082 | static inline unsigned int unmask_flags(unsigned long p) | |
1083 | { | |
1084 | return p & ~PAGE_MASK; | |
1085 | } | |
1086 | ||
1087 | #define KMAP 0x4 /* after CLFLUSH_FLAGS */ | |
1088 | ||
1089 | static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache) | |
1090 | { | |
1091 | struct drm_i915_private *i915 = | |
1092 | container_of(cache, struct i915_execbuffer, reloc_cache)->i915; | |
1093 | return &i915->ggtt; | |
1094 | } | |
1095 | ||
c43ce123 | 1096 | static void reloc_cache_reset(struct reloc_cache *cache, struct i915_execbuffer *eb) |
ad5d95e4 DA |
1097 | { |
1098 | void *vaddr; | |
1099 | ||
1100 | if (!cache->vaddr) | |
1101 | return; | |
1102 | ||
1103 | vaddr = unmask_page(cache->vaddr); | |
1104 | if (cache->vaddr & KMAP) { | |
1af343cd ML |
1105 | struct drm_i915_gem_object *obj = |
1106 | (struct drm_i915_gem_object *)cache->node.mm; | |
ad5d95e4 DA |
1107 | if (cache->vaddr & CLFLUSH_AFTER) |
1108 | mb(); | |
1109 | ||
1110 | kunmap_atomic(vaddr); | |
1af343cd | 1111 | i915_gem_object_finish_access(obj); |
ad5d95e4 DA |
1112 | } else { |
1113 | struct i915_ggtt *ggtt = cache_to_ggtt(cache); | |
1114 | ||
1115 | intel_gt_flush_ggtt_writes(ggtt->vm.gt); | |
1116 | io_mapping_unmap_atomic((void __iomem *)vaddr); | |
1117 | ||
1118 | if (drm_mm_node_allocated(&cache->node)) { | |
1119 | ggtt->vm.clear_range(&ggtt->vm, | |
1120 | cache->node.start, | |
1121 | cache->node.size); | |
1122 | mutex_lock(&ggtt->vm.mutex); | |
1123 | drm_mm_remove_node(&cache->node); | |
1124 | mutex_unlock(&ggtt->vm.mutex); | |
1125 | } else { | |
1126 | i915_vma_unpin((struct i915_vma *)cache->node.mm); | |
1127 | } | |
1128 | } | |
1129 | ||
1130 | cache->vaddr = 0; | |
1131 | cache->page = -1; | |
1132 | } | |
1133 | ||
1134 | static void *reloc_kmap(struct drm_i915_gem_object *obj, | |
1135 | struct reloc_cache *cache, | |
102a0a90 | 1136 | unsigned long pageno) |
ad5d95e4 DA |
1137 | { |
1138 | void *vaddr; | |
102a0a90 | 1139 | struct page *page; |
ad5d95e4 DA |
1140 | |
1141 | if (cache->vaddr) { | |
1142 | kunmap_atomic(unmask_page(cache->vaddr)); | |
1143 | } else { | |
1144 | unsigned int flushes; | |
1145 | int err; | |
1146 | ||
1147 | err = i915_gem_object_prepare_write(obj, &flushes); | |
1148 | if (err) | |
1149 | return ERR_PTR(err); | |
1150 | ||
1151 | BUILD_BUG_ON(KMAP & CLFLUSH_FLAGS); | |
1152 | BUILD_BUG_ON((KMAP | CLFLUSH_FLAGS) & PAGE_MASK); | |
1153 | ||
1154 | cache->vaddr = flushes | KMAP; | |
1155 | cache->node.mm = (void *)obj; | |
1156 | if (flushes) | |
1157 | mb(); | |
1158 | } | |
1159 | ||
102a0a90 ML |
1160 | page = i915_gem_object_get_page(obj, pageno); |
1161 | if (!obj->mm.dirty) | |
1162 | set_page_dirty(page); | |
1163 | ||
1164 | vaddr = kmap_atomic(page); | |
ad5d95e4 | 1165 | cache->vaddr = unmask_flags(cache->vaddr) | (unsigned long)vaddr; |
102a0a90 | 1166 | cache->page = pageno; |
ad5d95e4 DA |
1167 | |
1168 | return vaddr; | |
1169 | } | |
1170 | ||
1171 | static void *reloc_iomap(struct drm_i915_gem_object *obj, | |
47b08693 | 1172 | struct i915_execbuffer *eb, |
ad5d95e4 DA |
1173 | unsigned long page) |
1174 | { | |
47b08693 | 1175 | struct reloc_cache *cache = &eb->reloc_cache; |
ad5d95e4 DA |
1176 | struct i915_ggtt *ggtt = cache_to_ggtt(cache); |
1177 | unsigned long offset; | |
1178 | void *vaddr; | |
1179 | ||
1180 | if (cache->vaddr) { | |
1181 | intel_gt_flush_ggtt_writes(ggtt->vm.gt); | |
1182 | io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr)); | |
1183 | } else { | |
1184 | struct i915_vma *vma; | |
1185 | int err; | |
1186 | ||
1187 | if (i915_gem_object_is_tiled(obj)) | |
1188 | return ERR_PTR(-EINVAL); | |
1189 | ||
1190 | if (use_cpu_reloc(cache, obj)) | |
1191 | return NULL; | |
1192 | ||
ad5d95e4 | 1193 | err = i915_gem_object_set_to_gtt_domain(obj, true); |
ad5d95e4 DA |
1194 | if (err) |
1195 | return ERR_PTR(err); | |
1196 | ||
47b08693 ML |
1197 | vma = i915_gem_object_ggtt_pin_ww(obj, &eb->ww, NULL, 0, 0, |
1198 | PIN_MAPPABLE | | |
1199 | PIN_NONBLOCK /* NOWARN */ | | |
1200 | PIN_NOEVICT); | |
1201 | if (vma == ERR_PTR(-EDEADLK)) | |
1202 | return vma; | |
1203 | ||
ad5d95e4 DA |
1204 | if (IS_ERR(vma)) { |
1205 | memset(&cache->node, 0, sizeof(cache->node)); | |
1206 | mutex_lock(&ggtt->vm.mutex); | |
1207 | err = drm_mm_insert_node_in_range | |
1208 | (&ggtt->vm.mm, &cache->node, | |
1209 | PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE, | |
1210 | 0, ggtt->mappable_end, | |
1211 | DRM_MM_INSERT_LOW); | |
1212 | mutex_unlock(&ggtt->vm.mutex); | |
1213 | if (err) /* no inactive aperture space, use cpu reloc */ | |
1214 | return NULL; | |
1215 | } else { | |
1216 | cache->node.start = vma->node.start; | |
1217 | cache->node.mm = (void *)vma; | |
1218 | } | |
1219 | } | |
1220 | ||
1221 | offset = cache->node.start; | |
1222 | if (drm_mm_node_allocated(&cache->node)) { | |
1223 | ggtt->vm.insert_page(&ggtt->vm, | |
1224 | i915_gem_object_get_dma_address(obj, page), | |
1225 | offset, I915_CACHE_NONE, 0); | |
1226 | } else { | |
1227 | offset += page << PAGE_SHIFT; | |
1228 | } | |
1229 | ||
1230 | vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->iomap, | |
1231 | offset); | |
1232 | cache->page = page; | |
1233 | cache->vaddr = (unsigned long)vaddr; | |
1234 | ||
1235 | return vaddr; | |
1236 | } | |
1237 | ||
1238 | static void *reloc_vaddr(struct drm_i915_gem_object *obj, | |
47b08693 | 1239 | struct i915_execbuffer *eb, |
ad5d95e4 DA |
1240 | unsigned long page) |
1241 | { | |
47b08693 | 1242 | struct reloc_cache *cache = &eb->reloc_cache; |
ad5d95e4 DA |
1243 | void *vaddr; |
1244 | ||
1245 | if (cache->page == page) { | |
1246 | vaddr = unmask_page(cache->vaddr); | |
1247 | } else { | |
1248 | vaddr = NULL; | |
1249 | if ((cache->vaddr & KMAP) == 0) | |
47b08693 | 1250 | vaddr = reloc_iomap(obj, eb, page); |
ad5d95e4 DA |
1251 | if (!vaddr) |
1252 | vaddr = reloc_kmap(obj, cache, page); | |
1253 | } | |
1254 | ||
1255 | return vaddr; | |
1256 | } | |
1257 | ||
1258 | static void clflush_write32(u32 *addr, u32 value, unsigned int flushes) | |
1259 | { | |
1260 | if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) { | |
1261 | if (flushes & CLFLUSH_BEFORE) { | |
1262 | clflushopt(addr); | |
1263 | mb(); | |
1264 | } | |
1265 | ||
1266 | *addr = value; | |
1267 | ||
1268 | /* | |
1269 | * Writes to the same cacheline are serialised by the CPU | |
1270 | * (including clflush). On the write path, we only require | |
1271 | * that it hits memory in an orderly fashion and place | |
1272 | * mb barriers at the start and end of the relocation phase | |
1273 | * to ensure ordering of clflush wrt to the system. | |
1274 | */ | |
1275 | if (flushes & CLFLUSH_AFTER) | |
1276 | clflushopt(addr); | |
1277 | } else | |
1278 | *addr = value; | |
1279 | } | |
1280 | ||
e3d29130 | 1281 | static u64 |
ad5d95e4 | 1282 | relocate_entry(struct i915_vma *vma, |
e3d29130 | 1283 | const struct drm_i915_gem_relocation_entry *reloc, |
ad5d95e4 | 1284 | struct i915_execbuffer *eb, |
e3d29130 CW |
1285 | const struct i915_vma *target) |
1286 | { | |
1287 | u64 target_addr = relocation_target(reloc, target); | |
ad5d95e4 | 1288 | u64 offset = reloc->offset; |
ce13c78f DV |
1289 | bool wide = eb->reloc_cache.use_64bit_reloc; |
1290 | void *vaddr; | |
ad5d95e4 DA |
1291 | |
1292 | repeat: | |
ce13c78f DV |
1293 | vaddr = reloc_vaddr(vma->obj, eb, |
1294 | offset >> PAGE_SHIFT); | |
1295 | if (IS_ERR(vaddr)) | |
1296 | return PTR_ERR(vaddr); | |
1297 | ||
1298 | GEM_BUG_ON(!IS_ALIGNED(offset, sizeof(u32))); | |
1299 | clflush_write32(vaddr + offset_in_page(offset), | |
1300 | lower_32_bits(target_addr), | |
1301 | eb->reloc_cache.vaddr); | |
1302 | ||
1303 | if (wide) { | |
1304 | offset += sizeof(u32); | |
1305 | target_addr >>= 32; | |
1306 | wide = false; | |
1307 | goto repeat; | |
ad5d95e4 | 1308 | } |
edf4427b | 1309 | |
2889caa9 | 1310 | return target->node.start | UPDATE; |
edf4427b | 1311 | } |
edf4427b | 1312 | |
2889caa9 CW |
1313 | static u64 |
1314 | eb_relocate_entry(struct i915_execbuffer *eb, | |
7d6236bb | 1315 | struct eb_vma *ev, |
2889caa9 | 1316 | const struct drm_i915_gem_relocation_entry *reloc) |
54cf91dc | 1317 | { |
baa89ba3 | 1318 | struct drm_i915_private *i915 = eb->i915; |
7d6236bb | 1319 | struct eb_vma *target; |
2889caa9 | 1320 | int err; |
54cf91dc | 1321 | |
67731b87 | 1322 | /* we've already hold a reference to all valid objects */ |
507d977f CW |
1323 | target = eb_get_vma(eb, reloc->target_handle); |
1324 | if (unlikely(!target)) | |
54cf91dc | 1325 | return -ENOENT; |
e844b990 | 1326 | |
54cf91dc | 1327 | /* Validate that the target is in a valid r/w GPU domain */ |
b8f7ab17 | 1328 | if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) { |
baa89ba3 | 1329 | drm_dbg(&i915->drm, "reloc with multiple write domains: " |
507d977f | 1330 | "target %d offset %d " |
54cf91dc | 1331 | "read %08x write %08x", |
507d977f | 1332 | reloc->target_handle, |
54cf91dc CW |
1333 | (int) reloc->offset, |
1334 | reloc->read_domains, | |
1335 | reloc->write_domain); | |
8b78f0e5 | 1336 | return -EINVAL; |
54cf91dc | 1337 | } |
4ca4a250 DV |
1338 | if (unlikely((reloc->write_domain | reloc->read_domains) |
1339 | & ~I915_GEM_GPU_DOMAINS)) { | |
baa89ba3 | 1340 | drm_dbg(&i915->drm, "reloc with read/write non-GPU domains: " |
507d977f | 1341 | "target %d offset %d " |
54cf91dc | 1342 | "read %08x write %08x", |
507d977f | 1343 | reloc->target_handle, |
54cf91dc CW |
1344 | (int) reloc->offset, |
1345 | reloc->read_domains, | |
1346 | reloc->write_domain); | |
8b78f0e5 | 1347 | return -EINVAL; |
54cf91dc | 1348 | } |
54cf91dc | 1349 | |
2889caa9 | 1350 | if (reloc->write_domain) { |
7d6236bb | 1351 | target->flags |= EXEC_OBJECT_WRITE; |
507d977f | 1352 | |
2889caa9 CW |
1353 | /* |
1354 | * Sandybridge PPGTT errata: We need a global gtt mapping | |
1355 | * for MI and pipe_control writes because the gpu doesn't | |
1356 | * properly redirect them through the ppgtt for non_secure | |
1357 | * batchbuffers. | |
1358 | */ | |
1359 | if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION && | |
40e1956e | 1360 | GRAPHICS_VER(eb->i915) == 6) { |
7d6236bb CW |
1361 | err = i915_vma_bind(target->vma, |
1362 | target->vma->obj->cache_level, | |
2850748e | 1363 | PIN_GLOBAL, NULL); |
ea97c4ca | 1364 | if (err) |
2889caa9 CW |
1365 | return err; |
1366 | } | |
507d977f | 1367 | } |
54cf91dc | 1368 | |
2889caa9 CW |
1369 | /* |
1370 | * If the relocation already has the right value in it, no | |
54cf91dc CW |
1371 | * more work needs to be done. |
1372 | */ | |
ad5d95e4 DA |
1373 | if (!DBG_FORCE_RELOC && |
1374 | gen8_canonical_addr(target->vma->node.start) == reloc->presumed_offset) | |
67731b87 | 1375 | return 0; |
54cf91dc CW |
1376 | |
1377 | /* Check that the relocation address is valid... */ | |
3c94ceee | 1378 | if (unlikely(reloc->offset > |
7d6236bb | 1379 | ev->vma->size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) { |
baa89ba3 | 1380 | drm_dbg(&i915->drm, "Relocation beyond object bounds: " |
507d977f CW |
1381 | "target %d offset %d size %d.\n", |
1382 | reloc->target_handle, | |
1383 | (int)reloc->offset, | |
7d6236bb | 1384 | (int)ev->vma->size); |
8b78f0e5 | 1385 | return -EINVAL; |
54cf91dc | 1386 | } |
b8f7ab17 | 1387 | if (unlikely(reloc->offset & 3)) { |
baa89ba3 | 1388 | drm_dbg(&i915->drm, "Relocation not 4-byte aligned: " |
507d977f CW |
1389 | "target %d offset %d.\n", |
1390 | reloc->target_handle, | |
1391 | (int)reloc->offset); | |
8b78f0e5 | 1392 | return -EINVAL; |
54cf91dc CW |
1393 | } |
1394 | ||
071750e5 CW |
1395 | /* |
1396 | * If we write into the object, we need to force the synchronisation | |
1397 | * barrier, either with an asynchronous clflush or if we executed the | |
1398 | * patching using the GPU (though that should be serialised by the | |
1399 | * timeline). To be completely sure, and since we are required to | |
1400 | * do relocations we are already stalling, disable the user's opt | |
0519bcb1 | 1401 | * out of our synchronisation. |
071750e5 | 1402 | */ |
7d6236bb | 1403 | ev->flags &= ~EXEC_OBJECT_ASYNC; |
071750e5 | 1404 | |
54cf91dc | 1405 | /* and update the user's relocation entry */ |
ad5d95e4 | 1406 | return relocate_entry(ev->vma, reloc, eb, target->vma); |
54cf91dc CW |
1407 | } |
1408 | ||
7d6236bb | 1409 | static int eb_relocate_vma(struct i915_execbuffer *eb, struct eb_vma *ev) |
54cf91dc | 1410 | { |
1d83f442 | 1411 | #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry)) |
2889caa9 | 1412 | struct drm_i915_gem_relocation_entry stack[N_RELOC(512)]; |
7d6236bb | 1413 | const struct drm_i915_gem_exec_object2 *entry = ev->exec; |
e94f7856 CW |
1414 | struct drm_i915_gem_relocation_entry __user *urelocs = |
1415 | u64_to_user_ptr(entry->relocs_ptr); | |
1416 | unsigned long remain = entry->relocation_count; | |
54cf91dc | 1417 | |
e94f7856 | 1418 | if (unlikely(remain > N_RELOC(ULONG_MAX))) |
2889caa9 | 1419 | return -EINVAL; |
ebc0808f | 1420 | |
2889caa9 CW |
1421 | /* |
1422 | * We must check that the entire relocation array is safe | |
1423 | * to read. However, if the array is not writable the user loses | |
1424 | * the updated relocation values. | |
1425 | */ | |
e94f7856 | 1426 | if (unlikely(!access_ok(urelocs, remain * sizeof(*urelocs)))) |
2889caa9 CW |
1427 | return -EFAULT; |
1428 | ||
1429 | do { | |
1430 | struct drm_i915_gem_relocation_entry *r = stack; | |
1431 | unsigned int count = | |
e94f7856 | 1432 | min_t(unsigned long, remain, ARRAY_SIZE(stack)); |
2889caa9 | 1433 | unsigned int copied; |
1d83f442 | 1434 | |
2889caa9 CW |
1435 | /* |
1436 | * This is the fast path and we cannot handle a pagefault | |
ebc0808f CW |
1437 | * whilst holding the struct mutex lest the user pass in the |
1438 | * relocations contained within a mmaped bo. For in such a case | |
1439 | * we, the page fault handler would call i915_gem_fault() and | |
1440 | * we would try to acquire the struct mutex again. Obviously | |
1441 | * this is bad and so lockdep complains vehemently. | |
1442 | */ | |
fd1500fc ML |
1443 | pagefault_disable(); |
1444 | copied = __copy_from_user_inatomic(r, urelocs, count * sizeof(r[0])); | |
1445 | pagefault_enable(); | |
ad5d95e4 DA |
1446 | if (unlikely(copied)) { |
1447 | remain = -EFAULT; | |
1448 | goto out; | |
1449 | } | |
54cf91dc | 1450 | |
2889caa9 | 1451 | remain -= count; |
1d83f442 | 1452 | do { |
7d6236bb | 1453 | u64 offset = eb_relocate_entry(eb, ev, r); |
54cf91dc | 1454 | |
2889caa9 CW |
1455 | if (likely(offset == 0)) { |
1456 | } else if ((s64)offset < 0) { | |
ad5d95e4 DA |
1457 | remain = (int)offset; |
1458 | goto out; | |
2889caa9 CW |
1459 | } else { |
1460 | /* | |
1461 | * Note that reporting an error now | |
1462 | * leaves everything in an inconsistent | |
1463 | * state as we have *already* changed | |
1464 | * the relocation value inside the | |
1465 | * object. As we have not changed the | |
1466 | * reloc.presumed_offset or will not | |
1467 | * change the execobject.offset, on the | |
1468 | * call we may not rewrite the value | |
1469 | * inside the object, leaving it | |
1470 | * dangling and causing a GPU hang. Unless | |
1471 | * userspace dynamically rebuilds the | |
1472 | * relocations on each execbuf rather than | |
1473 | * presume a static tree. | |
1474 | * | |
1475 | * We did previously check if the relocations | |
1476 | * were writable (access_ok), an error now | |
1477 | * would be a strange race with mprotect, | |
1478 | * having already demonstrated that we | |
1479 | * can read from this userspace address. | |
1480 | */ | |
1481 | offset = gen8_canonical_addr(offset & ~UPDATE); | |
97a37c91 CW |
1482 | __put_user(offset, |
1483 | &urelocs[r - stack].presumed_offset); | |
1d83f442 | 1484 | } |
2889caa9 CW |
1485 | } while (r++, --count); |
1486 | urelocs += ARRAY_SIZE(stack); | |
1487 | } while (remain); | |
ad5d95e4 | 1488 | out: |
c43ce123 | 1489 | reloc_cache_reset(&eb->reloc_cache, eb); |
ad5d95e4 | 1490 | return remain; |
54cf91dc CW |
1491 | } |
1492 | ||
fd1500fc ML |
1493 | static int |
1494 | eb_relocate_vma_slow(struct i915_execbuffer *eb, struct eb_vma *ev) | |
54cf91dc | 1495 | { |
fd1500fc ML |
1496 | const struct drm_i915_gem_exec_object2 *entry = ev->exec; |
1497 | struct drm_i915_gem_relocation_entry *relocs = | |
1498 | u64_to_ptr(typeof(*relocs), entry->relocs_ptr); | |
1499 | unsigned int i; | |
003d8b91 CW |
1500 | int err; |
1501 | ||
fd1500fc ML |
1502 | for (i = 0; i < entry->relocation_count; i++) { |
1503 | u64 offset = eb_relocate_entry(eb, ev, &relocs[i]); | |
003d8b91 | 1504 | |
fd1500fc ML |
1505 | if ((s64)offset < 0) { |
1506 | err = (int)offset; | |
1507 | goto err; | |
1508 | } | |
ef398881 | 1509 | } |
fd1500fc ML |
1510 | err = 0; |
1511 | err: | |
c43ce123 | 1512 | reloc_cache_reset(&eb->reloc_cache, eb); |
fd1500fc ML |
1513 | return err; |
1514 | } | |
2889caa9 | 1515 | |
fd1500fc ML |
1516 | static int check_relocations(const struct drm_i915_gem_exec_object2 *entry) |
1517 | { | |
1518 | const char __user *addr, *end; | |
1519 | unsigned long size; | |
1520 | char __maybe_unused c; | |
2889caa9 | 1521 | |
fd1500fc ML |
1522 | size = entry->relocation_count; |
1523 | if (size == 0) | |
1524 | return 0; | |
0e97fbb0 | 1525 | |
fd1500fc ML |
1526 | if (size > N_RELOC(ULONG_MAX)) |
1527 | return -EINVAL; | |
2889caa9 | 1528 | |
fd1500fc ML |
1529 | addr = u64_to_user_ptr(entry->relocs_ptr); |
1530 | size *= sizeof(struct drm_i915_gem_relocation_entry); | |
1531 | if (!access_ok(addr, size)) | |
1532 | return -EFAULT; | |
1533 | ||
1534 | end = addr + size; | |
1535 | for (; addr < end; addr += PAGE_SIZE) { | |
1536 | int err = __get_user(c, addr); | |
1537 | if (err) | |
1538 | return err; | |
1539 | } | |
1540 | return __get_user(c, end - 1); | |
2889caa9 CW |
1541 | } |
1542 | ||
fd1500fc | 1543 | static int eb_copy_relocations(const struct i915_execbuffer *eb) |
2889caa9 | 1544 | { |
fd1500fc | 1545 | struct drm_i915_gem_relocation_entry *relocs; |
2889caa9 CW |
1546 | const unsigned int count = eb->buffer_count; |
1547 | unsigned int i; | |
fd1500fc | 1548 | int err; |
54cf91dc | 1549 | |
2889caa9 | 1550 | for (i = 0; i < count; i++) { |
fd1500fc ML |
1551 | const unsigned int nreloc = eb->exec[i].relocation_count; |
1552 | struct drm_i915_gem_relocation_entry __user *urelocs; | |
1553 | unsigned long size; | |
1554 | unsigned long copied; | |
6951e589 | 1555 | |
fd1500fc ML |
1556 | if (nreloc == 0) |
1557 | continue; | |
6951e589 | 1558 | |
fd1500fc ML |
1559 | err = check_relocations(&eb->exec[i]); |
1560 | if (err) | |
1561 | goto err; | |
6951e589 | 1562 | |
fd1500fc ML |
1563 | urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr); |
1564 | size = nreloc * sizeof(*relocs); | |
6951e589 | 1565 | |
fd1500fc ML |
1566 | relocs = kvmalloc_array(size, 1, GFP_KERNEL); |
1567 | if (!relocs) { | |
1568 | err = -ENOMEM; | |
1569 | goto err; | |
6951e589 | 1570 | } |
fd1500fc ML |
1571 | |
1572 | /* copy_from_user is limited to < 4GiB */ | |
1573 | copied = 0; | |
1574 | do { | |
1575 | unsigned int len = | |
1576 | min_t(u64, BIT_ULL(31), size - copied); | |
1577 | ||
1578 | if (__copy_from_user((char *)relocs + copied, | |
1579 | (char __user *)urelocs + copied, | |
1580 | len)) | |
1581 | goto end; | |
1582 | ||
1583 | copied += len; | |
1584 | } while (copied < size); | |
1585 | ||
1586 | /* | |
1587 | * As we do not update the known relocation offsets after | |
1588 | * relocating (due to the complexities in lock handling), | |
1589 | * we need to mark them as invalid now so that we force the | |
1590 | * relocation processing next time. Just in case the target | |
1591 | * object is evicted and then rebound into its old | |
1592 | * presumed_offset before the next execbuffer - if that | |
1593 | * happened we would make the mistake of assuming that the | |
1594 | * relocations were valid. | |
1595 | */ | |
1596 | if (!user_access_begin(urelocs, size)) | |
1597 | goto end; | |
1598 | ||
1599 | for (copied = 0; copied < nreloc; copied++) | |
1600 | unsafe_put_user(-1, | |
1601 | &urelocs[copied].presumed_offset, | |
1602 | end_user); | |
1603 | user_access_end(); | |
1604 | ||
1605 | eb->exec[i].relocs_ptr = (uintptr_t)relocs; | |
1606 | } | |
1607 | ||
1608 | return 0; | |
1609 | ||
1610 | end_user: | |
1611 | user_access_end(); | |
1612 | end: | |
1613 | kvfree(relocs); | |
1614 | err = -EFAULT; | |
1615 | err: | |
1616 | while (i--) { | |
1617 | relocs = u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr); | |
1618 | if (eb->exec[i].relocation_count) | |
1619 | kvfree(relocs); | |
1620 | } | |
1621 | return err; | |
1622 | } | |
1623 | ||
1624 | static int eb_prefault_relocations(const struct i915_execbuffer *eb) | |
1625 | { | |
1626 | const unsigned int count = eb->buffer_count; | |
1627 | unsigned int i; | |
1628 | ||
1629 | for (i = 0; i < count; i++) { | |
1630 | int err; | |
1631 | ||
1632 | err = check_relocations(&eb->exec[i]); | |
1633 | if (err) | |
1634 | return err; | |
1635 | } | |
1636 | ||
1637 | return 0; | |
1638 | } | |
1639 | ||
ed29c269 ML |
1640 | static int eb_reinit_userptr(struct i915_execbuffer *eb) |
1641 | { | |
1642 | const unsigned int count = eb->buffer_count; | |
1643 | unsigned int i; | |
1644 | int ret; | |
1645 | ||
1646 | if (likely(!(eb->args->flags & __EXEC_USERPTR_USED))) | |
1647 | return 0; | |
1648 | ||
1649 | for (i = 0; i < count; i++) { | |
1650 | struct eb_vma *ev = &eb->vma[i]; | |
1651 | ||
1652 | if (!i915_gem_object_is_userptr(ev->vma->obj)) | |
1653 | continue; | |
1654 | ||
1655 | ret = i915_gem_object_userptr_submit_init(ev->vma->obj); | |
1656 | if (ret) | |
1657 | return ret; | |
1658 | ||
1659 | ev->flags |= __EXEC_OBJECT_USERPTR_INIT; | |
1660 | } | |
1661 | ||
1662 | return 0; | |
1663 | } | |
1664 | ||
544460c3 | 1665 | static noinline int eb_relocate_parse_slow(struct i915_execbuffer *eb) |
fd1500fc ML |
1666 | { |
1667 | bool have_copy = false; | |
1668 | struct eb_vma *ev; | |
1669 | int err = 0; | |
1670 | ||
1671 | repeat: | |
1672 | if (signal_pending(current)) { | |
1673 | err = -ERESTARTSYS; | |
1674 | goto out; | |
6951e589 | 1675 | } |
fd1500fc | 1676 | |
c43ce123 | 1677 | /* We may process another execbuffer during the unlock... */ |
b4b9731b | 1678 | eb_release_vmas(eb, false); |
c43ce123 ML |
1679 | i915_gem_ww_ctx_fini(&eb->ww); |
1680 | ||
fd1500fc ML |
1681 | /* |
1682 | * We take 3 passes through the slowpatch. | |
1683 | * | |
1684 | * 1 - we try to just prefault all the user relocation entries and | |
1685 | * then attempt to reuse the atomic pagefault disabled fast path again. | |
1686 | * | |
1687 | * 2 - we copy the user entries to a local buffer here outside of the | |
1688 | * local and allow ourselves to wait upon any rendering before | |
1689 | * relocations | |
1690 | * | |
1691 | * 3 - we already have a local copy of the relocation entries, but | |
1692 | * were interrupted (EAGAIN) whilst waiting for the objects, try again. | |
1693 | */ | |
1694 | if (!err) { | |
1695 | err = eb_prefault_relocations(eb); | |
1696 | } else if (!have_copy) { | |
1697 | err = eb_copy_relocations(eb); | |
1698 | have_copy = err == 0; | |
1699 | } else { | |
1700 | cond_resched(); | |
1701 | err = 0; | |
1702 | } | |
1703 | ||
2bf541ff | 1704 | if (!err) |
ed29c269 | 1705 | err = eb_reinit_userptr(eb); |
fd1500fc | 1706 | |
c43ce123 | 1707 | i915_gem_ww_ctx_init(&eb->ww, true); |
fd1500fc ML |
1708 | if (err) |
1709 | goto out; | |
1710 | ||
c43ce123 ML |
1711 | /* reacquire the objects */ |
1712 | repeat_validate: | |
544460c3 MB |
1713 | err = eb_pin_engine(eb, false); |
1714 | if (err) | |
2bf541ff | 1715 | goto err; |
2bf541ff | 1716 | |
c43ce123 | 1717 | err = eb_validate_vmas(eb); |
fd1500fc | 1718 | if (err) |
c43ce123 ML |
1719 | goto err; |
1720 | ||
544460c3 | 1721 | GEM_BUG_ON(!eb->batches[0]); |
fd1500fc ML |
1722 | |
1723 | list_for_each_entry(ev, &eb->relocs, reloc_link) { | |
1724 | if (!have_copy) { | |
fd1500fc | 1725 | err = eb_relocate_vma(eb, ev); |
fd1500fc ML |
1726 | if (err) |
1727 | break; | |
1728 | } else { | |
1729 | err = eb_relocate_vma_slow(eb, ev); | |
1730 | if (err) | |
1731 | break; | |
1732 | } | |
1733 | } | |
1734 | ||
c43ce123 ML |
1735 | if (err == -EDEADLK) |
1736 | goto err; | |
1737 | ||
fd1500fc ML |
1738 | if (err && !have_copy) |
1739 | goto repeat; | |
1740 | ||
1741 | if (err) | |
1742 | goto err; | |
1743 | ||
8e4ba491 ML |
1744 | /* as last step, parse the command buffer */ |
1745 | err = eb_parse(eb); | |
1746 | if (err) | |
1747 | goto err; | |
1748 | ||
fd1500fc ML |
1749 | /* |
1750 | * Leave the user relocations as are, this is the painfully slow path, | |
1751 | * and we want to avoid the complication of dropping the lock whilst | |
1752 | * having buffers reserved in the aperture and so causing spurious | |
1753 | * ENOSPC for random operations. | |
1754 | */ | |
1755 | ||
1756 | err: | |
c43ce123 | 1757 | if (err == -EDEADLK) { |
b4b9731b | 1758 | eb_release_vmas(eb, false); |
c43ce123 ML |
1759 | err = i915_gem_ww_ctx_backoff(&eb->ww); |
1760 | if (!err) | |
1761 | goto repeat_validate; | |
1762 | } | |
1763 | ||
fd1500fc ML |
1764 | if (err == -EAGAIN) |
1765 | goto repeat; | |
1766 | ||
1767 | out: | |
1768 | if (have_copy) { | |
1769 | const unsigned int count = eb->buffer_count; | |
1770 | unsigned int i; | |
1771 | ||
1772 | for (i = 0; i < count; i++) { | |
1773 | const struct drm_i915_gem_exec_object2 *entry = | |
1774 | &eb->exec[i]; | |
1775 | struct drm_i915_gem_relocation_entry *relocs; | |
1776 | ||
1777 | if (!entry->relocation_count) | |
1778 | continue; | |
1779 | ||
1780 | relocs = u64_to_ptr(typeof(*relocs), entry->relocs_ptr); | |
1781 | kvfree(relocs); | |
1782 | } | |
1783 | } | |
1784 | ||
1785 | return err; | |
1786 | } | |
1787 | ||
8e4ba491 | 1788 | static int eb_relocate_parse(struct i915_execbuffer *eb) |
54cf91dc | 1789 | { |
003d8b91 | 1790 | int err; |
2bf541ff | 1791 | bool throttle = true; |
003d8b91 | 1792 | |
c43ce123 | 1793 | retry: |
544460c3 MB |
1794 | err = eb_pin_engine(eb, throttle); |
1795 | if (err) { | |
2bf541ff ML |
1796 | if (err != -EDEADLK) |
1797 | return err; | |
1798 | ||
1799 | goto err; | |
1800 | } | |
1801 | ||
2bf541ff ML |
1802 | /* only throttle once, even if we didn't need to throttle */ |
1803 | throttle = false; | |
1804 | ||
c43ce123 ML |
1805 | err = eb_validate_vmas(eb); |
1806 | if (err == -EAGAIN) | |
1807 | goto slow; | |
1808 | else if (err) | |
1809 | goto err; | |
2889caa9 CW |
1810 | |
1811 | /* The objects are in their final locations, apply the relocations. */ | |
1812 | if (eb->args->flags & __EXEC_HAS_RELOC) { | |
7d6236bb | 1813 | struct eb_vma *ev; |
2889caa9 | 1814 | |
7d6236bb | 1815 | list_for_each_entry(ev, &eb->relocs, reloc_link) { |
7dc8f114 CW |
1816 | err = eb_relocate_vma(eb, ev); |
1817 | if (err) | |
fd1500fc | 1818 | break; |
2889caa9 | 1819 | } |
fd1500fc | 1820 | |
c43ce123 ML |
1821 | if (err == -EDEADLK) |
1822 | goto err; | |
1823 | else if (err) | |
1824 | goto slow; | |
1825 | } | |
1826 | ||
1827 | if (!err) | |
1828 | err = eb_parse(eb); | |
1829 | ||
1830 | err: | |
1831 | if (err == -EDEADLK) { | |
b4b9731b | 1832 | eb_release_vmas(eb, false); |
c43ce123 ML |
1833 | err = i915_gem_ww_ctx_backoff(&eb->ww); |
1834 | if (!err) | |
1835 | goto retry; | |
2889caa9 CW |
1836 | } |
1837 | ||
c43ce123 ML |
1838 | return err; |
1839 | ||
1840 | slow: | |
544460c3 | 1841 | err = eb_relocate_parse_slow(eb); |
c43ce123 ML |
1842 | if (err) |
1843 | /* | |
1844 | * If the user expects the execobject.offset and | |
1845 | * reloc.presumed_offset to be an exact match, | |
1846 | * as for using NO_RELOC, then we cannot update | |
1847 | * the execobject.offset until we have completed | |
1848 | * relocation. | |
1849 | */ | |
1850 | eb->args->flags &= ~__EXEC_HAS_RELOC; | |
1851 | ||
1852 | return err; | |
2889caa9 CW |
1853 | } |
1854 | ||
544460c3 MB |
1855 | /* |
1856 | * Using two helper loops for the order of which requests / batches are created | |
1857 | * and added the to backend. Requests are created in order from the parent to | |
1858 | * the last child. Requests are added in the reverse order, from the last child | |
1859 | * to parent. This is done for locking reasons as the timeline lock is acquired | |
1860 | * during request creation and released when the request is added to the | |
1861 | * backend. To make lockdep happy (see intel_context_timeline_lock) this must be | |
1862 | * the ordering. | |
1863 | */ | |
1864 | #define for_each_batch_create_order(_eb, _i) \ | |
1865 | for ((_i) = 0; (_i) < (_eb)->num_batches; ++(_i)) | |
1866 | #define for_each_batch_add_order(_eb, _i) \ | |
1867 | BUILD_BUG_ON(!typecheck(int, _i)); \ | |
1868 | for ((_i) = (_eb)->num_batches - 1; (_i) >= 0; --(_i)) | |
1869 | ||
1870 | static struct i915_request * | |
1871 | eb_find_first_request_added(struct i915_execbuffer *eb) | |
1872 | { | |
1873 | int i; | |
1874 | ||
1875 | for_each_batch_add_order(eb, i) | |
1876 | if (eb->requests[i]) | |
1877 | return eb->requests[i]; | |
1878 | ||
1879 | GEM_BUG_ON("Request not found"); | |
1880 | ||
1881 | return NULL; | |
1882 | } | |
1883 | ||
2889caa9 CW |
1884 | static int eb_move_to_gpu(struct i915_execbuffer *eb) |
1885 | { | |
1886 | const unsigned int count = eb->buffer_count; | |
c43ce123 | 1887 | unsigned int i = count; |
544460c3 | 1888 | int err = 0, j; |
6951e589 CW |
1889 | |
1890 | while (i--) { | |
7d6236bb CW |
1891 | struct eb_vma *ev = &eb->vma[i]; |
1892 | struct i915_vma *vma = ev->vma; | |
1893 | unsigned int flags = ev->flags; | |
27173f1f | 1894 | struct drm_i915_gem_object *obj = vma->obj; |
03ade511 | 1895 | |
6951e589 CW |
1896 | assert_vma_held(vma); |
1897 | ||
c7c6e46f | 1898 | if (flags & EXEC_OBJECT_CAPTURE) { |
e61e0f51 | 1899 | struct i915_capture_list *capture; |
b0fd47ad | 1900 | |
544460c3 MB |
1901 | for_each_batch_create_order(eb, j) { |
1902 | if (!eb->requests[j]) | |
1903 | break; | |
1904 | ||
1905 | capture = kmalloc(sizeof(*capture), GFP_KERNEL); | |
1906 | if (capture) { | |
1907 | capture->next = | |
1908 | eb->requests[j]->capture_list; | |
1909 | capture->vma = vma; | |
1910 | eb->requests[j]->capture_list = capture; | |
1911 | } | |
6951e589 | 1912 | } |
b0fd47ad CW |
1913 | } |
1914 | ||
b8f55be6 CW |
1915 | /* |
1916 | * If the GPU is not _reading_ through the CPU cache, we need | |
1917 | * to make sure that any writes (both previous GPU writes from | |
1918 | * before a change in snooping levels and normal CPU writes) | |
1919 | * caught in that cache are flushed to main memory. | |
1920 | * | |
1921 | * We want to say | |
1922 | * obj->cache_dirty && | |
1923 | * !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ) | |
1924 | * but gcc's optimiser doesn't handle that as well and emits | |
1925 | * two jumps instead of one. Maybe one day... | |
df94fd05 MA |
1926 | * |
1927 | * FIXME: There is also sync flushing in set_pages(), which | |
1928 | * serves a different purpose(some of the time at least). | |
1929 | * | |
1930 | * We should consider: | |
1931 | * | |
1932 | * 1. Rip out the async flush code. | |
1933 | * | |
1934 | * 2. Or make the sync flushing use the async clflush path | |
1935 | * using mandatory fences underneath. Currently the below | |
1936 | * async flush happens after we bind the object. | |
b8f55be6 CW |
1937 | */ |
1938 | if (unlikely(obj->cache_dirty & ~obj->cache_coherent)) { | |
0f46daa1 | 1939 | if (i915_gem_clflush_object(obj, 0)) |
c7c6e46f | 1940 | flags &= ~EXEC_OBJECT_ASYNC; |
0f46daa1 CW |
1941 | } |
1942 | ||
544460c3 | 1943 | /* We only need to await on the first request */ |
6951e589 CW |
1944 | if (err == 0 && !(flags & EXEC_OBJECT_ASYNC)) { |
1945 | err = i915_request_await_object | |
544460c3 MB |
1946 | (eb_find_first_request_added(eb), obj, |
1947 | flags & EXEC_OBJECT_WRITE); | |
6951e589 | 1948 | } |
2889caa9 | 1949 | |
544460c3 MB |
1950 | for_each_batch_add_order(eb, j) { |
1951 | if (err) | |
1952 | break; | |
1953 | if (!eb->requests[j]) | |
1954 | continue; | |
1955 | ||
1956 | err = _i915_vma_move_to_active(vma, eb->requests[j], | |
1957 | j ? NULL : | |
1958 | eb->composite_fence ? | |
1959 | eb->composite_fence : | |
1960 | &eb->requests[j]->fence, | |
1961 | flags | __EXEC_OBJECT_NO_RESERVE); | |
1962 | } | |
c59a333f | 1963 | } |
0f1dd022 | 1964 | |
ed29c269 ML |
1965 | #ifdef CONFIG_MMU_NOTIFIER |
1966 | if (!err && (eb->args->flags & __EXEC_USERPTR_USED)) { | |
b4b9731b | 1967 | read_lock(&eb->i915->mm.notifier_lock); |
ed29c269 ML |
1968 | |
1969 | /* | |
1970 | * count is always at least 1, otherwise __EXEC_USERPTR_USED | |
1971 | * could not have been set | |
1972 | */ | |
1973 | for (i = 0; i < count; i++) { | |
1974 | struct eb_vma *ev = &eb->vma[i]; | |
1975 | struct drm_i915_gem_object *obj = ev->vma->obj; | |
1976 | ||
1977 | if (!i915_gem_object_is_userptr(obj)) | |
1978 | continue; | |
1979 | ||
1980 | err = i915_gem_object_userptr_submit_done(obj); | |
1981 | if (err) | |
1982 | break; | |
1983 | } | |
1984 | ||
b4b9731b | 1985 | read_unlock(&eb->i915->mm.notifier_lock); |
ed29c269 ML |
1986 | } |
1987 | #endif | |
1988 | ||
6951e589 CW |
1989 | if (unlikely(err)) |
1990 | goto err_skip; | |
1991 | ||
dcd79934 | 1992 | /* Unconditionally flush any chipset caches (for streaming writes). */ |
544460c3 | 1993 | intel_gt_chipset_flush(eb->gt); |
2113184c | 1994 | return 0; |
6951e589 CW |
1995 | |
1996 | err_skip: | |
544460c3 MB |
1997 | for_each_batch_create_order(eb, j) { |
1998 | if (!eb->requests[j]) | |
1999 | break; | |
2000 | ||
2001 | i915_request_set_error_once(eb->requests[j], err); | |
2002 | } | |
6951e589 | 2003 | return err; |
54cf91dc CW |
2004 | } |
2005 | ||
00aff3f6 | 2006 | static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec) |
54cf91dc | 2007 | { |
650bc635 | 2008 | if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS) |
00aff3f6 | 2009 | return -EINVAL; |
ed5982e6 | 2010 | |
2f5945bc | 2011 | /* Kernel clipping was a DRI1 misfeature */ |
cda9edd0 LL |
2012 | if (!(exec->flags & (I915_EXEC_FENCE_ARRAY | |
2013 | I915_EXEC_USE_EXTENSIONS))) { | |
cf6e7bac | 2014 | if (exec->num_cliprects || exec->cliprects_ptr) |
00aff3f6 | 2015 | return -EINVAL; |
cf6e7bac | 2016 | } |
2f5945bc CW |
2017 | |
2018 | if (exec->DR4 == 0xffffffff) { | |
2019 | DRM_DEBUG("UXA submitting garbage DR4, fixing up\n"); | |
2020 | exec->DR4 = 0; | |
2021 | } | |
2022 | if (exec->DR1 || exec->DR4) | |
00aff3f6 | 2023 | return -EINVAL; |
2f5945bc CW |
2024 | |
2025 | if ((exec->batch_start_offset | exec->batch_len) & 0x7) | |
00aff3f6 | 2026 | return -EINVAL; |
2f5945bc | 2027 | |
00aff3f6 | 2028 | return 0; |
54cf91dc CW |
2029 | } |
2030 | ||
e61e0f51 | 2031 | static int i915_reset_gen7_sol_offsets(struct i915_request *rq) |
ae662d31 | 2032 | { |
73dec95e TU |
2033 | u32 *cs; |
2034 | int i; | |
ae662d31 | 2035 | |
40e1956e | 2036 | if (GRAPHICS_VER(rq->engine->i915) != 7 || rq->engine->id != RCS0) { |
5a833995 | 2037 | drm_dbg(&rq->engine->i915->drm, "sol reset is gen7/rcs only\n"); |
9d662da8 DV |
2038 | return -EINVAL; |
2039 | } | |
ae662d31 | 2040 | |
e61e0f51 | 2041 | cs = intel_ring_begin(rq, 4 * 2 + 2); |
73dec95e TU |
2042 | if (IS_ERR(cs)) |
2043 | return PTR_ERR(cs); | |
ae662d31 | 2044 | |
2889caa9 | 2045 | *cs++ = MI_LOAD_REGISTER_IMM(4); |
ae662d31 | 2046 | for (i = 0; i < 4; i++) { |
73dec95e TU |
2047 | *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i)); |
2048 | *cs++ = 0; | |
ae662d31 | 2049 | } |
2889caa9 | 2050 | *cs++ = MI_NOOP; |
e61e0f51 | 2051 | intel_ring_advance(rq, cs); |
ae662d31 EA |
2052 | |
2053 | return 0; | |
2054 | } | |
2055 | ||
4f7af194 | 2056 | static struct i915_vma * |
47b08693 ML |
2057 | shadow_batch_pin(struct i915_execbuffer *eb, |
2058 | struct drm_i915_gem_object *obj, | |
32d94048 CW |
2059 | struct i915_address_space *vm, |
2060 | unsigned int flags) | |
4f7af194 | 2061 | { |
b291ce0a | 2062 | struct i915_vma *vma; |
b291ce0a | 2063 | int err; |
4f7af194 | 2064 | |
b291ce0a CW |
2065 | vma = i915_vma_instance(obj, vm, NULL); |
2066 | if (IS_ERR(vma)) | |
2067 | return vma; | |
2068 | ||
47b08693 | 2069 | err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, flags); |
b291ce0a CW |
2070 | if (err) |
2071 | return ERR_PTR(err); | |
2072 | ||
2073 | return vma; | |
4f7af194 JB |
2074 | } |
2075 | ||
47b08693 ML |
2076 | static struct i915_vma *eb_dispatch_secure(struct i915_execbuffer *eb, struct i915_vma *vma) |
2077 | { | |
2078 | /* | |
2079 | * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure | |
2080 | * batch" bit. Hence we need to pin secure batches into the global gtt. | |
2081 | * hsw should have this fixed, but bdw mucks it up again. */ | |
2082 | if (eb->batch_flags & I915_DISPATCH_SECURE) | |
2083 | return i915_gem_object_ggtt_pin_ww(vma->obj, &eb->ww, NULL, 0, 0, 0); | |
2084 | ||
2085 | return NULL; | |
2086 | } | |
2087 | ||
51696691 | 2088 | static int eb_parse(struct i915_execbuffer *eb) |
71745376 | 2089 | { |
baa89ba3 | 2090 | struct drm_i915_private *i915 = eb->i915; |
c43ce123 | 2091 | struct intel_gt_buffer_pool_node *pool = eb->batch_pool; |
47b08693 | 2092 | struct i915_vma *shadow, *trampoline, *batch; |
d5e87821 | 2093 | unsigned long len; |
2889caa9 | 2094 | int err; |
71745376 | 2095 | |
47b08693 | 2096 | if (!eb_use_cmdparser(eb)) { |
544460c3 | 2097 | batch = eb_dispatch_secure(eb, eb->batches[0]->vma); |
47b08693 ML |
2098 | if (IS_ERR(batch)) |
2099 | return PTR_ERR(batch); | |
2100 | ||
2101 | goto secure_batch; | |
2102 | } | |
51696691 | 2103 | |
544460c3 MB |
2104 | if (intel_context_is_parallel(eb->context)) |
2105 | return -EINVAL; | |
2106 | ||
2107 | len = eb->batch_len[0]; | |
32d94048 CW |
2108 | if (!CMDPARSER_USES_GGTT(eb->i915)) { |
2109 | /* | |
2110 | * ppGTT backed shadow buffers must be mapped RO, to prevent | |
2111 | * post-scan tampering | |
2112 | */ | |
2113 | if (!eb->context->vm->has_read_only) { | |
baa89ba3 WK |
2114 | drm_dbg(&i915->drm, |
2115 | "Cannot prevent post-scan tampering without RO capable vm\n"); | |
32d94048 CW |
2116 | return -EINVAL; |
2117 | } | |
2118 | } else { | |
2119 | len += I915_CMD_PARSER_TRAMPOLINE_SIZE; | |
2120 | } | |
544460c3 | 2121 | if (unlikely(len < eb->batch_len[0])) /* last paranoid check of overflow */ |
d5e87821 | 2122 | return -EINVAL; |
32d94048 | 2123 | |
c43ce123 | 2124 | if (!pool) { |
544460c3 | 2125 | pool = intel_gt_get_buffer_pool(eb->gt, len, |
8f47c8c3 | 2126 | I915_MAP_WB); |
c43ce123 ML |
2127 | if (IS_ERR(pool)) |
2128 | return PTR_ERR(pool); | |
2129 | eb->batch_pool = pool; | |
2130 | } | |
71745376 | 2131 | |
c43ce123 ML |
2132 | err = i915_gem_object_lock(pool->obj, &eb->ww); |
2133 | if (err) | |
2134 | goto err; | |
71745376 | 2135 | |
47b08693 | 2136 | shadow = shadow_batch_pin(eb, pool->obj, eb->context->vm, PIN_USER); |
32d94048 CW |
2137 | if (IS_ERR(shadow)) { |
2138 | err = PTR_ERR(shadow); | |
f8c08d8f | 2139 | goto err; |
51696691 | 2140 | } |
c9398775 | 2141 | intel_gt_buffer_pool_mark_used(pool); |
32d94048 | 2142 | i915_gem_object_set_readonly(shadow->obj); |
57a78ca4 | 2143 | shadow->private = pool; |
32d94048 CW |
2144 | |
2145 | trampoline = NULL; | |
2146 | if (CMDPARSER_USES_GGTT(eb->i915)) { | |
2147 | trampoline = shadow; | |
2148 | ||
47b08693 | 2149 | shadow = shadow_batch_pin(eb, pool->obj, |
544460c3 | 2150 | &eb->gt->ggtt->vm, |
32d94048 CW |
2151 | PIN_GLOBAL); |
2152 | if (IS_ERR(shadow)) { | |
2153 | err = PTR_ERR(shadow); | |
2154 | shadow = trampoline; | |
2155 | goto err_shadow; | |
2156 | } | |
57a78ca4 | 2157 | shadow->private = pool; |
32d94048 CW |
2158 | |
2159 | eb->batch_flags |= I915_DISPATCH_SECURE; | |
2160 | } | |
f8c08d8f | 2161 | |
47b08693 ML |
2162 | batch = eb_dispatch_secure(eb, shadow); |
2163 | if (IS_ERR(batch)) { | |
2164 | err = PTR_ERR(batch); | |
2165 | goto err_trampoline; | |
2166 | } | |
2167 | ||
93b71330 JE |
2168 | err = dma_resv_reserve_shared(shadow->resv, 1); |
2169 | if (err) | |
2170 | goto err_trampoline; | |
2171 | ||
544460c3 MB |
2172 | err = intel_engine_cmd_parser(eb->context->engine, |
2173 | eb->batches[0]->vma, | |
93b71330 | 2174 | eb->batch_start_offset, |
544460c3 | 2175 | eb->batch_len[0], |
93b71330 | 2176 | shadow, trampoline); |
32d94048 | 2177 | if (err) |
47b08693 | 2178 | goto err_unpin_batch; |
71745376 | 2179 | |
544460c3 MB |
2180 | eb->batches[0] = &eb->vma[eb->buffer_count++]; |
2181 | eb->batches[0]->vma = i915_vma_get(shadow); | |
2182 | eb->batches[0]->flags = __EXEC_OBJECT_HAS_PIN; | |
71745376 | 2183 | |
32d94048 | 2184 | eb->trampoline = trampoline; |
4f7af194 | 2185 | eb->batch_start_offset = 0; |
4f7af194 | 2186 | |
47b08693 ML |
2187 | secure_batch: |
2188 | if (batch) { | |
544460c3 MB |
2189 | if (intel_context_is_parallel(eb->context)) |
2190 | return -EINVAL; | |
2191 | ||
2192 | eb->batches[0] = &eb->vma[eb->buffer_count++]; | |
2193 | eb->batches[0]->flags = __EXEC_OBJECT_HAS_PIN; | |
2194 | eb->batches[0]->vma = i915_vma_get(batch); | |
47b08693 | 2195 | } |
51696691 | 2196 | return 0; |
b40d7378 | 2197 | |
47b08693 ML |
2198 | err_unpin_batch: |
2199 | if (batch) | |
2200 | i915_vma_unpin(batch); | |
32d94048 CW |
2201 | err_trampoline: |
2202 | if (trampoline) | |
2203 | i915_vma_unpin(trampoline); | |
2204 | err_shadow: | |
2205 | i915_vma_unpin(shadow); | |
b40d7378 | 2206 | err: |
51696691 | 2207 | return err; |
71745376 | 2208 | } |
5c6c6003 | 2209 | |
544460c3 MB |
2210 | static int eb_request_submit(struct i915_execbuffer *eb, |
2211 | struct i915_request *rq, | |
2212 | struct i915_vma *batch, | |
2213 | u64 batch_len) | |
78382593 | 2214 | { |
2889caa9 | 2215 | int err; |
78382593 | 2216 | |
544460c3 MB |
2217 | if (intel_context_nopreempt(rq->context)) |
2218 | __set_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags); | |
78382593 | 2219 | |
650bc635 | 2220 | if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) { |
544460c3 | 2221 | err = i915_reset_gen7_sol_offsets(rq); |
2889caa9 CW |
2222 | if (err) |
2223 | return err; | |
78382593 OM |
2224 | } |
2225 | ||
85474441 CW |
2226 | /* |
2227 | * After we completed waiting for other engines (using HW semaphores) | |
2228 | * then we can signal that this request/batch is ready to run. This | |
2229 | * allows us to determine if the batch is still waiting on the GPU | |
2230 | * or actually running by checking the breadcrumb. | |
2231 | */ | |
544460c3 MB |
2232 | if (rq->context->engine->emit_init_breadcrumb) { |
2233 | err = rq->context->engine->emit_init_breadcrumb(rq); | |
85474441 CW |
2234 | if (err) |
2235 | return err; | |
2236 | } | |
2237 | ||
544460c3 MB |
2238 | err = rq->context->engine->emit_bb_start(rq, |
2239 | batch->node.start + | |
2240 | eb->batch_start_offset, | |
2241 | batch_len, | |
2242 | eb->batch_flags); | |
2889caa9 CW |
2243 | if (err) |
2244 | return err; | |
78382593 | 2245 | |
32d94048 | 2246 | if (eb->trampoline) { |
544460c3 | 2247 | GEM_BUG_ON(intel_context_is_parallel(rq->context)); |
32d94048 | 2248 | GEM_BUG_ON(eb->batch_start_offset); |
544460c3 MB |
2249 | err = rq->context->engine->emit_bb_start(rq, |
2250 | eb->trampoline->node.start + | |
2251 | batch_len, 0, 0); | |
32d94048 CW |
2252 | if (err) |
2253 | return err; | |
2254 | } | |
2255 | ||
2f5945bc | 2256 | return 0; |
78382593 OM |
2257 | } |
2258 | ||
544460c3 MB |
2259 | static int eb_submit(struct i915_execbuffer *eb) |
2260 | { | |
2261 | unsigned int i; | |
2262 | int err; | |
2263 | ||
2264 | err = eb_move_to_gpu(eb); | |
2265 | ||
2266 | for_each_batch_create_order(eb, i) { | |
2267 | if (!eb->requests[i]) | |
2268 | break; | |
2269 | ||
2270 | trace_i915_request_queue(eb->requests[i], eb->batch_flags); | |
2271 | if (!err) | |
2272 | err = eb_request_submit(eb, eb->requests[i], | |
2273 | eb->batches[i]->vma, | |
2274 | eb->batch_len[i]); | |
2275 | } | |
2276 | ||
2277 | return err; | |
2278 | } | |
2279 | ||
d5b2a3a4 CW |
2280 | static int num_vcs_engines(const struct drm_i915_private *i915) |
2281 | { | |
bb80d878 | 2282 | return hweight_long(VDBOX_MASK(&i915->gt)); |
d5b2a3a4 CW |
2283 | } |
2284 | ||
204bcfef | 2285 | /* |
a8ebba75 | 2286 | * Find one BSD ring to dispatch the corresponding BSD command. |
c80ff16e | 2287 | * The engine index is returned. |
a8ebba75 | 2288 | */ |
de1add36 | 2289 | static unsigned int |
c80ff16e CW |
2290 | gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv, |
2291 | struct drm_file *file) | |
a8ebba75 | 2292 | { |
a8ebba75 ZY |
2293 | struct drm_i915_file_private *file_priv = file->driver_priv; |
2294 | ||
de1add36 | 2295 | /* Check whether the file_priv has already selected one ring. */ |
6f633402 | 2296 | if ((int)file_priv->bsd_engine < 0) |
1a07e86c CW |
2297 | file_priv->bsd_engine = |
2298 | get_random_int() % num_vcs_engines(dev_priv); | |
d23db88c | 2299 | |
c80ff16e | 2300 | return file_priv->bsd_engine; |
d23db88c CW |
2301 | } |
2302 | ||
5e2a0419 | 2303 | static const enum intel_engine_id user_ring_map[] = { |
8a68d464 CW |
2304 | [I915_EXEC_DEFAULT] = RCS0, |
2305 | [I915_EXEC_RENDER] = RCS0, | |
2306 | [I915_EXEC_BLT] = BCS0, | |
2307 | [I915_EXEC_BSD] = VCS0, | |
2308 | [I915_EXEC_VEBOX] = VECS0 | |
de1add36 TU |
2309 | }; |
2310 | ||
2bf541ff | 2311 | static struct i915_request *eb_throttle(struct i915_execbuffer *eb, struct intel_context *ce) |
e5dadff4 CW |
2312 | { |
2313 | struct intel_ring *ring = ce->ring; | |
2314 | struct intel_timeline *tl = ce->timeline; | |
2315 | struct i915_request *rq; | |
2316 | ||
2317 | /* | |
2318 | * Completely unscientific finger-in-the-air estimates for suitable | |
2319 | * maximum user request size (to avoid blocking) and then backoff. | |
2320 | */ | |
2321 | if (intel_ring_update_space(ring) >= PAGE_SIZE) | |
2322 | return NULL; | |
2323 | ||
2324 | /* | |
2325 | * Find a request that after waiting upon, there will be at least half | |
2326 | * the ring available. The hysteresis allows us to compete for the | |
2327 | * shared ring and should mean that we sleep less often prior to | |
2328 | * claiming our resources, but not so long that the ring completely | |
2329 | * drains before we can submit our next request. | |
2330 | */ | |
2331 | list_for_each_entry(rq, &tl->requests, link) { | |
2332 | if (rq->ring != ring) | |
2333 | continue; | |
2334 | ||
2335 | if (__intel_ring_space(rq->postfix, | |
2336 | ring->emit, ring->size) > ring->size / 2) | |
2337 | break; | |
2338 | } | |
2339 | if (&rq->link == &tl->requests) | |
2340 | return NULL; /* weird, we will check again later for real */ | |
2341 | ||
2342 | return i915_request_get(rq); | |
2343 | } | |
2344 | ||
544460c3 MB |
2345 | static int eb_pin_timeline(struct i915_execbuffer *eb, struct intel_context *ce, |
2346 | bool throttle) | |
e5dadff4 CW |
2347 | { |
2348 | struct intel_timeline *tl; | |
2bf541ff | 2349 | struct i915_request *rq = NULL; |
8f2a1057 | 2350 | |
a4e57f90 CW |
2351 | /* |
2352 | * Take a local wakeref for preparing to dispatch the execbuf as | |
2353 | * we expect to access the hardware fairly frequently in the | |
2354 | * process, and require the engine to be kept awake between accesses. | |
2355 | * Upon dispatch, we acquire another prolonged wakeref that we hold | |
2356 | * until the timeline is idle, which in turn releases the wakeref | |
2357 | * taken on the engine, and the parent device. | |
2358 | */ | |
e5dadff4 | 2359 | tl = intel_context_timeline_lock(ce); |
544460c3 MB |
2360 | if (IS_ERR(tl)) |
2361 | return PTR_ERR(tl); | |
a4e57f90 CW |
2362 | |
2363 | intel_context_enter(ce); | |
2bf541ff ML |
2364 | if (throttle) |
2365 | rq = eb_throttle(eb, ce); | |
e5dadff4 CW |
2366 | intel_context_timeline_unlock(tl); |
2367 | ||
544460c3 MB |
2368 | if (rq) { |
2369 | bool nonblock = eb->file->filp->f_flags & O_NONBLOCK; | |
2370 | long timeout = nonblock ? 0 : MAX_SCHEDULE_TIMEOUT; | |
2371 | ||
2372 | if (i915_request_wait(rq, I915_WAIT_INTERRUPTIBLE, | |
2373 | timeout) < 0) { | |
2374 | i915_request_put(rq); | |
2375 | ||
2376 | tl = intel_context_timeline_lock(ce); | |
2377 | intel_context_exit(ce); | |
2378 | intel_context_timeline_unlock(tl); | |
2379 | ||
2380 | if (nonblock) | |
2381 | return -EWOULDBLOCK; | |
2382 | else | |
2383 | return -EINTR; | |
2384 | } | |
2385 | i915_request_put(rq); | |
2386 | } | |
2387 | ||
2388 | return 0; | |
2389 | } | |
2390 | ||
2391 | static int eb_pin_engine(struct i915_execbuffer *eb, bool throttle) | |
2392 | { | |
2393 | struct intel_context *ce = eb->context, *child; | |
2394 | int err; | |
2395 | int i = 0, j = 0; | |
2396 | ||
2397 | GEM_BUG_ON(eb->args->flags & __EXEC_ENGINE_PINNED); | |
2398 | ||
2399 | if (unlikely(intel_context_is_banned(ce))) | |
2400 | return -EIO; | |
2401 | ||
2402 | /* | |
2403 | * Pinning the contexts may generate requests in order to acquire | |
2404 | * GGTT space, so do this first before we reserve a seqno for | |
2405 | * ourselves. | |
2406 | */ | |
2407 | err = intel_context_pin_ww(ce, &eb->ww); | |
2408 | if (err) | |
2409 | return err; | |
2410 | for_each_child(ce, child) { | |
2411 | err = intel_context_pin_ww(child, &eb->ww); | |
2412 | GEM_BUG_ON(err); /* perma-pinned should incr a counter */ | |
2413 | } | |
2414 | ||
2415 | for_each_child(ce, child) { | |
2416 | err = eb_pin_timeline(eb, child, throttle); | |
2417 | if (err) | |
2418 | goto unwind; | |
2419 | ++i; | |
2420 | } | |
2421 | err = eb_pin_timeline(eb, ce, throttle); | |
2422 | if (err) | |
2423 | goto unwind; | |
2424 | ||
2bf541ff | 2425 | eb->args->flags |= __EXEC_ENGINE_PINNED; |
544460c3 MB |
2426 | return 0; |
2427 | ||
2428 | unwind: | |
2429 | for_each_child(ce, child) { | |
2430 | if (j++ < i) { | |
2431 | mutex_lock(&child->timeline->mutex); | |
2432 | intel_context_exit(child); | |
2433 | mutex_unlock(&child->timeline->mutex); | |
2434 | } | |
2435 | } | |
2436 | for_each_child(ce, child) | |
2437 | intel_context_unpin(child); | |
2438 | intel_context_unpin(ce); | |
2439 | return err; | |
8f2a1057 CW |
2440 | } |
2441 | ||
e5dadff4 | 2442 | static void eb_unpin_engine(struct i915_execbuffer *eb) |
8f2a1057 | 2443 | { |
544460c3 | 2444 | struct intel_context *ce = eb->context, *child; |
a4e57f90 | 2445 | |
2bf541ff ML |
2446 | if (!(eb->args->flags & __EXEC_ENGINE_PINNED)) |
2447 | return; | |
2448 | ||
2449 | eb->args->flags &= ~__EXEC_ENGINE_PINNED; | |
2450 | ||
544460c3 MB |
2451 | for_each_child(ce, child) { |
2452 | mutex_lock(&child->timeline->mutex); | |
2453 | intel_context_exit(child); | |
2454 | mutex_unlock(&child->timeline->mutex); | |
2455 | ||
2456 | intel_context_unpin(child); | |
2457 | } | |
2458 | ||
2459 | mutex_lock(&ce->timeline->mutex); | |
a4e57f90 | 2460 | intel_context_exit(ce); |
544460c3 | 2461 | mutex_unlock(&ce->timeline->mutex); |
a4e57f90 | 2462 | |
2850748e | 2463 | intel_context_unpin(ce); |
8f2a1057 | 2464 | } |
de1add36 | 2465 | |
5e2a0419 | 2466 | static unsigned int |
b49a7d51 | 2467 | eb_select_legacy_ring(struct i915_execbuffer *eb) |
de1add36 | 2468 | { |
8f2a1057 | 2469 | struct drm_i915_private *i915 = eb->i915; |
b49a7d51 | 2470 | struct drm_i915_gem_execbuffer2 *args = eb->args; |
de1add36 | 2471 | unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK; |
de1add36 | 2472 | |
5e2a0419 CW |
2473 | if (user_ring_id != I915_EXEC_BSD && |
2474 | (args->flags & I915_EXEC_BSD_MASK)) { | |
baa89ba3 WK |
2475 | drm_dbg(&i915->drm, |
2476 | "execbuf with non bsd ring but with invalid " | |
2477 | "bsd dispatch flags: %d\n", (int)(args->flags)); | |
5e2a0419 | 2478 | return -1; |
de1add36 TU |
2479 | } |
2480 | ||
d5b2a3a4 | 2481 | if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(i915) > 1) { |
de1add36 TU |
2482 | unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK; |
2483 | ||
2484 | if (bsd_idx == I915_EXEC_BSD_DEFAULT) { | |
b49a7d51 | 2485 | bsd_idx = gen8_dispatch_bsd_engine(i915, eb->file); |
de1add36 TU |
2486 | } else if (bsd_idx >= I915_EXEC_BSD_RING1 && |
2487 | bsd_idx <= I915_EXEC_BSD_RING2) { | |
d9da6aa0 | 2488 | bsd_idx >>= I915_EXEC_BSD_SHIFT; |
de1add36 TU |
2489 | bsd_idx--; |
2490 | } else { | |
baa89ba3 WK |
2491 | drm_dbg(&i915->drm, |
2492 | "execbuf with unknown bsd ring: %u\n", | |
2493 | bsd_idx); | |
5e2a0419 | 2494 | return -1; |
de1add36 TU |
2495 | } |
2496 | ||
5e2a0419 | 2497 | return _VCS(bsd_idx); |
de1add36 TU |
2498 | } |
2499 | ||
5e2a0419 | 2500 | if (user_ring_id >= ARRAY_SIZE(user_ring_map)) { |
baa89ba3 WK |
2501 | drm_dbg(&i915->drm, "execbuf with unknown ring: %u\n", |
2502 | user_ring_id); | |
5e2a0419 | 2503 | return -1; |
de1add36 TU |
2504 | } |
2505 | ||
5e2a0419 CW |
2506 | return user_ring_map[user_ring_id]; |
2507 | } | |
2508 | ||
2509 | static int | |
2bf541ff | 2510 | eb_select_engine(struct i915_execbuffer *eb) |
5e2a0419 | 2511 | { |
544460c3 | 2512 | struct intel_context *ce, *child; |
5e2a0419 CW |
2513 | unsigned int idx; |
2514 | int err; | |
2515 | ||
976b55f0 | 2516 | if (i915_gem_context_user_engines(eb->gem_context)) |
b49a7d51 | 2517 | idx = eb->args->flags & I915_EXEC_RING_MASK; |
976b55f0 | 2518 | else |
b49a7d51 | 2519 | idx = eb_select_legacy_ring(eb); |
5e2a0419 CW |
2520 | |
2521 | ce = i915_gem_context_get_engine(eb->gem_context, idx); | |
2522 | if (IS_ERR(ce)) | |
2523 | return PTR_ERR(ce); | |
2524 | ||
544460c3 MB |
2525 | if (intel_context_is_parallel(ce)) { |
2526 | if (eb->buffer_count < ce->parallel.number_children + 1) { | |
2527 | intel_context_put(ce); | |
2528 | return -EINVAL; | |
2529 | } | |
2530 | if (eb->batch_start_offset || eb->args->batch_len) { | |
2531 | intel_context_put(ce); | |
2532 | return -EINVAL; | |
2533 | } | |
2534 | } | |
2535 | eb->num_batches = ce->parallel.number_children + 1; | |
2536 | ||
2537 | for_each_child(ce, child) | |
2538 | intel_context_get(child); | |
2bf541ff | 2539 | intel_gt_pm_get(ce->engine->gt); |
5e2a0419 | 2540 | |
2bf541ff ML |
2541 | if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) { |
2542 | err = intel_context_alloc_state(ce); | |
2543 | if (err) | |
2544 | goto err; | |
2545 | } | |
544460c3 MB |
2546 | for_each_child(ce, child) { |
2547 | if (!test_bit(CONTEXT_ALLOC_BIT, &child->flags)) { | |
2548 | err = intel_context_alloc_state(child); | |
2549 | if (err) | |
2550 | goto err; | |
2551 | } | |
2552 | } | |
2bf541ff ML |
2553 | |
2554 | /* | |
2555 | * ABI: Before userspace accesses the GPU (e.g. execbuffer), report | |
2556 | * EIO if the GPU is already wedged. | |
2557 | */ | |
2558 | err = intel_gt_terminally_wedged(ce->engine->gt); | |
2559 | if (err) | |
2560 | goto err; | |
2561 | ||
2562 | eb->context = ce; | |
544460c3 | 2563 | eb->gt = ce->engine->gt; |
2bf541ff ML |
2564 | |
2565 | /* | |
2566 | * Make sure engine pool stays alive even if we call intel_context_put | |
2567 | * during ww handling. The pool is destroyed when last pm reference | |
2568 | * is dropped, which breaks our -EDEADLK handling. | |
2569 | */ | |
2570 | return err; | |
2571 | ||
2572 | err: | |
2573 | intel_gt_pm_put(ce->engine->gt); | |
544460c3 MB |
2574 | for_each_child(ce, child) |
2575 | intel_context_put(child); | |
2bf541ff | 2576 | intel_context_put(ce); |
5e2a0419 | 2577 | return err; |
de1add36 TU |
2578 | } |
2579 | ||
2bf541ff ML |
2580 | static void |
2581 | eb_put_engine(struct i915_execbuffer *eb) | |
2582 | { | |
544460c3 MB |
2583 | struct intel_context *child; |
2584 | ||
2585 | intel_gt_pm_put(eb->gt); | |
2586 | for_each_child(eb->context, child) | |
2587 | intel_context_put(child); | |
2bf541ff ML |
2588 | intel_context_put(eb->context); |
2589 | } | |
2590 | ||
cf6e7bac | 2591 | static void |
13149e8b | 2592 | __free_fence_array(struct eb_fence *fences, unsigned int n) |
cf6e7bac | 2593 | { |
13149e8b | 2594 | while (n--) { |
cda9edd0 | 2595 | drm_syncobj_put(ptr_mask_bits(fences[n].syncobj, 2)); |
13149e8b | 2596 | dma_fence_put(fences[n].dma_fence); |
440d0f12 | 2597 | dma_fence_chain_free(fences[n].chain_fence); |
13149e8b | 2598 | } |
cf6e7bac JE |
2599 | kvfree(fences); |
2600 | } | |
2601 | ||
cda9edd0 | 2602 | static int |
13149e8b LL |
2603 | add_timeline_fence_array(struct i915_execbuffer *eb, |
2604 | const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences) | |
cf6e7bac | 2605 | { |
13149e8b LL |
2606 | struct drm_i915_gem_exec_fence __user *user_fences; |
2607 | u64 __user *user_values; | |
2608 | struct eb_fence *f; | |
2609 | u64 nfences; | |
2610 | int err = 0; | |
cf6e7bac | 2611 | |
13149e8b LL |
2612 | nfences = timeline_fences->fence_count; |
2613 | if (!nfences) | |
cda9edd0 | 2614 | return 0; |
cf6e7bac | 2615 | |
d710fc16 CW |
2616 | /* Check multiplication overflow for access_ok() and kvmalloc_array() */ |
2617 | BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long)); | |
2618 | if (nfences > min_t(unsigned long, | |
13149e8b LL |
2619 | ULONG_MAX / sizeof(*user_fences), |
2620 | SIZE_MAX / sizeof(*f)) - eb->num_fences) | |
cda9edd0 | 2621 | return -EINVAL; |
cf6e7bac | 2622 | |
13149e8b LL |
2623 | user_fences = u64_to_user_ptr(timeline_fences->handles_ptr); |
2624 | if (!access_ok(user_fences, nfences * sizeof(*user_fences))) | |
2625 | return -EFAULT; | |
2626 | ||
2627 | user_values = u64_to_user_ptr(timeline_fences->values_ptr); | |
2628 | if (!access_ok(user_values, nfences * sizeof(*user_values))) | |
cda9edd0 | 2629 | return -EFAULT; |
cf6e7bac | 2630 | |
13149e8b LL |
2631 | f = krealloc(eb->fences, |
2632 | (eb->num_fences + nfences) * sizeof(*f), | |
2633 | __GFP_NOWARN | GFP_KERNEL); | |
2634 | if (!f) | |
cda9edd0 | 2635 | return -ENOMEM; |
cf6e7bac | 2636 | |
13149e8b LL |
2637 | eb->fences = f; |
2638 | f += eb->num_fences; | |
2639 | ||
2640 | BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) & | |
2641 | ~__I915_EXEC_FENCE_UNKNOWN_FLAGS); | |
2642 | ||
2643 | while (nfences--) { | |
2644 | struct drm_i915_gem_exec_fence user_fence; | |
cf6e7bac | 2645 | struct drm_syncobj *syncobj; |
13149e8b LL |
2646 | struct dma_fence *fence = NULL; |
2647 | u64 point; | |
2648 | ||
2649 | if (__copy_from_user(&user_fence, | |
2650 | user_fences++, | |
2651 | sizeof(user_fence))) | |
2652 | return -EFAULT; | |
2653 | ||
2654 | if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS) | |
2655 | return -EINVAL; | |
2656 | ||
2657 | if (__get_user(point, user_values++)) | |
2658 | return -EFAULT; | |
2659 | ||
2660 | syncobj = drm_syncobj_find(eb->file, user_fence.handle); | |
2661 | if (!syncobj) { | |
2662 | DRM_DEBUG("Invalid syncobj handle provided\n"); | |
2663 | return -ENOENT; | |
2664 | } | |
2665 | ||
2666 | fence = drm_syncobj_fence_get(syncobj); | |
cf6e7bac | 2667 | |
13149e8b LL |
2668 | if (!fence && user_fence.flags && |
2669 | !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) { | |
2670 | DRM_DEBUG("Syncobj handle has no fence\n"); | |
2671 | drm_syncobj_put(syncobj); | |
2672 | return -EINVAL; | |
cf6e7bac JE |
2673 | } |
2674 | ||
13149e8b LL |
2675 | if (fence) |
2676 | err = dma_fence_chain_find_seqno(&fence, point); | |
2677 | ||
2678 | if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) { | |
2679 | DRM_DEBUG("Syncobj handle missing requested point %llu\n", point); | |
da1ea128 | 2680 | dma_fence_put(fence); |
13149e8b LL |
2681 | drm_syncobj_put(syncobj); |
2682 | return err; | |
2683 | } | |
2684 | ||
2685 | /* | |
2686 | * A point might have been signaled already and | |
2687 | * garbage collected from the timeline. In this case | |
2688 | * just ignore the point and carry on. | |
2689 | */ | |
2690 | if (!fence && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) { | |
2691 | drm_syncobj_put(syncobj); | |
2692 | continue; | |
2693 | } | |
2694 | ||
2695 | /* | |
2696 | * For timeline syncobjs we need to preallocate chains for | |
2697 | * later signaling. | |
2698 | */ | |
2699 | if (point != 0 && user_fence.flags & I915_EXEC_FENCE_SIGNAL) { | |
2700 | /* | |
2701 | * Waiting and signaling the same point (when point != | |
2702 | * 0) would break the timeline. | |
2703 | */ | |
2704 | if (user_fence.flags & I915_EXEC_FENCE_WAIT) { | |
2705 | DRM_DEBUG("Trying to wait & signal the same timeline point.\n"); | |
2706 | dma_fence_put(fence); | |
2707 | drm_syncobj_put(syncobj); | |
2708 | return -EINVAL; | |
2709 | } | |
2710 | ||
440d0f12 | 2711 | f->chain_fence = dma_fence_chain_alloc(); |
13149e8b LL |
2712 | if (!f->chain_fence) { |
2713 | drm_syncobj_put(syncobj); | |
2714 | dma_fence_put(fence); | |
2715 | return -ENOMEM; | |
2716 | } | |
2717 | } else { | |
2718 | f->chain_fence = NULL; | |
ebcaa1ff TU |
2719 | } |
2720 | ||
13149e8b LL |
2721 | f->syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2); |
2722 | f->dma_fence = fence; | |
2723 | f->value = point; | |
2724 | f++; | |
2725 | eb->num_fences++; | |
2726 | } | |
2727 | ||
2728 | return 0; | |
2729 | } | |
2730 | ||
2731 | static int add_fence_array(struct i915_execbuffer *eb) | |
2732 | { | |
2733 | struct drm_i915_gem_execbuffer2 *args = eb->args; | |
2734 | struct drm_i915_gem_exec_fence __user *user; | |
2735 | unsigned long num_fences = args->num_cliprects; | |
2736 | struct eb_fence *f; | |
2737 | ||
2738 | if (!(args->flags & I915_EXEC_FENCE_ARRAY)) | |
2739 | return 0; | |
2740 | ||
2741 | if (!num_fences) | |
2742 | return 0; | |
2743 | ||
2744 | /* Check multiplication overflow for access_ok() and kvmalloc_array() */ | |
2745 | BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long)); | |
2746 | if (num_fences > min_t(unsigned long, | |
2747 | ULONG_MAX / sizeof(*user), | |
2748 | SIZE_MAX / sizeof(*f) - eb->num_fences)) | |
2749 | return -EINVAL; | |
2750 | ||
2751 | user = u64_to_user_ptr(args->cliprects_ptr); | |
2752 | if (!access_ok(user, num_fences * sizeof(*user))) | |
2753 | return -EFAULT; | |
2754 | ||
2755 | f = krealloc(eb->fences, | |
2756 | (eb->num_fences + num_fences) * sizeof(*f), | |
2757 | __GFP_NOWARN | GFP_KERNEL); | |
2758 | if (!f) | |
2759 | return -ENOMEM; | |
2760 | ||
2761 | eb->fences = f; | |
2762 | f += eb->num_fences; | |
2763 | while (num_fences--) { | |
2764 | struct drm_i915_gem_exec_fence user_fence; | |
2765 | struct drm_syncobj *syncobj; | |
2766 | struct dma_fence *fence = NULL; | |
2767 | ||
2768 | if (__copy_from_user(&user_fence, user++, sizeof(user_fence))) | |
2769 | return -EFAULT; | |
2770 | ||
2771 | if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS) | |
2772 | return -EINVAL; | |
2773 | ||
2774 | syncobj = drm_syncobj_find(eb->file, user_fence.handle); | |
cf6e7bac JE |
2775 | if (!syncobj) { |
2776 | DRM_DEBUG("Invalid syncobj handle provided\n"); | |
13149e8b LL |
2777 | return -ENOENT; |
2778 | } | |
2779 | ||
2780 | if (user_fence.flags & I915_EXEC_FENCE_WAIT) { | |
2781 | fence = drm_syncobj_fence_get(syncobj); | |
2782 | if (!fence) { | |
2783 | DRM_DEBUG("Syncobj handle has no fence\n"); | |
2784 | drm_syncobj_put(syncobj); | |
2785 | return -EINVAL; | |
2786 | } | |
cf6e7bac JE |
2787 | } |
2788 | ||
ebcaa1ff TU |
2789 | BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) & |
2790 | ~__I915_EXEC_FENCE_UNKNOWN_FLAGS); | |
2791 | ||
13149e8b LL |
2792 | f->syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2); |
2793 | f->dma_fence = fence; | |
2794 | f->value = 0; | |
2795 | f->chain_fence = NULL; | |
2796 | f++; | |
2797 | eb->num_fences++; | |
cf6e7bac JE |
2798 | } |
2799 | ||
cda9edd0 | 2800 | return 0; |
13149e8b | 2801 | } |
cf6e7bac | 2802 | |
13149e8b LL |
2803 | static void put_fence_array(struct eb_fence *fences, int num_fences) |
2804 | { | |
2805 | if (fences) | |
2806 | __free_fence_array(fences, num_fences); | |
cf6e7bac JE |
2807 | } |
2808 | ||
2809 | static int | |
544460c3 MB |
2810 | await_fence_array(struct i915_execbuffer *eb, |
2811 | struct i915_request *rq) | |
cf6e7bac | 2812 | { |
cf6e7bac JE |
2813 | unsigned int n; |
2814 | int err; | |
2815 | ||
13149e8b | 2816 | for (n = 0; n < eb->num_fences; n++) { |
cf6e7bac | 2817 | struct drm_syncobj *syncobj; |
cf6e7bac JE |
2818 | unsigned int flags; |
2819 | ||
cda9edd0 | 2820 | syncobj = ptr_unpack_bits(eb->fences[n].syncobj, &flags, 2); |
cf6e7bac | 2821 | |
13149e8b LL |
2822 | if (!eb->fences[n].dma_fence) |
2823 | continue; | |
cf6e7bac | 2824 | |
544460c3 | 2825 | err = i915_request_await_dma_fence(rq, eb->fences[n].dma_fence); |
cf6e7bac JE |
2826 | if (err < 0) |
2827 | return err; | |
2828 | } | |
2829 | ||
2830 | return 0; | |
2831 | } | |
2832 | ||
544460c3 MB |
2833 | static void signal_fence_array(const struct i915_execbuffer *eb, |
2834 | struct dma_fence * const fence) | |
cf6e7bac | 2835 | { |
cf6e7bac JE |
2836 | unsigned int n; |
2837 | ||
13149e8b | 2838 | for (n = 0; n < eb->num_fences; n++) { |
cf6e7bac JE |
2839 | struct drm_syncobj *syncobj; |
2840 | unsigned int flags; | |
2841 | ||
cda9edd0 | 2842 | syncobj = ptr_unpack_bits(eb->fences[n].syncobj, &flags, 2); |
cf6e7bac JE |
2843 | if (!(flags & I915_EXEC_FENCE_SIGNAL)) |
2844 | continue; | |
2845 | ||
13149e8b LL |
2846 | if (eb->fences[n].chain_fence) { |
2847 | drm_syncobj_add_point(syncobj, | |
2848 | eb->fences[n].chain_fence, | |
2849 | fence, | |
2850 | eb->fences[n].value); | |
2851 | /* | |
2852 | * The chain's ownership is transferred to the | |
2853 | * timeline. | |
2854 | */ | |
2855 | eb->fences[n].chain_fence = NULL; | |
2856 | } else { | |
2857 | drm_syncobj_replace_fence(syncobj, fence); | |
2858 | } | |
cf6e7bac JE |
2859 | } |
2860 | } | |
2861 | ||
13149e8b LL |
2862 | static int |
2863 | parse_timeline_fences(struct i915_user_extension __user *ext, void *data) | |
2864 | { | |
2865 | struct i915_execbuffer *eb = data; | |
2866 | struct drm_i915_gem_execbuffer_ext_timeline_fences timeline_fences; | |
2867 | ||
2868 | if (copy_from_user(&timeline_fences, ext, sizeof(timeline_fences))) | |
2869 | return -EFAULT; | |
2870 | ||
2871 | return add_timeline_fence_array(eb, &timeline_fences); | |
2872 | } | |
2873 | ||
61231f6b CW |
2874 | static void retire_requests(struct intel_timeline *tl, struct i915_request *end) |
2875 | { | |
2876 | struct i915_request *rq, *rn; | |
2877 | ||
2878 | list_for_each_entry_safe(rq, rn, &tl->requests, link) | |
2879 | if (rq == end || !i915_request_retire(rq)) | |
2880 | break; | |
2881 | } | |
2882 | ||
544460c3 MB |
2883 | static int eb_request_add(struct i915_execbuffer *eb, struct i915_request *rq, |
2884 | int err, bool last_parallel) | |
61231f6b | 2885 | { |
61231f6b CW |
2886 | struct intel_timeline * const tl = i915_request_timeline(rq); |
2887 | struct i915_sched_attr attr = {}; | |
2888 | struct i915_request *prev; | |
2889 | ||
2890 | lockdep_assert_held(&tl->mutex); | |
2891 | lockdep_unpin_lock(&tl->mutex, rq->cookie); | |
2892 | ||
2893 | trace_i915_request_add(rq); | |
2894 | ||
2895 | prev = __i915_request_commit(rq); | |
2896 | ||
2897 | /* Check that the context wasn't destroyed before submission */ | |
207e4a71 | 2898 | if (likely(!intel_context_is_closed(eb->context))) { |
61231f6b | 2899 | attr = eb->gem_context->sched; |
61231f6b CW |
2900 | } else { |
2901 | /* Serialise with context_close via the add_to_timeline */ | |
36e191f0 CW |
2902 | i915_request_set_error_once(rq, -ENOENT); |
2903 | __i915_request_skip(rq); | |
ba38b79e | 2904 | err = -ENOENT; /* override any transient errors */ |
61231f6b CW |
2905 | } |
2906 | ||
544460c3 MB |
2907 | if (intel_context_is_parallel(eb->context)) { |
2908 | if (err) { | |
2909 | __i915_request_skip(rq); | |
2910 | set_bit(I915_FENCE_FLAG_SKIP_PARALLEL, | |
2911 | &rq->fence.flags); | |
2912 | } | |
2913 | if (last_parallel) | |
2914 | set_bit(I915_FENCE_FLAG_SUBMIT_PARALLEL, | |
2915 | &rq->fence.flags); | |
2916 | } | |
2917 | ||
61231f6b | 2918 | __i915_request_queue(rq, &attr); |
61231f6b CW |
2919 | |
2920 | /* Try to clean up the client's timeline after submitting the request */ | |
2921 | if (prev) | |
2922 | retire_requests(tl, prev); | |
2923 | ||
2924 | mutex_unlock(&tl->mutex); | |
ba38b79e CW |
2925 | |
2926 | return err; | |
61231f6b CW |
2927 | } |
2928 | ||
544460c3 MB |
2929 | static int eb_requests_add(struct i915_execbuffer *eb, int err) |
2930 | { | |
2931 | int i; | |
2932 | ||
2933 | /* | |
2934 | * We iterate in reverse order of creation to release timeline mutexes in | |
2935 | * same order. | |
2936 | */ | |
2937 | for_each_batch_add_order(eb, i) { | |
2938 | struct i915_request *rq = eb->requests[i]; | |
2939 | ||
2940 | if (!rq) | |
2941 | continue; | |
2942 | err |= eb_request_add(eb, rq, err, i == 0); | |
2943 | } | |
2944 | ||
2945 | return err; | |
2946 | } | |
2947 | ||
cda9edd0 | 2948 | static const i915_user_extension_fn execbuf_extensions[] = { |
13149e8b | 2949 | [DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES] = parse_timeline_fences, |
cda9edd0 LL |
2950 | }; |
2951 | ||
2952 | static int | |
2953 | parse_execbuf2_extensions(struct drm_i915_gem_execbuffer2 *args, | |
2954 | struct i915_execbuffer *eb) | |
2955 | { | |
cda9edd0 LL |
2956 | if (!(args->flags & I915_EXEC_USE_EXTENSIONS)) |
2957 | return 0; | |
2958 | ||
2959 | /* The execbuf2 extension mechanism reuses cliprects_ptr. So we cannot | |
2960 | * have another flag also using it at the same time. | |
2961 | */ | |
2962 | if (eb->args->flags & I915_EXEC_FENCE_ARRAY) | |
2963 | return -EINVAL; | |
2964 | ||
2965 | if (args->num_cliprects != 0) | |
2966 | return -EINVAL; | |
2967 | ||
2968 | return i915_user_extensions(u64_to_user_ptr(args->cliprects_ptr), | |
2969 | execbuf_extensions, | |
2970 | ARRAY_SIZE(execbuf_extensions), | |
2971 | eb); | |
2972 | } | |
2973 | ||
544460c3 MB |
2974 | static void eb_requests_get(struct i915_execbuffer *eb) |
2975 | { | |
2976 | unsigned int i; | |
2977 | ||
2978 | for_each_batch_create_order(eb, i) { | |
2979 | if (!eb->requests[i]) | |
2980 | break; | |
2981 | ||
2982 | i915_request_get(eb->requests[i]); | |
2983 | } | |
2984 | } | |
2985 | ||
2986 | static void eb_requests_put(struct i915_execbuffer *eb) | |
2987 | { | |
2988 | unsigned int i; | |
2989 | ||
2990 | for_each_batch_create_order(eb, i) { | |
2991 | if (!eb->requests[i]) | |
2992 | break; | |
2993 | ||
2994 | i915_request_put(eb->requests[i]); | |
2995 | } | |
2996 | } | |
2997 | ||
2998 | static struct sync_file * | |
2999 | eb_composite_fence_create(struct i915_execbuffer *eb, int out_fence_fd) | |
3000 | { | |
3001 | struct sync_file *out_fence = NULL; | |
3002 | struct dma_fence_array *fence_array; | |
3003 | struct dma_fence **fences; | |
3004 | unsigned int i; | |
3005 | ||
3006 | GEM_BUG_ON(!intel_context_is_parent(eb->context)); | |
3007 | ||
3008 | fences = kmalloc_array(eb->num_batches, sizeof(*fences), GFP_KERNEL); | |
3009 | if (!fences) | |
3010 | return ERR_PTR(-ENOMEM); | |
3011 | ||
7647f009 | 3012 | for_each_batch_create_order(eb, i) { |
544460c3 | 3013 | fences[i] = &eb->requests[i]->fence; |
7647f009 MB |
3014 | __set_bit(I915_FENCE_FLAG_COMPOSITE, |
3015 | &eb->requests[i]->fence.flags); | |
3016 | } | |
544460c3 MB |
3017 | |
3018 | fence_array = dma_fence_array_create(eb->num_batches, | |
3019 | fences, | |
3020 | eb->context->parallel.fence_context, | |
3021 | eb->context->parallel.seqno, | |
3022 | false); | |
3023 | if (!fence_array) { | |
3024 | kfree(fences); | |
3025 | return ERR_PTR(-ENOMEM); | |
3026 | } | |
3027 | ||
3028 | /* Move ownership to the dma_fence_array created above */ | |
3029 | for_each_batch_create_order(eb, i) | |
3030 | dma_fence_get(fences[i]); | |
3031 | ||
3032 | if (out_fence_fd != -1) { | |
3033 | out_fence = sync_file_create(&fence_array->base); | |
3034 | /* sync_file now owns fence_arry, drop creation ref */ | |
3035 | dma_fence_put(&fence_array->base); | |
3036 | if (!out_fence) | |
3037 | return ERR_PTR(-ENOMEM); | |
3038 | } | |
3039 | ||
3040 | eb->composite_fence = &fence_array->base; | |
3041 | ||
3042 | return out_fence; | |
3043 | } | |
3044 | ||
3045 | static struct sync_file * | |
3046 | eb_fences_add(struct i915_execbuffer *eb, struct i915_request *rq, | |
3047 | struct dma_fence *in_fence, int out_fence_fd) | |
3048 | { | |
3049 | struct sync_file *out_fence = NULL; | |
3050 | int err; | |
3051 | ||
3052 | if (unlikely(eb->gem_context->syncobj)) { | |
3053 | struct dma_fence *fence; | |
3054 | ||
3055 | fence = drm_syncobj_fence_get(eb->gem_context->syncobj); | |
3056 | err = i915_request_await_dma_fence(rq, fence); | |
3057 | dma_fence_put(fence); | |
3058 | if (err) | |
3059 | return ERR_PTR(err); | |
3060 | } | |
3061 | ||
3062 | if (in_fence) { | |
3063 | if (eb->args->flags & I915_EXEC_FENCE_SUBMIT) | |
3064 | err = i915_request_await_execution(rq, in_fence); | |
3065 | else | |
3066 | err = i915_request_await_dma_fence(rq, in_fence); | |
3067 | if (err < 0) | |
3068 | return ERR_PTR(err); | |
3069 | } | |
3070 | ||
3071 | if (eb->fences) { | |
3072 | err = await_fence_array(eb, rq); | |
3073 | if (err) | |
3074 | return ERR_PTR(err); | |
3075 | } | |
3076 | ||
3077 | if (intel_context_is_parallel(eb->context)) { | |
3078 | out_fence = eb_composite_fence_create(eb, out_fence_fd); | |
3079 | if (IS_ERR(out_fence)) | |
3080 | return ERR_PTR(-ENOMEM); | |
3081 | } else if (out_fence_fd != -1) { | |
3082 | out_fence = sync_file_create(&rq->fence); | |
3083 | if (!out_fence) | |
3084 | return ERR_PTR(-ENOMEM); | |
3085 | } | |
3086 | ||
3087 | return out_fence; | |
3088 | } | |
3089 | ||
3090 | static struct intel_context * | |
3091 | eb_find_context(struct i915_execbuffer *eb, unsigned int context_number) | |
3092 | { | |
3093 | struct intel_context *child; | |
3094 | ||
3095 | if (likely(context_number == 0)) | |
3096 | return eb->context; | |
3097 | ||
3098 | for_each_child(eb->context, child) | |
3099 | if (!--context_number) | |
3100 | return child; | |
3101 | ||
3102 | GEM_BUG_ON("Context not found"); | |
3103 | ||
3104 | return NULL; | |
3105 | } | |
3106 | ||
3107 | static struct sync_file * | |
3108 | eb_requests_create(struct i915_execbuffer *eb, struct dma_fence *in_fence, | |
3109 | int out_fence_fd) | |
3110 | { | |
3111 | struct sync_file *out_fence = NULL; | |
3112 | unsigned int i; | |
3113 | ||
3114 | for_each_batch_create_order(eb, i) { | |
3115 | /* Allocate a request for this batch buffer nice and early. */ | |
3116 | eb->requests[i] = i915_request_create(eb_find_context(eb, i)); | |
3117 | if (IS_ERR(eb->requests[i])) { | |
3118 | out_fence = ERR_PTR(PTR_ERR(eb->requests[i])); | |
3119 | eb->requests[i] = NULL; | |
3120 | return out_fence; | |
3121 | } | |
3122 | ||
3123 | /* | |
3124 | * Only the first request added (committed to backend) has to | |
3125 | * take the in fences into account as all subsequent requests | |
3126 | * will have fences inserted inbetween them. | |
3127 | */ | |
3128 | if (i + 1 == eb->num_batches) { | |
3129 | out_fence = eb_fences_add(eb, eb->requests[i], | |
3130 | in_fence, out_fence_fd); | |
3131 | if (IS_ERR(out_fence)) | |
3132 | return out_fence; | |
3133 | } | |
3134 | ||
3135 | /* | |
3136 | * Whilst this request exists, batch_obj will be on the | |
3137 | * active_list, and so will hold the active reference. Only when | |
3138 | * this request is retired will the batch_obj be moved onto | |
3139 | * the inactive_list and lose its active reference. Hence we do | |
3140 | * not need to explicitly hold another reference here. | |
3141 | */ | |
3142 | eb->requests[i]->batch = eb->batches[i]->vma; | |
3143 | if (eb->batch_pool) { | |
3144 | GEM_BUG_ON(intel_context_is_parallel(eb->context)); | |
3145 | intel_gt_buffer_pool_mark_active(eb->batch_pool, | |
3146 | eb->requests[i]); | |
3147 | } | |
3148 | } | |
3149 | ||
3150 | return out_fence; | |
3151 | } | |
3152 | ||
54cf91dc | 3153 | static int |
650bc635 | 3154 | i915_gem_do_execbuffer(struct drm_device *dev, |
54cf91dc CW |
3155 | struct drm_file *file, |
3156 | struct drm_i915_gem_execbuffer2 *args, | |
cda9edd0 | 3157 | struct drm_i915_gem_exec_object2 *exec) |
54cf91dc | 3158 | { |
44157641 | 3159 | struct drm_i915_private *i915 = to_i915(dev); |
650bc635 | 3160 | struct i915_execbuffer eb; |
fec0445c CW |
3161 | struct dma_fence *in_fence = NULL; |
3162 | struct sync_file *out_fence = NULL; | |
3163 | int out_fence_fd = -1; | |
2889caa9 | 3164 | int err; |
432e58ed | 3165 | |
74c1c694 | 3166 | BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS); |
2889caa9 CW |
3167 | BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS & |
3168 | ~__EXEC_OBJECT_UNKNOWN_FLAGS); | |
54cf91dc | 3169 | |
44157641 | 3170 | eb.i915 = i915; |
650bc635 CW |
3171 | eb.file = file; |
3172 | eb.args = args; | |
ad5d95e4 | 3173 | if (DBG_FORCE_RELOC || !(args->flags & I915_EXEC_NO_RELOC)) |
2889caa9 | 3174 | args->flags |= __EXEC_HAS_RELOC; |
c7c6e46f | 3175 | |
650bc635 | 3176 | eb.exec = exec; |
8ae275c2 ML |
3177 | eb.vma = (struct eb_vma *)(exec + args->buffer_count + 1); |
3178 | eb.vma[0].vma = NULL; | |
8e02cceb | 3179 | eb.batch_pool = NULL; |
c7c6e46f | 3180 | |
2889caa9 | 3181 | eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS; |
650bc635 CW |
3182 | reloc_cache_init(&eb.reloc_cache, eb.i915); |
3183 | ||
2889caa9 | 3184 | eb.buffer_count = args->buffer_count; |
650bc635 | 3185 | eb.batch_start_offset = args->batch_start_offset; |
32d94048 | 3186 | eb.trampoline = NULL; |
650bc635 | 3187 | |
cda9edd0 | 3188 | eb.fences = NULL; |
13149e8b | 3189 | eb.num_fences = 0; |
cda9edd0 | 3190 | |
544460c3 MB |
3191 | memset(eb.requests, 0, sizeof(struct i915_request *) * |
3192 | ARRAY_SIZE(eb.requests)); | |
3193 | eb.composite_fence = NULL; | |
3194 | ||
2889caa9 | 3195 | eb.batch_flags = 0; |
d7d4eedd | 3196 | if (args->flags & I915_EXEC_SECURE) { |
40e1956e | 3197 | if (GRAPHICS_VER(i915) >= 11) |
44157641 JB |
3198 | return -ENODEV; |
3199 | ||
3200 | /* Return -EPERM to trigger fallback code on old binaries. */ | |
3201 | if (!HAS_SECURE_BATCHES(i915)) | |
3202 | return -EPERM; | |
3203 | ||
b3ac9f25 | 3204 | if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN)) |
44157641 | 3205 | return -EPERM; |
d7d4eedd | 3206 | |
2889caa9 | 3207 | eb.batch_flags |= I915_DISPATCH_SECURE; |
d7d4eedd | 3208 | } |
b45305fc | 3209 | if (args->flags & I915_EXEC_IS_PINNED) |
2889caa9 | 3210 | eb.batch_flags |= I915_DISPATCH_PINNED; |
54cf91dc | 3211 | |
13149e8b LL |
3212 | err = parse_execbuf2_extensions(args, &eb); |
3213 | if (err) | |
3214 | goto err_ext; | |
3215 | ||
3216 | err = add_fence_array(&eb); | |
3217 | if (err) | |
3218 | goto err_ext; | |
3219 | ||
889333c7 CW |
3220 | #define IN_FENCES (I915_EXEC_FENCE_IN | I915_EXEC_FENCE_SUBMIT) |
3221 | if (args->flags & IN_FENCES) { | |
3222 | if ((args->flags & IN_FENCES) == IN_FENCES) | |
3223 | return -EINVAL; | |
3224 | ||
fec0445c | 3225 | in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2)); |
13149e8b LL |
3226 | if (!in_fence) { |
3227 | err = -EINVAL; | |
3228 | goto err_ext; | |
3229 | } | |
fec0445c | 3230 | } |
889333c7 | 3231 | #undef IN_FENCES |
a88b6e4c | 3232 | |
fec0445c CW |
3233 | if (args->flags & I915_EXEC_FENCE_OUT) { |
3234 | out_fence_fd = get_unused_fd_flags(O_CLOEXEC); | |
3235 | if (out_fence_fd < 0) { | |
2889caa9 | 3236 | err = out_fence_fd; |
889333c7 | 3237 | goto err_in_fence; |
fec0445c CW |
3238 | } |
3239 | } | |
3240 | ||
cda9edd0 LL |
3241 | err = eb_create(&eb); |
3242 | if (err) | |
13149e8b | 3243 | goto err_out_fence; |
cda9edd0 | 3244 | |
4d470f73 | 3245 | GEM_BUG_ON(!eb.lut_size); |
2889caa9 | 3246 | |
1acfc104 CW |
3247 | err = eb_select_context(&eb); |
3248 | if (unlikely(err)) | |
3249 | goto err_destroy; | |
3250 | ||
2bf541ff | 3251 | err = eb_select_engine(&eb); |
d6f328bf | 3252 | if (unlikely(err)) |
e5dadff4 | 3253 | goto err_context; |
d6f328bf | 3254 | |
c43ce123 ML |
3255 | err = eb_lookup_vmas(&eb); |
3256 | if (err) { | |
b4b9731b | 3257 | eb_release_vmas(&eb, true); |
c43ce123 ML |
3258 | goto err_engine; |
3259 | } | |
3260 | ||
3261 | i915_gem_ww_ctx_init(&eb.ww, true); | |
3262 | ||
8e4ba491 | 3263 | err = eb_relocate_parse(&eb); |
1f727d9e | 3264 | if (err) { |
2889caa9 CW |
3265 | /* |
3266 | * If the user expects the execobject.offset and | |
3267 | * reloc.presumed_offset to be an exact match, | |
3268 | * as for using NO_RELOC, then we cannot update | |
3269 | * the execobject.offset until we have completed | |
3270 | * relocation. | |
3271 | */ | |
3272 | args->flags &= ~__EXEC_HAS_RELOC; | |
2889caa9 | 3273 | goto err_vma; |
1f727d9e | 3274 | } |
54cf91dc | 3275 | |
c43ce123 | 3276 | ww_acquire_done(&eb.ww.ctx); |
7d6236bb | 3277 | |
544460c3 MB |
3278 | out_fence = eb_requests_create(&eb, in_fence, out_fence_fd); |
3279 | if (IS_ERR(out_fence)) { | |
3280 | err = PTR_ERR(out_fence); | |
3281 | if (eb.requests[0]) | |
cf6e7bac | 3282 | goto err_request; |
544460c3 MB |
3283 | else |
3284 | goto err_vma; | |
cf6e7bac JE |
3285 | } |
3286 | ||
544460c3 | 3287 | err = eb_submit(&eb); |
ed29c269 | 3288 | |
aa9b7810 | 3289 | err_request: |
544460c3 MB |
3290 | eb_requests_get(&eb); |
3291 | err = eb_requests_add(&eb, err); | |
c8659efa | 3292 | |
13149e8b | 3293 | if (eb.fences) |
544460c3 MB |
3294 | signal_fence_array(&eb, eb.composite_fence ? |
3295 | eb.composite_fence : | |
3296 | &eb.requests[0]->fence); | |
cf6e7bac | 3297 | |
fec0445c | 3298 | if (out_fence) { |
2889caa9 | 3299 | if (err == 0) { |
fec0445c | 3300 | fd_install(out_fence_fd, out_fence->file); |
b6a88e4a | 3301 | args->rsvd2 &= GENMASK_ULL(31, 0); /* keep in-fence */ |
fec0445c CW |
3302 | args->rsvd2 |= (u64)out_fence_fd << 32; |
3303 | out_fence_fd = -1; | |
3304 | } else { | |
3305 | fput(out_fence->file); | |
3306 | } | |
3307 | } | |
00dae4d3 JE |
3308 | |
3309 | if (unlikely(eb.gem_context->syncobj)) { | |
3310 | drm_syncobj_replace_fence(eb.gem_context->syncobj, | |
544460c3 MB |
3311 | eb.composite_fence ? |
3312 | eb.composite_fence : | |
3313 | &eb.requests[0]->fence); | |
00dae4d3 JE |
3314 | } |
3315 | ||
544460c3 MB |
3316 | if (!out_fence && eb.composite_fence) |
3317 | dma_fence_put(eb.composite_fence); | |
3318 | ||
3319 | eb_requests_put(&eb); | |
54cf91dc | 3320 | |
2889caa9 | 3321 | err_vma: |
b4b9731b | 3322 | eb_release_vmas(&eb, true); |
32d94048 CW |
3323 | if (eb.trampoline) |
3324 | i915_vma_unpin(eb.trampoline); | |
c43ce123 ML |
3325 | WARN_ON(err == -EDEADLK); |
3326 | i915_gem_ww_ctx_fini(&eb.ww); | |
3327 | ||
3328 | if (eb.batch_pool) | |
3329 | intel_gt_buffer_pool_put(eb.batch_pool); | |
c43ce123 | 3330 | err_engine: |
2bf541ff | 3331 | eb_put_engine(&eb); |
a4e57f90 | 3332 | err_context: |
8f2a1057 | 3333 | i915_gem_context_put(eb.gem_context); |
1acfc104 | 3334 | err_destroy: |
2889caa9 | 3335 | eb_destroy(&eb); |
4d470f73 | 3336 | err_out_fence: |
fec0445c CW |
3337 | if (out_fence_fd != -1) |
3338 | put_unused_fd(out_fence_fd); | |
4a04e371 | 3339 | err_in_fence: |
fec0445c | 3340 | dma_fence_put(in_fence); |
13149e8b LL |
3341 | err_ext: |
3342 | put_fence_array(eb.fences, eb.num_fences); | |
2889caa9 | 3343 | return err; |
54cf91dc CW |
3344 | } |
3345 | ||
d710fc16 CW |
3346 | static size_t eb_element_size(void) |
3347 | { | |
8ae275c2 | 3348 | return sizeof(struct drm_i915_gem_exec_object2) + sizeof(struct eb_vma); |
d710fc16 CW |
3349 | } |
3350 | ||
3351 | static bool check_buffer_count(size_t count) | |
3352 | { | |
3353 | const size_t sz = eb_element_size(); | |
3354 | ||
3355 | /* | |
3356 | * When using LUT_HANDLE, we impose a limit of INT_MAX for the lookup | |
3357 | * array size (see eb_create()). Otherwise, we can accept an array as | |
3358 | * large as can be addressed (though use large arrays at your peril)! | |
3359 | */ | |
3360 | ||
3361 | return !(count < 1 || count > INT_MAX || count > SIZE_MAX / sz - 1); | |
3362 | } | |
3363 | ||
54cf91dc | 3364 | int |
6a20fe7b VS |
3365 | i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data, |
3366 | struct drm_file *file) | |
54cf91dc | 3367 | { |
d0bf4582 | 3368 | struct drm_i915_private *i915 = to_i915(dev); |
54cf91dc | 3369 | struct drm_i915_gem_execbuffer2 *args = data; |
2889caa9 | 3370 | struct drm_i915_gem_exec_object2 *exec2_list; |
d710fc16 | 3371 | const size_t count = args->buffer_count; |
2889caa9 | 3372 | int err; |
54cf91dc | 3373 | |
d710fc16 | 3374 | if (!check_buffer_count(count)) { |
d0bf4582 | 3375 | drm_dbg(&i915->drm, "execbuf2 with %zd buffers\n", count); |
54cf91dc CW |
3376 | return -EINVAL; |
3377 | } | |
3378 | ||
00aff3f6 TU |
3379 | err = i915_gem_check_execbuffer(args); |
3380 | if (err) | |
3381 | return err; | |
2889caa9 | 3382 | |
47b08693 ML |
3383 | /* Allocate extra slots for use by the command parser */ |
3384 | exec2_list = kvmalloc_array(count + 2, eb_element_size(), | |
0ee931c4 | 3385 | __GFP_NOWARN | GFP_KERNEL); |
54cf91dc | 3386 | if (exec2_list == NULL) { |
d0bf4582 WK |
3387 | drm_dbg(&i915->drm, "Failed to allocate exec list for %zd buffers\n", |
3388 | count); | |
54cf91dc CW |
3389 | return -ENOMEM; |
3390 | } | |
2889caa9 CW |
3391 | if (copy_from_user(exec2_list, |
3392 | u64_to_user_ptr(args->buffers_ptr), | |
d710fc16 | 3393 | sizeof(*exec2_list) * count)) { |
d0bf4582 | 3394 | drm_dbg(&i915->drm, "copy %zd exec entries failed\n", count); |
2098105e | 3395 | kvfree(exec2_list); |
54cf91dc CW |
3396 | return -EFAULT; |
3397 | } | |
3398 | ||
cda9edd0 | 3399 | err = i915_gem_do_execbuffer(dev, file, args, exec2_list); |
2889caa9 CW |
3400 | |
3401 | /* | |
3402 | * Now that we have begun execution of the batchbuffer, we ignore | |
3403 | * any new error after this point. Also given that we have already | |
3404 | * updated the associated relocations, we try to write out the current | |
3405 | * object locations irrespective of any error. | |
3406 | */ | |
3407 | if (args->flags & __EXEC_HAS_RELOC) { | |
d593d992 | 3408 | struct drm_i915_gem_exec_object2 __user *user_exec_list = |
2889caa9 CW |
3409 | u64_to_user_ptr(args->buffers_ptr); |
3410 | unsigned int i; | |
9aab8bff | 3411 | |
2889caa9 | 3412 | /* Copy the new buffer offsets back to the user's exec list. */ |
594cc251 LT |
3413 | /* |
3414 | * Note: count * sizeof(*user_exec_list) does not overflow, | |
3415 | * because we checked 'count' in check_buffer_count(). | |
3416 | * | |
3417 | * And this range already got effectively checked earlier | |
3418 | * when we did the "copy_from_user()" above. | |
3419 | */ | |
b44f6873 CL |
3420 | if (!user_write_access_begin(user_exec_list, |
3421 | count * sizeof(*user_exec_list))) | |
8f4faed0 | 3422 | goto end; |
594cc251 | 3423 | |
9aab8bff | 3424 | for (i = 0; i < args->buffer_count; i++) { |
2889caa9 CW |
3425 | if (!(exec2_list[i].offset & UPDATE)) |
3426 | continue; | |
3427 | ||
934acce3 | 3428 | exec2_list[i].offset = |
2889caa9 CW |
3429 | gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); |
3430 | unsafe_put_user(exec2_list[i].offset, | |
3431 | &user_exec_list[i].offset, | |
3432 | end_user); | |
54cf91dc | 3433 | } |
2889caa9 | 3434 | end_user: |
b44f6873 | 3435 | user_write_access_end(); |
8f4faed0 | 3436 | end:; |
54cf91dc CW |
3437 | } |
3438 | ||
2889caa9 | 3439 | args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS; |
2098105e | 3440 | kvfree(exec2_list); |
2889caa9 | 3441 | return err; |
54cf91dc | 3442 | } |