Commit | Line | Data |
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54cf91dc | 1 | /* |
10be98a7 | 2 | * SPDX-License-Identifier: MIT |
54cf91dc | 3 | * |
10be98a7 | 4 | * Copyright © 2008,2010 Intel Corporation |
54cf91dc CW |
5 | */ |
6 | ||
daedaa33 | 7 | #include <linux/intel-iommu.h> |
52791eee | 8 | #include <linux/dma-resv.h> |
fec0445c | 9 | #include <linux/sync_file.h> |
ad778f89 CW |
10 | #include <linux/uaccess.h> |
11 | ||
cf6e7bac | 12 | #include <drm/drm_syncobj.h> |
ad778f89 | 13 | |
df0566a6 JN |
14 | #include "display/intel_frontbuffer.h" |
15 | ||
afa13085 | 16 | #include "gem/i915_gem_ioctls.h" |
10be98a7 | 17 | #include "gt/intel_context.h" |
45233ab2 | 18 | #include "gt/intel_gpu_commands.h" |
baea429d | 19 | #include "gt/intel_gt.h" |
16e87459 | 20 | #include "gt/intel_gt_buffer_pool.h" |
8f2a1057 | 21 | #include "gt/intel_gt_pm.h" |
2871ea85 | 22 | #include "gt/intel_ring.h" |
8f2a1057 | 23 | |
6da4a2c4 | 24 | #include "i915_drv.h" |
57822dc6 | 25 | #include "i915_gem_clflush.h" |
10be98a7 | 26 | #include "i915_gem_context.h" |
6da4a2c4 | 27 | #include "i915_gem_ioctls.h" |
686c7c35 | 28 | #include "i915_sw_fence_work.h" |
54cf91dc | 29 | #include "i915_trace.h" |
cda9edd0 | 30 | #include "i915_user_extensions.h" |
0edbb9ba | 31 | #include "i915_memcpy.h" |
54cf91dc | 32 | |
7d6236bb CW |
33 | struct eb_vma { |
34 | struct i915_vma *vma; | |
35 | unsigned int flags; | |
36 | ||
37 | /** This vma's place in the execbuf reservation list */ | |
38 | struct drm_i915_gem_exec_object2 *exec; | |
39 | struct list_head bind_link; | |
40 | struct list_head reloc_link; | |
41 | ||
42 | struct hlist_node node; | |
43 | u32 handle; | |
44 | }; | |
45 | ||
ad5d95e4 DA |
46 | enum { |
47 | FORCE_CPU_RELOC = 1, | |
48 | FORCE_GTT_RELOC, | |
49 | FORCE_GPU_RELOC, | |
50 | #define DBG_FORCE_RELOC 0 /* choose one of the above! */ | |
51 | }; | |
52 | ||
bfaae47d ML |
53 | /* __EXEC_OBJECT_NO_RESERVE is BIT(31), defined in i915_vma.h */ |
54 | #define __EXEC_OBJECT_HAS_PIN BIT(30) | |
55 | #define __EXEC_OBJECT_HAS_FENCE BIT(29) | |
ed29c269 ML |
56 | #define __EXEC_OBJECT_USERPTR_INIT BIT(28) |
57 | #define __EXEC_OBJECT_NEEDS_MAP BIT(27) | |
58 | #define __EXEC_OBJECT_NEEDS_BIAS BIT(26) | |
59 | #define __EXEC_OBJECT_INTERNAL_FLAGS (~0u << 26) /* all of the above + */ | |
8ae275c2 | 60 | #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE) |
2889caa9 CW |
61 | |
62 | #define __EXEC_HAS_RELOC BIT(31) | |
2bf541ff | 63 | #define __EXEC_ENGINE_PINNED BIT(30) |
ed29c269 ML |
64 | #define __EXEC_USERPTR_USED BIT(29) |
65 | #define __EXEC_INTERNAL_FLAGS (~0u << 29) | |
2889caa9 | 66 | #define UPDATE PIN_OFFSET_FIXED |
d23db88c CW |
67 | |
68 | #define BATCH_OFFSET_BIAS (256*1024) | |
a415d355 | 69 | |
650bc635 | 70 | #define __I915_EXEC_ILLEGAL_FLAGS \ |
08e3e21a LDM |
71 | (__I915_EXEC_UNKNOWN_FLAGS | \ |
72 | I915_EXEC_CONSTANTS_MASK | \ | |
73 | I915_EXEC_RESOURCE_STREAMER) | |
5b043f4e | 74 | |
d20ac620 CW |
75 | /* Catch emission of unexpected errors for CI! */ |
76 | #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM) | |
77 | #undef EINVAL | |
78 | #define EINVAL ({ \ | |
79 | DRM_DEBUG_DRIVER("EINVAL at %s:%d\n", __func__, __LINE__); \ | |
80 | 22; \ | |
81 | }) | |
82 | #endif | |
83 | ||
2889caa9 CW |
84 | /** |
85 | * DOC: User command execution | |
86 | * | |
87 | * Userspace submits commands to be executed on the GPU as an instruction | |
88 | * stream within a GEM object we call a batchbuffer. This instructions may | |
89 | * refer to other GEM objects containing auxiliary state such as kernels, | |
90 | * samplers, render targets and even secondary batchbuffers. Userspace does | |
91 | * not know where in the GPU memory these objects reside and so before the | |
92 | * batchbuffer is passed to the GPU for execution, those addresses in the | |
93 | * batchbuffer and auxiliary objects are updated. This is known as relocation, | |
94 | * or patching. To try and avoid having to relocate each object on the next | |
95 | * execution, userspace is told the location of those objects in this pass, | |
96 | * but this remains just a hint as the kernel may choose a new location for | |
97 | * any object in the future. | |
98 | * | |
99d7e4ee KR |
99 | * At the level of talking to the hardware, submitting a batchbuffer for the |
100 | * GPU to execute is to add content to a buffer from which the HW | |
101 | * command streamer is reading. | |
102 | * | |
103 | * 1. Add a command to load the HW context. For Logical Ring Contexts, i.e. | |
104 | * Execlists, this command is not placed on the same buffer as the | |
105 | * remaining items. | |
106 | * | |
107 | * 2. Add a command to invalidate caches to the buffer. | |
108 | * | |
109 | * 3. Add a batchbuffer start command to the buffer; the start command is | |
110 | * essentially a token together with the GPU address of the batchbuffer | |
111 | * to be executed. | |
112 | * | |
113 | * 4. Add a pipeline flush to the buffer. | |
114 | * | |
115 | * 5. Add a memory write command to the buffer to record when the GPU | |
116 | * is done executing the batchbuffer. The memory write writes the | |
117 | * global sequence number of the request, ``i915_request::global_seqno``; | |
118 | * the i915 driver uses the current value in the register to determine | |
119 | * if the GPU has completed the batchbuffer. | |
120 | * | |
121 | * 6. Add a user interrupt command to the buffer. This command instructs | |
122 | * the GPU to issue an interrupt when the command, pipeline flush and | |
123 | * memory write are completed. | |
124 | * | |
125 | * 7. Inform the hardware of the additional commands added to the buffer | |
126 | * (by updating the tail pointer). | |
127 | * | |
2889caa9 CW |
128 | * Processing an execbuf ioctl is conceptually split up into a few phases. |
129 | * | |
130 | * 1. Validation - Ensure all the pointers, handles and flags are valid. | |
131 | * 2. Reservation - Assign GPU address space for every object | |
132 | * 3. Relocation - Update any addresses to point to the final locations | |
133 | * 4. Serialisation - Order the request with respect to its dependencies | |
134 | * 5. Construction - Construct a request to execute the batchbuffer | |
135 | * 6. Submission (at some point in the future execution) | |
136 | * | |
137 | * Reserving resources for the execbuf is the most complicated phase. We | |
138 | * neither want to have to migrate the object in the address space, nor do | |
139 | * we want to have to update any relocations pointing to this object. Ideally, | |
140 | * we want to leave the object where it is and for all the existing relocations | |
141 | * to match. If the object is given a new address, or if userspace thinks the | |
142 | * object is elsewhere, we have to parse all the relocation entries and update | |
143 | * the addresses. Userspace can set the I915_EXEC_NORELOC flag to hint that | |
144 | * all the target addresses in all of its objects match the value in the | |
145 | * relocation entries and that they all match the presumed offsets given by the | |
146 | * list of execbuffer objects. Using this knowledge, we know that if we haven't | |
147 | * moved any buffers, all the relocation entries are valid and we can skip | |
148 | * the update. (If userspace is wrong, the likely outcome is an impromptu GPU | |
149 | * hang.) The requirement for using I915_EXEC_NO_RELOC are: | |
150 | * | |
151 | * The addresses written in the objects must match the corresponding | |
152 | * reloc.presumed_offset which in turn must match the corresponding | |
153 | * execobject.offset. | |
154 | * | |
155 | * Any render targets written to in the batch must be flagged with | |
156 | * EXEC_OBJECT_WRITE. | |
157 | * | |
158 | * To avoid stalling, execobject.offset should match the current | |
159 | * address of that object within the active context. | |
160 | * | |
161 | * The reservation is done is multiple phases. First we try and keep any | |
162 | * object already bound in its current location - so as long as meets the | |
163 | * constraints imposed by the new execbuffer. Any object left unbound after the | |
164 | * first pass is then fitted into any available idle space. If an object does | |
165 | * not fit, all objects are removed from the reservation and the process rerun | |
166 | * after sorting the objects into a priority order (more difficult to fit | |
167 | * objects are tried first). Failing that, the entire VM is cleared and we try | |
168 | * to fit the execbuf once last time before concluding that it simply will not | |
169 | * fit. | |
170 | * | |
171 | * A small complication to all of this is that we allow userspace not only to | |
172 | * specify an alignment and a size for the object in the address space, but | |
173 | * we also allow userspace to specify the exact offset. This objects are | |
174 | * simpler to place (the location is known a priori) all we have to do is make | |
175 | * sure the space is available. | |
176 | * | |
177 | * Once all the objects are in place, patching up the buried pointers to point | |
178 | * to the final locations is a fairly simple job of walking over the relocation | |
179 | * entry arrays, looking up the right address and rewriting the value into | |
180 | * the object. Simple! ... The relocation entries are stored in user memory | |
181 | * and so to access them we have to copy them into a local buffer. That copy | |
182 | * has to avoid taking any pagefaults as they may lead back to a GEM object | |
183 | * requiring the struct_mutex (i.e. recursive deadlock). So once again we split | |
184 | * the relocation into multiple passes. First we try to do everything within an | |
185 | * atomic context (avoid the pagefaults) which requires that we never wait. If | |
186 | * we detect that we may wait, or if we need to fault, then we have to fallback | |
187 | * to a slower path. The slowpath has to drop the mutex. (Can you hear alarm | |
188 | * bells yet?) Dropping the mutex means that we lose all the state we have | |
189 | * built up so far for the execbuf and we must reset any global data. However, | |
190 | * we do leave the objects pinned in their final locations - which is a | |
191 | * potential issue for concurrent execbufs. Once we have left the mutex, we can | |
192 | * allocate and copy all the relocation entries into a large array at our | |
193 | * leisure, reacquire the mutex, reclaim all the objects and other state and | |
194 | * then proceed to update any incorrect addresses with the objects. | |
195 | * | |
196 | * As we process the relocation entries, we maintain a record of whether the | |
197 | * object is being written to. Using NORELOC, we expect userspace to provide | |
198 | * this information instead. We also check whether we can skip the relocation | |
199 | * by comparing the expected value inside the relocation entry with the target's | |
200 | * final address. If they differ, we have to map the current object and rewrite | |
201 | * the 4 or 8 byte pointer within. | |
202 | * | |
203 | * Serialising an execbuf is quite simple according to the rules of the GEM | |
204 | * ABI. Execution within each context is ordered by the order of submission. | |
205 | * Writes to any GEM object are in order of submission and are exclusive. Reads | |
206 | * from a GEM object are unordered with respect to other reads, but ordered by | |
207 | * writes. A write submitted after a read cannot occur before the read, and | |
208 | * similarly any read submitted after a write cannot occur before the write. | |
209 | * Writes are ordered between engines such that only one write occurs at any | |
210 | * time (completing any reads beforehand) - using semaphores where available | |
211 | * and CPU serialisation otherwise. Other GEM access obey the same rules, any | |
212 | * write (either via mmaps using set-domain, or via pwrite) must flush all GPU | |
213 | * reads before starting, and any read (either using set-domain or pread) must | |
214 | * flush all GPU writes before starting. (Note we only employ a barrier before, | |
215 | * we currently rely on userspace not concurrently starting a new execution | |
216 | * whilst reading or writing to an object. This may be an advantage or not | |
217 | * depending on how much you trust userspace not to shoot themselves in the | |
218 | * foot.) Serialisation may just result in the request being inserted into | |
219 | * a DAG awaiting its turn, but most simple is to wait on the CPU until | |
220 | * all dependencies are resolved. | |
221 | * | |
222 | * After all of that, is just a matter of closing the request and handing it to | |
223 | * the hardware (well, leaving it in a queue to be executed). However, we also | |
224 | * offer the ability for batchbuffers to be run with elevated privileges so | |
225 | * that they access otherwise hidden registers. (Used to adjust L3 cache etc.) | |
226 | * Before any batch is given extra privileges we first must check that it | |
227 | * contains no nefarious instructions, we check that each instruction is from | |
228 | * our whitelist and all registers are also from an allowed list. We first | |
229 | * copy the user's batchbuffer to a shadow (so that the user doesn't have | |
230 | * access to it, either by the CPU or GPU as we scan it) and then parse each | |
231 | * instruction. If everything is ok, we set a flag telling the hardware to run | |
232 | * the batchbuffer in trusted mode, otherwise the ioctl is rejected. | |
233 | */ | |
234 | ||
13149e8b LL |
235 | struct eb_fence { |
236 | struct drm_syncobj *syncobj; /* Use with ptr_mask_bits() */ | |
237 | struct dma_fence *dma_fence; | |
238 | u64 value; | |
239 | struct dma_fence_chain *chain_fence; | |
240 | }; | |
241 | ||
650bc635 | 242 | struct i915_execbuffer { |
2889caa9 CW |
243 | struct drm_i915_private *i915; /** i915 backpointer */ |
244 | struct drm_file *file; /** per-file lookup tables and limits */ | |
245 | struct drm_i915_gem_execbuffer2 *args; /** ioctl parameters */ | |
246 | struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */ | |
7d6236bb | 247 | struct eb_vma *vma; |
2889caa9 CW |
248 | |
249 | struct intel_engine_cs *engine; /** engine to queue the request to */ | |
8f2a1057 CW |
250 | struct intel_context *context; /* logical state for the request */ |
251 | struct i915_gem_context *gem_context; /** caller's context */ | |
2889caa9 | 252 | |
e61e0f51 | 253 | struct i915_request *request; /** our request to build */ |
7d6236bb | 254 | struct eb_vma *batch; /** identity of the batch obj/vma */ |
32d94048 | 255 | struct i915_vma *trampoline; /** trampoline used for chaining */ |
2889caa9 CW |
256 | |
257 | /** actual size of execobj[] as we may extend it for the cmdparser */ | |
258 | unsigned int buffer_count; | |
259 | ||
260 | /** list of vma not yet bound during reservation phase */ | |
261 | struct list_head unbound; | |
262 | ||
263 | /** list of vma that have execobj.relocation_count */ | |
264 | struct list_head relocs; | |
265 | ||
c43ce123 ML |
266 | struct i915_gem_ww_ctx ww; |
267 | ||
2889caa9 CW |
268 | /** |
269 | * Track the most recently used object for relocations, as we | |
270 | * frequently have to perform multiple relocations within the same | |
271 | * obj/page | |
272 | */ | |
650bc635 | 273 | struct reloc_cache { |
2889caa9 | 274 | struct drm_mm_node node; /** temporary GTT binding */ |
ad5d95e4 DA |
275 | unsigned long vaddr; /** Current kmap address */ |
276 | unsigned long page; /** Currently mapped page index */ | |
8802190f | 277 | unsigned int graphics_ver; /** Cached value of GRAPHICS_VER */ |
650bc635 | 278 | bool use_64bit_reloc : 1; |
2889caa9 CW |
279 | bool has_llc : 1; |
280 | bool has_fence : 1; | |
281 | bool needs_unfenced : 1; | |
7dd4f672 | 282 | |
e61e0f51 | 283 | struct i915_request *rq; |
7dd4f672 CW |
284 | u32 *rq_cmd; |
285 | unsigned int rq_size; | |
c43ce123 | 286 | struct intel_gt_buffer_pool_node *pool; |
650bc635 | 287 | } reloc_cache; |
2889caa9 | 288 | |
c43ce123 | 289 | struct intel_gt_buffer_pool_node *reloc_pool; /** relocation pool for -EDEADLK handling */ |
2bf541ff | 290 | struct intel_context *reloc_context; |
c43ce123 | 291 | |
2889caa9 | 292 | u64 invalid_flags; /** Set of execobj.flags that are invalid */ |
2889caa9 | 293 | |
d5e87821 | 294 | u64 batch_len; /** Length of batch within object */ |
2889caa9 | 295 | u32 batch_start_offset; /** Location within object of batch */ |
2889caa9 | 296 | u32 batch_flags; /** Flags composed for emit_bb_start() */ |
c43ce123 | 297 | struct intel_gt_buffer_pool_node *batch_pool; /** pool node for batch buffer */ |
2889caa9 CW |
298 | |
299 | /** | |
300 | * Indicate either the size of the hastable used to resolve | |
301 | * relocation handles, or if negative that we are using a direct | |
302 | * index into the execobj[]. | |
303 | */ | |
304 | int lut_size; | |
305 | struct hlist_head *buckets; /** ht for relocation handles */ | |
cda9edd0 | 306 | |
13149e8b LL |
307 | struct eb_fence *fences; |
308 | unsigned long num_fences; | |
67731b87 CW |
309 | }; |
310 | ||
8e4ba491 | 311 | static int eb_parse(struct i915_execbuffer *eb); |
2bf541ff ML |
312 | static struct i915_request *eb_pin_engine(struct i915_execbuffer *eb, |
313 | bool throttle); | |
314 | static void eb_unpin_engine(struct i915_execbuffer *eb); | |
8e4ba491 | 315 | |
3dbf26ed CW |
316 | static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb) |
317 | { | |
311a50e7 | 318 | return intel_engine_requires_cmd_parser(eb->engine) || |
435e8fc0 JB |
319 | (intel_engine_using_cmd_parser(eb->engine) && |
320 | eb->args->batch_len); | |
3dbf26ed CW |
321 | } |
322 | ||
650bc635 | 323 | static int eb_create(struct i915_execbuffer *eb) |
67731b87 | 324 | { |
2889caa9 CW |
325 | if (!(eb->args->flags & I915_EXEC_HANDLE_LUT)) { |
326 | unsigned int size = 1 + ilog2(eb->buffer_count); | |
4ff4b44c | 327 | |
2889caa9 CW |
328 | /* |
329 | * Without a 1:1 association between relocation handles and | |
330 | * the execobject[] index, we instead create a hashtable. | |
331 | * We size it dynamically based on available memory, starting | |
332 | * first with 1:1 assocative hash and scaling back until | |
333 | * the allocation succeeds. | |
334 | * | |
335 | * Later on we use a positive lut_size to indicate we are | |
336 | * using this hashtable, and a negative value to indicate a | |
337 | * direct lookup. | |
338 | */ | |
4ff4b44c | 339 | do { |
0d95c883 | 340 | gfp_t flags; |
4d470f73 CW |
341 | |
342 | /* While we can still reduce the allocation size, don't | |
343 | * raise a warning and allow the allocation to fail. | |
344 | * On the last pass though, we want to try as hard | |
345 | * as possible to perform the allocation and warn | |
346 | * if it fails. | |
347 | */ | |
0ee931c4 | 348 | flags = GFP_KERNEL; |
4d470f73 CW |
349 | if (size > 1) |
350 | flags |= __GFP_NORETRY | __GFP_NOWARN; | |
351 | ||
4ff4b44c | 352 | eb->buckets = kzalloc(sizeof(struct hlist_head) << size, |
4d470f73 | 353 | flags); |
4ff4b44c CW |
354 | if (eb->buckets) |
355 | break; | |
356 | } while (--size); | |
357 | ||
8ae275c2 | 358 | if (unlikely(!size)) |
4d470f73 | 359 | return -ENOMEM; |
eef90ccb | 360 | |
2889caa9 | 361 | eb->lut_size = size; |
650bc635 | 362 | } else { |
2889caa9 | 363 | eb->lut_size = -eb->buffer_count; |
650bc635 | 364 | } |
eef90ccb | 365 | |
650bc635 | 366 | return 0; |
67731b87 CW |
367 | } |
368 | ||
2889caa9 CW |
369 | static bool |
370 | eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry, | |
c7c6e46f CW |
371 | const struct i915_vma *vma, |
372 | unsigned int flags) | |
2889caa9 | 373 | { |
2889caa9 CW |
374 | if (vma->node.size < entry->pad_to_size) |
375 | return true; | |
376 | ||
377 | if (entry->alignment && !IS_ALIGNED(vma->node.start, entry->alignment)) | |
378 | return true; | |
379 | ||
c7c6e46f | 380 | if (flags & EXEC_OBJECT_PINNED && |
2889caa9 CW |
381 | vma->node.start != entry->offset) |
382 | return true; | |
383 | ||
c7c6e46f | 384 | if (flags & __EXEC_OBJECT_NEEDS_BIAS && |
2889caa9 CW |
385 | vma->node.start < BATCH_OFFSET_BIAS) |
386 | return true; | |
387 | ||
c7c6e46f | 388 | if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) && |
5f22cc0b | 389 | (vma->node.start + vma->node.size + 4095) >> 32) |
2889caa9 CW |
390 | return true; |
391 | ||
1d033beb CW |
392 | if (flags & __EXEC_OBJECT_NEEDS_MAP && |
393 | !i915_vma_is_map_and_fenceable(vma)) | |
394 | return true; | |
395 | ||
2889caa9 CW |
396 | return false; |
397 | } | |
398 | ||
8a338f4b CW |
399 | static u64 eb_pin_flags(const struct drm_i915_gem_exec_object2 *entry, |
400 | unsigned int exec_flags) | |
401 | { | |
402 | u64 pin_flags = 0; | |
403 | ||
404 | if (exec_flags & EXEC_OBJECT_NEEDS_GTT) | |
405 | pin_flags |= PIN_GLOBAL; | |
406 | ||
407 | /* | |
408 | * Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset, | |
409 | * limit address to the first 4GBs for unflagged objects. | |
410 | */ | |
411 | if (!(exec_flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) | |
412 | pin_flags |= PIN_ZONE_4G; | |
413 | ||
414 | if (exec_flags & __EXEC_OBJECT_NEEDS_MAP) | |
415 | pin_flags |= PIN_MAPPABLE; | |
416 | ||
417 | if (exec_flags & EXEC_OBJECT_PINNED) | |
418 | pin_flags |= entry->offset | PIN_OFFSET_FIXED; | |
419 | else if (exec_flags & __EXEC_OBJECT_NEEDS_BIAS) | |
420 | pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS; | |
421 | ||
422 | return pin_flags; | |
423 | } | |
424 | ||
237647f4 | 425 | static inline int |
2889caa9 | 426 | eb_pin_vma(struct i915_execbuffer *eb, |
c7c6e46f | 427 | const struct drm_i915_gem_exec_object2 *entry, |
7d6236bb | 428 | struct eb_vma *ev) |
2889caa9 | 429 | { |
7d6236bb | 430 | struct i915_vma *vma = ev->vma; |
c7c6e46f | 431 | u64 pin_flags; |
237647f4 | 432 | int err; |
2889caa9 | 433 | |
616d9cee | 434 | if (vma->node.size) |
c7c6e46f | 435 | pin_flags = vma->node.start; |
616d9cee | 436 | else |
c7c6e46f | 437 | pin_flags = entry->offset & PIN_OFFSET_MASK; |
616d9cee | 438 | |
c7c6e46f | 439 | pin_flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED; |
7d6236bb | 440 | if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_GTT)) |
c7c6e46f | 441 | pin_flags |= PIN_GLOBAL; |
616d9cee | 442 | |
8a338f4b | 443 | /* Attempt to reuse the current location if available */ |
237647f4 ML |
444 | err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, pin_flags); |
445 | if (err == -EDEADLK) | |
446 | return err; | |
447 | ||
448 | if (unlikely(err)) { | |
8a338f4b | 449 | if (entry->flags & EXEC_OBJECT_PINNED) |
237647f4 | 450 | return err; |
8a338f4b CW |
451 | |
452 | /* Failing that pick any _free_ space if suitable */ | |
237647f4 | 453 | err = i915_vma_pin_ww(vma, &eb->ww, |
47b08693 ML |
454 | entry->pad_to_size, |
455 | entry->alignment, | |
456 | eb_pin_flags(entry, ev->flags) | | |
237647f4 ML |
457 | PIN_USER | PIN_NOEVICT); |
458 | if (unlikely(err)) | |
459 | return err; | |
8a338f4b | 460 | } |
2889caa9 | 461 | |
7d6236bb | 462 | if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) { |
237647f4 ML |
463 | err = i915_vma_pin_fence(vma); |
464 | if (unlikely(err)) { | |
2889caa9 | 465 | i915_vma_unpin(vma); |
237647f4 | 466 | return err; |
2889caa9 CW |
467 | } |
468 | ||
3bd40735 | 469 | if (vma->fence) |
7d6236bb | 470 | ev->flags |= __EXEC_OBJECT_HAS_FENCE; |
2889caa9 CW |
471 | } |
472 | ||
7d6236bb | 473 | ev->flags |= __EXEC_OBJECT_HAS_PIN; |
237647f4 ML |
474 | if (eb_vma_misplaced(entry, vma, ev->flags)) |
475 | return -EBADSLT; | |
476 | ||
477 | return 0; | |
2889caa9 CW |
478 | } |
479 | ||
8ae275c2 ML |
480 | static inline void |
481 | eb_unreserve_vma(struct eb_vma *ev) | |
482 | { | |
483 | if (!(ev->flags & __EXEC_OBJECT_HAS_PIN)) | |
484 | return; | |
485 | ||
c43ce123 ML |
486 | if (unlikely(ev->flags & __EXEC_OBJECT_HAS_FENCE)) |
487 | __i915_vma_unpin_fence(ev->vma); | |
488 | ||
489 | __i915_vma_unpin(ev->vma); | |
8ae275c2 ML |
490 | ev->flags &= ~__EXEC_OBJECT_RESERVED; |
491 | } | |
492 | ||
2889caa9 CW |
493 | static int |
494 | eb_validate_vma(struct i915_execbuffer *eb, | |
495 | struct drm_i915_gem_exec_object2 *entry, | |
496 | struct i915_vma *vma) | |
67731b87 | 497 | { |
2eb8e1a6 JE |
498 | /* Relocations are disallowed for all platforms after TGL-LP. This |
499 | * also covers all platforms with local memory. | |
500 | */ | |
501 | if (entry->relocation_count && | |
40e1956e | 502 | GRAPHICS_VER(eb->i915) >= 12 && !IS_TIGERLAKE(eb->i915)) |
2eb8e1a6 JE |
503 | return -EINVAL; |
504 | ||
2889caa9 CW |
505 | if (unlikely(entry->flags & eb->invalid_flags)) |
506 | return -EINVAL; | |
d55495b4 | 507 | |
2920516b MA |
508 | if (unlikely(entry->alignment && |
509 | !is_power_of_2_u64(entry->alignment))) | |
2889caa9 CW |
510 | return -EINVAL; |
511 | ||
512 | /* | |
513 | * Offset can be used as input (EXEC_OBJECT_PINNED), reject | |
514 | * any non-page-aligned or non-canonical addresses. | |
515 | */ | |
516 | if (unlikely(entry->flags & EXEC_OBJECT_PINNED && | |
6fc4e48f | 517 | entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK))) |
2889caa9 CW |
518 | return -EINVAL; |
519 | ||
520 | /* pad_to_size was once a reserved field, so sanitize it */ | |
521 | if (entry->flags & EXEC_OBJECT_PAD_TO_SIZE) { | |
522 | if (unlikely(offset_in_page(entry->pad_to_size))) | |
523 | return -EINVAL; | |
524 | } else { | |
525 | entry->pad_to_size = 0; | |
d55495b4 | 526 | } |
2889caa9 CW |
527 | /* |
528 | * From drm_mm perspective address space is continuous, | |
529 | * so from this point we're always using non-canonical | |
530 | * form internally. | |
531 | */ | |
532 | entry->offset = gen8_noncanonical_addr(entry->offset); | |
533 | ||
c7c6e46f CW |
534 | if (!eb->reloc_cache.has_fence) { |
535 | entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE; | |
536 | } else { | |
537 | if ((entry->flags & EXEC_OBJECT_NEEDS_FENCE || | |
538 | eb->reloc_cache.needs_unfenced) && | |
539 | i915_gem_object_is_tiled(vma->obj)) | |
540 | entry->flags |= EXEC_OBJECT_NEEDS_GTT | __EXEC_OBJECT_NEEDS_MAP; | |
541 | } | |
542 | ||
2889caa9 | 543 | return 0; |
67731b87 CW |
544 | } |
545 | ||
003d8b91 | 546 | static void |
746c8f14 CW |
547 | eb_add_vma(struct i915_execbuffer *eb, |
548 | unsigned int i, unsigned batch_idx, | |
549 | struct i915_vma *vma) | |
59bfa124 | 550 | { |
c7c6e46f | 551 | struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; |
7d6236bb | 552 | struct eb_vma *ev = &eb->vma[i]; |
2889caa9 | 553 | |
93159e12 | 554 | ev->vma = vma; |
7d6236bb CW |
555 | ev->exec = entry; |
556 | ev->flags = entry->flags; | |
557 | ||
4d470f73 | 558 | if (eb->lut_size > 0) { |
7d6236bb CW |
559 | ev->handle = entry->handle; |
560 | hlist_add_head(&ev->node, | |
2889caa9 CW |
561 | &eb->buckets[hash_32(entry->handle, |
562 | eb->lut_size)]); | |
4ff4b44c | 563 | } |
59bfa124 | 564 | |
2889caa9 | 565 | if (entry->relocation_count) |
7d6236bb | 566 | list_add_tail(&ev->reloc_link, &eb->relocs); |
2889caa9 | 567 | |
746c8f14 CW |
568 | /* |
569 | * SNA is doing fancy tricks with compressing batch buffers, which leads | |
570 | * to negative relocation deltas. Usually that works out ok since the | |
571 | * relocate address is still positive, except when the batch is placed | |
572 | * very low in the GTT. Ensure this doesn't happen. | |
573 | * | |
574 | * Note that actual hangs have only been observed on gen7, but for | |
575 | * paranoia do it everywhere. | |
576 | */ | |
577 | if (i == batch_idx) { | |
827db9d8 | 578 | if (entry->relocation_count && |
7d6236bb CW |
579 | !(ev->flags & EXEC_OBJECT_PINNED)) |
580 | ev->flags |= __EXEC_OBJECT_NEEDS_BIAS; | |
746c8f14 | 581 | if (eb->reloc_cache.has_fence) |
7d6236bb | 582 | ev->flags |= EXEC_OBJECT_NEEDS_FENCE; |
746c8f14 | 583 | |
7d6236bb | 584 | eb->batch = ev; |
746c8f14 | 585 | } |
2889caa9 CW |
586 | } |
587 | ||
ad5d95e4 DA |
588 | static inline int use_cpu_reloc(const struct reloc_cache *cache, |
589 | const struct drm_i915_gem_object *obj) | |
590 | { | |
591 | if (!i915_gem_object_has_struct_page(obj)) | |
592 | return false; | |
593 | ||
594 | if (DBG_FORCE_RELOC == FORCE_CPU_RELOC) | |
595 | return true; | |
596 | ||
597 | if (DBG_FORCE_RELOC == FORCE_GTT_RELOC) | |
598 | return false; | |
599 | ||
600 | return (cache->has_llc || | |
601 | obj->cache_dirty || | |
602 | obj->cache_level != I915_CACHE_NONE); | |
603 | } | |
604 | ||
47b08693 | 605 | static int eb_reserve_vma(struct i915_execbuffer *eb, |
7d6236bb | 606 | struct eb_vma *ev, |
2920bb94 | 607 | u64 pin_flags) |
2889caa9 | 608 | { |
7d6236bb | 609 | struct drm_i915_gem_exec_object2 *entry = ev->exec; |
7d6236bb | 610 | struct i915_vma *vma = ev->vma; |
2889caa9 CW |
611 | int err; |
612 | ||
003d8b91 CW |
613 | if (drm_mm_node_allocated(&vma->node) && |
614 | eb_vma_misplaced(entry, vma, ev->flags)) { | |
615 | err = i915_vma_unbind(vma); | |
616 | if (err) | |
617 | return err; | |
618 | } | |
619 | ||
47b08693 | 620 | err = i915_vma_pin_ww(vma, &eb->ww, |
c7c6e46f | 621 | entry->pad_to_size, entry->alignment, |
8a338f4b | 622 | eb_pin_flags(entry, ev->flags) | pin_flags); |
2889caa9 CW |
623 | if (err) |
624 | return err; | |
625 | ||
626 | if (entry->offset != vma->node.start) { | |
627 | entry->offset = vma->node.start | UPDATE; | |
628 | eb->args->flags |= __EXEC_HAS_RELOC; | |
629 | } | |
630 | ||
8a338f4b | 631 | if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) { |
3bd40735 | 632 | err = i915_vma_pin_fence(vma); |
2889caa9 CW |
633 | if (unlikely(err)) { |
634 | i915_vma_unpin(vma); | |
635 | return err; | |
636 | } | |
637 | ||
3bd40735 | 638 | if (vma->fence) |
8a338f4b | 639 | ev->flags |= __EXEC_OBJECT_HAS_FENCE; |
2889caa9 CW |
640 | } |
641 | ||
8a338f4b | 642 | ev->flags |= __EXEC_OBJECT_HAS_PIN; |
7d6236bb | 643 | GEM_BUG_ON(eb_vma_misplaced(entry, vma, ev->flags)); |
1da7b54c | 644 | |
2889caa9 CW |
645 | return 0; |
646 | } | |
647 | ||
648 | static int eb_reserve(struct i915_execbuffer *eb) | |
649 | { | |
650 | const unsigned int count = eb->buffer_count; | |
2920bb94 | 651 | unsigned int pin_flags = PIN_USER | PIN_NONBLOCK; |
2889caa9 | 652 | struct list_head last; |
7d6236bb | 653 | struct eb_vma *ev; |
2889caa9 | 654 | unsigned int i, pass; |
ef398881 | 655 | int err = 0; |
2889caa9 CW |
656 | |
657 | /* | |
658 | * Attempt to pin all of the buffers into the GTT. | |
659 | * This is done in 3 phases: | |
660 | * | |
661 | * 1a. Unbind all objects that do not match the GTT constraints for | |
662 | * the execbuffer (fenceable, mappable, alignment etc). | |
663 | * 1b. Increment pin count for already bound objects. | |
664 | * 2. Bind new objects. | |
665 | * 3. Decrement pin count. | |
666 | * | |
667 | * This avoid unnecessary unbinding of later objects in order to make | |
668 | * room for the earlier objects *unless* we need to defragment. | |
669 | */ | |
2889caa9 | 670 | pass = 0; |
2889caa9 | 671 | do { |
7d6236bb CW |
672 | list_for_each_entry(ev, &eb->unbound, bind_link) { |
673 | err = eb_reserve_vma(eb, ev, pin_flags); | |
2889caa9 CW |
674 | if (err) |
675 | break; | |
676 | } | |
fd1500fc | 677 | if (err != -ENOSPC) |
c43ce123 | 678 | return err; |
2889caa9 CW |
679 | |
680 | /* Resort *all* the objects into priority order */ | |
681 | INIT_LIST_HEAD(&eb->unbound); | |
682 | INIT_LIST_HEAD(&last); | |
683 | for (i = 0; i < count; i++) { | |
7d6236bb | 684 | unsigned int flags; |
2889caa9 | 685 | |
7d6236bb CW |
686 | ev = &eb->vma[i]; |
687 | flags = ev->flags; | |
c7c6e46f CW |
688 | if (flags & EXEC_OBJECT_PINNED && |
689 | flags & __EXEC_OBJECT_HAS_PIN) | |
2889caa9 CW |
690 | continue; |
691 | ||
7d6236bb | 692 | eb_unreserve_vma(ev); |
2889caa9 | 693 | |
c7c6e46f | 694 | if (flags & EXEC_OBJECT_PINNED) |
35e882a4 | 695 | /* Pinned must have their slot */ |
7d6236bb | 696 | list_add(&ev->bind_link, &eb->unbound); |
c7c6e46f | 697 | else if (flags & __EXEC_OBJECT_NEEDS_MAP) |
35e882a4 | 698 | /* Map require the lowest 256MiB (aperture) */ |
7d6236bb | 699 | list_add_tail(&ev->bind_link, &eb->unbound); |
35e882a4 CW |
700 | else if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS)) |
701 | /* Prioritise 4GiB region for restricted bo */ | |
7d6236bb | 702 | list_add(&ev->bind_link, &last); |
2889caa9 | 703 | else |
7d6236bb | 704 | list_add_tail(&ev->bind_link, &last); |
2889caa9 CW |
705 | } |
706 | list_splice_tail(&last, &eb->unbound); | |
707 | ||
708 | switch (pass++) { | |
709 | case 0: | |
710 | break; | |
711 | ||
712 | case 1: | |
713 | /* Too fragmented, unbind everything and retry */ | |
2850748e | 714 | mutex_lock(&eb->context->vm->mutex); |
f5d974f9 | 715 | err = i915_gem_evict_vm(eb->context->vm); |
2850748e | 716 | mutex_unlock(&eb->context->vm->mutex); |
2889caa9 | 717 | if (err) |
c43ce123 | 718 | return err; |
2889caa9 CW |
719 | break; |
720 | ||
721 | default: | |
c43ce123 | 722 | return -ENOSPC; |
2889caa9 | 723 | } |
2920bb94 CW |
724 | |
725 | pin_flags = PIN_USER; | |
2889caa9 | 726 | } while (1); |
4ff4b44c | 727 | } |
59bfa124 | 728 | |
2889caa9 CW |
729 | static unsigned int eb_batch_index(const struct i915_execbuffer *eb) |
730 | { | |
1a71cf2f CW |
731 | if (eb->args->flags & I915_EXEC_BATCH_FIRST) |
732 | return 0; | |
733 | else | |
734 | return eb->buffer_count - 1; | |
2889caa9 CW |
735 | } |
736 | ||
737 | static int eb_select_context(struct i915_execbuffer *eb) | |
738 | { | |
739 | struct i915_gem_context *ctx; | |
740 | ||
741 | ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1); | |
046d1660 JE |
742 | if (unlikely(IS_ERR(ctx))) |
743 | return PTR_ERR(ctx); | |
2889caa9 | 744 | |
8f2a1057 | 745 | eb->gem_context = ctx; |
a4e7ccda | 746 | if (rcu_access_pointer(ctx->vm)) |
4f2c7337 | 747 | eb->invalid_flags |= EXEC_OBJECT_NEEDS_GTT; |
2889caa9 | 748 | |
2889caa9 CW |
749 | return 0; |
750 | } | |
751 | ||
93159e12 CW |
752 | static int __eb_add_lut(struct i915_execbuffer *eb, |
753 | u32 handle, struct i915_vma *vma) | |
3b96eff4 | 754 | { |
93159e12 CW |
755 | struct i915_gem_context *ctx = eb->gem_context; |
756 | struct i915_lut_handle *lut; | |
2889caa9 | 757 | int err; |
3b96eff4 | 758 | |
93159e12 CW |
759 | lut = i915_lut_handle_alloc(); |
760 | if (unlikely(!lut)) | |
761 | return -ENOMEM; | |
762 | ||
763 | i915_vma_get(vma); | |
764 | if (!atomic_fetch_inc(&vma->open_count)) | |
765 | i915_vma_reopen(vma); | |
766 | lut->handle = handle; | |
767 | lut->ctx = ctx; | |
768 | ||
769 | /* Check that the context hasn't been closed in the meantime */ | |
770 | err = -EINTR; | |
f7ce8639 CW |
771 | if (!mutex_lock_interruptible(&ctx->lut_mutex)) { |
772 | struct i915_address_space *vm = rcu_access_pointer(ctx->vm); | |
773 | ||
774 | if (unlikely(vm && vma->vm != vm)) | |
775 | err = -EAGAIN; /* user racing with ctx set-vm */ | |
776 | else if (likely(!i915_gem_context_is_closed(ctx))) | |
93159e12 | 777 | err = radix_tree_insert(&ctx->handles_vma, handle, vma); |
f7ce8639 CW |
778 | else |
779 | err = -ENOENT; | |
93159e12 CW |
780 | if (err == 0) { /* And nor has this handle */ |
781 | struct drm_i915_gem_object *obj = vma->obj; | |
782 | ||
096a42dd | 783 | spin_lock(&obj->lut_lock); |
93159e12 CW |
784 | if (idr_find(&eb->file->object_idr, handle) == obj) { |
785 | list_add(&lut->obj_link, &obj->lut_list); | |
786 | } else { | |
787 | radix_tree_delete(&ctx->handles_vma, handle); | |
788 | err = -ENOENT; | |
789 | } | |
096a42dd | 790 | spin_unlock(&obj->lut_lock); |
93159e12 | 791 | } |
f7ce8639 | 792 | mutex_unlock(&ctx->lut_mutex); |
93159e12 CW |
793 | } |
794 | if (unlikely(err)) | |
795 | goto err; | |
003d8b91 | 796 | |
93159e12 | 797 | return 0; |
d55495b4 | 798 | |
93159e12 | 799 | err: |
50689771 | 800 | i915_vma_close(vma); |
93159e12 CW |
801 | i915_vma_put(vma); |
802 | i915_lut_handle_free(lut); | |
803 | return err; | |
804 | } | |
746c8f14 | 805 | |
93159e12 CW |
806 | static struct i915_vma *eb_lookup_vma(struct i915_execbuffer *eb, u32 handle) |
807 | { | |
f7ce8639 CW |
808 | struct i915_address_space *vm = eb->context->vm; |
809 | ||
93159e12 CW |
810 | do { |
811 | struct drm_i915_gem_object *obj; | |
170fa29b | 812 | struct i915_vma *vma; |
93159e12 | 813 | int err; |
4ff4b44c | 814 | |
93159e12 CW |
815 | rcu_read_lock(); |
816 | vma = radix_tree_lookup(&eb->gem_context->handles_vma, handle); | |
f7ce8639 | 817 | if (likely(vma && vma->vm == vm)) |
93159e12 CW |
818 | vma = i915_vma_tryget(vma); |
819 | rcu_read_unlock(); | |
820 | if (likely(vma)) | |
821 | return vma; | |
4ff4b44c | 822 | |
170fa29b | 823 | obj = i915_gem_object_lookup(eb->file, handle); |
93159e12 CW |
824 | if (unlikely(!obj)) |
825 | return ERR_PTR(-ENOENT); | |
3b96eff4 | 826 | |
f7ce8639 | 827 | vma = i915_vma_instance(obj, vm, NULL); |
772b5408 | 828 | if (IS_ERR(vma)) { |
93159e12 CW |
829 | i915_gem_object_put(obj); |
830 | return vma; | |
27173f1f BW |
831 | } |
832 | ||
93159e12 CW |
833 | err = __eb_add_lut(eb, handle, vma); |
834 | if (likely(!err)) | |
835 | return vma; | |
d1b48c1e | 836 | |
93159e12 CW |
837 | i915_gem_object_put(obj); |
838 | if (err != -EEXIST) | |
839 | return ERR_PTR(err); | |
840 | } while (1); | |
841 | } | |
4ff4b44c | 842 | |
93159e12 CW |
843 | static int eb_lookup_vmas(struct i915_execbuffer *eb) |
844 | { | |
8e4ba491 | 845 | struct drm_i915_private *i915 = eb->i915; |
93159e12 CW |
846 | unsigned int batch = eb_batch_index(eb); |
847 | unsigned int i; | |
848 | int err = 0; | |
155ab883 | 849 | |
93159e12 | 850 | INIT_LIST_HEAD(&eb->relocs); |
93159e12 CW |
851 | |
852 | for (i = 0; i < eb->buffer_count; i++) { | |
853 | struct i915_vma *vma; | |
854 | ||
855 | vma = eb_lookup_vma(eb, eb->exec[i].handle); | |
856 | if (IS_ERR(vma)) { | |
857 | err = PTR_ERR(vma); | |
8e4ba491 | 858 | goto err; |
93159e12 | 859 | } |
d1b48c1e | 860 | |
003d8b91 | 861 | err = eb_validate_vma(eb, &eb->exec[i], vma); |
93159e12 CW |
862 | if (unlikely(err)) { |
863 | i915_vma_put(vma); | |
8e4ba491 | 864 | goto err; |
93159e12 | 865 | } |
dade2a61 | 866 | |
003d8b91 | 867 | eb_add_vma(eb, i, batch, vma); |
ed29c269 ML |
868 | |
869 | if (i915_gem_object_is_userptr(vma->obj)) { | |
870 | err = i915_gem_object_userptr_submit_init(vma->obj); | |
871 | if (err) { | |
872 | if (i + 1 < eb->buffer_count) { | |
873 | /* | |
874 | * Execbuffer code expects last vma entry to be NULL, | |
875 | * since we already initialized this entry, | |
876 | * set the next value to NULL or we mess up | |
877 | * cleanup handling. | |
878 | */ | |
879 | eb->vma[i + 1].vma = NULL; | |
880 | } | |
881 | ||
882 | return err; | |
883 | } | |
884 | ||
885 | eb->vma[i].flags |= __EXEC_OBJECT_USERPTR_INIT; | |
886 | eb->args->flags |= __EXEC_USERPTR_USED; | |
887 | } | |
4ff4b44c CW |
888 | } |
889 | ||
8e4ba491 ML |
890 | if (unlikely(eb->batch->flags & EXEC_OBJECT_WRITE)) { |
891 | drm_dbg(&i915->drm, | |
892 | "Attempting to use self-modifying batch buffer\n"); | |
893 | return -EINVAL; | |
894 | } | |
895 | ||
896 | if (range_overflows_t(u64, | |
897 | eb->batch_start_offset, eb->batch_len, | |
898 | eb->batch->vma->size)) { | |
899 | drm_dbg(&i915->drm, "Attempting to use out-of-bounds batch\n"); | |
900 | return -EINVAL; | |
901 | } | |
902 | ||
903 | if (eb->batch_len == 0) | |
904 | eb->batch_len = eb->batch->vma->size - eb->batch_start_offset; | |
d5e87821 CW |
905 | if (unlikely(eb->batch_len == 0)) { /* impossible! */ |
906 | drm_dbg(&i915->drm, "Invalid batch length\n"); | |
907 | return -EINVAL; | |
908 | } | |
8e4ba491 ML |
909 | |
910 | return 0; | |
911 | ||
912 | err: | |
7d6236bb | 913 | eb->vma[i].vma = NULL; |
2889caa9 | 914 | return err; |
3b96eff4 CW |
915 | } |
916 | ||
5cd57f67 | 917 | static int eb_lock_vmas(struct i915_execbuffer *eb) |
c43ce123 ML |
918 | { |
919 | unsigned int i; | |
920 | int err; | |
921 | ||
c43ce123 | 922 | for (i = 0; i < eb->buffer_count; i++) { |
c43ce123 ML |
923 | struct eb_vma *ev = &eb->vma[i]; |
924 | struct i915_vma *vma = ev->vma; | |
925 | ||
926 | err = i915_gem_object_lock(vma->obj, &eb->ww); | |
927 | if (err) | |
928 | return err; | |
5cd57f67 TH |
929 | } |
930 | ||
931 | return 0; | |
932 | } | |
933 | ||
934 | static int eb_validate_vmas(struct i915_execbuffer *eb) | |
935 | { | |
936 | unsigned int i; | |
937 | int err; | |
938 | ||
939 | INIT_LIST_HEAD(&eb->unbound); | |
940 | ||
941 | err = eb_lock_vmas(eb); | |
942 | if (err) | |
943 | return err; | |
944 | ||
945 | for (i = 0; i < eb->buffer_count; i++) { | |
946 | struct drm_i915_gem_exec_object2 *entry = &eb->exec[i]; | |
947 | struct eb_vma *ev = &eb->vma[i]; | |
948 | struct i915_vma *vma = ev->vma; | |
c43ce123 | 949 | |
237647f4 ML |
950 | err = eb_pin_vma(eb, entry, ev); |
951 | if (err == -EDEADLK) | |
952 | return err; | |
953 | ||
954 | if (!err) { | |
c43ce123 ML |
955 | if (entry->offset != vma->node.start) { |
956 | entry->offset = vma->node.start | UPDATE; | |
957 | eb->args->flags |= __EXEC_HAS_RELOC; | |
958 | } | |
959 | } else { | |
960 | eb_unreserve_vma(ev); | |
961 | ||
962 | list_add_tail(&ev->bind_link, &eb->unbound); | |
963 | if (drm_mm_node_allocated(&vma->node)) { | |
964 | err = i915_vma_unbind(vma); | |
965 | if (err) | |
966 | return err; | |
967 | } | |
968 | } | |
969 | ||
bfaae47d ML |
970 | if (!(ev->flags & EXEC_OBJECT_WRITE)) { |
971 | err = dma_resv_reserve_shared(vma->resv, 1); | |
972 | if (err) | |
973 | return err; | |
974 | } | |
975 | ||
c43ce123 ML |
976 | GEM_BUG_ON(drm_mm_node_allocated(&vma->node) && |
977 | eb_vma_misplaced(&eb->exec[i], vma, ev->flags)); | |
978 | } | |
979 | ||
980 | if (!list_empty(&eb->unbound)) | |
981 | return eb_reserve(eb); | |
982 | ||
983 | return 0; | |
984 | } | |
985 | ||
7d6236bb | 986 | static struct eb_vma * |
2889caa9 | 987 | eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle) |
67731b87 | 988 | { |
2889caa9 CW |
989 | if (eb->lut_size < 0) { |
990 | if (handle >= -eb->lut_size) | |
eef90ccb | 991 | return NULL; |
7d6236bb | 992 | return &eb->vma[handle]; |
eef90ccb CW |
993 | } else { |
994 | struct hlist_head *head; | |
7d6236bb | 995 | struct eb_vma *ev; |
67731b87 | 996 | |
2889caa9 | 997 | head = &eb->buckets[hash_32(handle, eb->lut_size)]; |
7d6236bb CW |
998 | hlist_for_each_entry(ev, head, node) { |
999 | if (ev->handle == handle) | |
1000 | return ev; | |
eef90ccb CW |
1001 | } |
1002 | return NULL; | |
1003 | } | |
67731b87 CW |
1004 | } |
1005 | ||
b4b9731b | 1006 | static void eb_release_vmas(struct i915_execbuffer *eb, bool final) |
8ae275c2 ML |
1007 | { |
1008 | const unsigned int count = eb->buffer_count; | |
1009 | unsigned int i; | |
1010 | ||
1011 | for (i = 0; i < count; i++) { | |
1012 | struct eb_vma *ev = &eb->vma[i]; | |
1013 | struct i915_vma *vma = ev->vma; | |
1014 | ||
1015 | if (!vma) | |
1016 | break; | |
1017 | ||
c43ce123 | 1018 | eb_unreserve_vma(ev); |
8ae275c2 | 1019 | |
c43ce123 ML |
1020 | if (final) |
1021 | i915_vma_put(vma); | |
8ae275c2 | 1022 | } |
2bf541ff ML |
1023 | |
1024 | eb_unpin_engine(eb); | |
8ae275c2 ML |
1025 | } |
1026 | ||
2889caa9 | 1027 | static void eb_destroy(const struct i915_execbuffer *eb) |
934acce3 | 1028 | { |
7dd4f672 CW |
1029 | GEM_BUG_ON(eb->reloc_cache.rq); |
1030 | ||
4d470f73 | 1031 | if (eb->lut_size > 0) |
2889caa9 | 1032 | kfree(eb->buckets); |
934acce3 MW |
1033 | } |
1034 | ||
2889caa9 | 1035 | static inline u64 |
d50415cc | 1036 | relocation_target(const struct drm_i915_gem_relocation_entry *reloc, |
2889caa9 | 1037 | const struct i915_vma *target) |
934acce3 | 1038 | { |
2889caa9 | 1039 | return gen8_canonical_addr((int)reloc->delta + target->node.start); |
934acce3 MW |
1040 | } |
1041 | ||
c43ce123 ML |
1042 | static void reloc_cache_clear(struct reloc_cache *cache) |
1043 | { | |
1044 | cache->rq = NULL; | |
1045 | cache->rq_cmd = NULL; | |
1046 | cache->pool = NULL; | |
1047 | cache->rq_size = 0; | |
1048 | } | |
1049 | ||
d50415cc CW |
1050 | static void reloc_cache_init(struct reloc_cache *cache, |
1051 | struct drm_i915_private *i915) | |
5032d871 | 1052 | { |
ad5d95e4 DA |
1053 | cache->page = -1; |
1054 | cache->vaddr = 0; | |
dfc5148f | 1055 | /* Must be a variable in the struct to allow GCC to unroll. */ |
8802190f | 1056 | cache->graphics_ver = GRAPHICS_VER(i915); |
2889caa9 | 1057 | cache->has_llc = HAS_LLC(i915); |
dfc5148f | 1058 | cache->use_64bit_reloc = HAS_64BIT_RELOC(i915); |
8802190f | 1059 | cache->has_fence = cache->graphics_ver < 4; |
7dd4f672 | 1060 | cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment; |
4ee92c71 | 1061 | cache->node.flags = 0; |
c43ce123 | 1062 | reloc_cache_clear(cache); |
d50415cc | 1063 | } |
5032d871 | 1064 | |
20561da3 DA |
1065 | static inline void *unmask_page(unsigned long p) |
1066 | { | |
1067 | return (void *)(uintptr_t)(p & PAGE_MASK); | |
1068 | } | |
1069 | ||
1070 | static inline unsigned int unmask_flags(unsigned long p) | |
1071 | { | |
1072 | return p & ~PAGE_MASK; | |
1073 | } | |
1074 | ||
1075 | #define KMAP 0x4 /* after CLFLUSH_FLAGS */ | |
1076 | ||
1077 | static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache) | |
1078 | { | |
1079 | struct drm_i915_private *i915 = | |
1080 | container_of(cache, struct i915_execbuffer, reloc_cache)->i915; | |
1081 | return &i915->ggtt; | |
1082 | } | |
1083 | ||
c43ce123 | 1084 | static void reloc_cache_put_pool(struct i915_execbuffer *eb, struct reloc_cache *cache) |
964a9b0f | 1085 | { |
c43ce123 ML |
1086 | if (!cache->pool) |
1087 | return; | |
964a9b0f | 1088 | |
c43ce123 ML |
1089 | /* |
1090 | * This is a bit nasty, normally we keep objects locked until the end | |
1091 | * of execbuffer, but we already submit this, and have to unlock before | |
1092 | * dropping the reference. Fortunately we can only hold 1 pool node at | |
1093 | * a time, so this should be harmless. | |
1094 | */ | |
1095 | i915_gem_ww_unlock_single(cache->pool->obj); | |
1096 | intel_gt_buffer_pool_put(cache->pool); | |
1097 | cache->pool = NULL; | |
964a9b0f CW |
1098 | } |
1099 | ||
c43ce123 | 1100 | static void reloc_gpu_flush(struct i915_execbuffer *eb, struct reloc_cache *cache) |
7dd4f672 | 1101 | { |
50ae6c61 | 1102 | struct drm_i915_gem_object *obj = cache->rq->batch->obj; |
a679f58d | 1103 | |
50ae6c61 ML |
1104 | GEM_BUG_ON(cache->rq_size >= obj->base.size / sizeof(u32)); |
1105 | cache->rq_cmd[cache->rq_size] = MI_BATCH_BUFFER_END; | |
a679f58d | 1106 | |
26ebc511 | 1107 | i915_gem_object_flush_map(obj); |
50ae6c61 | 1108 | i915_gem_object_unpin_map(obj); |
7dd4f672 | 1109 | |
50ae6c61 | 1110 | intel_gt_chipset_flush(cache->rq->engine->gt); |
964a9b0f | 1111 | |
50ae6c61 | 1112 | i915_request_add(cache->rq); |
c43ce123 ML |
1113 | reloc_cache_put_pool(eb, cache); |
1114 | reloc_cache_clear(cache); | |
0e97fbb0 | 1115 | |
c43ce123 | 1116 | eb->reloc_pool = NULL; |
7dd4f672 CW |
1117 | } |
1118 | ||
c43ce123 | 1119 | static void reloc_cache_reset(struct reloc_cache *cache, struct i915_execbuffer *eb) |
ad5d95e4 DA |
1120 | { |
1121 | void *vaddr; | |
1122 | ||
50ae6c61 | 1123 | if (cache->rq) |
c43ce123 | 1124 | reloc_gpu_flush(eb, cache); |
50ae6c61 | 1125 | |
ad5d95e4 DA |
1126 | if (!cache->vaddr) |
1127 | return; | |
1128 | ||
1129 | vaddr = unmask_page(cache->vaddr); | |
1130 | if (cache->vaddr & KMAP) { | |
1af343cd ML |
1131 | struct drm_i915_gem_object *obj = |
1132 | (struct drm_i915_gem_object *)cache->node.mm; | |
ad5d95e4 DA |
1133 | if (cache->vaddr & CLFLUSH_AFTER) |
1134 | mb(); | |
1135 | ||
1136 | kunmap_atomic(vaddr); | |
1af343cd | 1137 | i915_gem_object_finish_access(obj); |
ad5d95e4 DA |
1138 | } else { |
1139 | struct i915_ggtt *ggtt = cache_to_ggtt(cache); | |
1140 | ||
1141 | intel_gt_flush_ggtt_writes(ggtt->vm.gt); | |
1142 | io_mapping_unmap_atomic((void __iomem *)vaddr); | |
1143 | ||
1144 | if (drm_mm_node_allocated(&cache->node)) { | |
1145 | ggtt->vm.clear_range(&ggtt->vm, | |
1146 | cache->node.start, | |
1147 | cache->node.size); | |
1148 | mutex_lock(&ggtt->vm.mutex); | |
1149 | drm_mm_remove_node(&cache->node); | |
1150 | mutex_unlock(&ggtt->vm.mutex); | |
1151 | } else { | |
1152 | i915_vma_unpin((struct i915_vma *)cache->node.mm); | |
1153 | } | |
1154 | } | |
1155 | ||
1156 | cache->vaddr = 0; | |
1157 | cache->page = -1; | |
1158 | } | |
1159 | ||
1160 | static void *reloc_kmap(struct drm_i915_gem_object *obj, | |
1161 | struct reloc_cache *cache, | |
102a0a90 | 1162 | unsigned long pageno) |
ad5d95e4 DA |
1163 | { |
1164 | void *vaddr; | |
102a0a90 | 1165 | struct page *page; |
ad5d95e4 DA |
1166 | |
1167 | if (cache->vaddr) { | |
1168 | kunmap_atomic(unmask_page(cache->vaddr)); | |
1169 | } else { | |
1170 | unsigned int flushes; | |
1171 | int err; | |
1172 | ||
1173 | err = i915_gem_object_prepare_write(obj, &flushes); | |
1174 | if (err) | |
1175 | return ERR_PTR(err); | |
1176 | ||
1177 | BUILD_BUG_ON(KMAP & CLFLUSH_FLAGS); | |
1178 | BUILD_BUG_ON((KMAP | CLFLUSH_FLAGS) & PAGE_MASK); | |
1179 | ||
1180 | cache->vaddr = flushes | KMAP; | |
1181 | cache->node.mm = (void *)obj; | |
1182 | if (flushes) | |
1183 | mb(); | |
1184 | } | |
1185 | ||
102a0a90 ML |
1186 | page = i915_gem_object_get_page(obj, pageno); |
1187 | if (!obj->mm.dirty) | |
1188 | set_page_dirty(page); | |
1189 | ||
1190 | vaddr = kmap_atomic(page); | |
ad5d95e4 | 1191 | cache->vaddr = unmask_flags(cache->vaddr) | (unsigned long)vaddr; |
102a0a90 | 1192 | cache->page = pageno; |
ad5d95e4 DA |
1193 | |
1194 | return vaddr; | |
1195 | } | |
1196 | ||
1197 | static void *reloc_iomap(struct drm_i915_gem_object *obj, | |
47b08693 | 1198 | struct i915_execbuffer *eb, |
ad5d95e4 DA |
1199 | unsigned long page) |
1200 | { | |
47b08693 | 1201 | struct reloc_cache *cache = &eb->reloc_cache; |
ad5d95e4 DA |
1202 | struct i915_ggtt *ggtt = cache_to_ggtt(cache); |
1203 | unsigned long offset; | |
1204 | void *vaddr; | |
1205 | ||
1206 | if (cache->vaddr) { | |
1207 | intel_gt_flush_ggtt_writes(ggtt->vm.gt); | |
1208 | io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr)); | |
1209 | } else { | |
1210 | struct i915_vma *vma; | |
1211 | int err; | |
1212 | ||
1213 | if (i915_gem_object_is_tiled(obj)) | |
1214 | return ERR_PTR(-EINVAL); | |
1215 | ||
1216 | if (use_cpu_reloc(cache, obj)) | |
1217 | return NULL; | |
1218 | ||
ad5d95e4 | 1219 | err = i915_gem_object_set_to_gtt_domain(obj, true); |
ad5d95e4 DA |
1220 | if (err) |
1221 | return ERR_PTR(err); | |
1222 | ||
47b08693 ML |
1223 | vma = i915_gem_object_ggtt_pin_ww(obj, &eb->ww, NULL, 0, 0, |
1224 | PIN_MAPPABLE | | |
1225 | PIN_NONBLOCK /* NOWARN */ | | |
1226 | PIN_NOEVICT); | |
1227 | if (vma == ERR_PTR(-EDEADLK)) | |
1228 | return vma; | |
1229 | ||
ad5d95e4 DA |
1230 | if (IS_ERR(vma)) { |
1231 | memset(&cache->node, 0, sizeof(cache->node)); | |
1232 | mutex_lock(&ggtt->vm.mutex); | |
1233 | err = drm_mm_insert_node_in_range | |
1234 | (&ggtt->vm.mm, &cache->node, | |
1235 | PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE, | |
1236 | 0, ggtt->mappable_end, | |
1237 | DRM_MM_INSERT_LOW); | |
1238 | mutex_unlock(&ggtt->vm.mutex); | |
1239 | if (err) /* no inactive aperture space, use cpu reloc */ | |
1240 | return NULL; | |
1241 | } else { | |
1242 | cache->node.start = vma->node.start; | |
1243 | cache->node.mm = (void *)vma; | |
1244 | } | |
1245 | } | |
1246 | ||
1247 | offset = cache->node.start; | |
1248 | if (drm_mm_node_allocated(&cache->node)) { | |
1249 | ggtt->vm.insert_page(&ggtt->vm, | |
1250 | i915_gem_object_get_dma_address(obj, page), | |
1251 | offset, I915_CACHE_NONE, 0); | |
1252 | } else { | |
1253 | offset += page << PAGE_SHIFT; | |
1254 | } | |
1255 | ||
1256 | vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->iomap, | |
1257 | offset); | |
1258 | cache->page = page; | |
1259 | cache->vaddr = (unsigned long)vaddr; | |
1260 | ||
1261 | return vaddr; | |
1262 | } | |
1263 | ||
1264 | static void *reloc_vaddr(struct drm_i915_gem_object *obj, | |
47b08693 | 1265 | struct i915_execbuffer *eb, |
ad5d95e4 DA |
1266 | unsigned long page) |
1267 | { | |
47b08693 | 1268 | struct reloc_cache *cache = &eb->reloc_cache; |
ad5d95e4 DA |
1269 | void *vaddr; |
1270 | ||
1271 | if (cache->page == page) { | |
1272 | vaddr = unmask_page(cache->vaddr); | |
1273 | } else { | |
1274 | vaddr = NULL; | |
1275 | if ((cache->vaddr & KMAP) == 0) | |
47b08693 | 1276 | vaddr = reloc_iomap(obj, eb, page); |
ad5d95e4 DA |
1277 | if (!vaddr) |
1278 | vaddr = reloc_kmap(obj, cache, page); | |
1279 | } | |
1280 | ||
1281 | return vaddr; | |
1282 | } | |
1283 | ||
1284 | static void clflush_write32(u32 *addr, u32 value, unsigned int flushes) | |
1285 | { | |
1286 | if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) { | |
1287 | if (flushes & CLFLUSH_BEFORE) { | |
1288 | clflushopt(addr); | |
1289 | mb(); | |
1290 | } | |
1291 | ||
1292 | *addr = value; | |
1293 | ||
1294 | /* | |
1295 | * Writes to the same cacheline are serialised by the CPU | |
1296 | * (including clflush). On the write path, we only require | |
1297 | * that it hits memory in an orderly fashion and place | |
1298 | * mb barriers at the start and end of the relocation phase | |
1299 | * to ensure ordering of clflush wrt to the system. | |
1300 | */ | |
1301 | if (flushes & CLFLUSH_AFTER) | |
1302 | clflushopt(addr); | |
1303 | } else | |
1304 | *addr = value; | |
1305 | } | |
1306 | ||
6951e589 CW |
1307 | static int reloc_move_to_gpu(struct i915_request *rq, struct i915_vma *vma) |
1308 | { | |
1309 | struct drm_i915_gem_object *obj = vma->obj; | |
1310 | int err; | |
1311 | ||
c43ce123 | 1312 | assert_vma_held(vma); |
6951e589 CW |
1313 | |
1314 | if (obj->cache_dirty & ~obj->cache_coherent) | |
1315 | i915_gem_clflush_object(obj, 0); | |
1316 | obj->write_domain = 0; | |
1317 | ||
1318 | err = i915_request_await_object(rq, vma->obj, true); | |
1319 | if (err == 0) | |
1320 | err = i915_vma_move_to_active(vma, rq, EXEC_OBJECT_WRITE); | |
1321 | ||
6951e589 CW |
1322 | return err; |
1323 | } | |
1324 | ||
7dd4f672 | 1325 | static int __reloc_gpu_alloc(struct i915_execbuffer *eb, |
6f576d62 | 1326 | struct intel_engine_cs *engine, |
50ae6c61 | 1327 | struct i915_vma *vma, |
7dd4f672 CW |
1328 | unsigned int len) |
1329 | { | |
1330 | struct reloc_cache *cache = &eb->reloc_cache; | |
c43ce123 | 1331 | struct intel_gt_buffer_pool_node *pool = eb->reloc_pool; |
e61e0f51 | 1332 | struct i915_request *rq; |
7dd4f672 CW |
1333 | struct i915_vma *batch; |
1334 | u32 *cmd; | |
1335 | int err; | |
1336 | ||
c43ce123 | 1337 | if (!pool) { |
8f47c8c3 MA |
1338 | pool = intel_gt_get_buffer_pool(engine->gt, PAGE_SIZE, |
1339 | cache->has_llc ? | |
1340 | I915_MAP_WB : | |
1341 | I915_MAP_WC); | |
c43ce123 ML |
1342 | if (IS_ERR(pool)) |
1343 | return PTR_ERR(pool); | |
1344 | } | |
1345 | eb->reloc_pool = NULL; | |
1346 | ||
1347 | err = i915_gem_object_lock(pool->obj, &eb->ww); | |
1348 | if (err) | |
1349 | goto err_pool; | |
7dd4f672 | 1350 | |
8f47c8c3 | 1351 | cmd = i915_gem_object_pin_map(pool->obj, pool->type); |
b40d7378 CW |
1352 | if (IS_ERR(cmd)) { |
1353 | err = PTR_ERR(cmd); | |
c43ce123 | 1354 | goto err_pool; |
b40d7378 | 1355 | } |
c9398775 | 1356 | intel_gt_buffer_pool_mark_used(pool); |
7dd4f672 | 1357 | |
26ebc511 MA |
1358 | memset32(cmd, 0, pool->obj->base.size / sizeof(u32)); |
1359 | ||
50ae6c61 | 1360 | batch = i915_vma_instance(pool->obj, vma->vm, NULL); |
7dd4f672 CW |
1361 | if (IS_ERR(batch)) { |
1362 | err = PTR_ERR(batch); | |
1363 | goto err_unmap; | |
1364 | } | |
1365 | ||
47b08693 | 1366 | err = i915_vma_pin_ww(batch, &eb->ww, 0, 0, PIN_USER | PIN_NONBLOCK); |
7dd4f672 CW |
1367 | if (err) |
1368 | goto err_unmap; | |
1369 | ||
6f576d62 CW |
1370 | if (engine == eb->context->engine) { |
1371 | rq = i915_request_create(eb->context); | |
1372 | } else { | |
2bf541ff | 1373 | struct intel_context *ce = eb->reloc_context; |
6f576d62 | 1374 | |
2bf541ff ML |
1375 | if (!ce) { |
1376 | ce = intel_context_create(engine); | |
1377 | if (IS_ERR(ce)) { | |
1378 | err = PTR_ERR(ce); | |
1379 | goto err_unpin; | |
1380 | } | |
1381 | ||
1382 | i915_vm_put(ce->vm); | |
1383 | ce->vm = i915_vm_get(eb->context->vm); | |
1384 | eb->reloc_context = ce; | |
6f576d62 CW |
1385 | } |
1386 | ||
47b08693 | 1387 | err = intel_context_pin_ww(ce, &eb->ww); |
2bf541ff ML |
1388 | if (err) |
1389 | goto err_unpin; | |
6f576d62 | 1390 | |
2bf541ff ML |
1391 | rq = i915_request_create(ce); |
1392 | intel_context_unpin(ce); | |
6f576d62 | 1393 | } |
7dd4f672 CW |
1394 | if (IS_ERR(rq)) { |
1395 | err = PTR_ERR(rq); | |
1396 | goto err_unpin; | |
1397 | } | |
1398 | ||
16e87459 | 1399 | err = intel_gt_buffer_pool_mark_active(pool, rq); |
b40d7378 CW |
1400 | if (err) |
1401 | goto err_request; | |
1402 | ||
50ae6c61 ML |
1403 | err = reloc_move_to_gpu(rq, vma); |
1404 | if (err) | |
1405 | goto err_request; | |
1406 | ||
1407 | err = eb->engine->emit_bb_start(rq, | |
1408 | batch->node.start, PAGE_SIZE, | |
8802190f | 1409 | cache->graphics_ver > 5 ? 0 : I915_DISPATCH_SECURE); |
50ae6c61 ML |
1410 | if (err) |
1411 | goto skip_request; | |
1412 | ||
c43ce123 | 1413 | assert_vma_held(batch); |
70d6894d CW |
1414 | err = i915_request_await_object(rq, batch->obj, false); |
1415 | if (err == 0) | |
1416 | err = i915_vma_move_to_active(batch, rq, 0); | |
a5236978 CW |
1417 | if (err) |
1418 | goto skip_request; | |
7dd4f672 CW |
1419 | |
1420 | rq->batch = batch; | |
a5236978 | 1421 | i915_vma_unpin(batch); |
7dd4f672 CW |
1422 | |
1423 | cache->rq = rq; | |
1424 | cache->rq_cmd = cmd; | |
1425 | cache->rq_size = 0; | |
c43ce123 | 1426 | cache->pool = pool; |
7dd4f672 CW |
1427 | |
1428 | /* Return with batch mapping (cmd) still pinned */ | |
c43ce123 | 1429 | return 0; |
7dd4f672 | 1430 | |
a5236978 | 1431 | skip_request: |
36e191f0 | 1432 | i915_request_set_error_once(rq, err); |
7dd4f672 | 1433 | err_request: |
e61e0f51 | 1434 | i915_request_add(rq); |
7dd4f672 CW |
1435 | err_unpin: |
1436 | i915_vma_unpin(batch); | |
1437 | err_unmap: | |
b40d7378 | 1438 | i915_gem_object_unpin_map(pool->obj); |
c43ce123 ML |
1439 | err_pool: |
1440 | eb->reloc_pool = pool; | |
7dd4f672 CW |
1441 | return err; |
1442 | } | |
1443 | ||
e3d29130 CW |
1444 | static bool reloc_can_use_engine(const struct intel_engine_cs *engine) |
1445 | { | |
40e1956e | 1446 | return engine->class != VIDEO_DECODE_CLASS || GRAPHICS_VER(engine->i915) != 6; |
e3d29130 CW |
1447 | } |
1448 | ||
7dd4f672 CW |
1449 | static u32 *reloc_gpu(struct i915_execbuffer *eb, |
1450 | struct i915_vma *vma, | |
1451 | unsigned int len) | |
1452 | { | |
1453 | struct reloc_cache *cache = &eb->reloc_cache; | |
1454 | u32 *cmd; | |
50ae6c61 ML |
1455 | |
1456 | if (cache->rq_size > PAGE_SIZE/sizeof(u32) - (len + 1)) | |
c43ce123 | 1457 | reloc_gpu_flush(eb, cache); |
7dd4f672 CW |
1458 | |
1459 | if (unlikely(!cache->rq)) { | |
50ae6c61 | 1460 | int err; |
6f576d62 CW |
1461 | struct intel_engine_cs *engine = eb->engine; |
1462 | ||
e3d29130 | 1463 | if (!reloc_can_use_engine(engine)) { |
6f576d62 | 1464 | engine = engine->gt->engine_class[COPY_ENGINE_CLASS][0]; |
e3d29130 | 1465 | if (!engine) |
6f576d62 CW |
1466 | return ERR_PTR(-ENODEV); |
1467 | } | |
90cad095 | 1468 | |
50ae6c61 | 1469 | err = __reloc_gpu_alloc(eb, engine, vma, len); |
7dd4f672 CW |
1470 | if (unlikely(err)) |
1471 | return ERR_PTR(err); | |
1472 | } | |
1473 | ||
1474 | cmd = cache->rq_cmd + cache->rq_size; | |
1475 | cache->rq_size += len; | |
1476 | ||
1477 | return cmd; | |
1478 | } | |
1479 | ||
ad5d95e4 DA |
1480 | static inline bool use_reloc_gpu(struct i915_vma *vma) |
1481 | { | |
1482 | if (DBG_FORCE_RELOC == FORCE_GPU_RELOC) | |
1483 | return true; | |
1484 | ||
1485 | if (DBG_FORCE_RELOC) | |
1486 | return false; | |
1487 | ||
d3fae3b3 | 1488 | return !dma_resv_test_signaled(vma->resv, true); |
ad5d95e4 DA |
1489 | } |
1490 | ||
e3d29130 | 1491 | static unsigned long vma_phys_addr(struct i915_vma *vma, u32 offset) |
edf4427b | 1492 | { |
e3d29130 CW |
1493 | struct page *page; |
1494 | unsigned long addr; | |
edf4427b | 1495 | |
e3d29130 | 1496 | GEM_BUG_ON(vma->pages != vma->obj->mm.pages); |
7dd4f672 | 1497 | |
e3d29130 CW |
1498 | page = i915_gem_object_get_page(vma->obj, offset >> PAGE_SHIFT); |
1499 | addr = PFN_PHYS(page_to_pfn(page)); | |
1500 | GEM_BUG_ON(overflows_type(addr, u32)); /* expected dma32 */ | |
7dd4f672 | 1501 | |
e3d29130 CW |
1502 | return addr + offset_in_page(offset); |
1503 | } | |
1504 | ||
166774a2 | 1505 | static int __reloc_entry_gpu(struct i915_execbuffer *eb, |
ad5d95e4 DA |
1506 | struct i915_vma *vma, |
1507 | u64 offset, | |
1508 | u64 target_addr) | |
e3d29130 | 1509 | { |
8802190f | 1510 | const unsigned int ver = eb->reloc_cache.graphics_ver; |
e3d29130 CW |
1511 | unsigned int len; |
1512 | u32 *batch; | |
1513 | u64 addr; | |
1514 | ||
8802190f | 1515 | if (ver >= 8) |
e3d29130 | 1516 | len = offset & 7 ? 8 : 5; |
8802190f | 1517 | else if (ver >= 4) |
e3d29130 CW |
1518 | len = 4; |
1519 | else | |
1520 | len = 3; | |
1521 | ||
1522 | batch = reloc_gpu(eb, vma, len); | |
c43ce123 | 1523 | if (batch == ERR_PTR(-EDEADLK)) |
166774a2 | 1524 | return -EDEADLK; |
c43ce123 | 1525 | else if (IS_ERR(batch)) |
ad5d95e4 | 1526 | return false; |
e3d29130 CW |
1527 | |
1528 | addr = gen8_canonical_addr(vma->node.start + offset); | |
8802190f | 1529 | if (ver >= 8) { |
e3d29130 CW |
1530 | if (offset & 7) { |
1531 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1532 | *batch++ = lower_32_bits(addr); | |
1533 | *batch++ = upper_32_bits(addr); | |
1534 | *batch++ = lower_32_bits(target_addr); | |
1535 | ||
1536 | addr = gen8_canonical_addr(addr + 4); | |
7dd4f672 | 1537 | |
7dd4f672 | 1538 | *batch++ = MI_STORE_DWORD_IMM_GEN4; |
e3d29130 CW |
1539 | *batch++ = lower_32_bits(addr); |
1540 | *batch++ = upper_32_bits(addr); | |
1541 | *batch++ = upper_32_bits(target_addr); | |
7dd4f672 | 1542 | } else { |
e3d29130 CW |
1543 | *batch++ = (MI_STORE_DWORD_IMM_GEN4 | (1 << 21)) + 1; |
1544 | *batch++ = lower_32_bits(addr); | |
1545 | *batch++ = upper_32_bits(addr); | |
1546 | *batch++ = lower_32_bits(target_addr); | |
1547 | *batch++ = upper_32_bits(target_addr); | |
7dd4f672 | 1548 | } |
8802190f | 1549 | } else if (ver >= 6) { |
e3d29130 CW |
1550 | *batch++ = MI_STORE_DWORD_IMM_GEN4; |
1551 | *batch++ = 0; | |
1552 | *batch++ = addr; | |
1553 | *batch++ = target_addr; | |
1554 | } else if (IS_I965G(eb->i915)) { | |
1555 | *batch++ = MI_STORE_DWORD_IMM_GEN4; | |
1556 | *batch++ = 0; | |
1557 | *batch++ = vma_phys_addr(vma, offset); | |
1558 | *batch++ = target_addr; | |
8802190f | 1559 | } else if (ver >= 4) { |
e3d29130 CW |
1560 | *batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT; |
1561 | *batch++ = 0; | |
1562 | *batch++ = addr; | |
1563 | *batch++ = target_addr; | |
8802190f | 1564 | } else if (ver >= 3 && |
e3d29130 CW |
1565 | !(IS_I915G(eb->i915) || IS_I915GM(eb->i915))) { |
1566 | *batch++ = MI_STORE_DWORD_IMM | MI_MEM_VIRTUAL; | |
1567 | *batch++ = addr; | |
1568 | *batch++ = target_addr; | |
1569 | } else { | |
1570 | *batch++ = MI_STORE_DWORD_IMM; | |
1571 | *batch++ = vma_phys_addr(vma, offset); | |
1572 | *batch++ = target_addr; | |
7dd4f672 CW |
1573 | } |
1574 | ||
ad5d95e4 DA |
1575 | return true; |
1576 | } | |
1577 | ||
c43ce123 | 1578 | static int reloc_entry_gpu(struct i915_execbuffer *eb, |
ad5d95e4 DA |
1579 | struct i915_vma *vma, |
1580 | u64 offset, | |
1581 | u64 target_addr) | |
1582 | { | |
1583 | if (eb->reloc_cache.vaddr) | |
1584 | return false; | |
1585 | ||
1586 | if (!use_reloc_gpu(vma)) | |
1587 | return false; | |
1588 | ||
1589 | return __reloc_entry_gpu(eb, vma, offset, target_addr); | |
e3d29130 CW |
1590 | } |
1591 | ||
1592 | static u64 | |
ad5d95e4 | 1593 | relocate_entry(struct i915_vma *vma, |
e3d29130 | 1594 | const struct drm_i915_gem_relocation_entry *reloc, |
ad5d95e4 | 1595 | struct i915_execbuffer *eb, |
e3d29130 CW |
1596 | const struct i915_vma *target) |
1597 | { | |
1598 | u64 target_addr = relocation_target(reloc, target); | |
ad5d95e4 | 1599 | u64 offset = reloc->offset; |
c43ce123 ML |
1600 | int reloc_gpu = reloc_entry_gpu(eb, vma, offset, target_addr); |
1601 | ||
1602 | if (reloc_gpu < 0) | |
1603 | return reloc_gpu; | |
ad5d95e4 | 1604 | |
c43ce123 | 1605 | if (!reloc_gpu) { |
ad5d95e4 DA |
1606 | bool wide = eb->reloc_cache.use_64bit_reloc; |
1607 | void *vaddr; | |
1608 | ||
1609 | repeat: | |
47b08693 | 1610 | vaddr = reloc_vaddr(vma->obj, eb, |
ad5d95e4 DA |
1611 | offset >> PAGE_SHIFT); |
1612 | if (IS_ERR(vaddr)) | |
1613 | return PTR_ERR(vaddr); | |
1614 | ||
1615 | GEM_BUG_ON(!IS_ALIGNED(offset, sizeof(u32))); | |
1616 | clflush_write32(vaddr + offset_in_page(offset), | |
1617 | lower_32_bits(target_addr), | |
1618 | eb->reloc_cache.vaddr); | |
1619 | ||
1620 | if (wide) { | |
1621 | offset += sizeof(u32); | |
1622 | target_addr >>= 32; | |
1623 | wide = false; | |
1624 | goto repeat; | |
1625 | } | |
1626 | } | |
edf4427b | 1627 | |
2889caa9 | 1628 | return target->node.start | UPDATE; |
edf4427b | 1629 | } |
edf4427b | 1630 | |
2889caa9 CW |
1631 | static u64 |
1632 | eb_relocate_entry(struct i915_execbuffer *eb, | |
7d6236bb | 1633 | struct eb_vma *ev, |
2889caa9 | 1634 | const struct drm_i915_gem_relocation_entry *reloc) |
54cf91dc | 1635 | { |
baa89ba3 | 1636 | struct drm_i915_private *i915 = eb->i915; |
7d6236bb | 1637 | struct eb_vma *target; |
2889caa9 | 1638 | int err; |
54cf91dc | 1639 | |
67731b87 | 1640 | /* we've already hold a reference to all valid objects */ |
507d977f CW |
1641 | target = eb_get_vma(eb, reloc->target_handle); |
1642 | if (unlikely(!target)) | |
54cf91dc | 1643 | return -ENOENT; |
e844b990 | 1644 | |
54cf91dc | 1645 | /* Validate that the target is in a valid r/w GPU domain */ |
b8f7ab17 | 1646 | if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) { |
baa89ba3 | 1647 | drm_dbg(&i915->drm, "reloc with multiple write domains: " |
507d977f | 1648 | "target %d offset %d " |
54cf91dc | 1649 | "read %08x write %08x", |
507d977f | 1650 | reloc->target_handle, |
54cf91dc CW |
1651 | (int) reloc->offset, |
1652 | reloc->read_domains, | |
1653 | reloc->write_domain); | |
8b78f0e5 | 1654 | return -EINVAL; |
54cf91dc | 1655 | } |
4ca4a250 DV |
1656 | if (unlikely((reloc->write_domain | reloc->read_domains) |
1657 | & ~I915_GEM_GPU_DOMAINS)) { | |
baa89ba3 | 1658 | drm_dbg(&i915->drm, "reloc with read/write non-GPU domains: " |
507d977f | 1659 | "target %d offset %d " |
54cf91dc | 1660 | "read %08x write %08x", |
507d977f | 1661 | reloc->target_handle, |
54cf91dc CW |
1662 | (int) reloc->offset, |
1663 | reloc->read_domains, | |
1664 | reloc->write_domain); | |
8b78f0e5 | 1665 | return -EINVAL; |
54cf91dc | 1666 | } |
54cf91dc | 1667 | |
2889caa9 | 1668 | if (reloc->write_domain) { |
7d6236bb | 1669 | target->flags |= EXEC_OBJECT_WRITE; |
507d977f | 1670 | |
2889caa9 CW |
1671 | /* |
1672 | * Sandybridge PPGTT errata: We need a global gtt mapping | |
1673 | * for MI and pipe_control writes because the gpu doesn't | |
1674 | * properly redirect them through the ppgtt for non_secure | |
1675 | * batchbuffers. | |
1676 | */ | |
1677 | if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION && | |
40e1956e | 1678 | GRAPHICS_VER(eb->i915) == 6) { |
7d6236bb CW |
1679 | err = i915_vma_bind(target->vma, |
1680 | target->vma->obj->cache_level, | |
2850748e | 1681 | PIN_GLOBAL, NULL); |
ea97c4ca | 1682 | if (err) |
2889caa9 CW |
1683 | return err; |
1684 | } | |
507d977f | 1685 | } |
54cf91dc | 1686 | |
2889caa9 CW |
1687 | /* |
1688 | * If the relocation already has the right value in it, no | |
54cf91dc CW |
1689 | * more work needs to be done. |
1690 | */ | |
ad5d95e4 DA |
1691 | if (!DBG_FORCE_RELOC && |
1692 | gen8_canonical_addr(target->vma->node.start) == reloc->presumed_offset) | |
67731b87 | 1693 | return 0; |
54cf91dc CW |
1694 | |
1695 | /* Check that the relocation address is valid... */ | |
3c94ceee | 1696 | if (unlikely(reloc->offset > |
7d6236bb | 1697 | ev->vma->size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) { |
baa89ba3 | 1698 | drm_dbg(&i915->drm, "Relocation beyond object bounds: " |
507d977f CW |
1699 | "target %d offset %d size %d.\n", |
1700 | reloc->target_handle, | |
1701 | (int)reloc->offset, | |
7d6236bb | 1702 | (int)ev->vma->size); |
8b78f0e5 | 1703 | return -EINVAL; |
54cf91dc | 1704 | } |
b8f7ab17 | 1705 | if (unlikely(reloc->offset & 3)) { |
baa89ba3 | 1706 | drm_dbg(&i915->drm, "Relocation not 4-byte aligned: " |
507d977f CW |
1707 | "target %d offset %d.\n", |
1708 | reloc->target_handle, | |
1709 | (int)reloc->offset); | |
8b78f0e5 | 1710 | return -EINVAL; |
54cf91dc CW |
1711 | } |
1712 | ||
071750e5 CW |
1713 | /* |
1714 | * If we write into the object, we need to force the synchronisation | |
1715 | * barrier, either with an asynchronous clflush or if we executed the | |
1716 | * patching using the GPU (though that should be serialised by the | |
1717 | * timeline). To be completely sure, and since we are required to | |
1718 | * do relocations we are already stalling, disable the user's opt | |
0519bcb1 | 1719 | * out of our synchronisation. |
071750e5 | 1720 | */ |
7d6236bb | 1721 | ev->flags &= ~EXEC_OBJECT_ASYNC; |
071750e5 | 1722 | |
54cf91dc | 1723 | /* and update the user's relocation entry */ |
ad5d95e4 | 1724 | return relocate_entry(ev->vma, reloc, eb, target->vma); |
54cf91dc CW |
1725 | } |
1726 | ||
7d6236bb | 1727 | static int eb_relocate_vma(struct i915_execbuffer *eb, struct eb_vma *ev) |
54cf91dc | 1728 | { |
1d83f442 | 1729 | #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry)) |
2889caa9 | 1730 | struct drm_i915_gem_relocation_entry stack[N_RELOC(512)]; |
7d6236bb | 1731 | const struct drm_i915_gem_exec_object2 *entry = ev->exec; |
e94f7856 CW |
1732 | struct drm_i915_gem_relocation_entry __user *urelocs = |
1733 | u64_to_user_ptr(entry->relocs_ptr); | |
1734 | unsigned long remain = entry->relocation_count; | |
54cf91dc | 1735 | |
e94f7856 | 1736 | if (unlikely(remain > N_RELOC(ULONG_MAX))) |
2889caa9 | 1737 | return -EINVAL; |
ebc0808f | 1738 | |
2889caa9 CW |
1739 | /* |
1740 | * We must check that the entire relocation array is safe | |
1741 | * to read. However, if the array is not writable the user loses | |
1742 | * the updated relocation values. | |
1743 | */ | |
e94f7856 | 1744 | if (unlikely(!access_ok(urelocs, remain * sizeof(*urelocs)))) |
2889caa9 CW |
1745 | return -EFAULT; |
1746 | ||
1747 | do { | |
1748 | struct drm_i915_gem_relocation_entry *r = stack; | |
1749 | unsigned int count = | |
e94f7856 | 1750 | min_t(unsigned long, remain, ARRAY_SIZE(stack)); |
2889caa9 | 1751 | unsigned int copied; |
1d83f442 | 1752 | |
2889caa9 CW |
1753 | /* |
1754 | * This is the fast path and we cannot handle a pagefault | |
ebc0808f CW |
1755 | * whilst holding the struct mutex lest the user pass in the |
1756 | * relocations contained within a mmaped bo. For in such a case | |
1757 | * we, the page fault handler would call i915_gem_fault() and | |
1758 | * we would try to acquire the struct mutex again. Obviously | |
1759 | * this is bad and so lockdep complains vehemently. | |
1760 | */ | |
fd1500fc ML |
1761 | pagefault_disable(); |
1762 | copied = __copy_from_user_inatomic(r, urelocs, count * sizeof(r[0])); | |
1763 | pagefault_enable(); | |
ad5d95e4 DA |
1764 | if (unlikely(copied)) { |
1765 | remain = -EFAULT; | |
1766 | goto out; | |
1767 | } | |
54cf91dc | 1768 | |
2889caa9 | 1769 | remain -= count; |
1d83f442 | 1770 | do { |
7d6236bb | 1771 | u64 offset = eb_relocate_entry(eb, ev, r); |
54cf91dc | 1772 | |
2889caa9 CW |
1773 | if (likely(offset == 0)) { |
1774 | } else if ((s64)offset < 0) { | |
ad5d95e4 DA |
1775 | remain = (int)offset; |
1776 | goto out; | |
2889caa9 CW |
1777 | } else { |
1778 | /* | |
1779 | * Note that reporting an error now | |
1780 | * leaves everything in an inconsistent | |
1781 | * state as we have *already* changed | |
1782 | * the relocation value inside the | |
1783 | * object. As we have not changed the | |
1784 | * reloc.presumed_offset or will not | |
1785 | * change the execobject.offset, on the | |
1786 | * call we may not rewrite the value | |
1787 | * inside the object, leaving it | |
1788 | * dangling and causing a GPU hang. Unless | |
1789 | * userspace dynamically rebuilds the | |
1790 | * relocations on each execbuf rather than | |
1791 | * presume a static tree. | |
1792 | * | |
1793 | * We did previously check if the relocations | |
1794 | * were writable (access_ok), an error now | |
1795 | * would be a strange race with mprotect, | |
1796 | * having already demonstrated that we | |
1797 | * can read from this userspace address. | |
1798 | */ | |
1799 | offset = gen8_canonical_addr(offset & ~UPDATE); | |
97a37c91 CW |
1800 | __put_user(offset, |
1801 | &urelocs[r - stack].presumed_offset); | |
1d83f442 | 1802 | } |
2889caa9 CW |
1803 | } while (r++, --count); |
1804 | urelocs += ARRAY_SIZE(stack); | |
1805 | } while (remain); | |
ad5d95e4 | 1806 | out: |
c43ce123 | 1807 | reloc_cache_reset(&eb->reloc_cache, eb); |
ad5d95e4 | 1808 | return remain; |
54cf91dc CW |
1809 | } |
1810 | ||
fd1500fc ML |
1811 | static int |
1812 | eb_relocate_vma_slow(struct i915_execbuffer *eb, struct eb_vma *ev) | |
54cf91dc | 1813 | { |
fd1500fc ML |
1814 | const struct drm_i915_gem_exec_object2 *entry = ev->exec; |
1815 | struct drm_i915_gem_relocation_entry *relocs = | |
1816 | u64_to_ptr(typeof(*relocs), entry->relocs_ptr); | |
1817 | unsigned int i; | |
003d8b91 CW |
1818 | int err; |
1819 | ||
fd1500fc ML |
1820 | for (i = 0; i < entry->relocation_count; i++) { |
1821 | u64 offset = eb_relocate_entry(eb, ev, &relocs[i]); | |
003d8b91 | 1822 | |
fd1500fc ML |
1823 | if ((s64)offset < 0) { |
1824 | err = (int)offset; | |
1825 | goto err; | |
1826 | } | |
ef398881 | 1827 | } |
fd1500fc ML |
1828 | err = 0; |
1829 | err: | |
c43ce123 | 1830 | reloc_cache_reset(&eb->reloc_cache, eb); |
fd1500fc ML |
1831 | return err; |
1832 | } | |
2889caa9 | 1833 | |
fd1500fc ML |
1834 | static int check_relocations(const struct drm_i915_gem_exec_object2 *entry) |
1835 | { | |
1836 | const char __user *addr, *end; | |
1837 | unsigned long size; | |
1838 | char __maybe_unused c; | |
2889caa9 | 1839 | |
fd1500fc ML |
1840 | size = entry->relocation_count; |
1841 | if (size == 0) | |
1842 | return 0; | |
0e97fbb0 | 1843 | |
fd1500fc ML |
1844 | if (size > N_RELOC(ULONG_MAX)) |
1845 | return -EINVAL; | |
2889caa9 | 1846 | |
fd1500fc ML |
1847 | addr = u64_to_user_ptr(entry->relocs_ptr); |
1848 | size *= sizeof(struct drm_i915_gem_relocation_entry); | |
1849 | if (!access_ok(addr, size)) | |
1850 | return -EFAULT; | |
1851 | ||
1852 | end = addr + size; | |
1853 | for (; addr < end; addr += PAGE_SIZE) { | |
1854 | int err = __get_user(c, addr); | |
1855 | if (err) | |
1856 | return err; | |
1857 | } | |
1858 | return __get_user(c, end - 1); | |
2889caa9 CW |
1859 | } |
1860 | ||
fd1500fc | 1861 | static int eb_copy_relocations(const struct i915_execbuffer *eb) |
2889caa9 | 1862 | { |
fd1500fc | 1863 | struct drm_i915_gem_relocation_entry *relocs; |
2889caa9 CW |
1864 | const unsigned int count = eb->buffer_count; |
1865 | unsigned int i; | |
fd1500fc | 1866 | int err; |
54cf91dc | 1867 | |
2889caa9 | 1868 | for (i = 0; i < count; i++) { |
fd1500fc ML |
1869 | const unsigned int nreloc = eb->exec[i].relocation_count; |
1870 | struct drm_i915_gem_relocation_entry __user *urelocs; | |
1871 | unsigned long size; | |
1872 | unsigned long copied; | |
6951e589 | 1873 | |
fd1500fc ML |
1874 | if (nreloc == 0) |
1875 | continue; | |
6951e589 | 1876 | |
fd1500fc ML |
1877 | err = check_relocations(&eb->exec[i]); |
1878 | if (err) | |
1879 | goto err; | |
6951e589 | 1880 | |
fd1500fc ML |
1881 | urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr); |
1882 | size = nreloc * sizeof(*relocs); | |
6951e589 | 1883 | |
fd1500fc ML |
1884 | relocs = kvmalloc_array(size, 1, GFP_KERNEL); |
1885 | if (!relocs) { | |
1886 | err = -ENOMEM; | |
1887 | goto err; | |
6951e589 | 1888 | } |
fd1500fc ML |
1889 | |
1890 | /* copy_from_user is limited to < 4GiB */ | |
1891 | copied = 0; | |
1892 | do { | |
1893 | unsigned int len = | |
1894 | min_t(u64, BIT_ULL(31), size - copied); | |
1895 | ||
1896 | if (__copy_from_user((char *)relocs + copied, | |
1897 | (char __user *)urelocs + copied, | |
1898 | len)) | |
1899 | goto end; | |
1900 | ||
1901 | copied += len; | |
1902 | } while (copied < size); | |
1903 | ||
1904 | /* | |
1905 | * As we do not update the known relocation offsets after | |
1906 | * relocating (due to the complexities in lock handling), | |
1907 | * we need to mark them as invalid now so that we force the | |
1908 | * relocation processing next time. Just in case the target | |
1909 | * object is evicted and then rebound into its old | |
1910 | * presumed_offset before the next execbuffer - if that | |
1911 | * happened we would make the mistake of assuming that the | |
1912 | * relocations were valid. | |
1913 | */ | |
1914 | if (!user_access_begin(urelocs, size)) | |
1915 | goto end; | |
1916 | ||
1917 | for (copied = 0; copied < nreloc; copied++) | |
1918 | unsafe_put_user(-1, | |
1919 | &urelocs[copied].presumed_offset, | |
1920 | end_user); | |
1921 | user_access_end(); | |
1922 | ||
1923 | eb->exec[i].relocs_ptr = (uintptr_t)relocs; | |
1924 | } | |
1925 | ||
1926 | return 0; | |
1927 | ||
1928 | end_user: | |
1929 | user_access_end(); | |
1930 | end: | |
1931 | kvfree(relocs); | |
1932 | err = -EFAULT; | |
1933 | err: | |
1934 | while (i--) { | |
1935 | relocs = u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr); | |
1936 | if (eb->exec[i].relocation_count) | |
1937 | kvfree(relocs); | |
1938 | } | |
1939 | return err; | |
1940 | } | |
1941 | ||
1942 | static int eb_prefault_relocations(const struct i915_execbuffer *eb) | |
1943 | { | |
1944 | const unsigned int count = eb->buffer_count; | |
1945 | unsigned int i; | |
1946 | ||
1947 | for (i = 0; i < count; i++) { | |
1948 | int err; | |
1949 | ||
1950 | err = check_relocations(&eb->exec[i]); | |
1951 | if (err) | |
1952 | return err; | |
1953 | } | |
1954 | ||
1955 | return 0; | |
1956 | } | |
1957 | ||
ed29c269 ML |
1958 | static int eb_reinit_userptr(struct i915_execbuffer *eb) |
1959 | { | |
1960 | const unsigned int count = eb->buffer_count; | |
1961 | unsigned int i; | |
1962 | int ret; | |
1963 | ||
1964 | if (likely(!(eb->args->flags & __EXEC_USERPTR_USED))) | |
1965 | return 0; | |
1966 | ||
1967 | for (i = 0; i < count; i++) { | |
1968 | struct eb_vma *ev = &eb->vma[i]; | |
1969 | ||
1970 | if (!i915_gem_object_is_userptr(ev->vma->obj)) | |
1971 | continue; | |
1972 | ||
1973 | ret = i915_gem_object_userptr_submit_init(ev->vma->obj); | |
1974 | if (ret) | |
1975 | return ret; | |
1976 | ||
1977 | ev->flags |= __EXEC_OBJECT_USERPTR_INIT; | |
1978 | } | |
1979 | ||
1980 | return 0; | |
1981 | } | |
1982 | ||
2bf541ff ML |
1983 | static noinline int eb_relocate_parse_slow(struct i915_execbuffer *eb, |
1984 | struct i915_request *rq) | |
fd1500fc ML |
1985 | { |
1986 | bool have_copy = false; | |
1987 | struct eb_vma *ev; | |
1988 | int err = 0; | |
1989 | ||
1990 | repeat: | |
1991 | if (signal_pending(current)) { | |
1992 | err = -ERESTARTSYS; | |
1993 | goto out; | |
6951e589 | 1994 | } |
fd1500fc | 1995 | |
c43ce123 | 1996 | /* We may process another execbuffer during the unlock... */ |
b4b9731b | 1997 | eb_release_vmas(eb, false); |
c43ce123 ML |
1998 | i915_gem_ww_ctx_fini(&eb->ww); |
1999 | ||
2bf541ff ML |
2000 | if (rq) { |
2001 | /* nonblocking is always false */ | |
2002 | if (i915_request_wait(rq, I915_WAIT_INTERRUPTIBLE, | |
2003 | MAX_SCHEDULE_TIMEOUT) < 0) { | |
2004 | i915_request_put(rq); | |
2005 | rq = NULL; | |
2006 | ||
2007 | err = -EINTR; | |
2008 | goto err_relock; | |
2009 | } | |
2010 | ||
2011 | i915_request_put(rq); | |
2012 | rq = NULL; | |
2013 | } | |
2014 | ||
fd1500fc ML |
2015 | /* |
2016 | * We take 3 passes through the slowpatch. | |
2017 | * | |
2018 | * 1 - we try to just prefault all the user relocation entries and | |
2019 | * then attempt to reuse the atomic pagefault disabled fast path again. | |
2020 | * | |
2021 | * 2 - we copy the user entries to a local buffer here outside of the | |
2022 | * local and allow ourselves to wait upon any rendering before | |
2023 | * relocations | |
2024 | * | |
2025 | * 3 - we already have a local copy of the relocation entries, but | |
2026 | * were interrupted (EAGAIN) whilst waiting for the objects, try again. | |
2027 | */ | |
2028 | if (!err) { | |
2029 | err = eb_prefault_relocations(eb); | |
2030 | } else if (!have_copy) { | |
2031 | err = eb_copy_relocations(eb); | |
2032 | have_copy = err == 0; | |
2033 | } else { | |
2034 | cond_resched(); | |
2035 | err = 0; | |
2036 | } | |
2037 | ||
2bf541ff | 2038 | if (!err) |
ed29c269 | 2039 | err = eb_reinit_userptr(eb); |
fd1500fc | 2040 | |
2bf541ff | 2041 | err_relock: |
c43ce123 | 2042 | i915_gem_ww_ctx_init(&eb->ww, true); |
fd1500fc ML |
2043 | if (err) |
2044 | goto out; | |
2045 | ||
c43ce123 ML |
2046 | /* reacquire the objects */ |
2047 | repeat_validate: | |
2bf541ff ML |
2048 | rq = eb_pin_engine(eb, false); |
2049 | if (IS_ERR(rq)) { | |
2050 | err = PTR_ERR(rq); | |
47b08693 | 2051 | rq = NULL; |
2bf541ff ML |
2052 | goto err; |
2053 | } | |
2054 | ||
2055 | /* We didn't throttle, should be NULL */ | |
2056 | GEM_WARN_ON(rq); | |
2057 | ||
c43ce123 | 2058 | err = eb_validate_vmas(eb); |
fd1500fc | 2059 | if (err) |
c43ce123 ML |
2060 | goto err; |
2061 | ||
2062 | GEM_BUG_ON(!eb->batch); | |
fd1500fc ML |
2063 | |
2064 | list_for_each_entry(ev, &eb->relocs, reloc_link) { | |
2065 | if (!have_copy) { | |
fd1500fc | 2066 | err = eb_relocate_vma(eb, ev); |
fd1500fc ML |
2067 | if (err) |
2068 | break; | |
2069 | } else { | |
2070 | err = eb_relocate_vma_slow(eb, ev); | |
2071 | if (err) | |
2072 | break; | |
2073 | } | |
2074 | } | |
2075 | ||
c43ce123 ML |
2076 | if (err == -EDEADLK) |
2077 | goto err; | |
2078 | ||
fd1500fc ML |
2079 | if (err && !have_copy) |
2080 | goto repeat; | |
2081 | ||
2082 | if (err) | |
2083 | goto err; | |
2084 | ||
8e4ba491 ML |
2085 | /* as last step, parse the command buffer */ |
2086 | err = eb_parse(eb); | |
2087 | if (err) | |
2088 | goto err; | |
2089 | ||
fd1500fc ML |
2090 | /* |
2091 | * Leave the user relocations as are, this is the painfully slow path, | |
2092 | * and we want to avoid the complication of dropping the lock whilst | |
2093 | * having buffers reserved in the aperture and so causing spurious | |
2094 | * ENOSPC for random operations. | |
2095 | */ | |
2096 | ||
2097 | err: | |
c43ce123 | 2098 | if (err == -EDEADLK) { |
b4b9731b | 2099 | eb_release_vmas(eb, false); |
c43ce123 ML |
2100 | err = i915_gem_ww_ctx_backoff(&eb->ww); |
2101 | if (!err) | |
2102 | goto repeat_validate; | |
2103 | } | |
2104 | ||
fd1500fc ML |
2105 | if (err == -EAGAIN) |
2106 | goto repeat; | |
2107 | ||
2108 | out: | |
2109 | if (have_copy) { | |
2110 | const unsigned int count = eb->buffer_count; | |
2111 | unsigned int i; | |
2112 | ||
2113 | for (i = 0; i < count; i++) { | |
2114 | const struct drm_i915_gem_exec_object2 *entry = | |
2115 | &eb->exec[i]; | |
2116 | struct drm_i915_gem_relocation_entry *relocs; | |
2117 | ||
2118 | if (!entry->relocation_count) | |
2119 | continue; | |
2120 | ||
2121 | relocs = u64_to_ptr(typeof(*relocs), entry->relocs_ptr); | |
2122 | kvfree(relocs); | |
2123 | } | |
2124 | } | |
2125 | ||
2bf541ff ML |
2126 | if (rq) |
2127 | i915_request_put(rq); | |
2128 | ||
fd1500fc ML |
2129 | return err; |
2130 | } | |
2131 | ||
8e4ba491 | 2132 | static int eb_relocate_parse(struct i915_execbuffer *eb) |
54cf91dc | 2133 | { |
003d8b91 | 2134 | int err; |
2bf541ff ML |
2135 | struct i915_request *rq = NULL; |
2136 | bool throttle = true; | |
003d8b91 | 2137 | |
c43ce123 | 2138 | retry: |
2bf541ff ML |
2139 | rq = eb_pin_engine(eb, throttle); |
2140 | if (IS_ERR(rq)) { | |
2141 | err = PTR_ERR(rq); | |
2142 | rq = NULL; | |
2143 | if (err != -EDEADLK) | |
2144 | return err; | |
2145 | ||
2146 | goto err; | |
2147 | } | |
2148 | ||
2149 | if (rq) { | |
2150 | bool nonblock = eb->file->filp->f_flags & O_NONBLOCK; | |
2151 | ||
2152 | /* Need to drop all locks now for throttling, take slowpath */ | |
2153 | err = i915_request_wait(rq, I915_WAIT_INTERRUPTIBLE, 0); | |
2154 | if (err == -ETIME) { | |
2155 | if (nonblock) { | |
2156 | err = -EWOULDBLOCK; | |
2157 | i915_request_put(rq); | |
2158 | goto err; | |
2159 | } | |
2160 | goto slow; | |
2161 | } | |
2162 | i915_request_put(rq); | |
2163 | rq = NULL; | |
2164 | } | |
2165 | ||
2166 | /* only throttle once, even if we didn't need to throttle */ | |
2167 | throttle = false; | |
2168 | ||
c43ce123 ML |
2169 | err = eb_validate_vmas(eb); |
2170 | if (err == -EAGAIN) | |
2171 | goto slow; | |
2172 | else if (err) | |
2173 | goto err; | |
2889caa9 CW |
2174 | |
2175 | /* The objects are in their final locations, apply the relocations. */ | |
2176 | if (eb->args->flags & __EXEC_HAS_RELOC) { | |
7d6236bb | 2177 | struct eb_vma *ev; |
2889caa9 | 2178 | |
7d6236bb | 2179 | list_for_each_entry(ev, &eb->relocs, reloc_link) { |
7dc8f114 CW |
2180 | err = eb_relocate_vma(eb, ev); |
2181 | if (err) | |
fd1500fc | 2182 | break; |
2889caa9 | 2183 | } |
fd1500fc | 2184 | |
c43ce123 ML |
2185 | if (err == -EDEADLK) |
2186 | goto err; | |
2187 | else if (err) | |
2188 | goto slow; | |
2189 | } | |
2190 | ||
2191 | if (!err) | |
2192 | err = eb_parse(eb); | |
2193 | ||
2194 | err: | |
2195 | if (err == -EDEADLK) { | |
b4b9731b | 2196 | eb_release_vmas(eb, false); |
c43ce123 ML |
2197 | err = i915_gem_ww_ctx_backoff(&eb->ww); |
2198 | if (!err) | |
2199 | goto retry; | |
2889caa9 CW |
2200 | } |
2201 | ||
c43ce123 ML |
2202 | return err; |
2203 | ||
2204 | slow: | |
2bf541ff | 2205 | err = eb_relocate_parse_slow(eb, rq); |
c43ce123 ML |
2206 | if (err) |
2207 | /* | |
2208 | * If the user expects the execobject.offset and | |
2209 | * reloc.presumed_offset to be an exact match, | |
2210 | * as for using NO_RELOC, then we cannot update | |
2211 | * the execobject.offset until we have completed | |
2212 | * relocation. | |
2213 | */ | |
2214 | eb->args->flags &= ~__EXEC_HAS_RELOC; | |
2215 | ||
2216 | return err; | |
2889caa9 CW |
2217 | } |
2218 | ||
2889caa9 CW |
2219 | static int eb_move_to_gpu(struct i915_execbuffer *eb) |
2220 | { | |
2221 | const unsigned int count = eb->buffer_count; | |
c43ce123 | 2222 | unsigned int i = count; |
6951e589 | 2223 | int err = 0; |
6951e589 CW |
2224 | |
2225 | while (i--) { | |
7d6236bb CW |
2226 | struct eb_vma *ev = &eb->vma[i]; |
2227 | struct i915_vma *vma = ev->vma; | |
2228 | unsigned int flags = ev->flags; | |
27173f1f | 2229 | struct drm_i915_gem_object *obj = vma->obj; |
03ade511 | 2230 | |
6951e589 CW |
2231 | assert_vma_held(vma); |
2232 | ||
c7c6e46f | 2233 | if (flags & EXEC_OBJECT_CAPTURE) { |
e61e0f51 | 2234 | struct i915_capture_list *capture; |
b0fd47ad CW |
2235 | |
2236 | capture = kmalloc(sizeof(*capture), GFP_KERNEL); | |
6951e589 CW |
2237 | if (capture) { |
2238 | capture->next = eb->request->capture_list; | |
2239 | capture->vma = vma; | |
2240 | eb->request->capture_list = capture; | |
2241 | } | |
b0fd47ad CW |
2242 | } |
2243 | ||
b8f55be6 CW |
2244 | /* |
2245 | * If the GPU is not _reading_ through the CPU cache, we need | |
2246 | * to make sure that any writes (both previous GPU writes from | |
2247 | * before a change in snooping levels and normal CPU writes) | |
2248 | * caught in that cache are flushed to main memory. | |
2249 | * | |
2250 | * We want to say | |
2251 | * obj->cache_dirty && | |
2252 | * !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ) | |
2253 | * but gcc's optimiser doesn't handle that as well and emits | |
2254 | * two jumps instead of one. Maybe one day... | |
2255 | */ | |
2256 | if (unlikely(obj->cache_dirty & ~obj->cache_coherent)) { | |
0f46daa1 | 2257 | if (i915_gem_clflush_object(obj, 0)) |
c7c6e46f | 2258 | flags &= ~EXEC_OBJECT_ASYNC; |
0f46daa1 CW |
2259 | } |
2260 | ||
6951e589 CW |
2261 | if (err == 0 && !(flags & EXEC_OBJECT_ASYNC)) { |
2262 | err = i915_request_await_object | |
2263 | (eb->request, obj, flags & EXEC_OBJECT_WRITE); | |
2264 | } | |
2889caa9 | 2265 | |
6951e589 | 2266 | if (err == 0) |
bfaae47d ML |
2267 | err = i915_vma_move_to_active(vma, eb->request, |
2268 | flags | __EXEC_OBJECT_NO_RESERVE); | |
c59a333f | 2269 | } |
0f1dd022 | 2270 | |
ed29c269 ML |
2271 | #ifdef CONFIG_MMU_NOTIFIER |
2272 | if (!err && (eb->args->flags & __EXEC_USERPTR_USED)) { | |
b4b9731b | 2273 | read_lock(&eb->i915->mm.notifier_lock); |
ed29c269 ML |
2274 | |
2275 | /* | |
2276 | * count is always at least 1, otherwise __EXEC_USERPTR_USED | |
2277 | * could not have been set | |
2278 | */ | |
2279 | for (i = 0; i < count; i++) { | |
2280 | struct eb_vma *ev = &eb->vma[i]; | |
2281 | struct drm_i915_gem_object *obj = ev->vma->obj; | |
2282 | ||
2283 | if (!i915_gem_object_is_userptr(obj)) | |
2284 | continue; | |
2285 | ||
2286 | err = i915_gem_object_userptr_submit_done(obj); | |
2287 | if (err) | |
2288 | break; | |
2289 | } | |
2290 | ||
b4b9731b | 2291 | read_unlock(&eb->i915->mm.notifier_lock); |
ed29c269 ML |
2292 | } |
2293 | #endif | |
2294 | ||
6951e589 CW |
2295 | if (unlikely(err)) |
2296 | goto err_skip; | |
2297 | ||
dcd79934 | 2298 | /* Unconditionally flush any chipset caches (for streaming writes). */ |
baea429d | 2299 | intel_gt_chipset_flush(eb->engine->gt); |
2113184c | 2300 | return 0; |
6951e589 CW |
2301 | |
2302 | err_skip: | |
36e191f0 | 2303 | i915_request_set_error_once(eb->request, err); |
6951e589 | 2304 | return err; |
54cf91dc CW |
2305 | } |
2306 | ||
00aff3f6 | 2307 | static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec) |
54cf91dc | 2308 | { |
650bc635 | 2309 | if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS) |
00aff3f6 | 2310 | return -EINVAL; |
ed5982e6 | 2311 | |
2f5945bc | 2312 | /* Kernel clipping was a DRI1 misfeature */ |
cda9edd0 LL |
2313 | if (!(exec->flags & (I915_EXEC_FENCE_ARRAY | |
2314 | I915_EXEC_USE_EXTENSIONS))) { | |
cf6e7bac | 2315 | if (exec->num_cliprects || exec->cliprects_ptr) |
00aff3f6 | 2316 | return -EINVAL; |
cf6e7bac | 2317 | } |
2f5945bc CW |
2318 | |
2319 | if (exec->DR4 == 0xffffffff) { | |
2320 | DRM_DEBUG("UXA submitting garbage DR4, fixing up\n"); | |
2321 | exec->DR4 = 0; | |
2322 | } | |
2323 | if (exec->DR1 || exec->DR4) | |
00aff3f6 | 2324 | return -EINVAL; |
2f5945bc CW |
2325 | |
2326 | if ((exec->batch_start_offset | exec->batch_len) & 0x7) | |
00aff3f6 | 2327 | return -EINVAL; |
2f5945bc | 2328 | |
00aff3f6 | 2329 | return 0; |
54cf91dc CW |
2330 | } |
2331 | ||
e61e0f51 | 2332 | static int i915_reset_gen7_sol_offsets(struct i915_request *rq) |
ae662d31 | 2333 | { |
73dec95e TU |
2334 | u32 *cs; |
2335 | int i; | |
ae662d31 | 2336 | |
40e1956e | 2337 | if (GRAPHICS_VER(rq->engine->i915) != 7 || rq->engine->id != RCS0) { |
5a833995 | 2338 | drm_dbg(&rq->engine->i915->drm, "sol reset is gen7/rcs only\n"); |
9d662da8 DV |
2339 | return -EINVAL; |
2340 | } | |
ae662d31 | 2341 | |
e61e0f51 | 2342 | cs = intel_ring_begin(rq, 4 * 2 + 2); |
73dec95e TU |
2343 | if (IS_ERR(cs)) |
2344 | return PTR_ERR(cs); | |
ae662d31 | 2345 | |
2889caa9 | 2346 | *cs++ = MI_LOAD_REGISTER_IMM(4); |
ae662d31 | 2347 | for (i = 0; i < 4; i++) { |
73dec95e TU |
2348 | *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i)); |
2349 | *cs++ = 0; | |
ae662d31 | 2350 | } |
2889caa9 | 2351 | *cs++ = MI_NOOP; |
e61e0f51 | 2352 | intel_ring_advance(rq, cs); |
ae662d31 EA |
2353 | |
2354 | return 0; | |
2355 | } | |
2356 | ||
4f7af194 | 2357 | static struct i915_vma * |
47b08693 ML |
2358 | shadow_batch_pin(struct i915_execbuffer *eb, |
2359 | struct drm_i915_gem_object *obj, | |
32d94048 CW |
2360 | struct i915_address_space *vm, |
2361 | unsigned int flags) | |
4f7af194 | 2362 | { |
b291ce0a | 2363 | struct i915_vma *vma; |
b291ce0a | 2364 | int err; |
4f7af194 | 2365 | |
b291ce0a CW |
2366 | vma = i915_vma_instance(obj, vm, NULL); |
2367 | if (IS_ERR(vma)) | |
2368 | return vma; | |
2369 | ||
47b08693 | 2370 | err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, flags); |
b291ce0a CW |
2371 | if (err) |
2372 | return ERR_PTR(err); | |
2373 | ||
2374 | return vma; | |
4f7af194 JB |
2375 | } |
2376 | ||
686c7c35 CW |
2377 | struct eb_parse_work { |
2378 | struct dma_fence_work base; | |
2379 | struct intel_engine_cs *engine; | |
2380 | struct i915_vma *batch; | |
2381 | struct i915_vma *shadow; | |
2382 | struct i915_vma *trampoline; | |
c60b93cd CW |
2383 | unsigned long batch_offset; |
2384 | unsigned long batch_length; | |
0edbb9ba ML |
2385 | unsigned long *jump_whitelist; |
2386 | const void *batch_map; | |
2387 | void *shadow_map; | |
686c7c35 CW |
2388 | }; |
2389 | ||
2390 | static int __eb_parse(struct dma_fence_work *work) | |
2391 | { | |
2392 | struct eb_parse_work *pw = container_of(work, typeof(*pw), base); | |
0edbb9ba ML |
2393 | int ret; |
2394 | bool cookie; | |
2395 | ||
2396 | cookie = dma_fence_begin_signalling(); | |
2397 | ret = intel_engine_cmd_parser(pw->engine, | |
2398 | pw->batch, | |
2399 | pw->batch_offset, | |
2400 | pw->batch_length, | |
2401 | pw->shadow, | |
2402 | pw->jump_whitelist, | |
2403 | pw->shadow_map, | |
2404 | pw->batch_map); | |
2405 | dma_fence_end_signalling(cookie); | |
2406 | ||
2407 | return ret; | |
686c7c35 CW |
2408 | } |
2409 | ||
36c8e356 CW |
2410 | static void __eb_parse_release(struct dma_fence_work *work) |
2411 | { | |
2412 | struct eb_parse_work *pw = container_of(work, typeof(*pw), base); | |
2413 | ||
0edbb9ba ML |
2414 | if (!IS_ERR_OR_NULL(pw->jump_whitelist)) |
2415 | kfree(pw->jump_whitelist); | |
2416 | ||
2417 | if (pw->batch_map) | |
2418 | i915_gem_object_unpin_map(pw->batch->obj); | |
2419 | else | |
2420 | i915_gem_object_unpin_pages(pw->batch->obj); | |
2421 | ||
2422 | i915_gem_object_unpin_map(pw->shadow->obj); | |
2423 | ||
36c8e356 CW |
2424 | if (pw->trampoline) |
2425 | i915_active_release(&pw->trampoline->active); | |
2426 | i915_active_release(&pw->shadow->active); | |
2427 | i915_active_release(&pw->batch->active); | |
2428 | } | |
2429 | ||
686c7c35 CW |
2430 | static const struct dma_fence_work_ops eb_parse_ops = { |
2431 | .name = "eb_parse", | |
2432 | .work = __eb_parse, | |
36c8e356 | 2433 | .release = __eb_parse_release, |
686c7c35 CW |
2434 | }; |
2435 | ||
57a78ca4 CW |
2436 | static inline int |
2437 | __parser_mark_active(struct i915_vma *vma, | |
2438 | struct intel_timeline *tl, | |
2439 | struct dma_fence *fence) | |
2440 | { | |
2441 | struct intel_gt_buffer_pool_node *node = vma->private; | |
2442 | ||
5d934137 | 2443 | return i915_active_ref(&node->active, tl->fence_context, fence); |
57a78ca4 CW |
2444 | } |
2445 | ||
2446 | static int | |
2447 | parser_mark_active(struct eb_parse_work *pw, struct intel_timeline *tl) | |
2448 | { | |
2449 | int err; | |
2450 | ||
2451 | mutex_lock(&tl->mutex); | |
2452 | ||
2453 | err = __parser_mark_active(pw->shadow, tl, &pw->base.dma); | |
2454 | if (err) | |
2455 | goto unlock; | |
2456 | ||
2457 | if (pw->trampoline) { | |
2458 | err = __parser_mark_active(pw->trampoline, tl, &pw->base.dma); | |
2459 | if (err) | |
2460 | goto unlock; | |
2461 | } | |
2462 | ||
2463 | unlock: | |
2464 | mutex_unlock(&tl->mutex); | |
2465 | return err; | |
2466 | } | |
2467 | ||
686c7c35 CW |
2468 | static int eb_parse_pipeline(struct i915_execbuffer *eb, |
2469 | struct i915_vma *shadow, | |
2470 | struct i915_vma *trampoline) | |
2471 | { | |
2472 | struct eb_parse_work *pw; | |
0edbb9ba ML |
2473 | struct drm_i915_gem_object *batch = eb->batch->vma->obj; |
2474 | bool needs_clflush; | |
686c7c35 CW |
2475 | int err; |
2476 | ||
c60b93cd CW |
2477 | GEM_BUG_ON(overflows_type(eb->batch_start_offset, pw->batch_offset)); |
2478 | GEM_BUG_ON(overflows_type(eb->batch_len, pw->batch_length)); | |
2479 | ||
686c7c35 CW |
2480 | pw = kzalloc(sizeof(*pw), GFP_KERNEL); |
2481 | if (!pw) | |
2482 | return -ENOMEM; | |
2483 | ||
7d6236bb | 2484 | err = i915_active_acquire(&eb->batch->vma->active); |
36c8e356 CW |
2485 | if (err) |
2486 | goto err_free; | |
2487 | ||
2488 | err = i915_active_acquire(&shadow->active); | |
2489 | if (err) | |
2490 | goto err_batch; | |
2491 | ||
2492 | if (trampoline) { | |
2493 | err = i915_active_acquire(&trampoline->active); | |
2494 | if (err) | |
2495 | goto err_shadow; | |
2496 | } | |
2497 | ||
0edbb9ba ML |
2498 | pw->shadow_map = i915_gem_object_pin_map(shadow->obj, I915_MAP_WB); |
2499 | if (IS_ERR(pw->shadow_map)) { | |
2500 | err = PTR_ERR(pw->shadow_map); | |
2501 | goto err_trampoline; | |
2502 | } | |
2503 | ||
2504 | needs_clflush = | |
2505 | !(batch->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ); | |
2506 | ||
2507 | pw->batch_map = ERR_PTR(-ENODEV); | |
2508 | if (needs_clflush && i915_has_memcpy_from_wc()) | |
2509 | pw->batch_map = i915_gem_object_pin_map(batch, I915_MAP_WC); | |
2510 | ||
2511 | if (IS_ERR(pw->batch_map)) { | |
2512 | err = i915_gem_object_pin_pages(batch); | |
2513 | if (err) | |
2514 | goto err_unmap_shadow; | |
2515 | pw->batch_map = NULL; | |
2516 | } | |
2517 | ||
2518 | pw->jump_whitelist = | |
2519 | intel_engine_cmd_parser_alloc_jump_whitelist(eb->batch_len, | |
2520 | trampoline); | |
2521 | if (IS_ERR(pw->jump_whitelist)) { | |
2522 | err = PTR_ERR(pw->jump_whitelist); | |
2523 | goto err_unmap_batch; | |
2524 | } | |
2525 | ||
686c7c35 CW |
2526 | dma_fence_work_init(&pw->base, &eb_parse_ops); |
2527 | ||
2528 | pw->engine = eb->engine; | |
7d6236bb | 2529 | pw->batch = eb->batch->vma; |
686c7c35 CW |
2530 | pw->batch_offset = eb->batch_start_offset; |
2531 | pw->batch_length = eb->batch_len; | |
2532 | pw->shadow = shadow; | |
2533 | pw->trampoline = trampoline; | |
2534 | ||
57a78ca4 CW |
2535 | /* Mark active refs early for this worker, in case we get interrupted */ |
2536 | err = parser_mark_active(pw, eb->context->timeline); | |
2537 | if (err) | |
2538 | goto err_commit; | |
2539 | ||
686c7c35 CW |
2540 | err = dma_resv_reserve_shared(pw->batch->resv, 1); |
2541 | if (err) | |
c43ce123 | 2542 | goto err_commit; |
686c7c35 | 2543 | |
bfaae47d ML |
2544 | err = dma_resv_reserve_shared(shadow->resv, 1); |
2545 | if (err) | |
2546 | goto err_commit; | |
2547 | ||
686c7c35 CW |
2548 | /* Wait for all writes (and relocs) into the batch to complete */ |
2549 | err = i915_sw_fence_await_reservation(&pw->base.chain, | |
2550 | pw->batch->resv, NULL, false, | |
2551 | 0, I915_FENCE_GFP); | |
2552 | if (err < 0) | |
c43ce123 | 2553 | goto err_commit; |
686c7c35 CW |
2554 | |
2555 | /* Keep the batch alive and unwritten as we parse */ | |
2556 | dma_resv_add_shared_fence(pw->batch->resv, &pw->base.dma); | |
2557 | ||
686c7c35 | 2558 | /* Force execution to wait for completion of the parser */ |
686c7c35 | 2559 | dma_resv_add_excl_fence(shadow->resv, &pw->base.dma); |
686c7c35 | 2560 | |
92581f9f | 2561 | dma_fence_work_commit_imm(&pw->base); |
686c7c35 CW |
2562 | return 0; |
2563 | ||
57a78ca4 CW |
2564 | err_commit: |
2565 | i915_sw_fence_set_error_once(&pw->base.chain, err); | |
2566 | dma_fence_work_commit_imm(&pw->base); | |
2567 | return err; | |
2568 | ||
0edbb9ba ML |
2569 | err_unmap_batch: |
2570 | if (pw->batch_map) | |
2571 | i915_gem_object_unpin_map(batch); | |
2572 | else | |
2573 | i915_gem_object_unpin_pages(batch); | |
2574 | err_unmap_shadow: | |
2575 | i915_gem_object_unpin_map(shadow->obj); | |
2576 | err_trampoline: | |
2577 | if (trampoline) | |
2578 | i915_active_release(&trampoline->active); | |
36c8e356 CW |
2579 | err_shadow: |
2580 | i915_active_release(&shadow->active); | |
2581 | err_batch: | |
7d6236bb | 2582 | i915_active_release(&eb->batch->vma->active); |
36c8e356 | 2583 | err_free: |
686c7c35 CW |
2584 | kfree(pw); |
2585 | return err; | |
2586 | } | |
2587 | ||
47b08693 ML |
2588 | static struct i915_vma *eb_dispatch_secure(struct i915_execbuffer *eb, struct i915_vma *vma) |
2589 | { | |
2590 | /* | |
2591 | * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure | |
2592 | * batch" bit. Hence we need to pin secure batches into the global gtt. | |
2593 | * hsw should have this fixed, but bdw mucks it up again. */ | |
2594 | if (eb->batch_flags & I915_DISPATCH_SECURE) | |
2595 | return i915_gem_object_ggtt_pin_ww(vma->obj, &eb->ww, NULL, 0, 0, 0); | |
2596 | ||
2597 | return NULL; | |
2598 | } | |
2599 | ||
51696691 | 2600 | static int eb_parse(struct i915_execbuffer *eb) |
71745376 | 2601 | { |
baa89ba3 | 2602 | struct drm_i915_private *i915 = eb->i915; |
c43ce123 | 2603 | struct intel_gt_buffer_pool_node *pool = eb->batch_pool; |
47b08693 | 2604 | struct i915_vma *shadow, *trampoline, *batch; |
d5e87821 | 2605 | unsigned long len; |
2889caa9 | 2606 | int err; |
71745376 | 2607 | |
47b08693 ML |
2608 | if (!eb_use_cmdparser(eb)) { |
2609 | batch = eb_dispatch_secure(eb, eb->batch->vma); | |
2610 | if (IS_ERR(batch)) | |
2611 | return PTR_ERR(batch); | |
2612 | ||
2613 | goto secure_batch; | |
2614 | } | |
51696691 | 2615 | |
32d94048 CW |
2616 | len = eb->batch_len; |
2617 | if (!CMDPARSER_USES_GGTT(eb->i915)) { | |
2618 | /* | |
2619 | * ppGTT backed shadow buffers must be mapped RO, to prevent | |
2620 | * post-scan tampering | |
2621 | */ | |
2622 | if (!eb->context->vm->has_read_only) { | |
baa89ba3 WK |
2623 | drm_dbg(&i915->drm, |
2624 | "Cannot prevent post-scan tampering without RO capable vm\n"); | |
32d94048 CW |
2625 | return -EINVAL; |
2626 | } | |
2627 | } else { | |
2628 | len += I915_CMD_PARSER_TRAMPOLINE_SIZE; | |
2629 | } | |
d5e87821 CW |
2630 | if (unlikely(len < eb->batch_len)) /* last paranoid check of overflow */ |
2631 | return -EINVAL; | |
32d94048 | 2632 | |
c43ce123 | 2633 | if (!pool) { |
8f47c8c3 MA |
2634 | pool = intel_gt_get_buffer_pool(eb->engine->gt, len, |
2635 | I915_MAP_WB); | |
c43ce123 ML |
2636 | if (IS_ERR(pool)) |
2637 | return PTR_ERR(pool); | |
2638 | eb->batch_pool = pool; | |
2639 | } | |
71745376 | 2640 | |
c43ce123 ML |
2641 | err = i915_gem_object_lock(pool->obj, &eb->ww); |
2642 | if (err) | |
2643 | goto err; | |
71745376 | 2644 | |
47b08693 | 2645 | shadow = shadow_batch_pin(eb, pool->obj, eb->context->vm, PIN_USER); |
32d94048 CW |
2646 | if (IS_ERR(shadow)) { |
2647 | err = PTR_ERR(shadow); | |
f8c08d8f | 2648 | goto err; |
51696691 | 2649 | } |
c9398775 | 2650 | intel_gt_buffer_pool_mark_used(pool); |
32d94048 | 2651 | i915_gem_object_set_readonly(shadow->obj); |
57a78ca4 | 2652 | shadow->private = pool; |
32d94048 CW |
2653 | |
2654 | trampoline = NULL; | |
2655 | if (CMDPARSER_USES_GGTT(eb->i915)) { | |
2656 | trampoline = shadow; | |
2657 | ||
47b08693 | 2658 | shadow = shadow_batch_pin(eb, pool->obj, |
32d94048 CW |
2659 | &eb->engine->gt->ggtt->vm, |
2660 | PIN_GLOBAL); | |
2661 | if (IS_ERR(shadow)) { | |
2662 | err = PTR_ERR(shadow); | |
2663 | shadow = trampoline; | |
2664 | goto err_shadow; | |
2665 | } | |
57a78ca4 | 2666 | shadow->private = pool; |
32d94048 CW |
2667 | |
2668 | eb->batch_flags |= I915_DISPATCH_SECURE; | |
2669 | } | |
f8c08d8f | 2670 | |
47b08693 ML |
2671 | batch = eb_dispatch_secure(eb, shadow); |
2672 | if (IS_ERR(batch)) { | |
2673 | err = PTR_ERR(batch); | |
2674 | goto err_trampoline; | |
2675 | } | |
2676 | ||
686c7c35 | 2677 | err = eb_parse_pipeline(eb, shadow, trampoline); |
32d94048 | 2678 | if (err) |
47b08693 | 2679 | goto err_unpin_batch; |
71745376 | 2680 | |
7d6236bb | 2681 | eb->batch = &eb->vma[eb->buffer_count++]; |
47b08693 ML |
2682 | eb->batch->vma = i915_vma_get(shadow); |
2683 | eb->batch->flags = __EXEC_OBJECT_HAS_PIN; | |
71745376 | 2684 | |
32d94048 | 2685 | eb->trampoline = trampoline; |
4f7af194 | 2686 | eb->batch_start_offset = 0; |
4f7af194 | 2687 | |
47b08693 ML |
2688 | secure_batch: |
2689 | if (batch) { | |
2690 | eb->batch = &eb->vma[eb->buffer_count++]; | |
2691 | eb->batch->flags = __EXEC_OBJECT_HAS_PIN; | |
2692 | eb->batch->vma = i915_vma_get(batch); | |
2693 | } | |
51696691 | 2694 | return 0; |
b40d7378 | 2695 | |
47b08693 ML |
2696 | err_unpin_batch: |
2697 | if (batch) | |
2698 | i915_vma_unpin(batch); | |
32d94048 CW |
2699 | err_trampoline: |
2700 | if (trampoline) | |
2701 | i915_vma_unpin(trampoline); | |
2702 | err_shadow: | |
2703 | i915_vma_unpin(shadow); | |
b40d7378 | 2704 | err: |
51696691 | 2705 | return err; |
71745376 | 2706 | } |
5c6c6003 | 2707 | |
7d6236bb | 2708 | static int eb_submit(struct i915_execbuffer *eb, struct i915_vma *batch) |
78382593 | 2709 | { |
2889caa9 | 2710 | int err; |
78382593 | 2711 | |
9b3a8f55 CW |
2712 | if (intel_context_nopreempt(eb->context)) |
2713 | __set_bit(I915_FENCE_FLAG_NOPREEMPT, &eb->request->fence.flags); | |
2714 | ||
2889caa9 CW |
2715 | err = eb_move_to_gpu(eb); |
2716 | if (err) | |
2717 | return err; | |
78382593 | 2718 | |
650bc635 | 2719 | if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) { |
2889caa9 CW |
2720 | err = i915_reset_gen7_sol_offsets(eb->request); |
2721 | if (err) | |
2722 | return err; | |
78382593 OM |
2723 | } |
2724 | ||
85474441 CW |
2725 | /* |
2726 | * After we completed waiting for other engines (using HW semaphores) | |
2727 | * then we can signal that this request/batch is ready to run. This | |
2728 | * allows us to determine if the batch is still waiting on the GPU | |
2729 | * or actually running by checking the breadcrumb. | |
2730 | */ | |
2731 | if (eb->engine->emit_init_breadcrumb) { | |
2732 | err = eb->engine->emit_init_breadcrumb(eb->request); | |
2733 | if (err) | |
2734 | return err; | |
2735 | } | |
2736 | ||
2889caa9 | 2737 | err = eb->engine->emit_bb_start(eb->request, |
7d6236bb | 2738 | batch->node.start + |
650bc635 CW |
2739 | eb->batch_start_offset, |
2740 | eb->batch_len, | |
2889caa9 CW |
2741 | eb->batch_flags); |
2742 | if (err) | |
2743 | return err; | |
78382593 | 2744 | |
32d94048 CW |
2745 | if (eb->trampoline) { |
2746 | GEM_BUG_ON(eb->batch_start_offset); | |
2747 | err = eb->engine->emit_bb_start(eb->request, | |
2748 | eb->trampoline->node.start + | |
2749 | eb->batch_len, | |
2750 | 0, 0); | |
2751 | if (err) | |
2752 | return err; | |
2753 | } | |
2754 | ||
2f5945bc | 2755 | return 0; |
78382593 OM |
2756 | } |
2757 | ||
d5b2a3a4 CW |
2758 | static int num_vcs_engines(const struct drm_i915_private *i915) |
2759 | { | |
bb80d878 | 2760 | return hweight_long(VDBOX_MASK(&i915->gt)); |
d5b2a3a4 CW |
2761 | } |
2762 | ||
204bcfef | 2763 | /* |
a8ebba75 | 2764 | * Find one BSD ring to dispatch the corresponding BSD command. |
c80ff16e | 2765 | * The engine index is returned. |
a8ebba75 | 2766 | */ |
de1add36 | 2767 | static unsigned int |
c80ff16e CW |
2768 | gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv, |
2769 | struct drm_file *file) | |
a8ebba75 | 2770 | { |
a8ebba75 ZY |
2771 | struct drm_i915_file_private *file_priv = file->driver_priv; |
2772 | ||
de1add36 | 2773 | /* Check whether the file_priv has already selected one ring. */ |
6f633402 | 2774 | if ((int)file_priv->bsd_engine < 0) |
1a07e86c CW |
2775 | file_priv->bsd_engine = |
2776 | get_random_int() % num_vcs_engines(dev_priv); | |
d23db88c | 2777 | |
c80ff16e | 2778 | return file_priv->bsd_engine; |
d23db88c CW |
2779 | } |
2780 | ||
5e2a0419 | 2781 | static const enum intel_engine_id user_ring_map[] = { |
8a68d464 CW |
2782 | [I915_EXEC_DEFAULT] = RCS0, |
2783 | [I915_EXEC_RENDER] = RCS0, | |
2784 | [I915_EXEC_BLT] = BCS0, | |
2785 | [I915_EXEC_BSD] = VCS0, | |
2786 | [I915_EXEC_VEBOX] = VECS0 | |
de1add36 TU |
2787 | }; |
2788 | ||
2bf541ff | 2789 | static struct i915_request *eb_throttle(struct i915_execbuffer *eb, struct intel_context *ce) |
e5dadff4 CW |
2790 | { |
2791 | struct intel_ring *ring = ce->ring; | |
2792 | struct intel_timeline *tl = ce->timeline; | |
2793 | struct i915_request *rq; | |
2794 | ||
2795 | /* | |
2796 | * Completely unscientific finger-in-the-air estimates for suitable | |
2797 | * maximum user request size (to avoid blocking) and then backoff. | |
2798 | */ | |
2799 | if (intel_ring_update_space(ring) >= PAGE_SIZE) | |
2800 | return NULL; | |
2801 | ||
2802 | /* | |
2803 | * Find a request that after waiting upon, there will be at least half | |
2804 | * the ring available. The hysteresis allows us to compete for the | |
2805 | * shared ring and should mean that we sleep less often prior to | |
2806 | * claiming our resources, but not so long that the ring completely | |
2807 | * drains before we can submit our next request. | |
2808 | */ | |
2809 | list_for_each_entry(rq, &tl->requests, link) { | |
2810 | if (rq->ring != ring) | |
2811 | continue; | |
2812 | ||
2813 | if (__intel_ring_space(rq->postfix, | |
2814 | ring->emit, ring->size) > ring->size / 2) | |
2815 | break; | |
2816 | } | |
2817 | if (&rq->link == &tl->requests) | |
2818 | return NULL; /* weird, we will check again later for real */ | |
2819 | ||
2820 | return i915_request_get(rq); | |
2821 | } | |
2822 | ||
2bf541ff | 2823 | static struct i915_request *eb_pin_engine(struct i915_execbuffer *eb, bool throttle) |
e5dadff4 | 2824 | { |
2bf541ff | 2825 | struct intel_context *ce = eb->context; |
e5dadff4 | 2826 | struct intel_timeline *tl; |
2bf541ff | 2827 | struct i915_request *rq = NULL; |
e5dadff4 CW |
2828 | int err; |
2829 | ||
2bf541ff | 2830 | GEM_BUG_ON(eb->args->flags & __EXEC_ENGINE_PINNED); |
8f2a1057 | 2831 | |
9f3ccd40 | 2832 | if (unlikely(intel_context_is_banned(ce))) |
2bf541ff | 2833 | return ERR_PTR(-EIO); |
9f3ccd40 | 2834 | |
8f2a1057 CW |
2835 | /* |
2836 | * Pinning the contexts may generate requests in order to acquire | |
2837 | * GGTT space, so do this first before we reserve a seqno for | |
2838 | * ourselves. | |
2839 | */ | |
47b08693 | 2840 | err = intel_context_pin_ww(ce, &eb->ww); |
fa9f6681 | 2841 | if (err) |
2bf541ff | 2842 | return ERR_PTR(err); |
8f2a1057 | 2843 | |
a4e57f90 CW |
2844 | /* |
2845 | * Take a local wakeref for preparing to dispatch the execbuf as | |
2846 | * we expect to access the hardware fairly frequently in the | |
2847 | * process, and require the engine to be kept awake between accesses. | |
2848 | * Upon dispatch, we acquire another prolonged wakeref that we hold | |
2849 | * until the timeline is idle, which in turn releases the wakeref | |
2850 | * taken on the engine, and the parent device. | |
2851 | */ | |
e5dadff4 CW |
2852 | tl = intel_context_timeline_lock(ce); |
2853 | if (IS_ERR(tl)) { | |
2bf541ff ML |
2854 | intel_context_unpin(ce); |
2855 | return ERR_CAST(tl); | |
e5dadff4 | 2856 | } |
a4e57f90 CW |
2857 | |
2858 | intel_context_enter(ce); | |
2bf541ff ML |
2859 | if (throttle) |
2860 | rq = eb_throttle(eb, ce); | |
e5dadff4 CW |
2861 | intel_context_timeline_unlock(tl); |
2862 | ||
2bf541ff ML |
2863 | eb->args->flags |= __EXEC_ENGINE_PINNED; |
2864 | return rq; | |
8f2a1057 CW |
2865 | } |
2866 | ||
e5dadff4 | 2867 | static void eb_unpin_engine(struct i915_execbuffer *eb) |
8f2a1057 | 2868 | { |
a4e57f90 | 2869 | struct intel_context *ce = eb->context; |
75d0a7f3 | 2870 | struct intel_timeline *tl = ce->timeline; |
a4e57f90 | 2871 | |
2bf541ff ML |
2872 | if (!(eb->args->flags & __EXEC_ENGINE_PINNED)) |
2873 | return; | |
2874 | ||
2875 | eb->args->flags &= ~__EXEC_ENGINE_PINNED; | |
2876 | ||
a4e57f90 CW |
2877 | mutex_lock(&tl->mutex); |
2878 | intel_context_exit(ce); | |
2879 | mutex_unlock(&tl->mutex); | |
2880 | ||
2850748e | 2881 | intel_context_unpin(ce); |
8f2a1057 | 2882 | } |
de1add36 | 2883 | |
5e2a0419 | 2884 | static unsigned int |
b49a7d51 | 2885 | eb_select_legacy_ring(struct i915_execbuffer *eb) |
de1add36 | 2886 | { |
8f2a1057 | 2887 | struct drm_i915_private *i915 = eb->i915; |
b49a7d51 | 2888 | struct drm_i915_gem_execbuffer2 *args = eb->args; |
de1add36 | 2889 | unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK; |
de1add36 | 2890 | |
5e2a0419 CW |
2891 | if (user_ring_id != I915_EXEC_BSD && |
2892 | (args->flags & I915_EXEC_BSD_MASK)) { | |
baa89ba3 WK |
2893 | drm_dbg(&i915->drm, |
2894 | "execbuf with non bsd ring but with invalid " | |
2895 | "bsd dispatch flags: %d\n", (int)(args->flags)); | |
5e2a0419 | 2896 | return -1; |
de1add36 TU |
2897 | } |
2898 | ||
d5b2a3a4 | 2899 | if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(i915) > 1) { |
de1add36 TU |
2900 | unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK; |
2901 | ||
2902 | if (bsd_idx == I915_EXEC_BSD_DEFAULT) { | |
b49a7d51 | 2903 | bsd_idx = gen8_dispatch_bsd_engine(i915, eb->file); |
de1add36 TU |
2904 | } else if (bsd_idx >= I915_EXEC_BSD_RING1 && |
2905 | bsd_idx <= I915_EXEC_BSD_RING2) { | |
d9da6aa0 | 2906 | bsd_idx >>= I915_EXEC_BSD_SHIFT; |
de1add36 TU |
2907 | bsd_idx--; |
2908 | } else { | |
baa89ba3 WK |
2909 | drm_dbg(&i915->drm, |
2910 | "execbuf with unknown bsd ring: %u\n", | |
2911 | bsd_idx); | |
5e2a0419 | 2912 | return -1; |
de1add36 TU |
2913 | } |
2914 | ||
5e2a0419 | 2915 | return _VCS(bsd_idx); |
de1add36 TU |
2916 | } |
2917 | ||
5e2a0419 | 2918 | if (user_ring_id >= ARRAY_SIZE(user_ring_map)) { |
baa89ba3 WK |
2919 | drm_dbg(&i915->drm, "execbuf with unknown ring: %u\n", |
2920 | user_ring_id); | |
5e2a0419 | 2921 | return -1; |
de1add36 TU |
2922 | } |
2923 | ||
5e2a0419 CW |
2924 | return user_ring_map[user_ring_id]; |
2925 | } | |
2926 | ||
2927 | static int | |
2bf541ff | 2928 | eb_select_engine(struct i915_execbuffer *eb) |
5e2a0419 CW |
2929 | { |
2930 | struct intel_context *ce; | |
2931 | unsigned int idx; | |
2932 | int err; | |
2933 | ||
976b55f0 | 2934 | if (i915_gem_context_user_engines(eb->gem_context)) |
b49a7d51 | 2935 | idx = eb->args->flags & I915_EXEC_RING_MASK; |
976b55f0 | 2936 | else |
b49a7d51 | 2937 | idx = eb_select_legacy_ring(eb); |
5e2a0419 CW |
2938 | |
2939 | ce = i915_gem_context_get_engine(eb->gem_context, idx); | |
2940 | if (IS_ERR(ce)) | |
2941 | return PTR_ERR(ce); | |
2942 | ||
2bf541ff | 2943 | intel_gt_pm_get(ce->engine->gt); |
5e2a0419 | 2944 | |
2bf541ff ML |
2945 | if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) { |
2946 | err = intel_context_alloc_state(ce); | |
2947 | if (err) | |
2948 | goto err; | |
2949 | } | |
2950 | ||
2951 | /* | |
2952 | * ABI: Before userspace accesses the GPU (e.g. execbuffer), report | |
2953 | * EIO if the GPU is already wedged. | |
2954 | */ | |
2955 | err = intel_gt_terminally_wedged(ce->engine->gt); | |
2956 | if (err) | |
2957 | goto err; | |
2958 | ||
2959 | eb->context = ce; | |
2960 | eb->engine = ce->engine; | |
2961 | ||
2962 | /* | |
2963 | * Make sure engine pool stays alive even if we call intel_context_put | |
2964 | * during ww handling. The pool is destroyed when last pm reference | |
2965 | * is dropped, which breaks our -EDEADLK handling. | |
2966 | */ | |
2967 | return err; | |
2968 | ||
2969 | err: | |
2970 | intel_gt_pm_put(ce->engine->gt); | |
2971 | intel_context_put(ce); | |
5e2a0419 | 2972 | return err; |
de1add36 TU |
2973 | } |
2974 | ||
2bf541ff ML |
2975 | static void |
2976 | eb_put_engine(struct i915_execbuffer *eb) | |
2977 | { | |
2978 | intel_gt_pm_put(eb->engine->gt); | |
2979 | intel_context_put(eb->context); | |
2980 | } | |
2981 | ||
cf6e7bac | 2982 | static void |
13149e8b | 2983 | __free_fence_array(struct eb_fence *fences, unsigned int n) |
cf6e7bac | 2984 | { |
13149e8b | 2985 | while (n--) { |
cda9edd0 | 2986 | drm_syncobj_put(ptr_mask_bits(fences[n].syncobj, 2)); |
13149e8b LL |
2987 | dma_fence_put(fences[n].dma_fence); |
2988 | kfree(fences[n].chain_fence); | |
2989 | } | |
cf6e7bac JE |
2990 | kvfree(fences); |
2991 | } | |
2992 | ||
cda9edd0 | 2993 | static int |
13149e8b LL |
2994 | add_timeline_fence_array(struct i915_execbuffer *eb, |
2995 | const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences) | |
cf6e7bac | 2996 | { |
13149e8b LL |
2997 | struct drm_i915_gem_exec_fence __user *user_fences; |
2998 | u64 __user *user_values; | |
2999 | struct eb_fence *f; | |
3000 | u64 nfences; | |
3001 | int err = 0; | |
cf6e7bac | 3002 | |
13149e8b LL |
3003 | nfences = timeline_fences->fence_count; |
3004 | if (!nfences) | |
cda9edd0 | 3005 | return 0; |
cf6e7bac | 3006 | |
d710fc16 CW |
3007 | /* Check multiplication overflow for access_ok() and kvmalloc_array() */ |
3008 | BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long)); | |
3009 | if (nfences > min_t(unsigned long, | |
13149e8b LL |
3010 | ULONG_MAX / sizeof(*user_fences), |
3011 | SIZE_MAX / sizeof(*f)) - eb->num_fences) | |
cda9edd0 | 3012 | return -EINVAL; |
cf6e7bac | 3013 | |
13149e8b LL |
3014 | user_fences = u64_to_user_ptr(timeline_fences->handles_ptr); |
3015 | if (!access_ok(user_fences, nfences * sizeof(*user_fences))) | |
3016 | return -EFAULT; | |
3017 | ||
3018 | user_values = u64_to_user_ptr(timeline_fences->values_ptr); | |
3019 | if (!access_ok(user_values, nfences * sizeof(*user_values))) | |
cda9edd0 | 3020 | return -EFAULT; |
cf6e7bac | 3021 | |
13149e8b LL |
3022 | f = krealloc(eb->fences, |
3023 | (eb->num_fences + nfences) * sizeof(*f), | |
3024 | __GFP_NOWARN | GFP_KERNEL); | |
3025 | if (!f) | |
cda9edd0 | 3026 | return -ENOMEM; |
cf6e7bac | 3027 | |
13149e8b LL |
3028 | eb->fences = f; |
3029 | f += eb->num_fences; | |
3030 | ||
3031 | BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) & | |
3032 | ~__I915_EXEC_FENCE_UNKNOWN_FLAGS); | |
3033 | ||
3034 | while (nfences--) { | |
3035 | struct drm_i915_gem_exec_fence user_fence; | |
cf6e7bac | 3036 | struct drm_syncobj *syncobj; |
13149e8b LL |
3037 | struct dma_fence *fence = NULL; |
3038 | u64 point; | |
3039 | ||
3040 | if (__copy_from_user(&user_fence, | |
3041 | user_fences++, | |
3042 | sizeof(user_fence))) | |
3043 | return -EFAULT; | |
3044 | ||
3045 | if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS) | |
3046 | return -EINVAL; | |
3047 | ||
3048 | if (__get_user(point, user_values++)) | |
3049 | return -EFAULT; | |
3050 | ||
3051 | syncobj = drm_syncobj_find(eb->file, user_fence.handle); | |
3052 | if (!syncobj) { | |
3053 | DRM_DEBUG("Invalid syncobj handle provided\n"); | |
3054 | return -ENOENT; | |
3055 | } | |
3056 | ||
3057 | fence = drm_syncobj_fence_get(syncobj); | |
cf6e7bac | 3058 | |
13149e8b LL |
3059 | if (!fence && user_fence.flags && |
3060 | !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) { | |
3061 | DRM_DEBUG("Syncobj handle has no fence\n"); | |
3062 | drm_syncobj_put(syncobj); | |
3063 | return -EINVAL; | |
cf6e7bac JE |
3064 | } |
3065 | ||
13149e8b LL |
3066 | if (fence) |
3067 | err = dma_fence_chain_find_seqno(&fence, point); | |
3068 | ||
3069 | if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) { | |
3070 | DRM_DEBUG("Syncobj handle missing requested point %llu\n", point); | |
da1ea128 | 3071 | dma_fence_put(fence); |
13149e8b LL |
3072 | drm_syncobj_put(syncobj); |
3073 | return err; | |
3074 | } | |
3075 | ||
3076 | /* | |
3077 | * A point might have been signaled already and | |
3078 | * garbage collected from the timeline. In this case | |
3079 | * just ignore the point and carry on. | |
3080 | */ | |
3081 | if (!fence && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) { | |
3082 | drm_syncobj_put(syncobj); | |
3083 | continue; | |
3084 | } | |
3085 | ||
3086 | /* | |
3087 | * For timeline syncobjs we need to preallocate chains for | |
3088 | * later signaling. | |
3089 | */ | |
3090 | if (point != 0 && user_fence.flags & I915_EXEC_FENCE_SIGNAL) { | |
3091 | /* | |
3092 | * Waiting and signaling the same point (when point != | |
3093 | * 0) would break the timeline. | |
3094 | */ | |
3095 | if (user_fence.flags & I915_EXEC_FENCE_WAIT) { | |
3096 | DRM_DEBUG("Trying to wait & signal the same timeline point.\n"); | |
3097 | dma_fence_put(fence); | |
3098 | drm_syncobj_put(syncobj); | |
3099 | return -EINVAL; | |
3100 | } | |
3101 | ||
3102 | f->chain_fence = | |
3103 | kmalloc(sizeof(*f->chain_fence), | |
3104 | GFP_KERNEL); | |
3105 | if (!f->chain_fence) { | |
3106 | drm_syncobj_put(syncobj); | |
3107 | dma_fence_put(fence); | |
3108 | return -ENOMEM; | |
3109 | } | |
3110 | } else { | |
3111 | f->chain_fence = NULL; | |
ebcaa1ff TU |
3112 | } |
3113 | ||
13149e8b LL |
3114 | f->syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2); |
3115 | f->dma_fence = fence; | |
3116 | f->value = point; | |
3117 | f++; | |
3118 | eb->num_fences++; | |
3119 | } | |
3120 | ||
3121 | return 0; | |
3122 | } | |
3123 | ||
3124 | static int add_fence_array(struct i915_execbuffer *eb) | |
3125 | { | |
3126 | struct drm_i915_gem_execbuffer2 *args = eb->args; | |
3127 | struct drm_i915_gem_exec_fence __user *user; | |
3128 | unsigned long num_fences = args->num_cliprects; | |
3129 | struct eb_fence *f; | |
3130 | ||
3131 | if (!(args->flags & I915_EXEC_FENCE_ARRAY)) | |
3132 | return 0; | |
3133 | ||
3134 | if (!num_fences) | |
3135 | return 0; | |
3136 | ||
3137 | /* Check multiplication overflow for access_ok() and kvmalloc_array() */ | |
3138 | BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long)); | |
3139 | if (num_fences > min_t(unsigned long, | |
3140 | ULONG_MAX / sizeof(*user), | |
3141 | SIZE_MAX / sizeof(*f) - eb->num_fences)) | |
3142 | return -EINVAL; | |
3143 | ||
3144 | user = u64_to_user_ptr(args->cliprects_ptr); | |
3145 | if (!access_ok(user, num_fences * sizeof(*user))) | |
3146 | return -EFAULT; | |
3147 | ||
3148 | f = krealloc(eb->fences, | |
3149 | (eb->num_fences + num_fences) * sizeof(*f), | |
3150 | __GFP_NOWARN | GFP_KERNEL); | |
3151 | if (!f) | |
3152 | return -ENOMEM; | |
3153 | ||
3154 | eb->fences = f; | |
3155 | f += eb->num_fences; | |
3156 | while (num_fences--) { | |
3157 | struct drm_i915_gem_exec_fence user_fence; | |
3158 | struct drm_syncobj *syncobj; | |
3159 | struct dma_fence *fence = NULL; | |
3160 | ||
3161 | if (__copy_from_user(&user_fence, user++, sizeof(user_fence))) | |
3162 | return -EFAULT; | |
3163 | ||
3164 | if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS) | |
3165 | return -EINVAL; | |
3166 | ||
3167 | syncobj = drm_syncobj_find(eb->file, user_fence.handle); | |
cf6e7bac JE |
3168 | if (!syncobj) { |
3169 | DRM_DEBUG("Invalid syncobj handle provided\n"); | |
13149e8b LL |
3170 | return -ENOENT; |
3171 | } | |
3172 | ||
3173 | if (user_fence.flags & I915_EXEC_FENCE_WAIT) { | |
3174 | fence = drm_syncobj_fence_get(syncobj); | |
3175 | if (!fence) { | |
3176 | DRM_DEBUG("Syncobj handle has no fence\n"); | |
3177 | drm_syncobj_put(syncobj); | |
3178 | return -EINVAL; | |
3179 | } | |
cf6e7bac JE |
3180 | } |
3181 | ||
ebcaa1ff TU |
3182 | BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) & |
3183 | ~__I915_EXEC_FENCE_UNKNOWN_FLAGS); | |
3184 | ||
13149e8b LL |
3185 | f->syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2); |
3186 | f->dma_fence = fence; | |
3187 | f->value = 0; | |
3188 | f->chain_fence = NULL; | |
3189 | f++; | |
3190 | eb->num_fences++; | |
cf6e7bac JE |
3191 | } |
3192 | ||
cda9edd0 | 3193 | return 0; |
13149e8b | 3194 | } |
cf6e7bac | 3195 | |
13149e8b LL |
3196 | static void put_fence_array(struct eb_fence *fences, int num_fences) |
3197 | { | |
3198 | if (fences) | |
3199 | __free_fence_array(fences, num_fences); | |
cf6e7bac JE |
3200 | } |
3201 | ||
3202 | static int | |
cda9edd0 | 3203 | await_fence_array(struct i915_execbuffer *eb) |
cf6e7bac | 3204 | { |
cf6e7bac JE |
3205 | unsigned int n; |
3206 | int err; | |
3207 | ||
13149e8b | 3208 | for (n = 0; n < eb->num_fences; n++) { |
cf6e7bac | 3209 | struct drm_syncobj *syncobj; |
cf6e7bac JE |
3210 | unsigned int flags; |
3211 | ||
cda9edd0 | 3212 | syncobj = ptr_unpack_bits(eb->fences[n].syncobj, &flags, 2); |
cf6e7bac | 3213 | |
13149e8b LL |
3214 | if (!eb->fences[n].dma_fence) |
3215 | continue; | |
cf6e7bac | 3216 | |
13149e8b LL |
3217 | err = i915_request_await_dma_fence(eb->request, |
3218 | eb->fences[n].dma_fence); | |
cf6e7bac JE |
3219 | if (err < 0) |
3220 | return err; | |
3221 | } | |
3222 | ||
3223 | return 0; | |
3224 | } | |
3225 | ||
13149e8b | 3226 | static void signal_fence_array(const struct i915_execbuffer *eb) |
cf6e7bac | 3227 | { |
cf6e7bac JE |
3228 | struct dma_fence * const fence = &eb->request->fence; |
3229 | unsigned int n; | |
3230 | ||
13149e8b | 3231 | for (n = 0; n < eb->num_fences; n++) { |
cf6e7bac JE |
3232 | struct drm_syncobj *syncobj; |
3233 | unsigned int flags; | |
3234 | ||
cda9edd0 | 3235 | syncobj = ptr_unpack_bits(eb->fences[n].syncobj, &flags, 2); |
cf6e7bac JE |
3236 | if (!(flags & I915_EXEC_FENCE_SIGNAL)) |
3237 | continue; | |
3238 | ||
13149e8b LL |
3239 | if (eb->fences[n].chain_fence) { |
3240 | drm_syncobj_add_point(syncobj, | |
3241 | eb->fences[n].chain_fence, | |
3242 | fence, | |
3243 | eb->fences[n].value); | |
3244 | /* | |
3245 | * The chain's ownership is transferred to the | |
3246 | * timeline. | |
3247 | */ | |
3248 | eb->fences[n].chain_fence = NULL; | |
3249 | } else { | |
3250 | drm_syncobj_replace_fence(syncobj, fence); | |
3251 | } | |
cf6e7bac JE |
3252 | } |
3253 | } | |
3254 | ||
13149e8b LL |
3255 | static int |
3256 | parse_timeline_fences(struct i915_user_extension __user *ext, void *data) | |
3257 | { | |
3258 | struct i915_execbuffer *eb = data; | |
3259 | struct drm_i915_gem_execbuffer_ext_timeline_fences timeline_fences; | |
3260 | ||
3261 | if (copy_from_user(&timeline_fences, ext, sizeof(timeline_fences))) | |
3262 | return -EFAULT; | |
3263 | ||
3264 | return add_timeline_fence_array(eb, &timeline_fences); | |
3265 | } | |
3266 | ||
61231f6b CW |
3267 | static void retire_requests(struct intel_timeline *tl, struct i915_request *end) |
3268 | { | |
3269 | struct i915_request *rq, *rn; | |
3270 | ||
3271 | list_for_each_entry_safe(rq, rn, &tl->requests, link) | |
3272 | if (rq == end || !i915_request_retire(rq)) | |
3273 | break; | |
3274 | } | |
3275 | ||
ba38b79e | 3276 | static int eb_request_add(struct i915_execbuffer *eb, int err) |
61231f6b CW |
3277 | { |
3278 | struct i915_request *rq = eb->request; | |
3279 | struct intel_timeline * const tl = i915_request_timeline(rq); | |
3280 | struct i915_sched_attr attr = {}; | |
3281 | struct i915_request *prev; | |
3282 | ||
3283 | lockdep_assert_held(&tl->mutex); | |
3284 | lockdep_unpin_lock(&tl->mutex, rq->cookie); | |
3285 | ||
3286 | trace_i915_request_add(rq); | |
3287 | ||
3288 | prev = __i915_request_commit(rq); | |
3289 | ||
3290 | /* Check that the context wasn't destroyed before submission */ | |
207e4a71 | 3291 | if (likely(!intel_context_is_closed(eb->context))) { |
61231f6b | 3292 | attr = eb->gem_context->sched; |
61231f6b CW |
3293 | } else { |
3294 | /* Serialise with context_close via the add_to_timeline */ | |
36e191f0 CW |
3295 | i915_request_set_error_once(rq, -ENOENT); |
3296 | __i915_request_skip(rq); | |
ba38b79e | 3297 | err = -ENOENT; /* override any transient errors */ |
61231f6b CW |
3298 | } |
3299 | ||
61231f6b | 3300 | __i915_request_queue(rq, &attr); |
61231f6b CW |
3301 | |
3302 | /* Try to clean up the client's timeline after submitting the request */ | |
3303 | if (prev) | |
3304 | retire_requests(tl, prev); | |
3305 | ||
3306 | mutex_unlock(&tl->mutex); | |
ba38b79e CW |
3307 | |
3308 | return err; | |
61231f6b CW |
3309 | } |
3310 | ||
cda9edd0 | 3311 | static const i915_user_extension_fn execbuf_extensions[] = { |
13149e8b | 3312 | [DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES] = parse_timeline_fences, |
cda9edd0 LL |
3313 | }; |
3314 | ||
3315 | static int | |
3316 | parse_execbuf2_extensions(struct drm_i915_gem_execbuffer2 *args, | |
3317 | struct i915_execbuffer *eb) | |
3318 | { | |
cda9edd0 LL |
3319 | if (!(args->flags & I915_EXEC_USE_EXTENSIONS)) |
3320 | return 0; | |
3321 | ||
3322 | /* The execbuf2 extension mechanism reuses cliprects_ptr. So we cannot | |
3323 | * have another flag also using it at the same time. | |
3324 | */ | |
3325 | if (eb->args->flags & I915_EXEC_FENCE_ARRAY) | |
3326 | return -EINVAL; | |
3327 | ||
3328 | if (args->num_cliprects != 0) | |
3329 | return -EINVAL; | |
3330 | ||
3331 | return i915_user_extensions(u64_to_user_ptr(args->cliprects_ptr), | |
3332 | execbuf_extensions, | |
3333 | ARRAY_SIZE(execbuf_extensions), | |
3334 | eb); | |
3335 | } | |
3336 | ||
54cf91dc | 3337 | static int |
650bc635 | 3338 | i915_gem_do_execbuffer(struct drm_device *dev, |
54cf91dc CW |
3339 | struct drm_file *file, |
3340 | struct drm_i915_gem_execbuffer2 *args, | |
cda9edd0 | 3341 | struct drm_i915_gem_exec_object2 *exec) |
54cf91dc | 3342 | { |
44157641 | 3343 | struct drm_i915_private *i915 = to_i915(dev); |
650bc635 | 3344 | struct i915_execbuffer eb; |
fec0445c CW |
3345 | struct dma_fence *in_fence = NULL; |
3346 | struct sync_file *out_fence = NULL; | |
7d6236bb | 3347 | struct i915_vma *batch; |
fec0445c | 3348 | int out_fence_fd = -1; |
2889caa9 | 3349 | int err; |
432e58ed | 3350 | |
74c1c694 | 3351 | BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS); |
2889caa9 CW |
3352 | BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS & |
3353 | ~__EXEC_OBJECT_UNKNOWN_FLAGS); | |
54cf91dc | 3354 | |
44157641 | 3355 | eb.i915 = i915; |
650bc635 CW |
3356 | eb.file = file; |
3357 | eb.args = args; | |
ad5d95e4 | 3358 | if (DBG_FORCE_RELOC || !(args->flags & I915_EXEC_NO_RELOC)) |
2889caa9 | 3359 | args->flags |= __EXEC_HAS_RELOC; |
c7c6e46f | 3360 | |
650bc635 | 3361 | eb.exec = exec; |
8ae275c2 ML |
3362 | eb.vma = (struct eb_vma *)(exec + args->buffer_count + 1); |
3363 | eb.vma[0].vma = NULL; | |
c43ce123 | 3364 | eb.reloc_pool = eb.batch_pool = NULL; |
2bf541ff | 3365 | eb.reloc_context = NULL; |
c7c6e46f | 3366 | |
2889caa9 | 3367 | eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS; |
650bc635 CW |
3368 | reloc_cache_init(&eb.reloc_cache, eb.i915); |
3369 | ||
2889caa9 | 3370 | eb.buffer_count = args->buffer_count; |
650bc635 CW |
3371 | eb.batch_start_offset = args->batch_start_offset; |
3372 | eb.batch_len = args->batch_len; | |
32d94048 | 3373 | eb.trampoline = NULL; |
650bc635 | 3374 | |
cda9edd0 | 3375 | eb.fences = NULL; |
13149e8b | 3376 | eb.num_fences = 0; |
cda9edd0 | 3377 | |
2889caa9 | 3378 | eb.batch_flags = 0; |
d7d4eedd | 3379 | if (args->flags & I915_EXEC_SECURE) { |
40e1956e | 3380 | if (GRAPHICS_VER(i915) >= 11) |
44157641 JB |
3381 | return -ENODEV; |
3382 | ||
3383 | /* Return -EPERM to trigger fallback code on old binaries. */ | |
3384 | if (!HAS_SECURE_BATCHES(i915)) | |
3385 | return -EPERM; | |
3386 | ||
b3ac9f25 | 3387 | if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN)) |
44157641 | 3388 | return -EPERM; |
d7d4eedd | 3389 | |
2889caa9 | 3390 | eb.batch_flags |= I915_DISPATCH_SECURE; |
d7d4eedd | 3391 | } |
b45305fc | 3392 | if (args->flags & I915_EXEC_IS_PINNED) |
2889caa9 | 3393 | eb.batch_flags |= I915_DISPATCH_PINNED; |
54cf91dc | 3394 | |
13149e8b LL |
3395 | err = parse_execbuf2_extensions(args, &eb); |
3396 | if (err) | |
3397 | goto err_ext; | |
3398 | ||
3399 | err = add_fence_array(&eb); | |
3400 | if (err) | |
3401 | goto err_ext; | |
3402 | ||
889333c7 CW |
3403 | #define IN_FENCES (I915_EXEC_FENCE_IN | I915_EXEC_FENCE_SUBMIT) |
3404 | if (args->flags & IN_FENCES) { | |
3405 | if ((args->flags & IN_FENCES) == IN_FENCES) | |
3406 | return -EINVAL; | |
3407 | ||
fec0445c | 3408 | in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2)); |
13149e8b LL |
3409 | if (!in_fence) { |
3410 | err = -EINVAL; | |
3411 | goto err_ext; | |
3412 | } | |
fec0445c | 3413 | } |
889333c7 | 3414 | #undef IN_FENCES |
a88b6e4c | 3415 | |
fec0445c CW |
3416 | if (args->flags & I915_EXEC_FENCE_OUT) { |
3417 | out_fence_fd = get_unused_fd_flags(O_CLOEXEC); | |
3418 | if (out_fence_fd < 0) { | |
2889caa9 | 3419 | err = out_fence_fd; |
889333c7 | 3420 | goto err_in_fence; |
fec0445c CW |
3421 | } |
3422 | } | |
3423 | ||
cda9edd0 LL |
3424 | err = eb_create(&eb); |
3425 | if (err) | |
13149e8b | 3426 | goto err_out_fence; |
cda9edd0 | 3427 | |
4d470f73 | 3428 | GEM_BUG_ON(!eb.lut_size); |
2889caa9 | 3429 | |
1acfc104 CW |
3430 | err = eb_select_context(&eb); |
3431 | if (unlikely(err)) | |
3432 | goto err_destroy; | |
3433 | ||
2bf541ff | 3434 | err = eb_select_engine(&eb); |
d6f328bf | 3435 | if (unlikely(err)) |
e5dadff4 | 3436 | goto err_context; |
d6f328bf | 3437 | |
c43ce123 ML |
3438 | err = eb_lookup_vmas(&eb); |
3439 | if (err) { | |
b4b9731b | 3440 | eb_release_vmas(&eb, true); |
c43ce123 ML |
3441 | goto err_engine; |
3442 | } | |
3443 | ||
3444 | i915_gem_ww_ctx_init(&eb.ww, true); | |
3445 | ||
8e4ba491 | 3446 | err = eb_relocate_parse(&eb); |
1f727d9e | 3447 | if (err) { |
2889caa9 CW |
3448 | /* |
3449 | * If the user expects the execobject.offset and | |
3450 | * reloc.presumed_offset to be an exact match, | |
3451 | * as for using NO_RELOC, then we cannot update | |
3452 | * the execobject.offset until we have completed | |
3453 | * relocation. | |
3454 | */ | |
3455 | args->flags &= ~__EXEC_HAS_RELOC; | |
2889caa9 | 3456 | goto err_vma; |
1f727d9e | 3457 | } |
54cf91dc | 3458 | |
c43ce123 | 3459 | ww_acquire_done(&eb.ww.ctx); |
7d6236bb | 3460 | |
7d6236bb | 3461 | batch = eb.batch->vma; |
d7d4eedd | 3462 | |
7dd4f672 CW |
3463 | /* All GPU relocation batches must be submitted prior to the user rq */ |
3464 | GEM_BUG_ON(eb.reloc_cache.rq); | |
3465 | ||
0c8dac88 | 3466 | /* Allocate a request for this batch buffer nice and early. */ |
8f2a1057 | 3467 | eb.request = i915_request_create(eb.context); |
650bc635 | 3468 | if (IS_ERR(eb.request)) { |
2889caa9 | 3469 | err = PTR_ERR(eb.request); |
47b08693 | 3470 | goto err_vma; |
26827088 | 3471 | } |
0c8dac88 | 3472 | |
00dae4d3 JE |
3473 | if (unlikely(eb.gem_context->syncobj)) { |
3474 | struct dma_fence *fence; | |
3475 | ||
3476 | fence = drm_syncobj_fence_get(eb.gem_context->syncobj); | |
3477 | err = i915_request_await_dma_fence(eb.request, fence); | |
3478 | dma_fence_put(fence); | |
3479 | if (err) | |
3480 | goto err_ext; | |
3481 | } | |
3482 | ||
fec0445c | 3483 | if (in_fence) { |
889333c7 CW |
3484 | if (args->flags & I915_EXEC_FENCE_SUBMIT) |
3485 | err = i915_request_await_execution(eb.request, | |
5ac545b8 | 3486 | in_fence); |
889333c7 CW |
3487 | else |
3488 | err = i915_request_await_dma_fence(eb.request, | |
3489 | in_fence); | |
a88b6e4c CW |
3490 | if (err < 0) |
3491 | goto err_request; | |
3492 | } | |
3493 | ||
13149e8b | 3494 | if (eb.fences) { |
cda9edd0 | 3495 | err = await_fence_array(&eb); |
cf6e7bac JE |
3496 | if (err) |
3497 | goto err_request; | |
3498 | } | |
3499 | ||
fec0445c | 3500 | if (out_fence_fd != -1) { |
650bc635 | 3501 | out_fence = sync_file_create(&eb.request->fence); |
fec0445c | 3502 | if (!out_fence) { |
2889caa9 | 3503 | err = -ENOMEM; |
fec0445c CW |
3504 | goto err_request; |
3505 | } | |
3506 | } | |
3507 | ||
2889caa9 CW |
3508 | /* |
3509 | * Whilst this request exists, batch_obj will be on the | |
17f298cf CW |
3510 | * active_list, and so will hold the active reference. Only when this |
3511 | * request is retired will the the batch_obj be moved onto the | |
3512 | * inactive_list and lose its active reference. Hence we do not need | |
3513 | * to explicitly hold another reference here. | |
3514 | */ | |
7d6236bb | 3515 | eb.request->batch = batch; |
c43ce123 ML |
3516 | if (eb.batch_pool) |
3517 | intel_gt_buffer_pool_mark_active(eb.batch_pool, eb.request); | |
5f19e2bf | 3518 | |
e61e0f51 | 3519 | trace_i915_request_queue(eb.request, eb.batch_flags); |
7d6236bb | 3520 | err = eb_submit(&eb, batch); |
ed29c269 | 3521 | |
aa9b7810 | 3522 | err_request: |
e14177f1 | 3523 | i915_request_get(eb.request); |
ba38b79e | 3524 | err = eb_request_add(&eb, err); |
c8659efa | 3525 | |
13149e8b | 3526 | if (eb.fences) |
cda9edd0 | 3527 | signal_fence_array(&eb); |
cf6e7bac | 3528 | |
fec0445c | 3529 | if (out_fence) { |
2889caa9 | 3530 | if (err == 0) { |
fec0445c | 3531 | fd_install(out_fence_fd, out_fence->file); |
b6a88e4a | 3532 | args->rsvd2 &= GENMASK_ULL(31, 0); /* keep in-fence */ |
fec0445c CW |
3533 | args->rsvd2 |= (u64)out_fence_fd << 32; |
3534 | out_fence_fd = -1; | |
3535 | } else { | |
3536 | fput(out_fence->file); | |
3537 | } | |
3538 | } | |
00dae4d3 JE |
3539 | |
3540 | if (unlikely(eb.gem_context->syncobj)) { | |
3541 | drm_syncobj_replace_fence(eb.gem_context->syncobj, | |
3542 | &eb.request->fence); | |
3543 | } | |
3544 | ||
e14177f1 | 3545 | i915_request_put(eb.request); |
54cf91dc | 3546 | |
2889caa9 | 3547 | err_vma: |
b4b9731b | 3548 | eb_release_vmas(&eb, true); |
32d94048 CW |
3549 | if (eb.trampoline) |
3550 | i915_vma_unpin(eb.trampoline); | |
c43ce123 ML |
3551 | WARN_ON(err == -EDEADLK); |
3552 | i915_gem_ww_ctx_fini(&eb.ww); | |
3553 | ||
3554 | if (eb.batch_pool) | |
3555 | intel_gt_buffer_pool_put(eb.batch_pool); | |
3556 | if (eb.reloc_pool) | |
3557 | intel_gt_buffer_pool_put(eb.reloc_pool); | |
2bf541ff ML |
3558 | if (eb.reloc_context) |
3559 | intel_context_put(eb.reloc_context); | |
c43ce123 | 3560 | err_engine: |
2bf541ff | 3561 | eb_put_engine(&eb); |
a4e57f90 | 3562 | err_context: |
8f2a1057 | 3563 | i915_gem_context_put(eb.gem_context); |
1acfc104 | 3564 | err_destroy: |
2889caa9 | 3565 | eb_destroy(&eb); |
4d470f73 | 3566 | err_out_fence: |
fec0445c CW |
3567 | if (out_fence_fd != -1) |
3568 | put_unused_fd(out_fence_fd); | |
4a04e371 | 3569 | err_in_fence: |
fec0445c | 3570 | dma_fence_put(in_fence); |
13149e8b LL |
3571 | err_ext: |
3572 | put_fence_array(eb.fences, eb.num_fences); | |
2889caa9 | 3573 | return err; |
54cf91dc CW |
3574 | } |
3575 | ||
d710fc16 CW |
3576 | static size_t eb_element_size(void) |
3577 | { | |
8ae275c2 | 3578 | return sizeof(struct drm_i915_gem_exec_object2) + sizeof(struct eb_vma); |
d710fc16 CW |
3579 | } |
3580 | ||
3581 | static bool check_buffer_count(size_t count) | |
3582 | { | |
3583 | const size_t sz = eb_element_size(); | |
3584 | ||
3585 | /* | |
3586 | * When using LUT_HANDLE, we impose a limit of INT_MAX for the lookup | |
3587 | * array size (see eb_create()). Otherwise, we can accept an array as | |
3588 | * large as can be addressed (though use large arrays at your peril)! | |
3589 | */ | |
3590 | ||
3591 | return !(count < 1 || count > INT_MAX || count > SIZE_MAX / sz - 1); | |
3592 | } | |
3593 | ||
54cf91dc | 3594 | int |
6a20fe7b VS |
3595 | i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data, |
3596 | struct drm_file *file) | |
54cf91dc | 3597 | { |
d0bf4582 | 3598 | struct drm_i915_private *i915 = to_i915(dev); |
54cf91dc | 3599 | struct drm_i915_gem_execbuffer2 *args = data; |
2889caa9 | 3600 | struct drm_i915_gem_exec_object2 *exec2_list; |
d710fc16 | 3601 | const size_t count = args->buffer_count; |
2889caa9 | 3602 | int err; |
54cf91dc | 3603 | |
d710fc16 | 3604 | if (!check_buffer_count(count)) { |
d0bf4582 | 3605 | drm_dbg(&i915->drm, "execbuf2 with %zd buffers\n", count); |
54cf91dc CW |
3606 | return -EINVAL; |
3607 | } | |
3608 | ||
00aff3f6 TU |
3609 | err = i915_gem_check_execbuffer(args); |
3610 | if (err) | |
3611 | return err; | |
2889caa9 | 3612 | |
47b08693 ML |
3613 | /* Allocate extra slots for use by the command parser */ |
3614 | exec2_list = kvmalloc_array(count + 2, eb_element_size(), | |
0ee931c4 | 3615 | __GFP_NOWARN | GFP_KERNEL); |
54cf91dc | 3616 | if (exec2_list == NULL) { |
d0bf4582 WK |
3617 | drm_dbg(&i915->drm, "Failed to allocate exec list for %zd buffers\n", |
3618 | count); | |
54cf91dc CW |
3619 | return -ENOMEM; |
3620 | } | |
2889caa9 CW |
3621 | if (copy_from_user(exec2_list, |
3622 | u64_to_user_ptr(args->buffers_ptr), | |
d710fc16 | 3623 | sizeof(*exec2_list) * count)) { |
d0bf4582 | 3624 | drm_dbg(&i915->drm, "copy %zd exec entries failed\n", count); |
2098105e | 3625 | kvfree(exec2_list); |
54cf91dc CW |
3626 | return -EFAULT; |
3627 | } | |
3628 | ||
cda9edd0 | 3629 | err = i915_gem_do_execbuffer(dev, file, args, exec2_list); |
2889caa9 CW |
3630 | |
3631 | /* | |
3632 | * Now that we have begun execution of the batchbuffer, we ignore | |
3633 | * any new error after this point. Also given that we have already | |
3634 | * updated the associated relocations, we try to write out the current | |
3635 | * object locations irrespective of any error. | |
3636 | */ | |
3637 | if (args->flags & __EXEC_HAS_RELOC) { | |
d593d992 | 3638 | struct drm_i915_gem_exec_object2 __user *user_exec_list = |
2889caa9 CW |
3639 | u64_to_user_ptr(args->buffers_ptr); |
3640 | unsigned int i; | |
9aab8bff | 3641 | |
2889caa9 | 3642 | /* Copy the new buffer offsets back to the user's exec list. */ |
594cc251 LT |
3643 | /* |
3644 | * Note: count * sizeof(*user_exec_list) does not overflow, | |
3645 | * because we checked 'count' in check_buffer_count(). | |
3646 | * | |
3647 | * And this range already got effectively checked earlier | |
3648 | * when we did the "copy_from_user()" above. | |
3649 | */ | |
b44f6873 CL |
3650 | if (!user_write_access_begin(user_exec_list, |
3651 | count * sizeof(*user_exec_list))) | |
8f4faed0 | 3652 | goto end; |
594cc251 | 3653 | |
9aab8bff | 3654 | for (i = 0; i < args->buffer_count; i++) { |
2889caa9 CW |
3655 | if (!(exec2_list[i].offset & UPDATE)) |
3656 | continue; | |
3657 | ||
934acce3 | 3658 | exec2_list[i].offset = |
2889caa9 CW |
3659 | gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK); |
3660 | unsafe_put_user(exec2_list[i].offset, | |
3661 | &user_exec_list[i].offset, | |
3662 | end_user); | |
54cf91dc | 3663 | } |
2889caa9 | 3664 | end_user: |
b44f6873 | 3665 | user_write_access_end(); |
8f4faed0 | 3666 | end:; |
54cf91dc CW |
3667 | } |
3668 | ||
2889caa9 | 3669 | args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS; |
2098105e | 3670 | kvfree(exec2_list); |
2889caa9 | 3671 | return err; |
54cf91dc | 3672 | } |
e3d29130 CW |
3673 | |
3674 | #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST) | |
3675 | #include "selftests/i915_gem_execbuffer.c" | |
3676 | #endif |