[linux-block.git] / drivers / gpu / drm / i915 / display / intel_display_core.h

/* SPDX-License-Identifier: MIT */
/*
 * Copyright © 2022 Intel Corporation
 */

#ifndef __INTEL_DISPLAY_CORE_H__
#define __INTEL_DISPLAY_CORE_H__

#include <linux/mutex.h>
#include <linux/types.h>
#include <linux/wait.h>

#include "intel_display.h"
#include "intel_dmc.h"
#include "intel_gmbus.h"

struct drm_i915_private;
struct i915_audio_component;
struct intel_atomic_state;
struct intel_audio_funcs;
struct intel_cdclk_funcs;
struct intel_color_funcs;
struct intel_crtc;
struct intel_crtc_state;
struct intel_dpll_funcs;
struct intel_fdi_funcs;
struct intel_hotplug_funcs;
struct intel_initial_plane_config;

struct intel_display_funcs {
	/*
	 * Returns the active state of the crtc, and if the crtc is active,
	 * fills out the pipe-config with the hw state.
	 */
	bool (*get_pipe_config)(struct intel_crtc *,
				struct intel_crtc_state *);
	void (*get_initial_plane_config)(struct intel_crtc *,
					 struct intel_initial_plane_config *);
	void (*crtc_enable)(struct intel_atomic_state *state,
			    struct intel_crtc *crtc);
	void (*crtc_disable)(struct intel_atomic_state *state,
			     struct intel_crtc *crtc);
	void (*commit_modeset_enables)(struct intel_atomic_state *state);
};

/* functions used for watermark calcs for display. */
struct intel_wm_funcs {
	/* update_wm is for legacy wm management */
	void (*update_wm)(struct drm_i915_private *dev_priv);
	int (*compute_pipe_wm)(struct intel_atomic_state *state,
			       struct intel_crtc *crtc);
	int (*compute_intermediate_wm)(struct intel_atomic_state *state,
				       struct intel_crtc *crtc);
	void (*initial_watermarks)(struct intel_atomic_state *state,
				   struct intel_crtc *crtc);
	void (*atomic_update_watermarks)(struct intel_atomic_state *state,
					 struct intel_crtc *crtc);
	void (*optimize_watermarks)(struct intel_atomic_state *state,
				    struct intel_crtc *crtc);
	int (*compute_global_watermarks)(struct intel_atomic_state *state);
};

struct intel_audio {
	/* hda/i915 audio component */
	struct i915_audio_component *component;
	bool component_registered;
	/* mutex for audio/video sync */
	struct mutex mutex;
	int power_refcount;
	u32 freq_cntrl;

	/* Used to save the pipe-to-encoder mapping for audio */
	struct intel_encoder *encoder_map[I915_MAX_PIPES];

	/* necessary resource sharing with HDMI LPE audio driver. */
	struct {
		struct platform_device *platdev;
		int irq;
	} lpe;
};

struct intel_display {
	/* Display functions */
	struct {
		/* Top level crtc-ish functions */
		const struct intel_display_funcs *display;

		/* Display CDCLK functions */
		const struct intel_cdclk_funcs *cdclk;

		/* Display pll funcs */
		const struct intel_dpll_funcs *dpll;

		/* irq display functions */
		const struct intel_hotplug_funcs *hotplug;

		/* pm display functions */
		const struct intel_wm_funcs *wm;

		/* fdi display functions */
		const struct intel_fdi_funcs *fdi;

		/* Display internal color functions */
		const struct intel_color_funcs *color;

		/* Display internal audio functions */
		const struct intel_audio_funcs *audio;
	} funcs;

	/* Grouping using anonymous structs. Keep sorted. */
	struct {
		/*
		 * Base address of where the gmbus and gpio blocks are located
		 * (either on PCH or on SoC for platforms without PCH).
		 */
		u32 mmio_base;

		/*
		 * gmbus.mutex protects against concurrent usage of the single
		 * hw gmbus controller on different i2c buses.
		 */
		struct mutex mutex;

		struct intel_gmbus *bus[GMBUS_NUM_PINS];

		wait_queue_head_t wait_queue;
	} gmbus;

	struct {
		u32 mmio_base;

		/* protects panel power sequencer state */
		struct mutex mutex;
	} pps;

	/* Grouping using named structs. Keep sorted. */
	struct intel_audio audio;
	struct intel_dmc dmc;
};

#endif /* __INTEL_DISPLAY_CORE_H__ */
Commit	Line	Data
3b10f851 JN	1	/* SPDX-License-Identifier: MIT */
	2	/*
	3	* Copyright © 2022 Intel Corporation
	4	*/
	5
	6	#ifndef __INTEL_DISPLAY_CORE_H__
	7	#define __INTEL_DISPLAY_CORE_H__
	8
203eb5a9	9	#include <linux/mutex.h>
3b10f851	10	#include <linux/types.h>
203eb5a9 JN	11	#include <linux/wait.h>
203eb5a9 JN	12
4be1c12c	13	#include "intel_display.h"
6c77055a	14	#include "intel_dmc.h"
203eb5a9	15	#include "intel_gmbus.h"
3b10f851	16
103472c1	17	struct drm_i915_private;
4be1c12c	18	struct i915_audio_component;
3b10f851	19	struct intel_atomic_state;
4be1c12c	20	struct intel_audio_funcs;
986531bd	21	struct intel_cdclk_funcs;
34dc3cc5	22	struct intel_color_funcs;
3b10f851 JN	23	struct intel_crtc;
3b10f851 JN	24	struct intel_crtc_state;
ae611d17	25	struct intel_dpll_funcs;
06a50913	26	struct intel_fdi_funcs;
5a04eb5b	27	struct intel_hotplug_funcs;
3b10f851 JN	28	struct intel_initial_plane_config;
	29
	30	struct intel_display_funcs {
	31	/*
	32	* Returns the active state of the crtc, and if the crtc is active,
	33	* fills out the pipe-config with the hw state.
	34	*/
	35	bool (get_pipe_config)(struct intel_crtc ,
	36	struct intel_crtc_state *);
	37	void (get_initial_plane_config)(struct intel_crtc ,
	38	struct intel_initial_plane_config *);
	39	void (crtc_enable)(struct intel_atomic_state state,
	40	struct intel_crtc *crtc);
	41	void (crtc_disable)(struct intel_atomic_state state,
	42	struct intel_crtc *crtc);
	43	void (commit_modeset_enables)(struct intel_atomic_state state);
	44	};
	45
103472c1 JN	46	/* functions used for watermark calcs for display. */
	47	struct intel_wm_funcs {
	48	/* update_wm is for legacy wm management */
	49	void (update_wm)(struct drm_i915_private dev_priv);
	50	int (compute_pipe_wm)(struct intel_atomic_state state,
	51	struct intel_crtc *crtc);
	52	int (compute_intermediate_wm)(struct intel_atomic_state state,
	53	struct intel_crtc *crtc);
	54	void (initial_watermarks)(struct intel_atomic_state state,
	55	struct intel_crtc *crtc);
	56	void (atomic_update_watermarks)(struct intel_atomic_state state,
	57	struct intel_crtc *crtc);
	58	void (optimize_watermarks)(struct intel_atomic_state state,
	59	struct intel_crtc *crtc);
	60	int (compute_global_watermarks)(struct intel_atomic_state state);
	61	};
	62
4be1c12c JN	63	struct intel_audio {
	64	/* hda/i915 audio component */
	65	struct i915_audio_component *component;
	66	bool component_registered;
	67	/* mutex for audio/video sync */
	68	struct mutex mutex;
	69	int power_refcount;
	70	u32 freq_cntrl;
	71
	72	/* Used to save the pipe-to-encoder mapping for audio */
	73	struct intel_encoder *encoder_map[I915_MAX_PIPES];
	74
	75	/* necessary resource sharing with HDMI LPE audio driver. */
	76	struct {
	77	struct platform_device *platdev;
	78	int irq;
	79	} lpe;
	80	};
	81
3b10f851 JN	82	struct intel_display {
	83	/* Display functions */
	84	struct {
	85	/* Top level crtc-ish functions */
	86	const struct intel_display_funcs *display;
986531bd JN	87
	88	/* Display CDCLK functions */
	89	const struct intel_cdclk_funcs *cdclk;
ae611d17 JN	90
	91	/* Display pll funcs */
	92	const struct intel_dpll_funcs *dpll;
5a04eb5b JN	93
	94	/* irq display functions */
	95	const struct intel_hotplug_funcs *hotplug;
103472c1 JN	96
	97	/* pm display functions */
	98	const struct intel_wm_funcs *wm;
06a50913 JN	99
	100	/* fdi display functions */
	101	const struct intel_fdi_funcs *fdi;
34dc3cc5 JN	102
	103	/* Display internal color functions */
	104	const struct intel_color_funcs *color;
4be1c12c JN	105
	106	/* Display internal audio functions */
	107	const struct intel_audio_funcs *audio;
3b10f851	108	} funcs;
203eb5a9 JN	109
	110	/* Grouping using anonymous structs. Keep sorted. */
	111	struct {
	112	/*
	113	* Base address of where the gmbus and gpio blocks are located
	114	* (either on PCH or on SoC for platforms without PCH).
	115	*/
	116	u32 mmio_base;
	117
	118	/*
	119	* gmbus.mutex protects against concurrent usage of the single
	120	* hw gmbus controller on different i2c buses.
	121	*/
	122	struct mutex mutex;
	123
	124	struct intel_gmbus *bus[GMBUS_NUM_PINS];
	125
	126	wait_queue_head_t wait_queue;
	127	} gmbus;
12dc5082 JN	128
	129	struct {
	130	u32 mmio_base;
	131
	132	/* protects panel power sequencer state */
	133	struct mutex mutex;
	134	} pps;
6c77055a JN	135
6c77055a JN	136	/* Grouping using named structs. Keep sorted. */
4be1c12c	137	struct intel_audio audio;
6c77055a	138	struct intel_dmc dmc;
3b10f851 JN	139	};
	140
	141	#endif /* __INTEL_DISPLAY_CORE_H__ */