[linux-2.6-block.git] / drivers / gpu / drm / fsl-dcu / fsl_dcu_drm_drv.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2015 Freescale Semiconductor, Inc.
 *
 * Freescale DCU drm device driver
 */

#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/console.h>
#include <linux/io.h>
#include <linux/mfd/syscon.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>

#include <drm/drm_atomic_helper.h>
#include <drm/drm_drv.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_gem_dma_helper.h>
#include <drm/drm_modeset_helper.h>
#include <drm/drm_module.h>
#include <drm/drm_probe_helper.h>
#include <drm/drm_vblank.h>

#include "fsl_dcu_drm_crtc.h"
#include "fsl_dcu_drm_drv.h"
#include "fsl_tcon.h"

static int legacyfb_depth = 24;
module_param(legacyfb_depth, int, 0444);

static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
{
	if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE)
		return true;

	return false;
}

static const struct regmap_config fsl_dcu_regmap_config = {
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,

	.volatile_reg = fsl_dcu_drm_is_volatile_reg,
};

static void fsl_dcu_irq_reset(struct drm_device *dev)
{
	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;

	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0);
	regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
}

static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
{
	struct drm_device *dev = arg;
	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
	unsigned int int_status;
	int ret;

	ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
	if (ret) {
		dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
		return IRQ_NONE;
	}

	if (int_status & DCU_INT_STATUS_VBLANK)
		drm_handle_vblank(dev, 0);

	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);

	return IRQ_HANDLED;
}

static int fsl_dcu_irq_install(struct drm_device *dev, unsigned int irq)
{
	if (irq == IRQ_NOTCONNECTED)
		return -ENOTCONN;

	fsl_dcu_irq_reset(dev);

	return request_irq(irq, fsl_dcu_drm_irq, 0, dev->driver->name, dev);
}

static void fsl_dcu_irq_uninstall(struct drm_device *dev)
{
	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;

	fsl_dcu_irq_reset(dev);
	free_irq(fsl_dev->irq, dev);
}

static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
{
	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
	int ret;

	ret = fsl_dcu_drm_modeset_init(fsl_dev);
	if (ret < 0) {
		dev_err(dev->dev, "failed to initialize mode setting\n");
		return ret;
	}

	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
	if (ret < 0) {
		dev_err(dev->dev, "failed to initialize vblank\n");
		goto done_vblank;
	}

	ret = fsl_dcu_irq_install(dev, fsl_dev->irq);
	if (ret < 0) {
		dev_err(dev->dev, "failed to install IRQ handler\n");
		goto done_irq;
	}

	if (legacyfb_depth != 16 && legacyfb_depth != 24 &&
	    legacyfb_depth != 32) {
		dev_warn(dev->dev,
			"Invalid legacyfb_depth.  Defaulting to 24bpp\n");
		legacyfb_depth = 24;
	}

	return 0;
done_irq:
	drm_kms_helper_poll_fini(dev);

	drm_mode_config_cleanup(dev);
done_vblank:
	dev->dev_private = NULL;

	return ret;
}

static void fsl_dcu_unload(struct drm_device *dev)
{
	drm_atomic_helper_shutdown(dev);
	drm_kms_helper_poll_fini(dev);

	drm_mode_config_cleanup(dev);
	fsl_dcu_irq_uninstall(dev);

	dev->dev_private = NULL;
}

DEFINE_DRM_GEM_DMA_FOPS(fsl_dcu_drm_fops);

static const struct drm_driver fsl_dcu_drm_driver = {
	.driver_features	= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
	.load			= fsl_dcu_load,
	.unload			= fsl_dcu_unload,
	DRM_GEM_DMA_DRIVER_OPS,
	.fops			= &fsl_dcu_drm_fops,
	.name			= "fsl-dcu-drm",
	.desc			= "Freescale DCU DRM",
	.date			= "20160425",
	.major			= 1,
	.minor			= 1,
};

#ifdef CONFIG_PM_SLEEP
static int fsl_dcu_drm_pm_suspend(struct device *dev)
{
	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
	int ret;

	if (!fsl_dev)
		return 0;

	disable_irq(fsl_dev->irq);

	ret = drm_mode_config_helper_suspend(fsl_dev->drm);
	if (ret) {
		enable_irq(fsl_dev->irq);
		return ret;
	}

	clk_disable_unprepare(fsl_dev->clk);

	return 0;
}

static int fsl_dcu_drm_pm_resume(struct device *dev)
{
	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
	int ret;

	if (!fsl_dev)
		return 0;

	ret = clk_prepare_enable(fsl_dev->clk);
	if (ret < 0) {
		dev_err(dev, "failed to enable dcu clk\n");
		return ret;
	}

	if (fsl_dev->tcon)
		fsl_tcon_bypass_enable(fsl_dev->tcon);
	fsl_dcu_drm_init_planes(fsl_dev->drm);
	enable_irq(fsl_dev->irq);

	drm_mode_config_helper_resume(fsl_dev->drm);

	return 0;
}
#endif

static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
};

static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
	.name = "ls1021a",
	.total_layer = 16,
	.max_layer = 4,
	.layer_regs = LS1021A_LAYER_REG_NUM,
};

static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
	.name = "vf610",
	.total_layer = 64,
	.max_layer = 6,
	.layer_regs = VF610_LAYER_REG_NUM,
};

static const struct of_device_id fsl_dcu_of_match[] = {
	{
		.compatible = "fsl,ls1021a-dcu",
		.data = &fsl_dcu_ls1021a_data,
	}, {
		.compatible = "fsl,vf610-dcu",
		.data = &fsl_dcu_vf610_data,
	}, {
	},
};
MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);

static int fsl_dcu_drm_probe(struct platform_device *pdev)
{
	struct fsl_dcu_drm_device *fsl_dev;
	struct drm_device *drm;
	struct device *dev = &pdev->dev;
	struct resource *res;
	void __iomem *base;
	struct clk *pix_clk_in;
	char pix_clk_name[32];
	const char *pix_clk_in_name;
	const struct of_device_id *id;
	int ret;
	u8 div_ratio_shift = 0;

	fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
	if (!fsl_dev)
		return -ENOMEM;

	id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
	if (!id)
		return -ENODEV;
	fsl_dev->soc = id->data;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	base = devm_ioremap_resource(dev, res);
	if (IS_ERR(base)) {
		ret = PTR_ERR(base);
		return ret;
	}

	fsl_dev->irq = platform_get_irq(pdev, 0);
	if (fsl_dev->irq < 0) {
		dev_err(dev, "failed to get irq\n");
		return fsl_dev->irq;
	}

	fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
			&fsl_dcu_regmap_config);
	if (IS_ERR(fsl_dev->regmap)) {
		dev_err(dev, "regmap init failed\n");
		return PTR_ERR(fsl_dev->regmap);
	}

	fsl_dev->clk = devm_clk_get(dev, "dcu");
	if (IS_ERR(fsl_dev->clk)) {
		dev_err(dev, "failed to get dcu clock\n");
		return PTR_ERR(fsl_dev->clk);
	}
	ret = clk_prepare_enable(fsl_dev->clk);
	if (ret < 0) {
		dev_err(dev, "failed to enable dcu clk\n");
		return ret;
	}

	pix_clk_in = devm_clk_get(dev, "pix");
	if (IS_ERR(pix_clk_in)) {
		/* legancy binding, use dcu clock as pixel clock input */
		pix_clk_in = fsl_dev->clk;
	}

	if (of_property_read_bool(dev->of_node, "big-endian"))
		div_ratio_shift = 24;

	pix_clk_in_name = __clk_get_name(pix_clk_in);
	snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
	fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
			pix_clk_in_name, 0, base + DCU_DIV_RATIO,
			div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
	if (IS_ERR(fsl_dev->pix_clk)) {
		dev_err(dev, "failed to register pix clk\n");
		ret = PTR_ERR(fsl_dev->pix_clk);
		goto disable_clk;
	}

	fsl_dev->tcon = fsl_tcon_init(dev);

	drm = drm_dev_alloc(&fsl_dcu_drm_driver, dev);
	if (IS_ERR(drm)) {
		ret = PTR_ERR(drm);
		goto unregister_pix_clk;
	}

	fsl_dev->dev = dev;
	fsl_dev->drm = drm;
	fsl_dev->np = dev->of_node;
	drm->dev_private = fsl_dev;
	dev_set_drvdata(dev, fsl_dev);

	ret = drm_dev_register(drm, 0);
	if (ret < 0)
		goto put;

	drm_fbdev_generic_setup(drm, legacyfb_depth);

	return 0;

put:
	drm_dev_put(drm);
unregister_pix_clk:
	clk_unregister(fsl_dev->pix_clk);
disable_clk:
	clk_disable_unprepare(fsl_dev->clk);
	return ret;
}

static int fsl_dcu_drm_remove(struct platform_device *pdev)
{
	struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);

	drm_dev_unregister(fsl_dev->drm);
	drm_dev_put(fsl_dev->drm);
	clk_disable_unprepare(fsl_dev->clk);
	clk_unregister(fsl_dev->pix_clk);

	return 0;
}

static struct platform_driver fsl_dcu_drm_platform_driver = {
	.probe		= fsl_dcu_drm_probe,
	.remove		= fsl_dcu_drm_remove,
	.driver		= {
		.name	= "fsl-dcu",
		.pm	= &fsl_dcu_drm_pm_ops,
		.of_match_table = fsl_dcu_of_match,
	},
};

drm_module_platform_driver(fsl_dcu_drm_platform_driver);

MODULE_DESCRIPTION("Freescale DCU DRM Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
109eee2f JW	2	/*
	3	* Copyright 2015 Freescale Semiconductor, Inc.
	4	*
	5	* Freescale DCU drm device driver
109eee2f JW	6	*/
	7
	8	#include <linux/clk.h>
	9	#include <linux/clk-provider.h>
a8db4324	10	#include <linux/console.h>
109eee2f JW	11	#include <linux/io.h>
	12	#include <linux/mfd/syscon.h>
	13	#include <linux/mm.h>
	14	#include <linux/module.h>
	15	#include <linux/of_platform.h>
	16	#include <linux/platform_device.h>
	17	#include <linux/pm.h>
	18	#include <linux/pm_runtime.h>
	19	#include <linux/regmap.h>
	20
a8db4324	21	#include <drm/drm_atomic_helper.h>
b4b21c83	22	#include <drm/drm_drv.h>
f4d26fa9	23	#include <drm/drm_fb_helper.h>
4a83c26a	24	#include <drm/drm_gem_dma_helper.h>
3b712391	25	#include <drm/drm_modeset_helper.h>
f4b5091d	26	#include <drm/drm_module.h>
fcd70cd3	27	#include <drm/drm_probe_helper.h>
b4b21c83	28	#include <drm/drm_vblank.h>
109eee2f JW	29
	30	#include "fsl_dcu_drm_crtc.h"
	31	#include "fsl_dcu_drm_drv.h"
fb127b79	32	#include "fsl_tcon.h"
109eee2f	33
73fe26a4 SA	34	static int legacyfb_depth = 24;
	35	module_param(legacyfb_depth, int, 0444);
	36
efb8b491 SA	37	static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
	38	{
	39	if (reg == DCU_INT_STATUS \|\| reg == DCU_UPDATE_MODE)
	40	return true;
	41
	42	return false;
	43	}
	44
109eee2f JW	45	static const struct regmap_config fsl_dcu_regmap_config = {
	46	.reg_bits = 32,
	47	.reg_stride = 4,
	48	.val_bits = 32,
efb8b491 SA	49
efb8b491 SA	50	.volatile_reg = fsl_dcu_drm_is_volatile_reg,
109eee2f JW	51	};
109eee2f JW	52
03ac16e5	53	static void fsl_dcu_irq_reset(struct drm_device *dev)
109eee2f JW	54	{
109eee2f JW	55	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
109eee2f	56
685ec6eb	57	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0);
638c93f6	58	regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
109eee2f JW	59	}
109eee2f JW	60
03ac16e5 TZ	61	static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
	62	{
	63	struct drm_device *dev = arg;
	64	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
	65	unsigned int int_status;
	66	int ret;
	67
	68	ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
	69	if (ret) {
	70	dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
	71	return IRQ_NONE;
	72	}
	73
	74	if (int_status & DCU_INT_STATUS_VBLANK)
	75	drm_handle_vblank(dev, 0);
	76
	77	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
	78
	79	return IRQ_HANDLED;
	80	}
	81
	82	static int fsl_dcu_irq_install(struct drm_device *dev, unsigned int irq)
	83	{
	84	if (irq == IRQ_NOTCONNECTED)
	85	return -ENOTCONN;
	86
	87	fsl_dcu_irq_reset(dev);
	88
	89	return request_irq(irq, fsl_dcu_drm_irq, 0, dev->driver->name, dev);
	90	}
	91
	92	static void fsl_dcu_irq_uninstall(struct drm_device *dev)
	93	{
	94	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
	95
	96	fsl_dcu_irq_reset(dev);
	97	free_irq(fsl_dev->irq, dev);
	98	}
	99
b617966c	100	static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
109eee2f	101	{
b617966c	102	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
109eee2f JW	103	int ret;
	104
	105	ret = fsl_dcu_drm_modeset_init(fsl_dev);
	106	if (ret < 0) {
b617966c	107	dev_err(dev->dev, "failed to initialize mode setting\n");
109eee2f JW	108	return ret;
	109	}
	110
b617966c	111	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
109eee2f	112	if (ret < 0) {
b617966c	113	dev_err(dev->dev, "failed to initialize vblank\n");
03ac16e5	114	goto done_vblank;
109eee2f	115	}
109eee2f	116
03ac16e5	117	ret = fsl_dcu_irq_install(dev, fsl_dev->irq);
685ec6eb SA	118	if (ret < 0) {
685ec6eb SA	119	dev_err(dev->dev, "failed to install IRQ handler\n");
03ac16e5	120	goto done_irq;
685ec6eb	121	}
109eee2f	122
73fe26a4 SA	123	if (legacyfb_depth != 16 && legacyfb_depth != 24 &&
	124	legacyfb_depth != 32) {
	125	dev_warn(dev->dev,
	126	"Invalid legacyfb_depth. Defaulting to 24bpp\n");
	127	legacyfb_depth = 24;
	128	}
109eee2f JW	129
109eee2f JW	130	return 0;
03ac16e5	131	done_irq:
7d17a626 SA	132	drm_kms_helper_poll_fini(dev);
7d17a626 SA	133
b617966c	134	drm_mode_config_cleanup(dev);
03ac16e5	135	done_vblank:
b617966c	136	dev->dev_private = NULL;
109eee2f JW	137
	138	return ret;
	139	}
	140
11b3c20b	141	static void fsl_dcu_unload(struct drm_device *dev)
109eee2f	142	{
09cedcb6	143	drm_atomic_helper_shutdown(dev);
7d17a626 SA	144	drm_kms_helper_poll_fini(dev);
7d17a626 SA	145
109eee2f	146	drm_mode_config_cleanup(dev);
03ac16e5	147	fsl_dcu_irq_uninstall(dev);
109eee2f JW	148
109eee2f JW	149	dev->dev_private = NULL;
109eee2f JW	150	}
109eee2f JW	151
4a83c26a	152	DEFINE_DRM_GEM_DMA_FOPS(fsl_dcu_drm_fops);
109eee2f	153
70a59dd8	154	static const struct drm_driver fsl_dcu_drm_driver = {
0424fdaf	155	.driver_features = DRIVER_GEM \| DRIVER_MODESET \| DRIVER_ATOMIC,
109eee2f JW	156	.load = fsl_dcu_load,
109eee2f JW	157	.unload = fsl_dcu_unload,
4a83c26a	158	DRM_GEM_DMA_DRIVER_OPS,
109eee2f JW	159	.fops = &fsl_dcu_drm_fops,
	160	.name = "fsl-dcu-drm",
	161	.desc = "Freescale DCU DRM",
0449eefe	162	.date = "20160425",
109eee2f	163	.major = 1,
0449eefe	164	.minor = 1,
109eee2f JW	165	};
	166
	167	#ifdef CONFIG_PM_SLEEP
	168	static int fsl_dcu_drm_pm_suspend(struct device *dev)
	169	{
	170	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
3b712391	171	int ret;
109eee2f JW	172
	173	if (!fsl_dev)
	174	return 0;
	175
a8db4324	176	disable_irq(fsl_dev->irq);
a8db4324	177
3b712391 NT	178	ret = drm_mode_config_helper_suspend(fsl_dev->drm);
3b712391 NT	179	if (ret) {
a8db4324	180	enable_irq(fsl_dev->irq);
3b712391	181	return ret;
a8db4324 SA	182	}
a8db4324 SA	183
ff09b41f	184	clk_disable_unprepare(fsl_dev->clk);
109eee2f JW	185
	186	return 0;
	187	}
	188
	189	static int fsl_dcu_drm_pm_resume(struct device *dev)
	190	{
	191	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
	192	int ret;
	193
	194	if (!fsl_dev)
	195	return 0;
	196
ff09b41f	197	ret = clk_prepare_enable(fsl_dev->clk);
109eee2f JW	198	if (ret < 0) {
109eee2f JW	199	dev_err(dev, "failed to enable dcu clk\n");
109eee2f JW	200	return ret;
109eee2f JW	201	}
109eee2f	202
8dedefbc SA	203	if (fsl_dev->tcon)
8dedefbc SA	204	fsl_tcon_bypass_enable(fsl_dev->tcon);
a8db4324	205	fsl_dcu_drm_init_planes(fsl_dev->drm);
9fd99f4f	206	enable_irq(fsl_dev->irq);
a8db4324	207
3b712391	208	drm_mode_config_helper_resume(fsl_dev->drm);
109eee2f JW	209
	210	return 0;
	211	}
	212	#endif
	213
	214	static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
	215	SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
	216	};
	217
	218	static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
	219	.name = "ls1021a",
	220	.total_layer = 16,
	221	.max_layer = 4,
6aaf5a49	222	.layer_regs = LS1021A_LAYER_REG_NUM,
109eee2f JW	223	};
	224
	225	static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
	226	.name = "vf610",
	227	.total_layer = 64,
	228	.max_layer = 6,
6aaf5a49	229	.layer_regs = VF610_LAYER_REG_NUM,
109eee2f JW	230	};
	231
	232	static const struct of_device_id fsl_dcu_of_match[] = {
	233	{
	234	.compatible = "fsl,ls1021a-dcu",
	235	.data = &fsl_dcu_ls1021a_data,
	236	}, {
	237	.compatible = "fsl,vf610-dcu",
	238	.data = &fsl_dcu_vf610_data,
	239	}, {
	240	},
	241	};
	242	MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);
	243
	244	static int fsl_dcu_drm_probe(struct platform_device *pdev)
	245	{
	246	struct fsl_dcu_drm_device *fsl_dev;
	247	struct drm_device *drm;
	248	struct device *dev = &pdev->dev;
	249	struct resource *res;
	250	void __iomem *base;
2d701449 SA	251	struct clk *pix_clk_in;
	252	char pix_clk_name[32];
	253	const char *pix_clk_in_name;
109eee2f JW	254	const struct of_device_id *id;
109eee2f JW	255	int ret;
6cc4758a	256	u8 div_ratio_shift = 0;
109eee2f JW	257
	258	fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
	259	if (!fsl_dev)
	260	return -ENOMEM;
	261
73fa3033 SA	262	id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
	263	if (!id)
	264	return -ENODEV;
	265	fsl_dev->soc = id->data;
	266
109eee2f	267	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
109eee2f JW	268	base = devm_ioremap_resource(dev, res);
	269	if (IS_ERR(base)) {
	270	ret = PTR_ERR(base);
	271	return ret;
	272	}
	273
	274	fsl_dev->irq = platform_get_irq(pdev, 0);
	275	if (fsl_dev->irq < 0) {
	276	dev_err(dev, "failed to get irq\n");
238e4f44	277	return fsl_dev->irq;
109eee2f JW	278	}
109eee2f JW	279
73fa3033 SA	280	fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
	281	&fsl_dcu_regmap_config);
	282	if (IS_ERR(fsl_dev->regmap)) {
	283	dev_err(dev, "regmap init failed\n");
	284	return PTR_ERR(fsl_dev->regmap);
	285	}
	286
109eee2f JW	287	fsl_dev->clk = devm_clk_get(dev, "dcu");
109eee2f JW	288	if (IS_ERR(fsl_dev->clk)) {
109eee2f	289	dev_err(dev, "failed to get dcu clock\n");
73fa3033	290	return PTR_ERR(fsl_dev->clk);
109eee2f	291	}
73fa3033	292	ret = clk_prepare_enable(fsl_dev->clk);
109eee2f JW	293	if (ret < 0) {
109eee2f JW	294	dev_err(dev, "failed to enable dcu clk\n");
109eee2f JW	295	return ret;
	296	}
	297
2d701449 SA	298	pix_clk_in = devm_clk_get(dev, "pix");
	299	if (IS_ERR(pix_clk_in)) {
	300	/* legancy binding, use dcu clock as pixel clock input */
	301	pix_clk_in = fsl_dev->clk;
	302	}
	303
6cc4758a SA	304	if (of_property_read_bool(dev->of_node, "big-endian"))
	305	div_ratio_shift = 24;
	306
2d701449 SA	307	pix_clk_in_name = __clk_get_name(pix_clk_in);
	308	snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
	309	fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
	310	pix_clk_in_name, 0, base + DCU_DIV_RATIO,
6cc4758a	311	div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
f93500f4	312	if (IS_ERR(fsl_dev->pix_clk)) {
2d701449 SA	313	dev_err(dev, "failed to register pix clk\n");
	314	ret = PTR_ERR(fsl_dev->pix_clk);
	315	goto disable_clk;
f93500f4	316	}
2d701449	317
fb127b79 SA	318	fsl_dev->tcon = fsl_tcon_init(dev);
fb127b79 SA	319
70a59dd8	320	drm = drm_dev_alloc(&fsl_dcu_drm_driver, dev);
0f288605 TG	321	if (IS_ERR(drm)) {
0f288605 TG	322	ret = PTR_ERR(drm);
0a70c998	323	goto unregister_pix_clk;
73fa3033	324	}
109eee2f JW	325
	326	fsl_dev->dev = dev;
	327	fsl_dev->drm = drm;
	328	fsl_dev->np = dev->of_node;
	329	drm->dev_private = fsl_dev;
	330	dev_set_drvdata(dev, fsl_dev);
109eee2f JW	331
	332	ret = drm_dev_register(drm, 0);
	333	if (ret < 0)
a74c0aa5	334	goto put;
109eee2f	335
f4d26fa9 NT	336	drm_fbdev_generic_setup(drm, legacyfb_depth);
f4d26fa9 NT	337
109eee2f JW	338	return 0;
109eee2f JW	339
a74c0aa5 TZ	340	put:
a74c0aa5 TZ	341	drm_dev_put(drm);
2d701449 SA	342	unregister_pix_clk:
2d701449 SA	343	clk_unregister(fsl_dev->pix_clk);
73fa3033 SA	344	disable_clk:
73fa3033 SA	345	clk_disable_unprepare(fsl_dev->clk);
109eee2f JW	346	return ret;
	347	}
	348
	349	static int fsl_dcu_drm_remove(struct platform_device *pdev)
	350	{
	351	struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
	352
c4085743	353	drm_dev_unregister(fsl_dev->drm);
a74c0aa5	354	drm_dev_put(fsl_dev->drm);
73fa3033	355	clk_disable_unprepare(fsl_dev->clk);
2d701449	356	clk_unregister(fsl_dev->pix_clk);
109eee2f JW	357
	358	return 0;
	359	}
	360
	361	static struct platform_driver fsl_dcu_drm_platform_driver = {
	362	.probe = fsl_dcu_drm_probe,
	363	.remove = fsl_dcu_drm_remove,
	364	.driver = {
	365	.name = "fsl-dcu",
	366	.pm = &fsl_dcu_drm_pm_ops,
	367	.of_match_table = fsl_dcu_of_match,
	368	},
	369	};
	370
f4b5091d	371	drm_module_platform_driver(fsl_dcu_drm_platform_driver);
109eee2f JW	372
	373	MODULE_DESCRIPTION("Freescale DCU DRM Driver");
	374	MODULE_LICENSE("GPL");