projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
drm/exynos: gsc: Convert driver to IPP v2 core API
[linux-2.6-block.git] / drivers / gpu / drm / exynos / exynos_drm_drv.h
CommitLineData
1c248b7d
ID		 1/* exynos_drm_drv.h
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * Authors:
5 * Inki Dae <inki.dae@samsung.com>
6 * Joonyoung Shim <jy0922.shim@samsung.com>
7 * Seung-Woo Kim <sw0312.kim@samsung.com>
8 *
d81aecb5
ID		 9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
1c248b7d
ID		 13 */
14
15#ifndef _EXYNOS_DRM_DRV_H_
16#define _EXYNOS_DRM_DRV_H_
17
d2c1bba3 18#include <drm/drmP.h>
4f9eb94f 19#include <linux/module.h>
1c248b7d 20
b73d1230 21#define MAX_CRTC 3
864ee9e6 22#define MAX_PLANE 5
b73d1230 23#define MAX_FB_BUFFER 4
1c248b7d 24
5d3d0995
GP		 25#define DEFAULT_WIN 0
26
357193cd 27#define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc, base)
8837deea 28#define to_exynos_plane(x) container_of(x, struct exynos_drm_plane, base)
ffceaed6 29
1c248b7d
ID		 30/* this enumerates display type. */
31enum exynos_drm_output_type {
32 EXYNOS_DISPLAY_TYPE_NONE,
33 /* RGB or CPU Interface. */
34 EXYNOS_DISPLAY_TYPE_LCD,
35 /* HDMI Interface. */
36 EXYNOS_DISPLAY_TYPE_HDMI,
b73d1230
ID		 37 /* Virtual Display Interface. */
38 EXYNOS_DISPLAY_TYPE_VIDI,
1c248b7d
ID		 39};
40
0114f404
MS		 41struct exynos_drm_rect {
42 unsigned int x, y;
43 unsigned int w, h;
44};
45
1c248b7d 46/*
0114f404 47 * Exynos drm plane state structure.
1c248b7d 48 *
0114f404
MS		 49 * @base: plane_state object (contains drm_framebuffer pointer)
50 * @src: rectangle of the source image data to be displayed (clipped to
51 * visible part).
52 * @crtc: rectangle of the target image position on hardware screen
53 * (clipped to visible part).
3cabaf7e
JS		 54 * @h_ratio: horizontal scaling ratio, 16.16 fixed point
55 * @v_ratio: vertical scaling ratio, 16.16 fixed point
0114f404
MS		 56 *
57 * this structure consists plane state data that will be applied to hardware
58 * specific overlay info.
59 */
60
61struct exynos_drm_plane_state {
62 struct drm_plane_state base;
63 struct exynos_drm_rect crtc;
64 struct exynos_drm_rect src;
65 unsigned int h_ratio;
66 unsigned int v_ratio;
67};
68
69static inline struct exynos_drm_plane_state *
70to_exynos_plane_state(struct drm_plane_state *state)
71{
72 return container_of(state, struct exynos_drm_plane_state, base);
73}
74
75/*
76 * Exynos drm common overlay structure.
77 *
78 * @base: plane object
40bdfb0a 79 * @index: hardware index of the overlay layer
1c248b7d
ID		 80 *
81 * this structure is common to exynos SoC and its contents would be copied
82 * to hardware specific overlay info.
83 */
8837deea
GP		 84
85struct exynos_drm_plane {
86 struct drm_plane base;
fd2d2fc2 87 const struct exynos_drm_plane_config *config;
40bdfb0a 88 unsigned int index;
1c248b7d
ID		 89};
90
6178d3d1
MS		 91#define EXYNOS_DRM_PLANE_CAP_DOUBLE (1 << 0)
92#define EXYNOS_DRM_PLANE_CAP_SCALE (1 << 1)
0ea72405 93#define EXYNOS_DRM_PLANE_CAP_ZPOS (1 << 2)
f40031c2 94#define EXYNOS_DRM_PLANE_CAP_TILE (1 << 3)
6178d3d1 95
fd2d2fc2
MS		 96/*
97 * Exynos DRM plane configuration structure.
98 *
0ea72405 99 * @zpos: initial z-position of the plane.
fd2d2fc2
MS		 100 * @type: type of the plane (primary, cursor or overlay).
101 * @pixel_formats: supported pixel formats.
102 * @num_pixel_formats: number of elements in 'pixel_formats'.
103 * @capabilities: supported features (see EXYNOS_DRM_PLANE_CAP_*)
104 */
105
106struct exynos_drm_plane_config {
107 unsigned int zpos;
108 enum drm_plane_type type;
109 const uint32_t *pixel_formats;
110 unsigned int num_pixel_formats;
111 unsigned int capabilities;
112};
113
1c248b7d 114/*
93bca243 115 * Exynos drm crtc ops
1c248b7d 116 *
3cecda03
GP		 117 * @enable: enable the device
118 * @disable: disable the device
1c248b7d
ID		 119 * @enable_vblank: specific driver callback for enabling vblank interrupt.
120 * @disable_vblank: specific driver callback for disabling vblank interrupt.
c3653fed 121 * @mode_valid: specific driver callback for mode validation
5625b341 122 * @atomic_check: validate state
d29c2c14
MS		 123 * @atomic_begin: prepare device to receive an update
124 * @atomic_flush: mark the end of device update
9cc7610a
GP		 125 * @update_plane: apply hardware specific overlay data to registers.
126 * @disable_plane: disable hardware specific overlay.
5595d4d8
YC		 127 * @te_handler: trigger to transfer video image at the tearing effect
128 * synchronization signal if there is a page flip request.
1c248b7d 129 */
93bca243
GP		 130struct exynos_drm_crtc;
131struct exynos_drm_crtc_ops {
3cecda03
GP		 132 void (*enable)(struct exynos_drm_crtc *crtc);
133 void (*disable)(struct exynos_drm_crtc *crtc);
93bca243
GP		 134 int (*enable_vblank)(struct exynos_drm_crtc *crtc);
135 void (*disable_vblank)(struct exynos_drm_crtc *crtc);
0586feba 136 u32 (*get_vblank_counter)(struct exynos_drm_crtc *crtc);
c3653fed
AH		 137 enum drm_mode_status (*mode_valid)(struct exynos_drm_crtc *crtc,
138 const struct drm_display_mode *mode);
2466db97
AH		 139 bool (*mode_fixup)(struct exynos_drm_crtc *crtc,
140 const struct drm_display_mode *mode,
141 struct drm_display_mode *adjusted_mode);
5625b341
AH		 142 int (*atomic_check)(struct exynos_drm_crtc *crtc,
143 struct drm_crtc_state *state);
d29c2c14 144 void (*atomic_begin)(struct exynos_drm_crtc *crtc);
1e1d1393
GP		 145 void (*update_plane)(struct exynos_drm_crtc *crtc,
146 struct exynos_drm_plane *plane);
147 void (*disable_plane)(struct exynos_drm_crtc *crtc,
148 struct exynos_drm_plane *plane);
d29c2c14 149 void (*atomic_flush)(struct exynos_drm_crtc *crtc);
93bca243 150 void (*te_handler)(struct exynos_drm_crtc *crtc);
1c248b7d
ID		 151};
152
f26b9343
AH		 153struct exynos_drm_clk {
154 void (*enable)(struct exynos_drm_clk *clk, bool enable);
155};
156
2bf053eb
GP		 157/*
158 * Exynos specific crtc structure.
159 *
357193cd 160 * @base: crtc object.
5d1741ad 161 * @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI.
93bca243
GP		 162 * @ops: pointer to callbacks for exynos drm specific functionality
163 * @ctx: A pointer to the crtc's implementation specific context
e379cbee 164 * @pipe_clk: A pointer to the crtc's pipeline clock.
2bf053eb
GP		 165 */
166struct exynos_drm_crtc {
357193cd 167 struct drm_crtc base;
5d1741ad 168 enum exynos_drm_output_type type;
f3aaf762 169 const struct exynos_drm_crtc_ops *ops;
93bca243 170 void *ctx;
f26b9343 171 struct exynos_drm_clk *pipe_clk;
c038f538 172 bool i80_mode : 1;
2bf053eb
GP		 173};
174
f26b9343
AH		 175static inline void exynos_drm_pipe_clk_enable(struct exynos_drm_crtc *crtc,
176 bool enable)
177{
178 if (crtc->pipe_clk)
179 crtc->pipe_clk->enable(crtc->pipe_clk, enable);
180}
181
d7f1642c
JS		 182struct exynos_drm_g2d_private {
183 struct device *dev;
184 struct list_head inuse_cmdlist;
185 struct list_head event_list;
2a3098ff 186 struct list_head userptr_list;
d7f1642c
JS		 187};
188
189struct drm_exynos_file_private {
190 struct exynos_drm_g2d_private *g2d_priv;
191};
192
1c248b7d
ID		 193/*
194 * Exynos drm private structure.
0519f9a1 195 *
a379df19
GP		 196 * @pending: the crtcs that have pending updates to finish
197 * @lock: protect access to @pending
198 * @wait: wait an atomic commit to finish
1c248b7d
ID		 199 */
200struct exynos_drm_private {
201 struct drm_fb_helper *fb_helper;
6e8edf8a 202 struct drm_atomic_state *suspend_state;
1c248b7d 203
f43c3596 204 struct device *dma_dev;
f43c3596 205 void *mapping;
f37cd5e8 206
a379df19
GP		 207 /* for atomic commit */
208 u32 pending;
209 spinlock_t lock;
210 wait_queue_head_t wait;
1c248b7d
ID		 211};
212
f43c3596
MS		 213static inline struct device *to_dma_dev(struct drm_device *dev)
214{
215 struct exynos_drm_private *priv = dev->dev_private;
216
217 return priv->dma_dev;
218}
219
1c248b7d
ID		 220/*
221 * Exynos drm sub driver structure.
222 *
223 * @list: sub driver has its own list object to register to exynos drm driver.
677e84c1 224 * @dev: pointer to device object for subdrv device driver.
1c248b7d
ID		 225 * @drm_dev: pointer to drm_device and this pointer would be set
226 * when sub driver calls exynos_drm_subdrv_register().
227 * @probe: this callback would be called by exynos drm driver after
f37cd5e8 228 * subdrv is registered to it.
1c248b7d 229 * @remove: this callback is used to release resources created
f37cd5e8 230 * by probe callback.
9084f7b8
JS		 231 * @open: this would be called with drm device file open.
232 * @close: this would be called with drm device file close.
1c248b7d
ID		 233 */
234struct exynos_drm_subdrv {
235 struct list_head list;
677e84c1 236 struct device *dev;
1c248b7d
ID		 237 struct drm_device *drm_dev;
238
41c24346 239 int (*probe)(struct drm_device *drm_dev, struct device *dev);
29cb6025 240 void (*remove)(struct drm_device *drm_dev, struct device *dev);
9084f7b8
JS		 241 int (*open)(struct drm_device *drm_dev, struct device *dev,
242 struct drm_file *file);
243 void (*close)(struct drm_device *drm_dev, struct device *dev,
244 struct drm_file *file);
1c248b7d
ID		 245};
246
f37cd5e8 247 /* This function would be called by non kms drivers such as g2d and ipp. */
1c248b7d
ID		 248int exynos_drm_subdrv_register(struct exynos_drm_subdrv *drm_subdrv);
249
132a5b91 250/* this function removes subdrv list from exynos drm driver */
1c248b7d
ID		 251int exynos_drm_subdrv_unregister(struct exynos_drm_subdrv *drm_subdrv);
252
f37cd5e8
ID		 253int exynos_drm_device_subdrv_probe(struct drm_device *dev);
254int exynos_drm_device_subdrv_remove(struct drm_device *dev);
9084f7b8
JS		 255int exynos_drm_subdrv_open(struct drm_device *dev, struct drm_file *file);
256void exynos_drm_subdrv_close(struct drm_device *dev, struct drm_file *file);
257
14b6873a 258#ifdef CONFIG_DRM_EXYNOS_DPI
2b8376c8
GP		 259struct drm_encoder *exynos_dpi_probe(struct device *dev);
260int exynos_dpi_remove(struct drm_encoder *encoder);
261int exynos_dpi_bind(struct drm_device *dev, struct drm_encoder *encoder);
14b6873a 262#else
2b8376c8 263static inline struct drm_encoder *
dcdffeda 264exynos_dpi_probe(struct device *dev) { return NULL; }
2b8376c8 265static inline int exynos_dpi_remove(struct drm_encoder *encoder)
1c9ff4ab
GP		 266{
267 return 0;
268}
a2986e80 269static inline int exynos_dpi_bind(struct drm_device *dev,
2b8376c8 270 struct drm_encoder *encoder)
a2986e80
GP		 271{
272 return 0;
273}
14b6873a
AH		 274#endif
275
a379df19 276int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state,
1b3f09d8 277 bool nonblock);
38d868e4 278int exynos_atomic_check(struct drm_device *dev, struct drm_atomic_state *state);
a379df19 279
f37cd5e8 280
f37cd5e8 281extern struct platform_driver fimd_driver;
c8466a91 282extern struct platform_driver exynos5433_decon_driver;
96976c3d 283extern struct platform_driver decon_driver;
1417f109 284extern struct platform_driver dp_driver;
7eb8f069 285extern struct platform_driver dsi_driver;
132a5b91 286extern struct platform_driver mixer_driver;
f37cd5e8 287extern struct platform_driver hdmi_driver;
b73d1230 288extern struct platform_driver vidi_driver;
d7f1642c 289extern struct platform_driver g2d_driver;
16102edb 290extern struct platform_driver fimc_driver;
bea8a429 291extern struct platform_driver rotator_driver;
f2646380 292extern struct platform_driver gsc_driver;
77bbd891 293extern struct platform_driver mic_driver;
1c248b7d 294#endif
Linux 6.x block layer and io_uring tree(s)