Commit | Line | Data |
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1c248b7d ID |
1 | /* exynos_drm_drv.h |
2 | * | |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
4 | * Authors: | |
5 | * Inki Dae <inki.dae@samsung.com> | |
6 | * Joonyoung Shim <jy0922.shim@samsung.com> | |
7 | * Seung-Woo Kim <sw0312.kim@samsung.com> | |
8 | * | |
d81aecb5 ID |
9 | * This program is free software; you can redistribute it and/or modify it |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
1c248b7d ID |
13 | */ |
14 | ||
15 | #ifndef _EXYNOS_DRM_DRV_H_ | |
16 | #define _EXYNOS_DRM_DRV_H_ | |
17 | ||
d2c1bba3 | 18 | #include <drm/drmP.h> |
4f9eb94f | 19 | #include <linux/module.h> |
1c248b7d | 20 | |
b73d1230 | 21 | #define MAX_CRTC 3 |
864ee9e6 | 22 | #define MAX_PLANE 5 |
b73d1230 | 23 | #define MAX_FB_BUFFER 4 |
1c248b7d | 24 | |
cf67cc9a | 25 | #define to_exynos_encoder(x) container_of(x, struct exynos_drm_encoder, base) |
357193cd | 26 | #define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc, base) |
8837deea | 27 | #define to_exynos_plane(x) container_of(x, struct exynos_drm_plane, base) |
ffceaed6 | 28 | |
1c248b7d ID |
29 | /* this enumerates display type. */ |
30 | enum exynos_drm_output_type { | |
31 | EXYNOS_DISPLAY_TYPE_NONE, | |
32 | /* RGB or CPU Interface. */ | |
33 | EXYNOS_DISPLAY_TYPE_LCD, | |
34 | /* HDMI Interface. */ | |
35 | EXYNOS_DISPLAY_TYPE_HDMI, | |
b73d1230 ID |
36 | /* Virtual Display Interface. */ |
37 | EXYNOS_DISPLAY_TYPE_VIDI, | |
1c248b7d ID |
38 | }; |
39 | ||
1c248b7d ID |
40 | /* |
41 | * Exynos drm common overlay structure. | |
42 | * | |
8837deea | 43 | * @base: plane object |
cb8a3db2 | 44 | * @src_x: offset x on a framebuffer to be displayed. |
19c8b834 | 45 | * - the unit is screen coordinates. |
cb8a3db2 | 46 | * @src_y: offset y on a framebuffer to be displayed. |
19c8b834 | 47 | * - the unit is screen coordinates. |
d88d2463 GP |
48 | * @src_w: width of a partial image to be displayed from framebuffer. |
49 | * @src_h: height of a partial image to be displayed from framebuffer. | |
19c8b834 ID |
50 | * @crtc_x: offset x on hardware screen. |
51 | * @crtc_y: offset y on hardware screen. | |
d88d2463 GP |
52 | * @crtc_w: window width to be displayed (hardware screen). |
53 | * @crtc_h: window height to be displayed (hardware screen). | |
3cabaf7e JS |
54 | * @h_ratio: horizontal scaling ratio, 16.16 fixed point |
55 | * @v_ratio: vertical scaling ratio, 16.16 fixed point | |
229d3534 SWK |
56 | * @dma_addr: array of bus(accessed by dma) address to the memory region |
57 | * allocated for a overlay. | |
864ee9e6 | 58 | * @zpos: order of overlay layer(z position). |
1c248b7d ID |
59 | * |
60 | * this structure is common to exynos SoC and its contents would be copied | |
61 | * to hardware specific overlay info. | |
62 | */ | |
8837deea GP |
63 | |
64 | struct exynos_drm_plane { | |
65 | struct drm_plane base; | |
cb8a3db2 JS |
66 | unsigned int src_x; |
67 | unsigned int src_y; | |
d88d2463 GP |
68 | unsigned int src_w; |
69 | unsigned int src_h; | |
19c8b834 ID |
70 | unsigned int crtc_x; |
71 | unsigned int crtc_y; | |
d88d2463 GP |
72 | unsigned int crtc_w; |
73 | unsigned int crtc_h; | |
3cabaf7e JS |
74 | unsigned int h_ratio; |
75 | unsigned int v_ratio; | |
229d3534 | 76 | dma_addr_t dma_addr[MAX_FB_BUFFER]; |
6e2a3b66 | 77 | unsigned int zpos; |
1c248b7d ID |
78 | }; |
79 | ||
80 | /* | |
cf67cc9a | 81 | * Exynos DRM Encoder Structure. |
1c248b7d ID |
82 | * - this structure is common to analog tv, digital tv and lcd panel. |
83 | * | |
080be03d SP |
84 | * @mode_fixup: fix mode data comparing to hw specific display mode. |
85 | * @mode_set: convert drm_display_mode to hw specific display mode and | |
86 | * would be called by encoder->mode_set(). | |
b6595dc7 GP |
87 | * @enable: display device on. |
88 | * @disable: display device off. | |
1c248b7d | 89 | */ |
cf67cc9a GP |
90 | struct exynos_drm_encoder; |
91 | struct exynos_drm_encoder_ops { | |
cf67cc9a | 92 | void (*mode_fixup)(struct exynos_drm_encoder *encoder, |
080be03d SP |
93 | struct drm_connector *connector, |
94 | const struct drm_display_mode *mode, | |
95 | struct drm_display_mode *adjusted_mode); | |
cf67cc9a | 96 | void (*mode_set)(struct exynos_drm_encoder *encoder, |
080be03d | 97 | struct drm_display_mode *mode); |
cf67cc9a GP |
98 | void (*enable)(struct exynos_drm_encoder *encoder); |
99 | void (*disable)(struct exynos_drm_encoder *encoder); | |
080be03d SP |
100 | }; |
101 | ||
102 | /* | |
cf67cc9a | 103 | * exynos specific encoder structure. |
080be03d | 104 | * |
cf67cc9a | 105 | * @drm_encoder: encoder object. |
080be03d | 106 | * @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI. |
080be03d | 107 | * @ops: pointer to callbacks for exynos drm specific functionality |
080be03d | 108 | */ |
cf67cc9a GP |
109 | struct exynos_drm_encoder { |
110 | struct drm_encoder base; | |
111 | struct exynos_drm_encoder_ops *ops; | |
1c248b7d ID |
112 | }; |
113 | ||
114 | /* | |
93bca243 | 115 | * Exynos drm crtc ops |
1c248b7d | 116 | * |
3cecda03 GP |
117 | * @enable: enable the device |
118 | * @disable: disable the device | |
4b405269 | 119 | * @mode_fixup: fix mode data before applying it |
1c248b7d ID |
120 | * @commit: set current hw specific display mode to hw. |
121 | * @enable_vblank: specific driver callback for enabling vblank interrupt. | |
122 | * @disable_vblank: specific driver callback for disabling vblank interrupt. | |
f74085a9 P |
123 | * @wait_for_vblank: wait for vblank interrupt to make sure that |
124 | * hardware overlay is updated. | |
9cc7610a GP |
125 | * @update_plane: apply hardware specific overlay data to registers. |
126 | * @disable_plane: disable hardware specific overlay. | |
5595d4d8 YC |
127 | * @te_handler: trigger to transfer video image at the tearing effect |
128 | * synchronization signal if there is a page flip request. | |
48107d7b KK |
129 | * @clock_enable: optional function enabling/disabling display domain clock, |
130 | * called from exynos-dp driver before powering up (with | |
131 | * 'enable' argument as true) and after powering down (with | |
132 | * 'enable' as false). | |
1c248b7d | 133 | */ |
93bca243 GP |
134 | struct exynos_drm_crtc; |
135 | struct exynos_drm_crtc_ops { | |
3cecda03 GP |
136 | void (*enable)(struct exynos_drm_crtc *crtc); |
137 | void (*disable)(struct exynos_drm_crtc *crtc); | |
93bca243 | 138 | bool (*mode_fixup)(struct exynos_drm_crtc *crtc, |
e811f5ae | 139 | const struct drm_display_mode *mode, |
1de425b0 | 140 | struct drm_display_mode *adjusted_mode); |
93bca243 GP |
141 | void (*commit)(struct exynos_drm_crtc *crtc); |
142 | int (*enable_vblank)(struct exynos_drm_crtc *crtc); | |
143 | void (*disable_vblank)(struct exynos_drm_crtc *crtc); | |
144 | void (*wait_for_vblank)(struct exynos_drm_crtc *crtc); | |
1e1d1393 GP |
145 | void (*update_plane)(struct exynos_drm_crtc *crtc, |
146 | struct exynos_drm_plane *plane); | |
147 | void (*disable_plane)(struct exynos_drm_crtc *crtc, | |
148 | struct exynos_drm_plane *plane); | |
93bca243 | 149 | void (*te_handler)(struct exynos_drm_crtc *crtc); |
48107d7b | 150 | void (*clock_enable)(struct exynos_drm_crtc *crtc, bool enable); |
1c248b7d ID |
151 | }; |
152 | ||
2bf053eb GP |
153 | /* |
154 | * Exynos specific crtc structure. | |
155 | * | |
357193cd | 156 | * @base: crtc object. |
5d1741ad | 157 | * @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI. |
2bf053eb GP |
158 | * @pipe: a crtc index created at load() with a new crtc object creation |
159 | * and the crtc object would be set to private->crtc array | |
160 | * to get a crtc object corresponding to this pipe from private->crtc | |
161 | * array when irq interrupt occurred. the reason of using this pipe is that | |
162 | * drm framework doesn't support multiple irq yet. | |
163 | * we can refer to the crtc to current hardware interrupt occurred through | |
164 | * this pipe value. | |
63498e30 | 165 | * @enabled: if the crtc is enabled or not |
e752747b | 166 | * @event: vblank event that is currently queued for flip |
93bca243 GP |
167 | * @ops: pointer to callbacks for exynos drm specific functionality |
168 | * @ctx: A pointer to the crtc's implementation specific context | |
2bf053eb GP |
169 | */ |
170 | struct exynos_drm_crtc { | |
357193cd | 171 | struct drm_crtc base; |
5d1741ad | 172 | enum exynos_drm_output_type type; |
2bf053eb | 173 | unsigned int pipe; |
63498e30 | 174 | bool enabled; |
2bf053eb | 175 | wait_queue_head_t pending_flip_queue; |
e752747b | 176 | struct drm_pending_vblank_event *event; |
f3aaf762 | 177 | const struct exynos_drm_crtc_ops *ops; |
93bca243 | 178 | void *ctx; |
2bf053eb GP |
179 | }; |
180 | ||
d7f1642c JS |
181 | struct exynos_drm_g2d_private { |
182 | struct device *dev; | |
183 | struct list_head inuse_cmdlist; | |
184 | struct list_head event_list; | |
2a3098ff | 185 | struct list_head userptr_list; |
d7f1642c JS |
186 | }; |
187 | ||
188 | struct drm_exynos_file_private { | |
189 | struct exynos_drm_g2d_private *g2d_priv; | |
5c76c5b1 | 190 | struct device *ipp_dev; |
d7f1642c JS |
191 | }; |
192 | ||
1c248b7d ID |
193 | /* |
194 | * Exynos drm private structure. | |
0519f9a1 ID |
195 | * |
196 | * @da_start: start address to device address space. | |
197 | * with iommu, device address space starts from this address | |
198 | * otherwise default one. | |
199 | * @da_space_size: size of device address space. | |
200 | * if 0 then default value is used for it. | |
f37cd5e8 | 201 | * @pipe: the pipe number for this crtc/manager. |
1c248b7d ID |
202 | */ |
203 | struct exynos_drm_private { | |
204 | struct drm_fb_helper *fb_helper; | |
205 | ||
1c248b7d ID |
206 | /* |
207 | * created crtc object would be contained at this array and | |
208 | * this array is used to be aware of which crtc did it request vblank. | |
209 | */ | |
210 | struct drm_crtc *crtc[MAX_CRTC]; | |
00ae67cf | 211 | struct drm_property *plane_zpos_property; |
0519f9a1 ID |
212 | |
213 | unsigned long da_start; | |
214 | unsigned long da_space_size; | |
f37cd5e8 ID |
215 | |
216 | unsigned int pipe; | |
1c248b7d ID |
217 | }; |
218 | ||
219 | /* | |
220 | * Exynos drm sub driver structure. | |
221 | * | |
222 | * @list: sub driver has its own list object to register to exynos drm driver. | |
677e84c1 | 223 | * @dev: pointer to device object for subdrv device driver. |
1c248b7d ID |
224 | * @drm_dev: pointer to drm_device and this pointer would be set |
225 | * when sub driver calls exynos_drm_subdrv_register(). | |
226 | * @probe: this callback would be called by exynos drm driver after | |
f37cd5e8 | 227 | * subdrv is registered to it. |
1c248b7d | 228 | * @remove: this callback is used to release resources created |
f37cd5e8 | 229 | * by probe callback. |
9084f7b8 JS |
230 | * @open: this would be called with drm device file open. |
231 | * @close: this would be called with drm device file close. | |
1c248b7d ID |
232 | */ |
233 | struct exynos_drm_subdrv { | |
234 | struct list_head list; | |
677e84c1 | 235 | struct device *dev; |
1c248b7d ID |
236 | struct drm_device *drm_dev; |
237 | ||
41c24346 | 238 | int (*probe)(struct drm_device *drm_dev, struct device *dev); |
29cb6025 | 239 | void (*remove)(struct drm_device *drm_dev, struct device *dev); |
9084f7b8 JS |
240 | int (*open)(struct drm_device *drm_dev, struct device *dev, |
241 | struct drm_file *file); | |
242 | void (*close)(struct drm_device *drm_dev, struct device *dev, | |
243 | struct drm_file *file); | |
1c248b7d ID |
244 | }; |
245 | ||
f37cd5e8 | 246 | /* This function would be called by non kms drivers such as g2d and ipp. */ |
1c248b7d ID |
247 | int exynos_drm_subdrv_register(struct exynos_drm_subdrv *drm_subdrv); |
248 | ||
132a5b91 | 249 | /* this function removes subdrv list from exynos drm driver */ |
1c248b7d ID |
250 | int exynos_drm_subdrv_unregister(struct exynos_drm_subdrv *drm_subdrv); |
251 | ||
f37cd5e8 ID |
252 | int exynos_drm_device_subdrv_probe(struct drm_device *dev); |
253 | int exynos_drm_device_subdrv_remove(struct drm_device *dev); | |
9084f7b8 JS |
254 | int exynos_drm_subdrv_open(struct drm_device *dev, struct drm_file *file); |
255 | void exynos_drm_subdrv_close(struct drm_device *dev, struct drm_file *file); | |
256 | ||
14b6873a | 257 | #ifdef CONFIG_DRM_EXYNOS_DPI |
cf67cc9a GP |
258 | struct exynos_drm_encoder *exynos_dpi_probe(struct device *dev); |
259 | int exynos_dpi_remove(struct exynos_drm_encoder *encoder); | |
a2986e80 | 260 | int exynos_dpi_bind(struct drm_device *dev, struct exynos_drm_encoder *encoder); |
14b6873a | 261 | #else |
cf67cc9a | 262 | static inline struct exynos_drm_encoder * |
dcdffeda | 263 | exynos_dpi_probe(struct device *dev) { return NULL; } |
cf67cc9a | 264 | static inline int exynos_dpi_remove(struct exynos_drm_encoder *encoder) |
1c9ff4ab GP |
265 | { |
266 | return 0; | |
267 | } | |
a2986e80 GP |
268 | static inline int exynos_dpi_bind(struct drm_device *dev, |
269 | struct exynos_drm_encoder *encoder) | |
270 | { | |
271 | return 0; | |
272 | } | |
14b6873a AH |
273 | #endif |
274 | ||
f37cd5e8 | 275 | |
f37cd5e8 | 276 | extern struct platform_driver fimd_driver; |
c8466a91 | 277 | extern struct platform_driver exynos5433_decon_driver; |
96976c3d | 278 | extern struct platform_driver decon_driver; |
1417f109 | 279 | extern struct platform_driver dp_driver; |
7eb8f069 | 280 | extern struct platform_driver dsi_driver; |
132a5b91 | 281 | extern struct platform_driver mixer_driver; |
f37cd5e8 | 282 | extern struct platform_driver hdmi_driver; |
132a5b91 | 283 | extern struct platform_driver exynos_drm_common_hdmi_driver; |
b73d1230 | 284 | extern struct platform_driver vidi_driver; |
d7f1642c | 285 | extern struct platform_driver g2d_driver; |
16102edb | 286 | extern struct platform_driver fimc_driver; |
bea8a429 | 287 | extern struct platform_driver rotator_driver; |
f2646380 | 288 | extern struct platform_driver gsc_driver; |
cb471f14 | 289 | extern struct platform_driver ipp_driver; |
77bbd891 | 290 | extern struct platform_driver mic_driver; |
1c248b7d | 291 | #endif |