Commit | Line | Data |
---|---|---|
1c248b7d ID |
1 | /* |
2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
3 | * Authors: | |
4 | * Inki Dae <inki.dae@samsung.com> | |
5 | * Joonyoung Shim <jy0922.shim@samsung.com> | |
6 | * Seung-Woo Kim <sw0312.kim@samsung.com> | |
7 | * | |
d81aecb5 ID |
8 | * This program is free software; you can redistribute it and/or modify it |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
1c248b7d ID |
12 | */ |
13 | ||
af65c804 | 14 | #include <linux/pm_runtime.h> |
760285e7 | 15 | #include <drm/drmP.h> |
a379df19 GP |
16 | #include <drm/drm_atomic.h> |
17 | #include <drm/drm_atomic_helper.h> | |
760285e7 | 18 | #include <drm/drm_crtc_helper.h> |
1c248b7d | 19 | |
f37cd5e8 | 20 | #include <linux/component.h> |
96f54215 | 21 | |
1c248b7d ID |
22 | #include <drm/exynos_drm.h> |
23 | ||
24 | #include "exynos_drm_drv.h" | |
25 | #include "exynos_drm_crtc.h" | |
26 | #include "exynos_drm_fbdev.h" | |
27 | #include "exynos_drm_fb.h" | |
28 | #include "exynos_drm_gem.h" | |
864ee9e6 | 29 | #include "exynos_drm_plane.h" |
b73d1230 | 30 | #include "exynos_drm_vidi.h" |
d7f1642c | 31 | #include "exynos_drm_g2d.h" |
cb471f14 | 32 | #include "exynos_drm_ipp.h" |
0519f9a1 | 33 | #include "exynos_drm_iommu.h" |
1c248b7d | 34 | |
0edf9936 | 35 | #define DRIVER_NAME "exynos" |
1c248b7d ID |
36 | #define DRIVER_DESC "Samsung SoC DRM" |
37 | #define DRIVER_DATE "20110530" | |
38 | #define DRIVER_MAJOR 1 | |
39 | #define DRIVER_MINOR 0 | |
40 | ||
a379df19 GP |
41 | struct exynos_atomic_commit { |
42 | struct work_struct work; | |
43 | struct drm_device *dev; | |
44 | struct drm_atomic_state *state; | |
45 | u32 crtcs; | |
46 | }; | |
47 | ||
c4533665 GP |
48 | static void exynos_atomic_wait_for_commit(struct drm_atomic_state *state) |
49 | { | |
50 | struct drm_crtc_state *crtc_state; | |
51 | struct drm_crtc *crtc; | |
52 | int i, ret; | |
53 | ||
54 | for_each_crtc_in_state(state, crtc, crtc_state, i) { | |
55 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
56 | ||
57 | if (!crtc->state->enable) | |
58 | continue; | |
59 | ||
60 | ret = drm_crtc_vblank_get(crtc); | |
61 | if (ret) | |
62 | continue; | |
63 | ||
64 | exynos_drm_crtc_wait_pending_update(exynos_crtc); | |
65 | drm_crtc_vblank_put(crtc); | |
66 | } | |
67 | } | |
68 | ||
a379df19 GP |
69 | static void exynos_atomic_commit_complete(struct exynos_atomic_commit *commit) |
70 | { | |
71 | struct drm_device *dev = commit->dev; | |
72 | struct exynos_drm_private *priv = dev->dev_private; | |
73 | struct drm_atomic_state *state = commit->state; | |
c4533665 GP |
74 | struct drm_plane *plane; |
75 | struct drm_crtc *crtc; | |
76 | struct drm_plane_state *plane_state; | |
77 | struct drm_crtc_state *crtc_state; | |
78 | int i; | |
a379df19 GP |
79 | |
80 | drm_atomic_helper_commit_modeset_disables(dev, state); | |
81 | ||
82 | drm_atomic_helper_commit_modeset_enables(dev, state); | |
83 | ||
84 | /* | |
85 | * Exynos can't update planes with CRTCs and encoders disabled, | |
86 | * its updates routines, specially for FIMD, requires the clocks | |
87 | * to be enabled. So it is necessary to handle the modeset operations | |
88 | * *before* the commit_planes() step, this way it will always | |
89 | * have the relevant clocks enabled to perform the update. | |
90 | */ | |
91 | ||
c4533665 GP |
92 | for_each_crtc_in_state(state, crtc, crtc_state, i) { |
93 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
94 | ||
95 | atomic_set(&exynos_crtc->pending_update, 0); | |
96 | } | |
97 | ||
98 | for_each_plane_in_state(state, plane, plane_state, i) { | |
99 | struct exynos_drm_crtc *exynos_crtc = | |
100 | to_exynos_crtc(plane->crtc); | |
101 | ||
102 | if (!plane->crtc) | |
103 | continue; | |
104 | ||
105 | atomic_inc(&exynos_crtc->pending_update); | |
106 | } | |
107 | ||
aef9dbb8 | 108 | drm_atomic_helper_commit_planes(dev, state, false); |
a379df19 | 109 | |
c4533665 | 110 | exynos_atomic_wait_for_commit(state); |
a379df19 GP |
111 | |
112 | drm_atomic_helper_cleanup_planes(dev, state); | |
113 | ||
114 | drm_atomic_state_free(state); | |
115 | ||
116 | spin_lock(&priv->lock); | |
117 | priv->pending &= ~commit->crtcs; | |
118 | spin_unlock(&priv->lock); | |
119 | ||
120 | wake_up_all(&priv->wait); | |
121 | ||
122 | kfree(commit); | |
123 | } | |
124 | ||
125 | static void exynos_drm_atomic_work(struct work_struct *work) | |
126 | { | |
127 | struct exynos_atomic_commit *commit = container_of(work, | |
128 | struct exynos_atomic_commit, work); | |
129 | ||
130 | exynos_atomic_commit_complete(commit); | |
131 | } | |
132 | ||
1c248b7d ID |
133 | static int exynos_drm_load(struct drm_device *dev, unsigned long flags) |
134 | { | |
135 | struct exynos_drm_private *private; | |
6cf27275 GP |
136 | struct drm_encoder *encoder; |
137 | unsigned int clone_mask; | |
138 | int cnt, ret; | |
1c248b7d | 139 | |
1c248b7d | 140 | private = kzalloc(sizeof(struct exynos_drm_private), GFP_KERNEL); |
38bb5253 | 141 | if (!private) |
1c248b7d | 142 | return -ENOMEM; |
1c248b7d | 143 | |
a379df19 GP |
144 | init_waitqueue_head(&private->wait); |
145 | spin_lock_init(&private->lock); | |
146 | ||
af65c804 | 147 | dev_set_drvdata(dev->dev, dev); |
1c248b7d ID |
148 | dev->dev_private = (void *)private; |
149 | ||
0519f9a1 ID |
150 | /* |
151 | * create mapping to manage iommu table and set a pointer to iommu | |
152 | * mapping structure to iommu_mapping of private data. | |
153 | * also this iommu_mapping can be used to check if iommu is supported | |
154 | * or not. | |
155 | */ | |
156 | ret = drm_create_iommu_mapping(dev); | |
157 | if (ret < 0) { | |
158 | DRM_ERROR("failed to create iommu mapping.\n"); | |
d2ba65f6 | 159 | goto err_free_private; |
0519f9a1 ID |
160 | } |
161 | ||
1c248b7d ID |
162 | drm_mode_config_init(dev); |
163 | ||
164 | exynos_drm_mode_config_init(dev); | |
165 | ||
d081f566 | 166 | /* setup possible_clones. */ |
6cf27275 GP |
167 | cnt = 0; |
168 | clone_mask = 0; | |
169 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) | |
170 | clone_mask |= (1 << (cnt++)); | |
171 | ||
172 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) | |
173 | encoder->possible_clones = clone_mask; | |
d081f566 | 174 | |
a9a346d6 DV |
175 | platform_set_drvdata(dev->platformdev, dev); |
176 | ||
f37cd5e8 ID |
177 | /* Try to bind all sub drivers. */ |
178 | ret = component_bind_all(dev->dev, dev); | |
179 | if (ret) | |
c52142e6 AH |
180 | goto err_mode_config_cleanup; |
181 | ||
182 | ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | |
183 | if (ret) | |
184 | goto err_unbind_all; | |
f37cd5e8 | 185 | |
d1afe7d4 | 186 | /* Probe non kms sub drivers and virtual display driver. */ |
f37cd5e8 ID |
187 | ret = exynos_drm_device_subdrv_probe(dev); |
188 | if (ret) | |
c52142e6 | 189 | goto err_cleanup_vblank; |
f37cd5e8 | 190 | |
4ea9526b GP |
191 | drm_mode_config_reset(dev); |
192 | ||
4a3ffedd JS |
193 | /* |
194 | * enable drm irq mode. | |
195 | * - with irq_enabled = true, we can use the vblank feature. | |
196 | * | |
197 | * P.S. note that we wouldn't use drm irq handler but | |
198 | * just specific driver own one instead because | |
199 | * drm framework supports only one irq handler. | |
200 | */ | |
201 | dev->irq_enabled = true; | |
202 | ||
203 | /* | |
204 | * with vblank_disable_allowed = true, vblank interrupt will be disabled | |
205 | * by drm timer once a current process gives up ownership of | |
206 | * vblank event.(after drm_vblank_put function is called) | |
207 | */ | |
208 | dev->vblank_disable_allowed = true; | |
209 | ||
3cb6830a AH |
210 | /* init kms poll for handling hpd */ |
211 | drm_kms_helper_poll_init(dev); | |
212 | ||
213 | /* force connectors detection */ | |
214 | drm_helper_hpd_irq_event(dev); | |
215 | ||
1c248b7d ID |
216 | return 0; |
217 | ||
f37cd5e8 | 218 | err_cleanup_vblank: |
1c248b7d | 219 | drm_vblank_cleanup(dev); |
c52142e6 AH |
220 | err_unbind_all: |
221 | component_unbind_all(dev->dev, dev); | |
080be03d SP |
222 | err_mode_config_cleanup: |
223 | drm_mode_config_cleanup(dev); | |
0519f9a1 | 224 | drm_release_iommu_mapping(dev); |
d2ba65f6 | 225 | err_free_private: |
1c248b7d ID |
226 | kfree(private); |
227 | ||
228 | return ret; | |
229 | } | |
230 | ||
231 | static int exynos_drm_unload(struct drm_device *dev) | |
232 | { | |
f37cd5e8 ID |
233 | exynos_drm_device_subdrv_remove(dev); |
234 | ||
1c248b7d | 235 | exynos_drm_fbdev_fini(dev); |
7db3eba6 | 236 | drm_kms_helper_poll_fini(dev); |
0519f9a1 | 237 | |
9f3dd7db | 238 | drm_vblank_cleanup(dev); |
c52142e6 | 239 | component_unbind_all(dev->dev, dev); |
9f3dd7db | 240 | drm_mode_config_cleanup(dev); |
0519f9a1 | 241 | drm_release_iommu_mapping(dev); |
1c248b7d | 242 | |
9f3dd7db | 243 | kfree(dev->dev_private); |
1c248b7d ID |
244 | dev->dev_private = NULL; |
245 | ||
246 | return 0; | |
247 | } | |
248 | ||
a379df19 GP |
249 | static int commit_is_pending(struct exynos_drm_private *priv, u32 crtcs) |
250 | { | |
251 | bool pending; | |
252 | ||
253 | spin_lock(&priv->lock); | |
254 | pending = priv->pending & crtcs; | |
255 | spin_unlock(&priv->lock); | |
256 | ||
257 | return pending; | |
258 | } | |
259 | ||
260 | int exynos_atomic_commit(struct drm_device *dev, struct drm_atomic_state *state, | |
261 | bool async) | |
262 | { | |
263 | struct exynos_drm_private *priv = dev->dev_private; | |
264 | struct exynos_atomic_commit *commit; | |
265 | int i, ret; | |
266 | ||
267 | commit = kzalloc(sizeof(*commit), GFP_KERNEL); | |
268 | if (!commit) | |
269 | return -ENOMEM; | |
270 | ||
271 | ret = drm_atomic_helper_prepare_planes(dev, state); | |
272 | if (ret) { | |
273 | kfree(commit); | |
274 | return ret; | |
275 | } | |
276 | ||
277 | /* This is the point of no return */ | |
278 | ||
279 | INIT_WORK(&commit->work, exynos_drm_atomic_work); | |
280 | commit->dev = dev; | |
281 | commit->state = state; | |
282 | ||
283 | /* Wait until all affected CRTCs have completed previous commits and | |
284 | * mark them as pending. | |
285 | */ | |
286 | for (i = 0; i < dev->mode_config.num_crtc; ++i) { | |
287 | if (state->crtcs[i]) | |
288 | commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]); | |
289 | } | |
290 | ||
291 | wait_event(priv->wait, !commit_is_pending(priv, commit->crtcs)); | |
292 | ||
293 | spin_lock(&priv->lock); | |
294 | priv->pending |= commit->crtcs; | |
295 | spin_unlock(&priv->lock); | |
296 | ||
297 | drm_atomic_helper_swap_state(dev, state); | |
298 | ||
299 | if (async) | |
300 | schedule_work(&commit->work); | |
301 | else | |
302 | exynos_atomic_commit_complete(commit); | |
303 | ||
304 | return 0; | |
305 | } | |
306 | ||
af65c804 SP |
307 | static int exynos_drm_suspend(struct drm_device *dev, pm_message_t state) |
308 | { | |
309 | struct drm_connector *connector; | |
310 | ||
311 | drm_modeset_lock_all(dev); | |
312 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
313 | int old_dpms = connector->dpms; | |
314 | ||
315 | if (connector->funcs->dpms) | |
316 | connector->funcs->dpms(connector, DRM_MODE_DPMS_OFF); | |
317 | ||
318 | /* Set the old mode back to the connector for resume */ | |
319 | connector->dpms = old_dpms; | |
320 | } | |
321 | drm_modeset_unlock_all(dev); | |
322 | ||
323 | return 0; | |
324 | } | |
325 | ||
326 | static int exynos_drm_resume(struct drm_device *dev) | |
327 | { | |
328 | struct drm_connector *connector; | |
329 | ||
330 | drm_modeset_lock_all(dev); | |
331 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | |
74cfe07a AH |
332 | if (connector->funcs->dpms) { |
333 | int dpms = connector->dpms; | |
334 | ||
335 | connector->dpms = DRM_MODE_DPMS_OFF; | |
336 | connector->funcs->dpms(connector, dpms); | |
337 | } | |
af65c804 | 338 | } |
a16f223e | 339 | drm_modeset_unlock_all(dev); |
af65c804 | 340 | |
af65c804 SP |
341 | return 0; |
342 | } | |
343 | ||
9084f7b8 JS |
344 | static int exynos_drm_open(struct drm_device *dev, struct drm_file *file) |
345 | { | |
d7f1642c | 346 | struct drm_exynos_file_private *file_priv; |
ba3706c0 | 347 | int ret; |
d7f1642c | 348 | |
d7f1642c JS |
349 | file_priv = kzalloc(sizeof(*file_priv), GFP_KERNEL); |
350 | if (!file_priv) | |
351 | return -ENOMEM; | |
352 | ||
d7f1642c | 353 | file->driver_priv = file_priv; |
b2df26c1 | 354 | |
ba3706c0 | 355 | ret = exynos_drm_subdrv_open(dev, file); |
6ca605f7 | 356 | if (ret) |
307ceaff | 357 | goto err_file_priv_free; |
ba3706c0 | 358 | |
6ca605f7 | 359 | return ret; |
307ceaff | 360 | |
307ceaff | 361 | err_file_priv_free: |
6ca605f7 SK |
362 | kfree(file_priv); |
363 | file->driver_priv = NULL; | |
ba3706c0 | 364 | return ret; |
9084f7b8 JS |
365 | } |
366 | ||
ccf4d883 | 367 | static void exynos_drm_preclose(struct drm_device *dev, |
6f811502 | 368 | struct drm_file *file) |
0cbc330e ID |
369 | { |
370 | exynos_drm_subdrv_close(dev, file); | |
371 | } | |
372 | ||
373 | static void exynos_drm_postclose(struct drm_device *dev, struct drm_file *file) | |
ccf4d883 | 374 | { |
0cbc330e | 375 | struct drm_pending_event *e, *et; |
3ab09435 JS |
376 | unsigned long flags; |
377 | ||
0cbc330e ID |
378 | if (!file->driver_priv) |
379 | return; | |
380 | ||
3ab09435 | 381 | spin_lock_irqsave(&dev->event_lock, flags); |
0cbc330e ID |
382 | /* Release all events handled by page flip handler but not freed. */ |
383 | list_for_each_entry_safe(e, et, &file->event_list, link) { | |
384 | list_del(&e->link); | |
385 | e->destroy(e); | |
386 | } | |
387 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
ccf4d883 | 388 | |
53ef299f ID |
389 | kfree(file->driver_priv); |
390 | file->driver_priv = NULL; | |
391 | } | |
392 | ||
1c248b7d ID |
393 | static void exynos_drm_lastclose(struct drm_device *dev) |
394 | { | |
1c248b7d ID |
395 | exynos_drm_fbdev_restore_mode(dev); |
396 | } | |
397 | ||
78b68556 | 398 | static const struct vm_operations_struct exynos_drm_gem_vm_ops = { |
1c248b7d ID |
399 | .fault = exynos_drm_gem_fault, |
400 | .open = drm_gem_vm_open, | |
401 | .close = drm_gem_vm_close, | |
402 | }; | |
403 | ||
baa70943 | 404 | static const struct drm_ioctl_desc exynos_ioctls[] = { |
1c248b7d | 405 | DRM_IOCTL_DEF_DRV(EXYNOS_GEM_CREATE, exynos_drm_gem_create_ioctl, |
f8c47144 | 406 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 407 | DRM_IOCTL_DEF_DRV(EXYNOS_GEM_GET, exynos_drm_gem_get_ioctl, |
f8c47144 | 408 | DRM_RENDER_ALLOW), |
74f230d2 | 409 | DRM_IOCTL_DEF_DRV(EXYNOS_VIDI_CONNECTION, vidi_connection_ioctl, |
f8c47144 | 410 | DRM_AUTH), |
74f230d2 | 411 | DRM_IOCTL_DEF_DRV(EXYNOS_G2D_GET_VER, exynos_g2d_get_ver_ioctl, |
f8c47144 | 412 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 413 | DRM_IOCTL_DEF_DRV(EXYNOS_G2D_SET_CMDLIST, exynos_g2d_set_cmdlist_ioctl, |
f8c47144 | 414 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 415 | DRM_IOCTL_DEF_DRV(EXYNOS_G2D_EXEC, exynos_g2d_exec_ioctl, |
f8c47144 | 416 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 417 | DRM_IOCTL_DEF_DRV(EXYNOS_IPP_GET_PROPERTY, exynos_drm_ipp_get_property, |
f8c47144 | 418 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 419 | DRM_IOCTL_DEF_DRV(EXYNOS_IPP_SET_PROPERTY, exynos_drm_ipp_set_property, |
f8c47144 | 420 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 421 | DRM_IOCTL_DEF_DRV(EXYNOS_IPP_QUEUE_BUF, exynos_drm_ipp_queue_buf, |
f8c47144 | 422 | DRM_AUTH | DRM_RENDER_ALLOW), |
74f230d2 | 423 | DRM_IOCTL_DEF_DRV(EXYNOS_IPP_CMD_CTRL, exynos_drm_ipp_cmd_ctrl, |
f8c47144 | 424 | DRM_AUTH | DRM_RENDER_ALLOW), |
1c248b7d ID |
425 | }; |
426 | ||
ac2bdf73 JS |
427 | static const struct file_operations exynos_drm_driver_fops = { |
428 | .owner = THIS_MODULE, | |
429 | .open = drm_open, | |
430 | .mmap = exynos_drm_gem_mmap, | |
431 | .poll = drm_poll, | |
432 | .read = drm_read, | |
433 | .unlocked_ioctl = drm_ioctl, | |
804d74ab KP |
434 | #ifdef CONFIG_COMPAT |
435 | .compat_ioctl = drm_compat_ioctl, | |
436 | #endif | |
ac2bdf73 JS |
437 | .release = drm_release, |
438 | }; | |
439 | ||
1c248b7d | 440 | static struct drm_driver exynos_drm_driver = { |
c8c38ccf | 441 | .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
74f230d2 | 442 | | DRIVER_ATOMIC | DRIVER_RENDER, |
1c248b7d ID |
443 | .load = exynos_drm_load, |
444 | .unload = exynos_drm_unload, | |
9084f7b8 | 445 | .open = exynos_drm_open, |
ccf4d883 | 446 | .preclose = exynos_drm_preclose, |
1c248b7d | 447 | .lastclose = exynos_drm_lastclose, |
53ef299f | 448 | .postclose = exynos_drm_postclose, |
915b4d11 | 449 | .set_busid = drm_platform_set_busid, |
b44f8408 | 450 | .get_vblank_counter = drm_vblank_no_hw_counter, |
1c248b7d ID |
451 | .enable_vblank = exynos_drm_crtc_enable_vblank, |
452 | .disable_vblank = exynos_drm_crtc_disable_vblank, | |
1c248b7d ID |
453 | .gem_free_object = exynos_drm_gem_free_object, |
454 | .gem_vm_ops = &exynos_drm_gem_vm_ops, | |
455 | .dumb_create = exynos_drm_gem_dumb_create, | |
456 | .dumb_map_offset = exynos_drm_gem_dumb_map_offset, | |
43387b37 | 457 | .dumb_destroy = drm_gem_dumb_destroy, |
b2df26c1 ID |
458 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, |
459 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
01ed50dd JS |
460 | .gem_prime_export = drm_gem_prime_export, |
461 | .gem_prime_import = drm_gem_prime_import, | |
462 | .gem_prime_get_sg_table = exynos_drm_gem_prime_get_sg_table, | |
463 | .gem_prime_import_sg_table = exynos_drm_gem_prime_import_sg_table, | |
464 | .gem_prime_vmap = exynos_drm_gem_prime_vmap, | |
465 | .gem_prime_vunmap = exynos_drm_gem_prime_vunmap, | |
1c248b7d | 466 | .ioctls = exynos_ioctls, |
baa70943 | 467 | .num_ioctls = ARRAY_SIZE(exynos_ioctls), |
ac2bdf73 | 468 | .fops = &exynos_drm_driver_fops, |
1c248b7d ID |
469 | .name = DRIVER_NAME, |
470 | .desc = DRIVER_DESC, | |
471 | .date = DRIVER_DATE, | |
472 | .major = DRIVER_MAJOR, | |
473 | .minor = DRIVER_MINOR, | |
474 | }; | |
475 | ||
af65c804 SP |
476 | #ifdef CONFIG_PM_SLEEP |
477 | static int exynos_drm_sys_suspend(struct device *dev) | |
478 | { | |
479 | struct drm_device *drm_dev = dev_get_drvdata(dev); | |
480 | pm_message_t message; | |
481 | ||
d50a1907 | 482 | if (pm_runtime_suspended(dev) || !drm_dev) |
af65c804 SP |
483 | return 0; |
484 | ||
485 | message.event = PM_EVENT_SUSPEND; | |
486 | return exynos_drm_suspend(drm_dev, message); | |
487 | } | |
488 | ||
489 | static int exynos_drm_sys_resume(struct device *dev) | |
490 | { | |
491 | struct drm_device *drm_dev = dev_get_drvdata(dev); | |
492 | ||
d50a1907 | 493 | if (pm_runtime_suspended(dev) || !drm_dev) |
af65c804 SP |
494 | return 0; |
495 | ||
496 | return exynos_drm_resume(drm_dev); | |
497 | } | |
498 | #endif | |
499 | ||
af65c804 SP |
500 | static const struct dev_pm_ops exynos_drm_pm_ops = { |
501 | SET_SYSTEM_SLEEP_PM_OPS(exynos_drm_sys_suspend, exynos_drm_sys_resume) | |
af65c804 SP |
502 | }; |
503 | ||
86650408 AH |
504 | /* forward declaration */ |
505 | static struct platform_driver exynos_drm_platform_driver; | |
f37cd5e8 | 506 | |
86650408 AH |
507 | /* |
508 | * Connector drivers should not be placed before associated crtc drivers, | |
509 | * because connector requires pipe number of its crtc during initialization. | |
510 | */ | |
511 | static struct platform_driver *const exynos_drm_kms_drivers[] = { | |
86650408 AH |
512 | #ifdef CONFIG_DRM_EXYNOS_FIMD |
513 | &fimd_driver, | |
514 | #endif | |
515 | #ifdef CONFIG_DRM_EXYNOS5433_DECON | |
516 | &exynos5433_decon_driver, | |
517 | #endif | |
518 | #ifdef CONFIG_DRM_EXYNOS7_DECON | |
519 | &decon_driver, | |
520 | #endif | |
77bbd891 HH |
521 | #ifdef CONFIG_DRM_EXYNOS_MIC |
522 | &mic_driver, | |
523 | #endif | |
86650408 AH |
524 | #ifdef CONFIG_DRM_EXYNOS_DP |
525 | &dp_driver, | |
526 | #endif | |
527 | #ifdef CONFIG_DRM_EXYNOS_DSI | |
528 | &dsi_driver, | |
529 | #endif | |
530 | #ifdef CONFIG_DRM_EXYNOS_HDMI | |
531 | &mixer_driver, | |
532 | &hdmi_driver, | |
533 | #endif | |
735c21c3 JS |
534 | #ifdef CONFIG_DRM_EXYNOS_VIDI |
535 | &vidi_driver, | |
536 | #endif | |
86650408 | 537 | }; |
df5225bc | 538 | |
86650408 | 539 | static struct platform_driver *const exynos_drm_non_kms_drivers[] = { |
86650408 AH |
540 | #ifdef CONFIG_DRM_EXYNOS_G2D |
541 | &g2d_driver, | |
542 | #endif | |
543 | #ifdef CONFIG_DRM_EXYNOS_FIMC | |
544 | &fimc_driver, | |
545 | #endif | |
546 | #ifdef CONFIG_DRM_EXYNOS_ROTATOR | |
547 | &rotator_driver, | |
548 | #endif | |
549 | #ifdef CONFIG_DRM_EXYNOS_GSC | |
550 | &gsc_driver, | |
551 | #endif | |
552 | #ifdef CONFIG_DRM_EXYNOS_IPP | |
553 | &ipp_driver, | |
554 | #endif | |
555 | &exynos_drm_platform_driver, | |
556 | }; | |
f37cd5e8 | 557 | |
86650408 AH |
558 | static struct platform_driver *const exynos_drm_drv_with_simple_dev[] = { |
559 | #ifdef CONFIG_DRM_EXYNOS_VIDI | |
560 | &vidi_driver, | |
561 | #endif | |
562 | #ifdef CONFIG_DRM_EXYNOS_IPP | |
563 | &ipp_driver, | |
564 | #endif | |
565 | &exynos_drm_platform_driver, | |
566 | }; | |
567 | #define PDEV_COUNT ARRAY_SIZE(exynos_drm_drv_with_simple_dev) | |
f37cd5e8 | 568 | |
53c5558d | 569 | static int compare_dev(struct device *dev, void *data) |
f37cd5e8 ID |
570 | { |
571 | return dev == (struct device *)data; | |
572 | } | |
573 | ||
53c5558d | 574 | static struct component_match *exynos_drm_match_add(struct device *dev) |
f37cd5e8 | 575 | { |
53c5558d | 576 | struct component_match *match = NULL; |
86650408 | 577 | int i; |
f37cd5e8 | 578 | |
86650408 AH |
579 | for (i = 0; i < ARRAY_SIZE(exynos_drm_kms_drivers); ++i) { |
580 | struct device_driver *drv = &exynos_drm_kms_drivers[i]->driver; | |
581 | struct device *p = NULL, *d; | |
f7c2f36f | 582 | |
86650408 AH |
583 | while ((d = bus_find_device(&platform_bus_type, p, drv, |
584 | (void *)platform_bus_type.match))) { | |
585 | put_device(p); | |
586 | component_match_add(dev, &match, compare_dev, d); | |
587 | p = d; | |
df5225bc | 588 | } |
86650408 | 589 | put_device(p); |
f37cd5e8 ID |
590 | } |
591 | ||
86650408 | 592 | return match ?: ERR_PTR(-ENODEV); |
f37cd5e8 ID |
593 | } |
594 | ||
595 | static int exynos_drm_bind(struct device *dev) | |
596 | { | |
f37cd5e8 ID |
597 | return drm_platform_init(&exynos_drm_driver, to_platform_device(dev)); |
598 | } | |
599 | ||
600 | static void exynos_drm_unbind(struct device *dev) | |
601 | { | |
602 | drm_put_dev(dev_get_drvdata(dev)); | |
603 | } | |
604 | ||
605 | static const struct component_master_ops exynos_drm_ops = { | |
f37cd5e8 ID |
606 | .bind = exynos_drm_bind, |
607 | .unbind = exynos_drm_unbind, | |
1c248b7d ID |
608 | }; |
609 | ||
417133e4 AH |
610 | static int exynos_drm_platform_probe(struct platform_device *pdev) |
611 | { | |
612 | struct component_match *match; | |
613 | ||
614 | pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); | |
615 | exynos_drm_driver.num_ioctls = ARRAY_SIZE(exynos_ioctls); | |
616 | ||
617 | match = exynos_drm_match_add(&pdev->dev); | |
618 | if (IS_ERR(match)) | |
619 | return PTR_ERR(match); | |
620 | ||
621 | return component_master_add_with_match(&pdev->dev, &exynos_drm_ops, | |
622 | match); | |
623 | } | |
624 | ||
625 | static int exynos_drm_platform_remove(struct platform_device *pdev) | |
626 | { | |
627 | component_master_del(&pdev->dev, &exynos_drm_ops); | |
628 | return 0; | |
629 | } | |
630 | ||
631 | static struct platform_driver exynos_drm_platform_driver = { | |
632 | .probe = exynos_drm_platform_probe, | |
633 | .remove = exynos_drm_platform_remove, | |
634 | .driver = { | |
635 | .name = "exynos-drm", | |
636 | .pm = &exynos_drm_pm_ops, | |
637 | }, | |
638 | }; | |
639 | ||
417133e4 AH |
640 | static struct platform_device *exynos_drm_pdevs[PDEV_COUNT]; |
641 | ||
642 | static void exynos_drm_unregister_devices(void) | |
72390677 | 643 | { |
417133e4 | 644 | int i = PDEV_COUNT; |
25928a39 | 645 | |
417133e4 AH |
646 | while (--i >= 0) { |
647 | platform_device_unregister(exynos_drm_pdevs[i]); | |
648 | exynos_drm_pdevs[i] = NULL; | |
649 | } | |
650 | } | |
7eb8f069 | 651 | |
417133e4 AH |
652 | static int exynos_drm_register_devices(void) |
653 | { | |
654 | int i; | |
655 | ||
656 | for (i = 0; i < PDEV_COUNT; ++i) { | |
657 | struct platform_driver *d = exynos_drm_drv_with_simple_dev[i]; | |
658 | struct platform_device *pdev = | |
659 | platform_device_register_simple(d->driver.name, -1, | |
660 | NULL, 0); | |
661 | ||
662 | if (!IS_ERR(pdev)) { | |
663 | exynos_drm_pdevs[i] = pdev; | |
664 | continue; | |
665 | } | |
666 | while (--i >= 0) { | |
667 | platform_device_unregister(exynos_drm_pdevs[i]); | |
668 | exynos_drm_pdevs[i] = NULL; | |
669 | } | |
670 | ||
671 | return PTR_ERR(pdev); | |
72390677 | 672 | } |
f37cd5e8 | 673 | |
417133e4 | 674 | return 0; |
1c248b7d ID |
675 | } |
676 | ||
417133e4 AH |
677 | static void exynos_drm_unregister_drivers(struct platform_driver * const *drv, |
678 | int count) | |
1c248b7d | 679 | { |
417133e4 AH |
680 | while (--count >= 0) |
681 | platform_driver_unregister(drv[count]); | |
682 | } | |
683 | ||
684 | static int exynos_drm_register_drivers(struct platform_driver * const *drv, | |
685 | int count) | |
686 | { | |
687 | int i, ret; | |
688 | ||
689 | for (i = 0; i < count; ++i) { | |
690 | ret = platform_driver_register(drv[i]); | |
691 | if (!ret) | |
692 | continue; | |
693 | ||
694 | while (--i >= 0) | |
695 | platform_driver_unregister(drv[i]); | |
696 | ||
697 | return ret; | |
698 | } | |
699 | ||
f37cd5e8 ID |
700 | return 0; |
701 | } | |
702 | ||
417133e4 AH |
703 | static inline int exynos_drm_register_kms_drivers(void) |
704 | { | |
705 | return exynos_drm_register_drivers(exynos_drm_kms_drivers, | |
706 | ARRAY_SIZE(exynos_drm_kms_drivers)); | |
707 | } | |
708 | ||
709 | static inline int exynos_drm_register_non_kms_drivers(void) | |
710 | { | |
711 | return exynos_drm_register_drivers(exynos_drm_non_kms_drivers, | |
712 | ARRAY_SIZE(exynos_drm_non_kms_drivers)); | |
713 | } | |
714 | ||
715 | static inline void exynos_drm_unregister_kms_drivers(void) | |
716 | { | |
717 | exynos_drm_unregister_drivers(exynos_drm_kms_drivers, | |
718 | ARRAY_SIZE(exynos_drm_kms_drivers)); | |
719 | } | |
720 | ||
721 | static inline void exynos_drm_unregister_non_kms_drivers(void) | |
722 | { | |
723 | exynos_drm_unregister_drivers(exynos_drm_non_kms_drivers, | |
724 | ARRAY_SIZE(exynos_drm_non_kms_drivers)); | |
725 | } | |
726 | ||
f37cd5e8 ID |
727 | static int exynos_drm_init(void) |
728 | { | |
e3b9e460 | 729 | int ret; |
f37cd5e8 | 730 | |
417133e4 AH |
731 | ret = exynos_drm_register_devices(); |
732 | if (ret) | |
733 | return ret; | |
820687be | 734 | |
417133e4 AH |
735 | ret = exynos_drm_register_kms_drivers(); |
736 | if (ret) | |
737 | goto err_unregister_pdevs; | |
f37cd5e8 | 738 | |
417133e4 | 739 | ret = exynos_drm_register_non_kms_drivers(); |
f37cd5e8 | 740 | if (ret) |
417133e4 | 741 | goto err_unregister_kms_drivers; |
f37cd5e8 ID |
742 | |
743 | return 0; | |
744 | ||
820687be | 745 | err_unregister_kms_drivers: |
417133e4 | 746 | exynos_drm_unregister_kms_drivers(); |
820687be | 747 | |
417133e4 AH |
748 | err_unregister_pdevs: |
749 | exynos_drm_unregister_devices(); | |
f37cd5e8 ID |
750 | |
751 | return ret; | |
752 | } | |
753 | ||
754 | static void exynos_drm_exit(void) | |
755 | { | |
417133e4 AH |
756 | exynos_drm_unregister_non_kms_drivers(); |
757 | exynos_drm_unregister_kms_drivers(); | |
758 | exynos_drm_unregister_devices(); | |
1c248b7d ID |
759 | } |
760 | ||
761 | module_init(exynos_drm_init); | |
762 | module_exit(exynos_drm_exit); | |
763 | ||
764 | MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>"); | |
765 | MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>"); | |
766 | MODULE_AUTHOR("Seung-Woo Kim <sw0312.kim@samsung.com>"); | |
767 | MODULE_DESCRIPTION("Samsung SoC DRM Driver"); | |
768 | MODULE_LICENSE("GPL"); |