Commit | Line | Data |
---|---|---|
1c248b7d ID |
1 | /* exynos_drm_crtc.c |
2 | * | |
3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. | |
4 | * Authors: | |
5 | * Inki Dae <inki.dae@samsung.com> | |
6 | * Joonyoung Shim <jy0922.shim@samsung.com> | |
7 | * Seung-Woo Kim <sw0312.kim@samsung.com> | |
8 | * | |
d81aecb5 ID |
9 | * This program is free software; you can redistribute it and/or modify it |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
1c248b7d ID |
13 | */ |
14 | ||
760285e7 DH |
15 | #include <drm/drmP.h> |
16 | #include <drm/drm_crtc_helper.h> | |
4ea9526b GP |
17 | #include <drm/drm_atomic.h> |
18 | #include <drm/drm_atomic_helper.h> | |
1c248b7d | 19 | |
e30655d0 | 20 | #include "exynos_drm_crtc.h" |
1c248b7d | 21 | #include "exynos_drm_drv.h" |
1c248b7d | 22 | #include "exynos_drm_encoder.h" |
b5d2eb3b | 23 | #include "exynos_drm_plane.h" |
1c248b7d | 24 | |
63498e30 | 25 | static void exynos_drm_crtc_enable(struct drm_crtc *crtc) |
1c248b7d | 26 | { |
d2716c89 | 27 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
1c248b7d | 28 | |
63498e30 | 29 | if (exynos_crtc->enabled) |
ec05da95 | 30 | return; |
20cd2640 | 31 | |
3cecda03 GP |
32 | if (exynos_crtc->ops->enable) |
33 | exynos_crtc->ops->enable(exynos_crtc); | |
080be03d | 34 | |
63498e30 | 35 | exynos_crtc->enabled = true; |
d6948b2f | 36 | |
63498e30 | 37 | drm_crtc_vblank_on(crtc); |
1c248b7d ID |
38 | } |
39 | ||
3fc4867c GP |
40 | static void exynos_drm_crtc_disable(struct drm_crtc *crtc) |
41 | { | |
63498e30 | 42 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
3fc4867c | 43 | |
63498e30 GP |
44 | if (!exynos_crtc->enabled) |
45 | return; | |
46 | ||
47 | /* wait for the completion of page flip. */ | |
48 | if (!wait_event_timeout(exynos_crtc->pending_flip_queue, | |
49 | (exynos_crtc->event == NULL), HZ/20)) | |
50 | exynos_crtc->event = NULL; | |
51 | ||
52 | drm_crtc_vblank_off(crtc); | |
53 | ||
3cecda03 GP |
54 | if (exynos_crtc->ops->disable) |
55 | exynos_crtc->ops->disable(exynos_crtc); | |
63498e30 GP |
56 | |
57 | exynos_crtc->enabled = false; | |
3fc4867c GP |
58 | } |
59 | ||
1c248b7d ID |
60 | static bool |
61 | exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc, | |
e811f5ae | 62 | const struct drm_display_mode *mode, |
1c248b7d ID |
63 | struct drm_display_mode *adjusted_mode) |
64 | { | |
4b405269 | 65 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
4b405269 | 66 | |
93bca243 GP |
67 | if (exynos_crtc->ops->mode_fixup) |
68 | return exynos_crtc->ops->mode_fixup(exynos_crtc, mode, | |
69 | adjusted_mode); | |
4b405269 | 70 | |
1c248b7d ID |
71 | return true; |
72 | } | |
73 | ||
199329cb GP |
74 | static void |
75 | exynos_drm_crtc_mode_set_nofb(struct drm_crtc *crtc) | |
1c248b7d | 76 | { |
4070d212 | 77 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
32aeab17 | 78 | |
199329cb GP |
79 | if (exynos_crtc->ops->commit) |
80 | exynos_crtc->ops->commit(exynos_crtc); | |
1c248b7d ID |
81 | } |
82 | ||
613d2b27 ML |
83 | static void exynos_crtc_atomic_begin(struct drm_crtc *crtc, |
84 | struct drm_crtc_state *old_crtc_state) | |
9d5ab6a0 GP |
85 | { |
86 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
87 | ||
88 | if (crtc->state->event) { | |
89 | WARN_ON(drm_crtc_vblank_get(crtc) != 0); | |
90 | exynos_crtc->event = crtc->state->event; | |
91 | } | |
92 | } | |
93 | ||
613d2b27 ML |
94 | static void exynos_crtc_atomic_flush(struct drm_crtc *crtc, |
95 | struct drm_crtc_state *old_crtc_state) | |
9d5ab6a0 GP |
96 | { |
97 | } | |
98 | ||
1c248b7d | 99 | static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = { |
63498e30 | 100 | .enable = exynos_drm_crtc_enable, |
3fc4867c | 101 | .disable = exynos_drm_crtc_disable, |
1c248b7d | 102 | .mode_fixup = exynos_drm_crtc_mode_fixup, |
199329cb | 103 | .mode_set_nofb = exynos_drm_crtc_mode_set_nofb, |
9d5ab6a0 GP |
104 | .atomic_begin = exynos_crtc_atomic_begin, |
105 | .atomic_flush = exynos_crtc_atomic_flush, | |
1c248b7d ID |
106 | }; |
107 | ||
1c248b7d ID |
108 | static void exynos_drm_crtc_destroy(struct drm_crtc *crtc) |
109 | { | |
110 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); | |
111 | struct exynos_drm_private *private = crtc->dev->dev_private; | |
112 | ||
1c248b7d ID |
113 | private->crtc[exynos_crtc->pipe] = NULL; |
114 | ||
115 | drm_crtc_cleanup(crtc); | |
116 | kfree(exynos_crtc); | |
117 | } | |
118 | ||
119 | static struct drm_crtc_funcs exynos_crtc_funcs = { | |
47a7deff | 120 | .set_config = drm_atomic_helper_set_config, |
9d5ab6a0 | 121 | .page_flip = drm_atomic_helper_page_flip, |
1c248b7d | 122 | .destroy = exynos_drm_crtc_destroy, |
4ea9526b GP |
123 | .reset = drm_atomic_helper_crtc_reset, |
124 | .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, | |
125 | .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, | |
1c248b7d ID |
126 | }; |
127 | ||
93bca243 | 128 | struct exynos_drm_crtc *exynos_drm_crtc_create(struct drm_device *drm_dev, |
f3aaf762 KK |
129 | struct drm_plane *plane, |
130 | int pipe, | |
131 | enum exynos_drm_output_type type, | |
132 | const struct exynos_drm_crtc_ops *ops, | |
133 | void *ctx) | |
1c248b7d ID |
134 | { |
135 | struct exynos_drm_crtc *exynos_crtc; | |
eb88e422 | 136 | struct exynos_drm_private *private = drm_dev->dev_private; |
1c248b7d | 137 | struct drm_crtc *crtc; |
72ed6ccd | 138 | int ret; |
1c248b7d | 139 | |
1c248b7d | 140 | exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL); |
38bb5253 | 141 | if (!exynos_crtc) |
93bca243 | 142 | return ERR_PTR(-ENOMEM); |
1c248b7d | 143 | |
20cd2640 | 144 | init_waitqueue_head(&exynos_crtc->pending_flip_queue); |
080be03d | 145 | |
e09f2b0d | 146 | exynos_crtc->pipe = pipe; |
5d1741ad | 147 | exynos_crtc->type = type; |
93bca243 GP |
148 | exynos_crtc->ops = ops; |
149 | exynos_crtc->ctx = ctx; | |
b5d2eb3b | 150 | |
357193cd | 151 | crtc = &exynos_crtc->base; |
1c248b7d | 152 | |
e09f2b0d | 153 | private->crtc[pipe] = crtc; |
1c248b7d | 154 | |
eb88e422 | 155 | ret = drm_crtc_init_with_planes(drm_dev, crtc, plane, NULL, |
72ed6ccd AH |
156 | &exynos_crtc_funcs); |
157 | if (ret < 0) | |
158 | goto err_crtc; | |
159 | ||
1c248b7d ID |
160 | drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs); |
161 | ||
93bca243 | 162 | return exynos_crtc; |
72ed6ccd AH |
163 | |
164 | err_crtc: | |
165 | plane->funcs->destroy(plane); | |
72ed6ccd | 166 | kfree(exynos_crtc); |
93bca243 | 167 | return ERR_PTR(ret); |
1c248b7d ID |
168 | } |
169 | ||
080be03d | 170 | int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int pipe) |
1c248b7d ID |
171 | { |
172 | struct exynos_drm_private *private = dev->dev_private; | |
ec05da95 | 173 | struct exynos_drm_crtc *exynos_crtc = |
080be03d | 174 | to_exynos_crtc(private->crtc[pipe]); |
1c248b7d | 175 | |
63498e30 | 176 | if (!exynos_crtc->enabled) |
ec05da95 ID |
177 | return -EPERM; |
178 | ||
93bca243 | 179 | if (exynos_crtc->ops->enable_vblank) |
08dd2009 | 180 | return exynos_crtc->ops->enable_vblank(exynos_crtc); |
1c248b7d ID |
181 | |
182 | return 0; | |
183 | } | |
184 | ||
080be03d | 185 | void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int pipe) |
1c248b7d ID |
186 | { |
187 | struct exynos_drm_private *private = dev->dev_private; | |
ec05da95 | 188 | struct exynos_drm_crtc *exynos_crtc = |
080be03d | 189 | to_exynos_crtc(private->crtc[pipe]); |
1c248b7d | 190 | |
63498e30 | 191 | if (!exynos_crtc->enabled) |
ec05da95 ID |
192 | return; |
193 | ||
93bca243 GP |
194 | if (exynos_crtc->ops->disable_vblank) |
195 | exynos_crtc->ops->disable_vblank(exynos_crtc); | |
1c248b7d | 196 | } |
663d8766 | 197 | |
eafd540a | 198 | void exynos_drm_crtc_finish_pageflip(struct exynos_drm_crtc *exynos_crtc) |
663d8766 | 199 | { |
eafd540a | 200 | struct drm_crtc *crtc = &exynos_crtc->base; |
663d8766 RS |
201 | unsigned long flags; |
202 | ||
eafd540a | 203 | spin_lock_irqsave(&crtc->dev->event_lock, flags); |
e752747b | 204 | if (exynos_crtc->event) { |
663d8766 | 205 | |
eafd540a GP |
206 | drm_crtc_send_vblank_event(crtc, exynos_crtc->event); |
207 | drm_crtc_vblank_put(crtc); | |
20cd2640 | 208 | wake_up(&exynos_crtc->pending_flip_queue); |
e752747b | 209 | |
663d8766 RS |
210 | } |
211 | ||
e752747b | 212 | exynos_crtc->event = NULL; |
eafd540a | 213 | spin_unlock_irqrestore(&crtc->dev->event_lock, flags); |
663d8766 | 214 | } |
080be03d | 215 | |
080be03d SP |
216 | void exynos_drm_crtc_complete_scanout(struct drm_framebuffer *fb) |
217 | { | |
93bca243 | 218 | struct exynos_drm_crtc *exynos_crtc; |
080be03d SP |
219 | struct drm_device *dev = fb->dev; |
220 | struct drm_crtc *crtc; | |
221 | ||
222 | /* | |
223 | * make sure that overlay data are updated to real hardware | |
224 | * for all encoders. | |
225 | */ | |
226 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
93bca243 | 227 | exynos_crtc = to_exynos_crtc(crtc); |
080be03d SP |
228 | |
229 | /* | |
230 | * wait for vblank interrupt | |
231 | * - this makes sure that overlay data are updated to | |
232 | * real hardware. | |
233 | */ | |
93bca243 GP |
234 | if (exynos_crtc->ops->wait_for_vblank) |
235 | exynos_crtc->ops->wait_for_vblank(exynos_crtc); | |
080be03d SP |
236 | } |
237 | } | |
f37cd5e8 ID |
238 | |
239 | int exynos_drm_crtc_get_pipe_from_type(struct drm_device *drm_dev, | |
240 | unsigned int out_type) | |
241 | { | |
242 | struct drm_crtc *crtc; | |
243 | ||
244 | list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { | |
245 | struct exynos_drm_crtc *exynos_crtc; | |
246 | ||
247 | exynos_crtc = to_exynos_crtc(crtc); | |
5d1741ad | 248 | if (exynos_crtc->type == out_type) |
8a326edd | 249 | return exynos_crtc->pipe; |
f37cd5e8 ID |
250 | } |
251 | ||
252 | return -EPERM; | |
253 | } | |
5595d4d8 YC |
254 | |
255 | void exynos_drm_crtc_te_handler(struct drm_crtc *crtc) | |
256 | { | |
93bca243 | 257 | struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); |
5595d4d8 | 258 | |
93bca243 GP |
259 | if (exynos_crtc->ops->te_handler) |
260 | exynos_crtc->ops->te_handler(exynos_crtc); | |
5595d4d8 | 261 | } |