UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/
[linux-2.6-block.git] / drivers / gpu / drm / drm_edid.c
CommitLineData
f453ba04
DA
1/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
61e57a8d 5 * Copyright 2010 Red Hat, Inc.
f453ba04
DA
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30#include <linux/kernel.h>
5a0e3ad6 31#include <linux/slab.h>
f453ba04 32#include <linux/i2c.h>
47819ba2 33#include <linux/module.h>
760285e7
DH
34#include <drm/drmP.h>
35#include <drm/drm_edid.h>
38fcbb67 36#include "drm_edid_modes.h"
f453ba04 37
13931579
AJ
38#define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
f453ba04 41
d1ff6409
AJ
42#define EDID_EST_TIMINGS 16
43#define EDID_STD_TIMINGS 8
44#define EDID_DETAILED_TIMINGS 4
f453ba04
DA
45
46/*
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
51 */
52
53/* First detailed mode wrong, use largest 60Hz mode */
54#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55/* Reported 135MHz pixel clock is too high, needs adjustment */
56#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57/* Prefer the largest mode at 75 Hz */
58#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59/* Detail timing is in cm not mm */
60#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61/* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
63 */
64#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65/* Monitor forgot to set the first detailed is preferred bit. */
66#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67/* use +hsync +vsync for detailed mode */
68#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
bc42aabc
AJ
69/* Force reduced-blanking timings for detailed modes */
70#define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
3c537889 71
13931579
AJ
72struct detailed_mode_closure {
73 struct drm_connector *connector;
74 struct edid *edid;
75 bool preferred;
76 u32 quirks;
77 int modes;
78};
f453ba04 79
5c61259e
ZY
80#define LEVEL_DMT 0
81#define LEVEL_GTF 1
7a374350
AJ
82#define LEVEL_GTF2 2
83#define LEVEL_CVT 3
5c61259e 84
f453ba04 85static struct edid_quirk {
c51a3fd6 86 char vendor[4];
f453ba04
DA
87 int product_id;
88 u32 quirks;
89} edid_quirk_list[] = {
6f33814b
PM
90 /* ASUS VW222S */
91 { "ACI", 0x22a2, EDID_QUIRK_FORCE_REDUCED_BLANKING },
92
f453ba04
DA
93 /* Acer AL1706 */
94 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
95 /* Acer F51 */
96 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
97 /* Unknown Acer */
98 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
99
100 /* Belinea 10 15 55 */
101 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
102 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
103
104 /* Envision Peripherals, Inc. EN-7100e */
105 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
ba1163de
AJ
106 /* Envision EN2028 */
107 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
f453ba04
DA
108
109 /* Funai Electronics PM36B */
110 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
111 EDID_QUIRK_DETAILED_IN_CM },
112
113 /* LG Philips LCD LP154W01-A5 */
114 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
115 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
116
117 /* Philips 107p5 CRT */
118 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
119
120 /* Proview AY765C */
121 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
122
123 /* Samsung SyncMaster 205BW. Note: irony */
124 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
125 /* Samsung SyncMaster 22[5-6]BW */
126 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
127 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
bc42aabc
AJ
128
129 /* ViewSonic VA2026w */
130 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
f453ba04
DA
131};
132
61e57a8d 133/*** DDC fetch and block validation ***/
f453ba04 134
083ae056
AJ
135static const u8 edid_header[] = {
136 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
137};
f453ba04 138
051963d4
TR
139 /*
140 * Sanity check the header of the base EDID block. Return 8 if the header
141 * is perfect, down to 0 if it's totally wrong.
142 */
143int drm_edid_header_is_valid(const u8 *raw_edid)
144{
145 int i, score = 0;
146
147 for (i = 0; i < sizeof(edid_header); i++)
148 if (raw_edid[i] == edid_header[i])
149 score++;
150
151 return score;
152}
153EXPORT_SYMBOL(drm_edid_header_is_valid);
154
47819ba2
AJ
155static int edid_fixup __read_mostly = 6;
156module_param_named(edid_fixup, edid_fixup, int, 0400);
157MODULE_PARM_DESC(edid_fixup,
158 "Minimum number of valid EDID header bytes (0-8, default 6)");
051963d4 159
61e57a8d
AJ
160/*
161 * Sanity check the EDID block (base or extension). Return 0 if the block
162 * doesn't check out, or 1 if it's valid.
f453ba04 163 */
f89ec8a4 164bool drm_edid_block_valid(u8 *raw_edid, int block)
f453ba04 165{
61e57a8d 166 int i;
f453ba04 167 u8 csum = 0;
61e57a8d 168 struct edid *edid = (struct edid *)raw_edid;
f453ba04 169
47819ba2
AJ
170 if (edid_fixup > 8 || edid_fixup < 0)
171 edid_fixup = 6;
172
f89ec8a4 173 if (block == 0) {
051963d4 174 int score = drm_edid_header_is_valid(raw_edid);
61e57a8d 175 if (score == 8) ;
47819ba2 176 else if (score >= edid_fixup) {
61e57a8d
AJ
177 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
178 memcpy(raw_edid, edid_header, sizeof(edid_header));
179 } else {
180 goto bad;
181 }
182 }
f453ba04
DA
183
184 for (i = 0; i < EDID_LENGTH; i++)
185 csum += raw_edid[i];
186 if (csum) {
187 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
4a638b4e
AJ
188
189 /* allow CEA to slide through, switches mangle this */
190 if (raw_edid[0] != 0x02)
191 goto bad;
f453ba04
DA
192 }
193
61e57a8d
AJ
194 /* per-block-type checks */
195 switch (raw_edid[0]) {
196 case 0: /* base */
197 if (edid->version != 1) {
198 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
199 goto bad;
200 }
862b89c0 201
61e57a8d
AJ
202 if (edid->revision > 4)
203 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
204 break;
862b89c0 205
61e57a8d
AJ
206 default:
207 break;
208 }
47ee4ccf 209
f453ba04
DA
210 return 1;
211
212bad:
213 if (raw_edid) {
f49dadb8 214 printk(KERN_ERR "Raw EDID:\n");
0aff47f2
TV
215 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
216 raw_edid, EDID_LENGTH, false);
f453ba04
DA
217 }
218 return 0;
219}
da0df92b 220EXPORT_SYMBOL(drm_edid_block_valid);
61e57a8d
AJ
221
222/**
223 * drm_edid_is_valid - sanity check EDID data
224 * @edid: EDID data
225 *
226 * Sanity-check an entire EDID record (including extensions)
227 */
228bool drm_edid_is_valid(struct edid *edid)
229{
230 int i;
231 u8 *raw = (u8 *)edid;
232
233 if (!edid)
234 return false;
235
236 for (i = 0; i <= edid->extensions; i++)
f89ec8a4 237 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i))
61e57a8d
AJ
238 return false;
239
240 return true;
241}
3c537889 242EXPORT_SYMBOL(drm_edid_is_valid);
f453ba04 243
61e57a8d
AJ
244#define DDC_SEGMENT_ADDR 0x30
245/**
246 * Get EDID information via I2C.
247 *
248 * \param adapter : i2c device adaptor
249 * \param buf : EDID data buffer to be filled
250 * \param len : EDID data buffer length
251 * \return 0 on success or -1 on failure.
252 *
253 * Try to fetch EDID information by calling i2c driver function.
254 */
255static int
256drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
257 int block, int len)
258{
259 unsigned char start = block * EDID_LENGTH;
4819d2e4
CW
260 int ret, retries = 5;
261
262 /* The core i2c driver will automatically retry the transfer if the
263 * adapter reports EAGAIN. However, we find that bit-banging transfers
264 * are susceptible to errors under a heavily loaded machine and
265 * generate spurious NAKs and timeouts. Retrying the transfer
266 * of the individual block a few times seems to overcome this.
267 */
268 do {
269 struct i2c_msg msgs[] = {
270 {
271 .addr = DDC_ADDR,
272 .flags = 0,
273 .len = 1,
274 .buf = &start,
275 }, {
276 .addr = DDC_ADDR,
277 .flags = I2C_M_RD,
278 .len = len,
279 .buf = buf,
280 }
281 };
282 ret = i2c_transfer(adapter, msgs, 2);
9292f37e
ED
283 if (ret == -ENXIO) {
284 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
285 adapter->name);
286 break;
287 }
4819d2e4
CW
288 } while (ret != 2 && --retries);
289
290 return ret == 2 ? 0 : -1;
61e57a8d
AJ
291}
292
4a9a8b71
DA
293static bool drm_edid_is_zero(u8 *in_edid, int length)
294{
295 int i;
296 u32 *raw_edid = (u32 *)in_edid;
297
298 for (i = 0; i < length / 4; i++)
299 if (*(raw_edid + i) != 0)
300 return false;
301 return true;
302}
303
61e57a8d
AJ
304static u8 *
305drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
306{
0ea75e23 307 int i, j = 0, valid_extensions = 0;
61e57a8d
AJ
308 u8 *block, *new;
309
310 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
311 return NULL;
312
313 /* base block fetch */
314 for (i = 0; i < 4; i++) {
315 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
316 goto out;
f89ec8a4 317 if (drm_edid_block_valid(block, 0))
61e57a8d 318 break;
4a9a8b71
DA
319 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
320 connector->null_edid_counter++;
321 goto carp;
322 }
61e57a8d
AJ
323 }
324 if (i == 4)
325 goto carp;
326
327 /* if there's no extensions, we're done */
328 if (block[0x7e] == 0)
329 return block;
330
331 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
332 if (!new)
333 goto out;
334 block = new;
335
336 for (j = 1; j <= block[0x7e]; j++) {
337 for (i = 0; i < 4; i++) {
0ea75e23
ST
338 if (drm_do_probe_ddc_edid(adapter,
339 block + (valid_extensions + 1) * EDID_LENGTH,
340 j, EDID_LENGTH))
61e57a8d 341 goto out;
f89ec8a4 342 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j)) {
0ea75e23 343 valid_extensions++;
61e57a8d 344 break;
0ea75e23 345 }
61e57a8d
AJ
346 }
347 if (i == 4)
0ea75e23
ST
348 dev_warn(connector->dev->dev,
349 "%s: Ignoring invalid EDID block %d.\n",
350 drm_get_connector_name(connector), j);
351 }
352
353 if (valid_extensions != block[0x7e]) {
354 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
355 block[0x7e] = valid_extensions;
356 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
357 if (!new)
358 goto out;
359 block = new;
61e57a8d
AJ
360 }
361
362 return block;
363
364carp:
dcdb1674 365 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
61e57a8d
AJ
366 drm_get_connector_name(connector), j);
367
368out:
369 kfree(block);
370 return NULL;
371}
372
373/**
374 * Probe DDC presence.
375 *
376 * \param adapter : i2c device adaptor
377 * \return 1 on success
378 */
379static bool
380drm_probe_ddc(struct i2c_adapter *adapter)
381{
382 unsigned char out;
383
384 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
385}
386
387/**
388 * drm_get_edid - get EDID data, if available
389 * @connector: connector we're probing
390 * @adapter: i2c adapter to use for DDC
391 *
392 * Poke the given i2c channel to grab EDID data if possible. If found,
393 * attach it to the connector.
394 *
395 * Return edid data or NULL if we couldn't find any.
396 */
397struct edid *drm_get_edid(struct drm_connector *connector,
398 struct i2c_adapter *adapter)
399{
400 struct edid *edid = NULL;
401
402 if (drm_probe_ddc(adapter))
403 edid = (struct edid *)drm_do_get_edid(connector, adapter);
404
405 connector->display_info.raw_edid = (char *)edid;
406
407 return edid;
408
409}
410EXPORT_SYMBOL(drm_get_edid);
411
412/*** EDID parsing ***/
413
f453ba04
DA
414/**
415 * edid_vendor - match a string against EDID's obfuscated vendor field
416 * @edid: EDID to match
417 * @vendor: vendor string
418 *
419 * Returns true if @vendor is in @edid, false otherwise
420 */
421static bool edid_vendor(struct edid *edid, char *vendor)
422{
423 char edid_vendor[3];
424
425 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
426 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
427 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
16456c87 428 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
f453ba04
DA
429
430 return !strncmp(edid_vendor, vendor, 3);
431}
432
433/**
434 * edid_get_quirks - return quirk flags for a given EDID
435 * @edid: EDID to process
436 *
437 * This tells subsequent routines what fixes they need to apply.
438 */
439static u32 edid_get_quirks(struct edid *edid)
440{
441 struct edid_quirk *quirk;
442 int i;
443
444 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
445 quirk = &edid_quirk_list[i];
446
447 if (edid_vendor(edid, quirk->vendor) &&
448 (EDID_PRODUCT_ID(edid) == quirk->product_id))
449 return quirk->quirks;
450 }
451
452 return 0;
453}
454
455#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
456#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
457
f453ba04
DA
458/**
459 * edid_fixup_preferred - set preferred modes based on quirk list
460 * @connector: has mode list to fix up
461 * @quirks: quirks list
462 *
463 * Walk the mode list for @connector, clearing the preferred status
464 * on existing modes and setting it anew for the right mode ala @quirks.
465 */
466static void edid_fixup_preferred(struct drm_connector *connector,
467 u32 quirks)
468{
469 struct drm_display_mode *t, *cur_mode, *preferred_mode;
f890607b 470 int target_refresh = 0;
f453ba04
DA
471
472 if (list_empty(&connector->probed_modes))
473 return;
474
475 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
476 target_refresh = 60;
477 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
478 target_refresh = 75;
479
480 preferred_mode = list_first_entry(&connector->probed_modes,
481 struct drm_display_mode, head);
482
483 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
484 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
485
486 if (cur_mode == preferred_mode)
487 continue;
488
489 /* Largest mode is preferred */
490 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
491 preferred_mode = cur_mode;
492
493 /* At a given size, try to get closest to target refresh */
494 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
495 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
496 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
497 preferred_mode = cur_mode;
498 }
499 }
500
501 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
502}
503
f6e252ba
AJ
504static bool
505mode_is_rb(const struct drm_display_mode *mode)
506{
507 return (mode->htotal - mode->hdisplay == 160) &&
508 (mode->hsync_end - mode->hdisplay == 80) &&
509 (mode->hsync_end - mode->hsync_start == 32) &&
510 (mode->vsync_start - mode->vdisplay == 3);
511}
512
33c7531d
AJ
513/*
514 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
515 * @dev: Device to duplicate against
516 * @hsize: Mode width
517 * @vsize: Mode height
518 * @fresh: Mode refresh rate
f6e252ba 519 * @rb: Mode reduced-blanking-ness
33c7531d
AJ
520 *
521 * Walk the DMT mode list looking for a match for the given parameters.
522 * Return a newly allocated copy of the mode, or NULL if not found.
523 */
1d42bbc8 524struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
f6e252ba
AJ
525 int hsize, int vsize, int fresh,
526 bool rb)
559ee21d 527{
07a5e632 528 int i;
559ee21d 529
07a5e632 530 for (i = 0; i < drm_num_dmt_modes; i++) {
b1f559ec 531 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f8b46a05
AJ
532 if (hsize != ptr->hdisplay)
533 continue;
534 if (vsize != ptr->vdisplay)
535 continue;
536 if (fresh != drm_mode_vrefresh(ptr))
537 continue;
f6e252ba
AJ
538 if (rb != mode_is_rb(ptr))
539 continue;
f8b46a05
AJ
540
541 return drm_mode_duplicate(dev, ptr);
559ee21d 542 }
f8b46a05
AJ
543
544 return NULL;
559ee21d 545}
1d42bbc8 546EXPORT_SYMBOL(drm_mode_find_dmt);
23425cae 547
d1ff6409
AJ
548typedef void detailed_cb(struct detailed_timing *timing, void *closure);
549
4d76a221
AJ
550static void
551cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
552{
553 int i, n = 0;
4966b2a9 554 u8 d = ext[0x02];
4d76a221
AJ
555 u8 *det_base = ext + d;
556
4966b2a9 557 n = (127 - d) / 18;
4d76a221
AJ
558 for (i = 0; i < n; i++)
559 cb((struct detailed_timing *)(det_base + 18 * i), closure);
560}
561
cbba98f8
AJ
562static void
563vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
564{
565 unsigned int i, n = min((int)ext[0x02], 6);
566 u8 *det_base = ext + 5;
567
568 if (ext[0x01] != 1)
569 return; /* unknown version */
570
571 for (i = 0; i < n; i++)
572 cb((struct detailed_timing *)(det_base + 18 * i), closure);
573}
574
d1ff6409
AJ
575static void
576drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
577{
578 int i;
579 struct edid *edid = (struct edid *)raw_edid;
580
581 if (edid == NULL)
582 return;
583
584 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
585 cb(&(edid->detailed_timings[i]), closure);
586
4d76a221
AJ
587 for (i = 1; i <= raw_edid[0x7e]; i++) {
588 u8 *ext = raw_edid + (i * EDID_LENGTH);
589 switch (*ext) {
590 case CEA_EXT:
591 cea_for_each_detailed_block(ext, cb, closure);
592 break;
cbba98f8
AJ
593 case VTB_EXT:
594 vtb_for_each_detailed_block(ext, cb, closure);
595 break;
4d76a221
AJ
596 default:
597 break;
598 }
599 }
d1ff6409
AJ
600}
601
602static void
603is_rb(struct detailed_timing *t, void *data)
604{
605 u8 *r = (u8 *)t;
606 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
607 if (r[15] & 0x10)
608 *(bool *)data = true;
609}
610
611/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
612static bool
613drm_monitor_supports_rb(struct edid *edid)
614{
615 if (edid->revision >= 4) {
b196a498 616 bool ret = false;
d1ff6409
AJ
617 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
618 return ret;
619 }
620
621 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
622}
623
7a374350
AJ
624static void
625find_gtf2(struct detailed_timing *t, void *data)
626{
627 u8 *r = (u8 *)t;
628 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
629 *(u8 **)data = r;
630}
631
632/* Secondary GTF curve kicks in above some break frequency */
633static int
634drm_gtf2_hbreak(struct edid *edid)
635{
636 u8 *r = NULL;
637 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
638 return r ? (r[12] * 2) : 0;
639}
640
641static int
642drm_gtf2_2c(struct edid *edid)
643{
644 u8 *r = NULL;
645 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
646 return r ? r[13] : 0;
647}
648
649static int
650drm_gtf2_m(struct edid *edid)
651{
652 u8 *r = NULL;
653 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
654 return r ? (r[15] << 8) + r[14] : 0;
655}
656
657static int
658drm_gtf2_k(struct edid *edid)
659{
660 u8 *r = NULL;
661 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
662 return r ? r[16] : 0;
663}
664
665static int
666drm_gtf2_2j(struct edid *edid)
667{
668 u8 *r = NULL;
669 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
670 return r ? r[17] : 0;
671}
672
673/**
674 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
675 * @edid: EDID block to scan
676 */
677static int standard_timing_level(struct edid *edid)
678{
679 if (edid->revision >= 2) {
680 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
681 return LEVEL_CVT;
682 if (drm_gtf2_hbreak(edid))
683 return LEVEL_GTF2;
684 return LEVEL_GTF;
685 }
686 return LEVEL_DMT;
687}
688
23425cae
AJ
689/*
690 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
691 * monitors fill with ascii space (0x20) instead.
692 */
693static int
694bad_std_timing(u8 a, u8 b)
695{
696 return (a == 0x00 && b == 0x00) ||
697 (a == 0x01 && b == 0x01) ||
698 (a == 0x20 && b == 0x20);
699}
700
f453ba04
DA
701/**
702 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
703 * @t: standard timing params
5c61259e 704 * @timing_level: standard timing level
f453ba04
DA
705 *
706 * Take the standard timing params (in this case width, aspect, and refresh)
5c61259e 707 * and convert them into a real mode using CVT/GTF/DMT.
f453ba04 708 */
7ca6adb3 709static struct drm_display_mode *
7a374350
AJ
710drm_mode_std(struct drm_connector *connector, struct edid *edid,
711 struct std_timing *t, int revision)
f453ba04 712{
7ca6adb3
AJ
713 struct drm_device *dev = connector->dev;
714 struct drm_display_mode *m, *mode = NULL;
5c61259e
ZY
715 int hsize, vsize;
716 int vrefresh_rate;
0454beab
MD
717 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
718 >> EDID_TIMING_ASPECT_SHIFT;
5c61259e
ZY
719 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
720 >> EDID_TIMING_VFREQ_SHIFT;
7a374350 721 int timing_level = standard_timing_level(edid);
5c61259e 722
23425cae
AJ
723 if (bad_std_timing(t->hsize, t->vfreq_aspect))
724 return NULL;
725
5c61259e
ZY
726 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
727 hsize = t->hsize * 8 + 248;
728 /* vrefresh_rate = vfreq + 60 */
729 vrefresh_rate = vfreq + 60;
730 /* the vdisplay is calculated based on the aspect ratio */
f066a17d
AJ
731 if (aspect_ratio == 0) {
732 if (revision < 3)
733 vsize = hsize;
734 else
735 vsize = (hsize * 10) / 16;
736 } else if (aspect_ratio == 1)
f453ba04 737 vsize = (hsize * 3) / 4;
0454beab 738 else if (aspect_ratio == 2)
f453ba04
DA
739 vsize = (hsize * 4) / 5;
740 else
741 vsize = (hsize * 9) / 16;
a0910c8e
AJ
742
743 /* HDTV hack, part 1 */
744 if (vrefresh_rate == 60 &&
745 ((hsize == 1360 && vsize == 765) ||
746 (hsize == 1368 && vsize == 769))) {
747 hsize = 1366;
748 vsize = 768;
749 }
750
7ca6adb3
AJ
751 /*
752 * If this connector already has a mode for this size and refresh
753 * rate (because it came from detailed or CVT info), use that
754 * instead. This way we don't have to guess at interlace or
755 * reduced blanking.
756 */
522032da 757 list_for_each_entry(m, &connector->probed_modes, head)
7ca6adb3
AJ
758 if (m->hdisplay == hsize && m->vdisplay == vsize &&
759 drm_mode_vrefresh(m) == vrefresh_rate)
760 return NULL;
761
a0910c8e
AJ
762 /* HDTV hack, part 2 */
763 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
764 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
d50ba256 765 false);
559ee21d 766 mode->hdisplay = 1366;
a4967de6
AJ
767 mode->hsync_start = mode->hsync_start - 1;
768 mode->hsync_end = mode->hsync_end - 1;
559ee21d
ZY
769 return mode;
770 }
a0910c8e 771
559ee21d 772 /* check whether it can be found in default mode table */
f6e252ba
AJ
773 if (drm_monitor_supports_rb(edid)) {
774 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
775 true);
776 if (mode)
777 return mode;
778 }
779 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
559ee21d
ZY
780 if (mode)
781 return mode;
782
f6e252ba 783 /* okay, generate it */
5c61259e
ZY
784 switch (timing_level) {
785 case LEVEL_DMT:
5c61259e
ZY
786 break;
787 case LEVEL_GTF:
788 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
789 break;
7a374350
AJ
790 case LEVEL_GTF2:
791 /*
792 * This is potentially wrong if there's ever a monitor with
793 * more than one ranges section, each claiming a different
794 * secondary GTF curve. Please don't do that.
795 */
796 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
fc48f169
TI
797 if (!mode)
798 return NULL;
7a374350 799 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
aefd330e 800 drm_mode_destroy(dev, mode);
7a374350
AJ
801 mode = drm_gtf_mode_complex(dev, hsize, vsize,
802 vrefresh_rate, 0, 0,
803 drm_gtf2_m(edid),
804 drm_gtf2_2c(edid),
805 drm_gtf2_k(edid),
806 drm_gtf2_2j(edid));
807 }
808 break;
5c61259e 809 case LEVEL_CVT:
d50ba256
DA
810 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
811 false);
5c61259e
ZY
812 break;
813 }
f453ba04
DA
814 return mode;
815}
816
b58db2c6
AJ
817/*
818 * EDID is delightfully ambiguous about how interlaced modes are to be
819 * encoded. Our internal representation is of frame height, but some
820 * HDTV detailed timings are encoded as field height.
821 *
822 * The format list here is from CEA, in frame size. Technically we
823 * should be checking refresh rate too. Whatever.
824 */
825static void
826drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
827 struct detailed_pixel_timing *pt)
828{
829 int i;
830 static const struct {
831 int w, h;
832 } cea_interlaced[] = {
833 { 1920, 1080 },
834 { 720, 480 },
835 { 1440, 480 },
836 { 2880, 480 },
837 { 720, 576 },
838 { 1440, 576 },
839 { 2880, 576 },
840 };
b58db2c6
AJ
841
842 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
843 return;
844
3c581411 845 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
b58db2c6
AJ
846 if ((mode->hdisplay == cea_interlaced[i].w) &&
847 (mode->vdisplay == cea_interlaced[i].h / 2)) {
848 mode->vdisplay *= 2;
849 mode->vsync_start *= 2;
850 mode->vsync_end *= 2;
851 mode->vtotal *= 2;
852 mode->vtotal |= 1;
853 }
854 }
855
856 mode->flags |= DRM_MODE_FLAG_INTERLACE;
857}
858
f453ba04
DA
859/**
860 * drm_mode_detailed - create a new mode from an EDID detailed timing section
861 * @dev: DRM device (needed to create new mode)
862 * @edid: EDID block
863 * @timing: EDID detailed timing info
864 * @quirks: quirks to apply
865 *
866 * An EDID detailed timing block contains enough info for us to create and
867 * return a new struct drm_display_mode.
868 */
869static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
870 struct edid *edid,
871 struct detailed_timing *timing,
872 u32 quirks)
873{
874 struct drm_display_mode *mode;
875 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
0454beab
MD
876 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
877 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
878 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
879 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
e14cbee4
MD
880 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
881 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
882 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
883 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
f453ba04 884
fc438966 885 /* ignore tiny modes */
0454beab 886 if (hactive < 64 || vactive < 64)
fc438966
AJ
887 return NULL;
888
0454beab 889 if (pt->misc & DRM_EDID_PT_STEREO) {
f453ba04
DA
890 printk(KERN_WARNING "stereo mode not supported\n");
891 return NULL;
892 }
0454beab 893 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
79b7dcb2 894 printk(KERN_WARNING "composite sync not supported\n");
f453ba04
DA
895 }
896
fcb45611
ZY
897 /* it is incorrect if hsync/vsync width is zero */
898 if (!hsync_pulse_width || !vsync_pulse_width) {
899 DRM_DEBUG_KMS("Incorrect Detailed timing. "
900 "Wrong Hsync/Vsync pulse width\n");
901 return NULL;
902 }
bc42aabc
AJ
903
904 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
905 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
906 if (!mode)
907 return NULL;
908
909 goto set_size;
910 }
911
f453ba04
DA
912 mode = drm_mode_create(dev);
913 if (!mode)
914 return NULL;
915
f453ba04 916 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
0454beab
MD
917 timing->pixel_clock = cpu_to_le16(1088);
918
919 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
920
921 mode->hdisplay = hactive;
922 mode->hsync_start = mode->hdisplay + hsync_offset;
923 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
924 mode->htotal = mode->hdisplay + hblank;
925
926 mode->vdisplay = vactive;
927 mode->vsync_start = mode->vdisplay + vsync_offset;
928 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
929 mode->vtotal = mode->vdisplay + vblank;
f453ba04 930
7064fef5
JB
931 /* Some EDIDs have bogus h/vtotal values */
932 if (mode->hsync_end > mode->htotal)
933 mode->htotal = mode->hsync_end + 1;
934 if (mode->vsync_end > mode->vtotal)
935 mode->vtotal = mode->vsync_end + 1;
936
b58db2c6 937 drm_mode_do_interlace_quirk(mode, pt);
f453ba04
DA
938
939 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
0454beab 940 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
f453ba04
DA
941 }
942
0454beab
MD
943 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
944 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
945 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
946 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
f453ba04 947
bc42aabc 948set_size:
e14cbee4
MD
949 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
950 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
f453ba04
DA
951
952 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
953 mode->width_mm *= 10;
954 mode->height_mm *= 10;
955 }
956
957 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
958 mode->width_mm = edid->width_cm * 10;
959 mode->height_mm = edid->height_cm * 10;
960 }
961
bc42aabc
AJ
962 mode->type = DRM_MODE_TYPE_DRIVER;
963 drm_mode_set_name(mode);
964
f453ba04
DA
965 return mode;
966}
967
b17e52ef 968static bool
b1f559ec
CW
969mode_in_hsync_range(const struct drm_display_mode *mode,
970 struct edid *edid, u8 *t)
b17e52ef
AJ
971{
972 int hsync, hmin, hmax;
973
974 hmin = t[7];
975 if (edid->revision >= 4)
976 hmin += ((t[4] & 0x04) ? 255 : 0);
977 hmax = t[8];
978 if (edid->revision >= 4)
979 hmax += ((t[4] & 0x08) ? 255 : 0);
07a5e632 980 hsync = drm_mode_hsync(mode);
07a5e632 981
b17e52ef
AJ
982 return (hsync <= hmax && hsync >= hmin);
983}
984
985static bool
b1f559ec
CW
986mode_in_vsync_range(const struct drm_display_mode *mode,
987 struct edid *edid, u8 *t)
b17e52ef
AJ
988{
989 int vsync, vmin, vmax;
990
991 vmin = t[5];
992 if (edid->revision >= 4)
993 vmin += ((t[4] & 0x01) ? 255 : 0);
994 vmax = t[6];
995 if (edid->revision >= 4)
996 vmax += ((t[4] & 0x02) ? 255 : 0);
997 vsync = drm_mode_vrefresh(mode);
998
999 return (vsync <= vmax && vsync >= vmin);
1000}
1001
1002static u32
1003range_pixel_clock(struct edid *edid, u8 *t)
1004{
1005 /* unspecified */
1006 if (t[9] == 0 || t[9] == 255)
1007 return 0;
1008
1009 /* 1.4 with CVT support gives us real precision, yay */
1010 if (edid->revision >= 4 && t[10] == 0x04)
1011 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1012
1013 /* 1.3 is pathetic, so fuzz up a bit */
1014 return t[9] * 10000 + 5001;
1015}
1016
b17e52ef 1017static bool
b1f559ec 1018mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
b17e52ef
AJ
1019 struct detailed_timing *timing)
1020{
1021 u32 max_clock;
1022 u8 *t = (u8 *)timing;
1023
1024 if (!mode_in_hsync_range(mode, edid, t))
07a5e632
AJ
1025 return false;
1026
b17e52ef 1027 if (!mode_in_vsync_range(mode, edid, t))
07a5e632
AJ
1028 return false;
1029
b17e52ef 1030 if ((max_clock = range_pixel_clock(edid, t)))
07a5e632
AJ
1031 if (mode->clock > max_clock)
1032 return false;
b17e52ef
AJ
1033
1034 /* 1.4 max horizontal check */
1035 if (edid->revision >= 4 && t[10] == 0x04)
1036 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1037 return false;
1038
1039 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1040 return false;
07a5e632
AJ
1041
1042 return true;
1043}
1044
7b668ebe
TI
1045static bool valid_inferred_mode(const struct drm_connector *connector,
1046 const struct drm_display_mode *mode)
1047{
1048 struct drm_display_mode *m;
1049 bool ok = false;
1050
1051 list_for_each_entry(m, &connector->probed_modes, head) {
1052 if (mode->hdisplay == m->hdisplay &&
1053 mode->vdisplay == m->vdisplay &&
1054 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1055 return false; /* duplicated */
1056 if (mode->hdisplay <= m->hdisplay &&
1057 mode->vdisplay <= m->vdisplay)
1058 ok = true;
1059 }
1060 return ok;
1061}
1062
b17e52ef 1063static int
cd4cd3de 1064drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
b17e52ef 1065 struct detailed_timing *timing)
07a5e632
AJ
1066{
1067 int i, modes = 0;
1068 struct drm_display_mode *newmode;
1069 struct drm_device *dev = connector->dev;
1070
1071 for (i = 0; i < drm_num_dmt_modes; i++) {
7b668ebe
TI
1072 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1073 valid_inferred_mode(connector, drm_dmt_modes + i)) {
07a5e632
AJ
1074 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1075 if (newmode) {
1076 drm_mode_probed_add(connector, newmode);
1077 modes++;
1078 }
1079 }
1080 }
1081
1082 return modes;
1083}
1084
c09dedb7
TI
1085/* fix up 1366x768 mode from 1368x768;
1086 * GFT/CVT can't express 1366 width which isn't dividable by 8
1087 */
1088static void fixup_mode_1366x768(struct drm_display_mode *mode)
1089{
1090 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1091 mode->hdisplay = 1366;
1092 mode->hsync_start--;
1093 mode->hsync_end--;
1094 drm_mode_set_name(mode);
1095 }
1096}
1097
b309bd37
AJ
1098static int
1099drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1100 struct detailed_timing *timing)
1101{
1102 int i, modes = 0;
1103 struct drm_display_mode *newmode;
1104 struct drm_device *dev = connector->dev;
1105
1106 for (i = 0; i < num_extra_modes; i++) {
1107 const struct minimode *m = &extra_modes[i];
1108 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
fc48f169
TI
1109 if (!newmode)
1110 return modes;
b309bd37 1111
c09dedb7 1112 fixup_mode_1366x768(newmode);
7b668ebe
TI
1113 if (!mode_in_range(newmode, edid, timing) ||
1114 !valid_inferred_mode(connector, newmode)) {
b309bd37
AJ
1115 drm_mode_destroy(dev, newmode);
1116 continue;
1117 }
1118
1119 drm_mode_probed_add(connector, newmode);
1120 modes++;
1121 }
1122
1123 return modes;
1124}
1125
1126static int
1127drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1128 struct detailed_timing *timing)
1129{
1130 int i, modes = 0;
1131 struct drm_display_mode *newmode;
1132 struct drm_device *dev = connector->dev;
1133 bool rb = drm_monitor_supports_rb(edid);
1134
1135 for (i = 0; i < num_extra_modes; i++) {
1136 const struct minimode *m = &extra_modes[i];
1137 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
fc48f169
TI
1138 if (!newmode)
1139 return modes;
b309bd37 1140
c09dedb7 1141 fixup_mode_1366x768(newmode);
7b668ebe
TI
1142 if (!mode_in_range(newmode, edid, timing) ||
1143 !valid_inferred_mode(connector, newmode)) {
b309bd37
AJ
1144 drm_mode_destroy(dev, newmode);
1145 continue;
1146 }
1147
1148 drm_mode_probed_add(connector, newmode);
1149 modes++;
1150 }
1151
1152 return modes;
1153}
1154
13931579
AJ
1155static void
1156do_inferred_modes(struct detailed_timing *timing, void *c)
9340d8cf 1157{
13931579
AJ
1158 struct detailed_mode_closure *closure = c;
1159 struct detailed_non_pixel *data = &timing->data.other_data;
b309bd37 1160 struct detailed_data_monitor_range *range = &data->data.range;
9340d8cf 1161
cb21aafe
AJ
1162 if (data->type != EDID_DETAIL_MONITOR_RANGE)
1163 return;
1164
1165 closure->modes += drm_dmt_modes_for_range(closure->connector,
1166 closure->edid,
1167 timing);
b309bd37
AJ
1168
1169 if (!version_greater(closure->edid, 1, 1))
1170 return; /* GTF not defined yet */
1171
1172 switch (range->flags) {
1173 case 0x02: /* secondary gtf, XXX could do more */
1174 case 0x00: /* default gtf */
1175 closure->modes += drm_gtf_modes_for_range(closure->connector,
1176 closure->edid,
1177 timing);
1178 break;
1179 case 0x04: /* cvt, only in 1.4+ */
1180 if (!version_greater(closure->edid, 1, 3))
1181 break;
1182
1183 closure->modes += drm_cvt_modes_for_range(closure->connector,
1184 closure->edid,
1185 timing);
1186 break;
1187 case 0x01: /* just the ranges, no formula */
1188 default:
1189 break;
1190 }
13931579 1191}
69da3015 1192
13931579
AJ
1193static int
1194add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1195{
1196 struct detailed_mode_closure closure = {
1197 connector, edid, 0, 0, 0
1198 };
9340d8cf 1199
13931579
AJ
1200 if (version_greater(edid, 1, 0))
1201 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1202 &closure);
9340d8cf 1203
13931579 1204 return closure.modes;
9340d8cf
AJ
1205}
1206
2255be14
AJ
1207static int
1208drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1209{
1210 int i, j, m, modes = 0;
1211 struct drm_display_mode *mode;
1212 u8 *est = ((u8 *)timing) + 5;
1213
1214 for (i = 0; i < 6; i++) {
1215 for (j = 7; j > 0; j--) {
1216 m = (i * 8) + (7 - j);
3c581411 1217 if (m >= ARRAY_SIZE(est3_modes))
2255be14
AJ
1218 break;
1219 if (est[i] & (1 << j)) {
1d42bbc8
DA
1220 mode = drm_mode_find_dmt(connector->dev,
1221 est3_modes[m].w,
1222 est3_modes[m].h,
f6e252ba
AJ
1223 est3_modes[m].r,
1224 est3_modes[m].rb);
2255be14
AJ
1225 if (mode) {
1226 drm_mode_probed_add(connector, mode);
1227 modes++;
1228 }
1229 }
1230 }
1231 }
1232
1233 return modes;
1234}
1235
13931579
AJ
1236static void
1237do_established_modes(struct detailed_timing *timing, void *c)
9cf00977 1238{
13931579 1239 struct detailed_mode_closure *closure = c;
9cf00977 1240 struct detailed_non_pixel *data = &timing->data.other_data;
9cf00977 1241
13931579
AJ
1242 if (data->type == EDID_DETAIL_EST_TIMINGS)
1243 closure->modes += drm_est3_modes(closure->connector, timing);
1244}
9cf00977 1245
13931579
AJ
1246/**
1247 * add_established_modes - get est. modes from EDID and add them
1248 * @edid: EDID block to scan
1249 *
1250 * Each EDID block contains a bitmap of the supported "established modes" list
1251 * (defined above). Tease them out and add them to the global modes list.
1252 */
1253static int
1254add_established_modes(struct drm_connector *connector, struct edid *edid)
1255{
1256 struct drm_device *dev = connector->dev;
1257 unsigned long est_bits = edid->established_timings.t1 |
1258 (edid->established_timings.t2 << 8) |
1259 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1260 int i, modes = 0;
1261 struct detailed_mode_closure closure = {
1262 connector, edid, 0, 0, 0
1263 };
9cf00977 1264
13931579
AJ
1265 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1266 if (est_bits & (1<<i)) {
1267 struct drm_display_mode *newmode;
1268 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1269 if (newmode) {
1270 drm_mode_probed_add(connector, newmode);
1271 modes++;
1272 }
1273 }
9cf00977
AJ
1274 }
1275
13931579
AJ
1276 if (version_greater(edid, 1, 0))
1277 drm_for_each_detailed_block((u8 *)edid,
1278 do_established_modes, &closure);
1279
1280 return modes + closure.modes;
1281}
1282
1283static void
1284do_standard_modes(struct detailed_timing *timing, void *c)
1285{
1286 struct detailed_mode_closure *closure = c;
1287 struct detailed_non_pixel *data = &timing->data.other_data;
1288 struct drm_connector *connector = closure->connector;
1289 struct edid *edid = closure->edid;
1290
1291 if (data->type == EDID_DETAIL_STD_MODES) {
1292 int i;
9cf00977
AJ
1293 for (i = 0; i < 6; i++) {
1294 struct std_timing *std;
1295 struct drm_display_mode *newmode;
1296
1297 std = &data->data.timings[i];
7a374350
AJ
1298 newmode = drm_mode_std(connector, edid, std,
1299 edid->revision);
9cf00977
AJ
1300 if (newmode) {
1301 drm_mode_probed_add(connector, newmode);
13931579 1302 closure->modes++;
9cf00977
AJ
1303 }
1304 }
9cf00977 1305 }
9cf00977
AJ
1306}
1307
f453ba04 1308/**
13931579 1309 * add_standard_modes - get std. modes from EDID and add them
f453ba04 1310 * @edid: EDID block to scan
f453ba04 1311 *
13931579
AJ
1312 * Standard modes can be calculated using the appropriate standard (DMT,
1313 * GTF or CVT. Grab them from @edid and add them to the list.
f453ba04 1314 */
13931579
AJ
1315static int
1316add_standard_modes(struct drm_connector *connector, struct edid *edid)
f453ba04 1317{
9cf00977 1318 int i, modes = 0;
13931579
AJ
1319 struct detailed_mode_closure closure = {
1320 connector, edid, 0, 0, 0
1321 };
1322
1323 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1324 struct drm_display_mode *newmode;
1325
1326 newmode = drm_mode_std(connector, edid,
1327 &edid->standard_timings[i],
1328 edid->revision);
1329 if (newmode) {
1330 drm_mode_probed_add(connector, newmode);
1331 modes++;
1332 }
1333 }
1334
1335 if (version_greater(edid, 1, 0))
1336 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1337 &closure);
1338
1339 /* XXX should also look for standard codes in VTB blocks */
1340
1341 return modes + closure.modes;
1342}
f453ba04 1343
13931579
AJ
1344static int drm_cvt_modes(struct drm_connector *connector,
1345 struct detailed_timing *timing)
1346{
1347 int i, j, modes = 0;
1348 struct drm_display_mode *newmode;
1349 struct drm_device *dev = connector->dev;
1350 struct cvt_timing *cvt;
1351 const int rates[] = { 60, 85, 75, 60, 50 };
1352 const u8 empty[3] = { 0, 0, 0 };
a327f6b8 1353
13931579
AJ
1354 for (i = 0; i < 4; i++) {
1355 int uninitialized_var(width), height;
1356 cvt = &(timing->data.other_data.data.cvt[i]);
f453ba04 1357
13931579 1358 if (!memcmp(cvt->code, empty, 3))
9cf00977 1359 continue;
f453ba04 1360
13931579
AJ
1361 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1362 switch (cvt->code[1] & 0x0c) {
1363 case 0x00:
1364 width = height * 4 / 3;
1365 break;
1366 case 0x04:
1367 width = height * 16 / 9;
1368 break;
1369 case 0x08:
1370 width = height * 16 / 10;
1371 break;
1372 case 0x0c:
1373 width = height * 15 / 9;
1374 break;
1375 }
1376
1377 for (j = 1; j < 5; j++) {
1378 if (cvt->code[2] & (1 << j)) {
1379 newmode = drm_cvt_mode(dev, width, height,
1380 rates[j], j == 0,
1381 false, false);
1382 if (newmode) {
1383 drm_mode_probed_add(connector, newmode);
1384 modes++;
1385 }
1386 }
1387 }
f453ba04
DA
1388 }
1389
1390 return modes;
1391}
9cf00977 1392
13931579
AJ
1393static void
1394do_cvt_mode(struct detailed_timing *timing, void *c)
882f0219 1395{
13931579
AJ
1396 struct detailed_mode_closure *closure = c;
1397 struct detailed_non_pixel *data = &timing->data.other_data;
882f0219 1398
13931579
AJ
1399 if (data->type == EDID_DETAIL_CVT_3BYTE)
1400 closure->modes += drm_cvt_modes(closure->connector, timing);
1401}
882f0219 1402
13931579
AJ
1403static int
1404add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1405{
1406 struct detailed_mode_closure closure = {
1407 connector, edid, 0, 0, 0
1408 };
882f0219 1409
13931579
AJ
1410 if (version_greater(edid, 1, 2))
1411 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
882f0219 1412
13931579 1413 /* XXX should also look for CVT codes in VTB blocks */
882f0219 1414
13931579
AJ
1415 return closure.modes;
1416}
1417
1418static void
1419do_detailed_mode(struct detailed_timing *timing, void *c)
1420{
1421 struct detailed_mode_closure *closure = c;
1422 struct drm_display_mode *newmode;
1423
1424 if (timing->pixel_clock) {
1425 newmode = drm_mode_detailed(closure->connector->dev,
1426 closure->edid, timing,
1427 closure->quirks);
1428 if (!newmode)
1429 return;
1430
1431 if (closure->preferred)
1432 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1433
1434 drm_mode_probed_add(closure->connector, newmode);
1435 closure->modes++;
1436 closure->preferred = 0;
882f0219 1437 }
13931579 1438}
882f0219 1439
13931579
AJ
1440/*
1441 * add_detailed_modes - Add modes from detailed timings
1442 * @connector: attached connector
1443 * @edid: EDID block to scan
1444 * @quirks: quirks to apply
1445 */
1446static int
1447add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1448 u32 quirks)
1449{
1450 struct detailed_mode_closure closure = {
1451 connector,
1452 edid,
1453 1,
1454 quirks,
1455 0
1456 };
1457
1458 if (closure.preferred && !version_greater(edid, 1, 3))
1459 closure.preferred =
1460 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1461
1462 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1463
1464 return closure.modes;
882f0219 1465}
f453ba04 1466
f23c20c8 1467#define HDMI_IDENTIFIER 0x000C03
8fe9790d 1468#define AUDIO_BLOCK 0x01
54ac76f8 1469#define VIDEO_BLOCK 0x02
f23c20c8 1470#define VENDOR_BLOCK 0x03
76adaa34 1471#define SPEAKER_BLOCK 0x04
8fe9790d 1472#define EDID_BASIC_AUDIO (1 << 6)
a988bc72
LPC
1473#define EDID_CEA_YCRCB444 (1 << 5)
1474#define EDID_CEA_YCRCB422 (1 << 4)
8fe9790d 1475
f23c20c8 1476/**
8fe9790d 1477 * Search EDID for CEA extension block.
f23c20c8 1478 */
eccaca28 1479u8 *drm_find_cea_extension(struct edid *edid)
f23c20c8 1480{
8fe9790d
ZW
1481 u8 *edid_ext = NULL;
1482 int i;
f23c20c8
ML
1483
1484 /* No EDID or EDID extensions */
1485 if (edid == NULL || edid->extensions == 0)
8fe9790d 1486 return NULL;
f23c20c8 1487
f23c20c8 1488 /* Find CEA extension */
7466f4cc 1489 for (i = 0; i < edid->extensions; i++) {
8fe9790d
ZW
1490 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1491 if (edid_ext[0] == CEA_EXT)
f23c20c8
ML
1492 break;
1493 }
1494
7466f4cc 1495 if (i == edid->extensions)
8fe9790d
ZW
1496 return NULL;
1497
1498 return edid_ext;
1499}
eccaca28 1500EXPORT_SYMBOL(drm_find_cea_extension);
8fe9790d 1501
54ac76f8
CS
1502static int
1503do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
1504{
1505 struct drm_device *dev = connector->dev;
1506 u8 * mode, cea_mode;
1507 int modes = 0;
1508
1509 for (mode = db; mode < db + len; mode++) {
1510 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
1511 if (cea_mode < drm_num_cea_modes) {
1512 struct drm_display_mode *newmode;
1513 newmode = drm_mode_duplicate(dev,
1514 &edid_cea_modes[cea_mode]);
1515 if (newmode) {
1516 drm_mode_probed_add(connector, newmode);
1517 modes++;
1518 }
1519 }
1520 }
1521
1522 return modes;
1523}
1524
1525static int
1526add_cea_modes(struct drm_connector *connector, struct edid *edid)
1527{
1528 u8 * cea = drm_find_cea_extension(edid);
1529 u8 * db, dbl;
1530 int modes = 0;
1531
1532 if (cea && cea[1] >= 3) {
1533 for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) {
1534 dbl = db[0] & 0x1f;
1535 if (((db[0] & 0xe0) >> 5) == VIDEO_BLOCK)
1536 modes += do_cea_modes (connector, db+1, dbl);
1537 }
1538 }
1539
1540 return modes;
1541}
1542
76adaa34
WF
1543static void
1544parse_hdmi_vsdb(struct drm_connector *connector, uint8_t *db)
1545{
1546 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
1547
1548 connector->dvi_dual = db[6] & 1;
1549 connector->max_tmds_clock = db[7] * 5;
1550
1551 connector->latency_present[0] = db[8] >> 7;
1552 connector->latency_present[1] = (db[8] >> 6) & 1;
1553 connector->video_latency[0] = db[9];
1554 connector->audio_latency[0] = db[10];
1555 connector->video_latency[1] = db[11];
1556 connector->audio_latency[1] = db[12];
1557
1558 DRM_LOG_KMS("HDMI: DVI dual %d, "
1559 "max TMDS clock %d, "
1560 "latency present %d %d, "
1561 "video latency %d %d, "
1562 "audio latency %d %d\n",
1563 connector->dvi_dual,
1564 connector->max_tmds_clock,
1565 (int) connector->latency_present[0],
1566 (int) connector->latency_present[1],
1567 connector->video_latency[0],
1568 connector->video_latency[1],
1569 connector->audio_latency[0],
1570 connector->audio_latency[1]);
1571}
1572
1573static void
1574monitor_name(struct detailed_timing *t, void *data)
1575{
1576 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
1577 *(u8 **)data = t->data.other_data.data.str.str;
1578}
1579
1580/**
1581 * drm_edid_to_eld - build ELD from EDID
1582 * @connector: connector corresponding to the HDMI/DP sink
1583 * @edid: EDID to parse
1584 *
1585 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
1586 * Some ELD fields are left to the graphics driver caller:
1587 * - Conn_Type
1588 * - HDCP
1589 * - Port_ID
1590 */
1591void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
1592{
1593 uint8_t *eld = connector->eld;
1594 u8 *cea;
1595 u8 *name;
1596 u8 *db;
1597 int sad_count = 0;
1598 int mnl;
1599 int dbl;
1600
1601 memset(eld, 0, sizeof(connector->eld));
1602
1603 cea = drm_find_cea_extension(edid);
1604 if (!cea) {
1605 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
1606 return;
1607 }
1608
1609 name = NULL;
1610 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
1611 for (mnl = 0; name && mnl < 13; mnl++) {
1612 if (name[mnl] == 0x0a)
1613 break;
1614 eld[20 + mnl] = name[mnl];
1615 }
1616 eld[4] = (cea[1] << 5) | mnl;
1617 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
1618
1619 eld[0] = 2 << 3; /* ELD version: 2 */
1620
1621 eld[16] = edid->mfg_id[0];
1622 eld[17] = edid->mfg_id[1];
1623 eld[18] = edid->prod_code[0];
1624 eld[19] = edid->prod_code[1];
1625
a0ab734d
CS
1626 if (cea[1] >= 3)
1627 for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) {
1628 dbl = db[0] & 0x1f;
1629
1630 switch ((db[0] & 0xe0) >> 5) {
1631 case AUDIO_BLOCK:
1632 /* Audio Data Block, contains SADs */
1633 sad_count = dbl / 3;
1634 memcpy(eld + 20 + mnl, &db[1], dbl);
1635 break;
1636 case SPEAKER_BLOCK:
1637 /* Speaker Allocation Data Block */
1638 eld[7] = db[1];
1639 break;
1640 case VENDOR_BLOCK:
1641 /* HDMI Vendor-Specific Data Block */
1642 if (db[1] == 0x03 && db[2] == 0x0c && db[3] == 0)
1643 parse_hdmi_vsdb(connector, db);
1644 break;
1645 default:
1646 break;
1647 }
76adaa34 1648 }
76adaa34
WF
1649 eld[5] |= sad_count << 4;
1650 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
1651
1652 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
1653}
1654EXPORT_SYMBOL(drm_edid_to_eld);
1655
1656/**
1657 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
1658 * @connector: connector associated with the HDMI/DP sink
1659 * @mode: the display mode
1660 */
1661int drm_av_sync_delay(struct drm_connector *connector,
1662 struct drm_display_mode *mode)
1663{
1664 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
1665 int a, v;
1666
1667 if (!connector->latency_present[0])
1668 return 0;
1669 if (!connector->latency_present[1])
1670 i = 0;
1671
1672 a = connector->audio_latency[i];
1673 v = connector->video_latency[i];
1674
1675 /*
1676 * HDMI/DP sink doesn't support audio or video?
1677 */
1678 if (a == 255 || v == 255)
1679 return 0;
1680
1681 /*
1682 * Convert raw EDID values to millisecond.
1683 * Treat unknown latency as 0ms.
1684 */
1685 if (a)
1686 a = min(2 * (a - 1), 500);
1687 if (v)
1688 v = min(2 * (v - 1), 500);
1689
1690 return max(v - a, 0);
1691}
1692EXPORT_SYMBOL(drm_av_sync_delay);
1693
1694/**
1695 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
1696 * @encoder: the encoder just changed display mode
1697 * @mode: the adjusted display mode
1698 *
1699 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
1700 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
1701 */
1702struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
1703 struct drm_display_mode *mode)
1704{
1705 struct drm_connector *connector;
1706 struct drm_device *dev = encoder->dev;
1707
1708 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
1709 if (connector->encoder == encoder && connector->eld[0])
1710 return connector;
1711
1712 return NULL;
1713}
1714EXPORT_SYMBOL(drm_select_eld);
1715
8fe9790d
ZW
1716/**
1717 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1718 * @edid: monitor EDID information
1719 *
1720 * Parse the CEA extension according to CEA-861-B.
1721 * Return true if HDMI, false if not or unknown.
1722 */
1723bool drm_detect_hdmi_monitor(struct edid *edid)
1724{
1725 u8 *edid_ext;
1726 int i, hdmi_id;
1727 int start_offset, end_offset;
1728 bool is_hdmi = false;
1729
1730 edid_ext = drm_find_cea_extension(edid);
1731 if (!edid_ext)
f23c20c8
ML
1732 goto end;
1733
1734 /* Data block offset in CEA extension block */
1735 start_offset = 4;
1736 end_offset = edid_ext[2];
1737
1738 /*
1739 * Because HDMI identifier is in Vendor Specific Block,
1740 * search it from all data blocks of CEA extension.
1741 */
1742 for (i = start_offset; i < end_offset;
1743 /* Increased by data block len */
1744 i += ((edid_ext[i] & 0x1f) + 1)) {
1745 /* Find vendor specific block */
1746 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1747 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1748 edid_ext[i + 3] << 16;
1749 /* Find HDMI identifier */
1750 if (hdmi_id == HDMI_IDENTIFIER)
1751 is_hdmi = true;
1752 break;
1753 }
1754 }
1755
1756end:
1757 return is_hdmi;
1758}
1759EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1760
8fe9790d
ZW
1761/**
1762 * drm_detect_monitor_audio - check monitor audio capability
1763 *
1764 * Monitor should have CEA extension block.
1765 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1766 * audio' only. If there is any audio extension block and supported
1767 * audio format, assume at least 'basic audio' support, even if 'basic
1768 * audio' is not defined in EDID.
1769 *
1770 */
1771bool drm_detect_monitor_audio(struct edid *edid)
1772{
1773 u8 *edid_ext;
1774 int i, j;
1775 bool has_audio = false;
1776 int start_offset, end_offset;
1777
1778 edid_ext = drm_find_cea_extension(edid);
1779 if (!edid_ext)
1780 goto end;
1781
1782 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1783
1784 if (has_audio) {
1785 DRM_DEBUG_KMS("Monitor has basic audio support\n");
1786 goto end;
1787 }
1788
1789 /* Data block offset in CEA extension block */
1790 start_offset = 4;
1791 end_offset = edid_ext[2];
1792
1793 for (i = start_offset; i < end_offset;
1794 i += ((edid_ext[i] & 0x1f) + 1)) {
1795 if ((edid_ext[i] >> 5) == AUDIO_BLOCK) {
1796 has_audio = true;
1797 for (j = 1; j < (edid_ext[i] & 0x1f); j += 3)
1798 DRM_DEBUG_KMS("CEA audio format %d\n",
1799 (edid_ext[i + j] >> 3) & 0xf);
1800 goto end;
1801 }
1802 }
1803end:
1804 return has_audio;
1805}
1806EXPORT_SYMBOL(drm_detect_monitor_audio);
1807
3b11228b
JB
1808/**
1809 * drm_add_display_info - pull display info out if present
1810 * @edid: EDID data
1811 * @info: display info (attached to connector)
1812 *
1813 * Grab any available display info and stuff it into the drm_display_info
1814 * structure that's part of the connector. Useful for tracking bpp and
1815 * color spaces.
1816 */
1817static void drm_add_display_info(struct edid *edid,
1818 struct drm_display_info *info)
1819{
ebec9a7b
JB
1820 u8 *edid_ext;
1821
3b11228b
JB
1822 info->width_mm = edid->width_cm * 10;
1823 info->height_mm = edid->height_cm * 10;
1824
1825 /* driver figures it out in this case */
1826 info->bpc = 0;
da05a5a7 1827 info->color_formats = 0;
3b11228b 1828
a988bc72 1829 if (edid->revision < 3)
3b11228b
JB
1830 return;
1831
1832 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1833 return;
1834
a988bc72
LPC
1835 /* Get data from CEA blocks if present */
1836 edid_ext = drm_find_cea_extension(edid);
1837 if (edid_ext) {
1838 info->cea_rev = edid_ext[1];
1839
1840 /* The existence of a CEA block should imply RGB support */
1841 info->color_formats = DRM_COLOR_FORMAT_RGB444;
1842 if (edid_ext[3] & EDID_CEA_YCRCB444)
1843 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1844 if (edid_ext[3] & EDID_CEA_YCRCB422)
1845 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
1846 }
1847
1848 /* Only defined for 1.4 with digital displays */
1849 if (edid->revision < 4)
1850 return;
1851
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JB
1852 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1853 case DRM_EDID_DIGITAL_DEPTH_6:
1854 info->bpc = 6;
1855 break;
1856 case DRM_EDID_DIGITAL_DEPTH_8:
1857 info->bpc = 8;
1858 break;
1859 case DRM_EDID_DIGITAL_DEPTH_10:
1860 info->bpc = 10;
1861 break;
1862 case DRM_EDID_DIGITAL_DEPTH_12:
1863 info->bpc = 12;
1864 break;
1865 case DRM_EDID_DIGITAL_DEPTH_14:
1866 info->bpc = 14;
1867 break;
1868 case DRM_EDID_DIGITAL_DEPTH_16:
1869 info->bpc = 16;
1870 break;
1871 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
1872 default:
1873 info->bpc = 0;
1874 break;
1875 }
da05a5a7 1876
a988bc72 1877 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
ee58808d
LPC
1878 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
1879 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1880 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
1881 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
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JB
1882}
1883
f453ba04
DA
1884/**
1885 * drm_add_edid_modes - add modes from EDID data, if available
1886 * @connector: connector we're probing
1887 * @edid: edid data
1888 *
1889 * Add the specified modes to the connector's mode list.
1890 *
1891 * Return number of modes added or 0 if we couldn't find any.
1892 */
1893int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1894{
1895 int num_modes = 0;
1896 u32 quirks;
1897
1898 if (edid == NULL) {
1899 return 0;
1900 }
3c537889 1901 if (!drm_edid_is_valid(edid)) {
dcdb1674 1902 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
f453ba04
DA
1903 drm_get_connector_name(connector));
1904 return 0;
1905 }
1906
1907 quirks = edid_get_quirks(edid);
1908
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AJ
1909 /*
1910 * EDID spec says modes should be preferred in this order:
1911 * - preferred detailed mode
1912 * - other detailed modes from base block
1913 * - detailed modes from extension blocks
1914 * - CVT 3-byte code modes
1915 * - standard timing codes
1916 * - established timing codes
1917 * - modes inferred from GTF or CVT range information
1918 *
13931579 1919 * We get this pretty much right.
c867df70
AJ
1920 *
1921 * XXX order for additional mode types in extension blocks?
1922 */
13931579
AJ
1923 num_modes += add_detailed_modes(connector, edid, quirks);
1924 num_modes += add_cvt_modes(connector, edid);
c867df70
AJ
1925 num_modes += add_standard_modes(connector, edid);
1926 num_modes += add_established_modes(connector, edid);
13931579 1927 num_modes += add_inferred_modes(connector, edid);
54ac76f8 1928 num_modes += add_cea_modes(connector, edid);
f453ba04
DA
1929
1930 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1931 edid_fixup_preferred(connector, quirks);
1932
3b11228b 1933 drm_add_display_info(edid, &connector->display_info);
f453ba04
DA
1934
1935 return num_modes;
1936}
1937EXPORT_SYMBOL(drm_add_edid_modes);
f0fda0a4
ZY
1938
1939/**
1940 * drm_add_modes_noedid - add modes for the connectors without EDID
1941 * @connector: connector we're probing
1942 * @hdisplay: the horizontal display limit
1943 * @vdisplay: the vertical display limit
1944 *
1945 * Add the specified modes to the connector's mode list. Only when the
1946 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1947 *
1948 * Return number of modes added or 0 if we couldn't find any.
1949 */
1950int drm_add_modes_noedid(struct drm_connector *connector,
1951 int hdisplay, int vdisplay)
1952{
1953 int i, count, num_modes = 0;
b1f559ec 1954 struct drm_display_mode *mode;
f0fda0a4
ZY
1955 struct drm_device *dev = connector->dev;
1956
1957 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1958 if (hdisplay < 0)
1959 hdisplay = 0;
1960 if (vdisplay < 0)
1961 vdisplay = 0;
1962
1963 for (i = 0; i < count; i++) {
b1f559ec 1964 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f0fda0a4
ZY
1965 if (hdisplay && vdisplay) {
1966 /*
1967 * Only when two are valid, they will be used to check
1968 * whether the mode should be added to the mode list of
1969 * the connector.
1970 */
1971 if (ptr->hdisplay > hdisplay ||
1972 ptr->vdisplay > vdisplay)
1973 continue;
1974 }
f985dedb
AJ
1975 if (drm_mode_vrefresh(ptr) > 61)
1976 continue;
f0fda0a4
ZY
1977 mode = drm_mode_duplicate(dev, ptr);
1978 if (mode) {
1979 drm_mode_probed_add(connector, mode);
1980 num_modes++;
1981 }
1982 }
1983 return num_modes;
1984}
1985EXPORT_SYMBOL(drm_add_modes_noedid);