Commit | Line | Data |
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f453ba04 DA |
1 | /* |
2 | * Copyright (c) 2006 Luc Verhaegen (quirks list) | |
3 | * Copyright (c) 2007-2008 Intel Corporation | |
4 | * Jesse Barnes <jesse.barnes@intel.com> | |
61e57a8d | 5 | * Copyright 2010 Red Hat, Inc. |
f453ba04 DA |
6 | * |
7 | * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from | |
8 | * FB layer. | |
9 | * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> | |
10 | * | |
11 | * Permission is hereby granted, free of charge, to any person obtaining a | |
12 | * copy of this software and associated documentation files (the "Software"), | |
13 | * to deal in the Software without restriction, including without limitation | |
14 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | |
15 | * and/or sell copies of the Software, and to permit persons to whom the | |
16 | * Software is furnished to do so, subject to the following conditions: | |
17 | * | |
18 | * The above copyright notice and this permission notice (including the | |
19 | * next paragraph) shall be included in all copies or substantial portions | |
20 | * of the Software. | |
21 | * | |
22 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
23 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
24 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
25 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
26 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
27 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
28 | * DEALINGS IN THE SOFTWARE. | |
29 | */ | |
30 | #include <linux/kernel.h> | |
5a0e3ad6 | 31 | #include <linux/slab.h> |
f453ba04 | 32 | #include <linux/i2c.h> |
47819ba2 | 33 | #include <linux/module.h> |
760285e7 DH |
34 | #include <drm/drmP.h> |
35 | #include <drm/drm_edid.h> | |
38fcbb67 | 36 | #include "drm_edid_modes.h" |
f453ba04 | 37 | |
13931579 AJ |
38 | #define version_greater(edid, maj, min) \ |
39 | (((edid)->version > (maj)) || \ | |
40 | ((edid)->version == (maj) && (edid)->revision > (min))) | |
f453ba04 | 41 | |
d1ff6409 AJ |
42 | #define EDID_EST_TIMINGS 16 |
43 | #define EDID_STD_TIMINGS 8 | |
44 | #define EDID_DETAILED_TIMINGS 4 | |
f453ba04 DA |
45 | |
46 | /* | |
47 | * EDID blocks out in the wild have a variety of bugs, try to collect | |
48 | * them here (note that userspace may work around broken monitors first, | |
49 | * but fixes should make their way here so that the kernel "just works" | |
50 | * on as many displays as possible). | |
51 | */ | |
52 | ||
53 | /* First detailed mode wrong, use largest 60Hz mode */ | |
54 | #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) | |
55 | /* Reported 135MHz pixel clock is too high, needs adjustment */ | |
56 | #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) | |
57 | /* Prefer the largest mode at 75 Hz */ | |
58 | #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) | |
59 | /* Detail timing is in cm not mm */ | |
60 | #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) | |
61 | /* Detailed timing descriptors have bogus size values, so just take the | |
62 | * maximum size and use that. | |
63 | */ | |
64 | #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) | |
65 | /* Monitor forgot to set the first detailed is preferred bit. */ | |
66 | #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) | |
67 | /* use +hsync +vsync for detailed mode */ | |
68 | #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) | |
bc42aabc AJ |
69 | /* Force reduced-blanking timings for detailed modes */ |
70 | #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) | |
3c537889 | 71 | |
13931579 AJ |
72 | struct detailed_mode_closure { |
73 | struct drm_connector *connector; | |
74 | struct edid *edid; | |
75 | bool preferred; | |
76 | u32 quirks; | |
77 | int modes; | |
78 | }; | |
f453ba04 | 79 | |
5c61259e ZY |
80 | #define LEVEL_DMT 0 |
81 | #define LEVEL_GTF 1 | |
7a374350 AJ |
82 | #define LEVEL_GTF2 2 |
83 | #define LEVEL_CVT 3 | |
5c61259e | 84 | |
f453ba04 | 85 | static struct edid_quirk { |
c51a3fd6 | 86 | char vendor[4]; |
f453ba04 DA |
87 | int product_id; |
88 | u32 quirks; | |
89 | } edid_quirk_list[] = { | |
90 | /* Acer AL1706 */ | |
91 | { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, | |
92 | /* Acer F51 */ | |
93 | { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, | |
94 | /* Unknown Acer */ | |
95 | { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
96 | ||
97 | /* Belinea 10 15 55 */ | |
98 | { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, | |
99 | { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, | |
100 | ||
101 | /* Envision Peripherals, Inc. EN-7100e */ | |
102 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, | |
ba1163de AJ |
103 | /* Envision EN2028 */ |
104 | { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, | |
f453ba04 DA |
105 | |
106 | /* Funai Electronics PM36B */ | |
107 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | | |
108 | EDID_QUIRK_DETAILED_IN_CM }, | |
109 | ||
110 | /* LG Philips LCD LP154W01-A5 */ | |
111 | { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, | |
112 | { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, | |
113 | ||
114 | /* Philips 107p5 CRT */ | |
115 | { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
116 | ||
117 | /* Proview AY765C */ | |
118 | { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
119 | ||
120 | /* Samsung SyncMaster 205BW. Note: irony */ | |
121 | { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, | |
122 | /* Samsung SyncMaster 22[5-6]BW */ | |
123 | { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, | |
124 | { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, | |
bc42aabc AJ |
125 | |
126 | /* ViewSonic VA2026w */ | |
127 | { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, | |
f453ba04 DA |
128 | }; |
129 | ||
61e57a8d | 130 | /*** DDC fetch and block validation ***/ |
f453ba04 | 131 | |
083ae056 AJ |
132 | static const u8 edid_header[] = { |
133 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 | |
134 | }; | |
f453ba04 | 135 | |
051963d4 TR |
136 | /* |
137 | * Sanity check the header of the base EDID block. Return 8 if the header | |
138 | * is perfect, down to 0 if it's totally wrong. | |
139 | */ | |
140 | int drm_edid_header_is_valid(const u8 *raw_edid) | |
141 | { | |
142 | int i, score = 0; | |
143 | ||
144 | for (i = 0; i < sizeof(edid_header); i++) | |
145 | if (raw_edid[i] == edid_header[i]) | |
146 | score++; | |
147 | ||
148 | return score; | |
149 | } | |
150 | EXPORT_SYMBOL(drm_edid_header_is_valid); | |
151 | ||
47819ba2 AJ |
152 | static int edid_fixup __read_mostly = 6; |
153 | module_param_named(edid_fixup, edid_fixup, int, 0400); | |
154 | MODULE_PARM_DESC(edid_fixup, | |
155 | "Minimum number of valid EDID header bytes (0-8, default 6)"); | |
051963d4 | 156 | |
61e57a8d AJ |
157 | /* |
158 | * Sanity check the EDID block (base or extension). Return 0 if the block | |
159 | * doesn't check out, or 1 if it's valid. | |
f453ba04 | 160 | */ |
0b2443ed | 161 | bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid) |
f453ba04 | 162 | { |
61e57a8d | 163 | int i; |
f453ba04 | 164 | u8 csum = 0; |
61e57a8d | 165 | struct edid *edid = (struct edid *)raw_edid; |
f453ba04 | 166 | |
47819ba2 AJ |
167 | if (edid_fixup > 8 || edid_fixup < 0) |
168 | edid_fixup = 6; | |
169 | ||
f89ec8a4 | 170 | if (block == 0) { |
051963d4 | 171 | int score = drm_edid_header_is_valid(raw_edid); |
61e57a8d | 172 | if (score == 8) ; |
47819ba2 | 173 | else if (score >= edid_fixup) { |
61e57a8d AJ |
174 | DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); |
175 | memcpy(raw_edid, edid_header, sizeof(edid_header)); | |
176 | } else { | |
177 | goto bad; | |
178 | } | |
179 | } | |
f453ba04 DA |
180 | |
181 | for (i = 0; i < EDID_LENGTH; i++) | |
182 | csum += raw_edid[i]; | |
183 | if (csum) { | |
0b2443ed JG |
184 | if (print_bad_edid) { |
185 | DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); | |
186 | } | |
4a638b4e AJ |
187 | |
188 | /* allow CEA to slide through, switches mangle this */ | |
189 | if (raw_edid[0] != 0x02) | |
190 | goto bad; | |
f453ba04 DA |
191 | } |
192 | ||
61e57a8d AJ |
193 | /* per-block-type checks */ |
194 | switch (raw_edid[0]) { | |
195 | case 0: /* base */ | |
196 | if (edid->version != 1) { | |
197 | DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); | |
198 | goto bad; | |
199 | } | |
862b89c0 | 200 | |
61e57a8d AJ |
201 | if (edid->revision > 4) |
202 | DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); | |
203 | break; | |
862b89c0 | 204 | |
61e57a8d AJ |
205 | default: |
206 | break; | |
207 | } | |
47ee4ccf | 208 | |
f453ba04 DA |
209 | return 1; |
210 | ||
211 | bad: | |
0b2443ed | 212 | if (raw_edid && print_bad_edid) { |
f49dadb8 | 213 | printk(KERN_ERR "Raw EDID:\n"); |
0aff47f2 TV |
214 | print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, |
215 | raw_edid, EDID_LENGTH, false); | |
f453ba04 DA |
216 | } |
217 | return 0; | |
218 | } | |
da0df92b | 219 | EXPORT_SYMBOL(drm_edid_block_valid); |
61e57a8d AJ |
220 | |
221 | /** | |
222 | * drm_edid_is_valid - sanity check EDID data | |
223 | * @edid: EDID data | |
224 | * | |
225 | * Sanity-check an entire EDID record (including extensions) | |
226 | */ | |
227 | bool drm_edid_is_valid(struct edid *edid) | |
228 | { | |
229 | int i; | |
230 | u8 *raw = (u8 *)edid; | |
231 | ||
232 | if (!edid) | |
233 | return false; | |
234 | ||
235 | for (i = 0; i <= edid->extensions; i++) | |
0b2443ed | 236 | if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true)) |
61e57a8d AJ |
237 | return false; |
238 | ||
239 | return true; | |
240 | } | |
3c537889 | 241 | EXPORT_SYMBOL(drm_edid_is_valid); |
f453ba04 | 242 | |
61e57a8d AJ |
243 | #define DDC_SEGMENT_ADDR 0x30 |
244 | /** | |
245 | * Get EDID information via I2C. | |
246 | * | |
247 | * \param adapter : i2c device adaptor | |
248 | * \param buf : EDID data buffer to be filled | |
249 | * \param len : EDID data buffer length | |
250 | * \return 0 on success or -1 on failure. | |
251 | * | |
252 | * Try to fetch EDID information by calling i2c driver function. | |
253 | */ | |
254 | static int | |
255 | drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, | |
256 | int block, int len) | |
257 | { | |
258 | unsigned char start = block * EDID_LENGTH; | |
cd004b3f S |
259 | unsigned char segment = block >> 1; |
260 | unsigned char xfers = segment ? 3 : 2; | |
4819d2e4 CW |
261 | int ret, retries = 5; |
262 | ||
263 | /* The core i2c driver will automatically retry the transfer if the | |
264 | * adapter reports EAGAIN. However, we find that bit-banging transfers | |
265 | * are susceptible to errors under a heavily loaded machine and | |
266 | * generate spurious NAKs and timeouts. Retrying the transfer | |
267 | * of the individual block a few times seems to overcome this. | |
268 | */ | |
269 | do { | |
270 | struct i2c_msg msgs[] = { | |
271 | { | |
cd004b3f S |
272 | .addr = DDC_SEGMENT_ADDR, |
273 | .flags = 0, | |
274 | .len = 1, | |
275 | .buf = &segment, | |
276 | }, { | |
4819d2e4 CW |
277 | .addr = DDC_ADDR, |
278 | .flags = 0, | |
279 | .len = 1, | |
280 | .buf = &start, | |
281 | }, { | |
282 | .addr = DDC_ADDR, | |
283 | .flags = I2C_M_RD, | |
284 | .len = len, | |
285 | .buf = buf, | |
286 | } | |
287 | }; | |
cd004b3f S |
288 | |
289 | /* | |
290 | * Avoid sending the segment addr to not upset non-compliant ddc | |
291 | * monitors. | |
292 | */ | |
293 | ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); | |
294 | ||
9292f37e ED |
295 | if (ret == -ENXIO) { |
296 | DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", | |
297 | adapter->name); | |
298 | break; | |
299 | } | |
cd004b3f | 300 | } while (ret != xfers && --retries); |
4819d2e4 | 301 | |
cd004b3f | 302 | return ret == xfers ? 0 : -1; |
61e57a8d AJ |
303 | } |
304 | ||
4a9a8b71 DA |
305 | static bool drm_edid_is_zero(u8 *in_edid, int length) |
306 | { | |
6311803b AM |
307 | if (memchr_inv(in_edid, 0, length)) |
308 | return false; | |
4a9a8b71 | 309 | |
4a9a8b71 DA |
310 | return true; |
311 | } | |
312 | ||
61e57a8d AJ |
313 | static u8 * |
314 | drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) | |
315 | { | |
0ea75e23 | 316 | int i, j = 0, valid_extensions = 0; |
61e57a8d | 317 | u8 *block, *new; |
0b2443ed | 318 | bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS); |
61e57a8d AJ |
319 | |
320 | if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) | |
321 | return NULL; | |
322 | ||
323 | /* base block fetch */ | |
324 | for (i = 0; i < 4; i++) { | |
325 | if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) | |
326 | goto out; | |
0b2443ed | 327 | if (drm_edid_block_valid(block, 0, print_bad_edid)) |
61e57a8d | 328 | break; |
4a9a8b71 DA |
329 | if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { |
330 | connector->null_edid_counter++; | |
331 | goto carp; | |
332 | } | |
61e57a8d AJ |
333 | } |
334 | if (i == 4) | |
335 | goto carp; | |
336 | ||
337 | /* if there's no extensions, we're done */ | |
338 | if (block[0x7e] == 0) | |
339 | return block; | |
340 | ||
341 | new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); | |
342 | if (!new) | |
343 | goto out; | |
344 | block = new; | |
345 | ||
346 | for (j = 1; j <= block[0x7e]; j++) { | |
347 | for (i = 0; i < 4; i++) { | |
0ea75e23 ST |
348 | if (drm_do_probe_ddc_edid(adapter, |
349 | block + (valid_extensions + 1) * EDID_LENGTH, | |
350 | j, EDID_LENGTH)) | |
61e57a8d | 351 | goto out; |
0b2443ed | 352 | if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) { |
0ea75e23 | 353 | valid_extensions++; |
61e57a8d | 354 | break; |
0ea75e23 | 355 | } |
61e57a8d | 356 | } |
f934ec8c ML |
357 | |
358 | if (i == 4 && print_bad_edid) { | |
0ea75e23 ST |
359 | dev_warn(connector->dev->dev, |
360 | "%s: Ignoring invalid EDID block %d.\n", | |
361 | drm_get_connector_name(connector), j); | |
f934ec8c ML |
362 | |
363 | connector->bad_edid_counter++; | |
364 | } | |
0ea75e23 ST |
365 | } |
366 | ||
367 | if (valid_extensions != block[0x7e]) { | |
368 | block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; | |
369 | block[0x7e] = valid_extensions; | |
370 | new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); | |
371 | if (!new) | |
372 | goto out; | |
373 | block = new; | |
61e57a8d AJ |
374 | } |
375 | ||
376 | return block; | |
377 | ||
378 | carp: | |
0b2443ed JG |
379 | if (print_bad_edid) { |
380 | dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", | |
381 | drm_get_connector_name(connector), j); | |
382 | } | |
383 | connector->bad_edid_counter++; | |
61e57a8d AJ |
384 | |
385 | out: | |
386 | kfree(block); | |
387 | return NULL; | |
388 | } | |
389 | ||
390 | /** | |
391 | * Probe DDC presence. | |
392 | * | |
393 | * \param adapter : i2c device adaptor | |
394 | * \return 1 on success | |
395 | */ | |
fbff4690 | 396 | bool |
61e57a8d AJ |
397 | drm_probe_ddc(struct i2c_adapter *adapter) |
398 | { | |
399 | unsigned char out; | |
400 | ||
401 | return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); | |
402 | } | |
fbff4690 | 403 | EXPORT_SYMBOL(drm_probe_ddc); |
61e57a8d AJ |
404 | |
405 | /** | |
406 | * drm_get_edid - get EDID data, if available | |
407 | * @connector: connector we're probing | |
408 | * @adapter: i2c adapter to use for DDC | |
409 | * | |
410 | * Poke the given i2c channel to grab EDID data if possible. If found, | |
411 | * attach it to the connector. | |
412 | * | |
413 | * Return edid data or NULL if we couldn't find any. | |
414 | */ | |
415 | struct edid *drm_get_edid(struct drm_connector *connector, | |
416 | struct i2c_adapter *adapter) | |
417 | { | |
418 | struct edid *edid = NULL; | |
419 | ||
420 | if (drm_probe_ddc(adapter)) | |
421 | edid = (struct edid *)drm_do_get_edid(connector, adapter); | |
422 | ||
61e57a8d | 423 | return edid; |
61e57a8d AJ |
424 | } |
425 | EXPORT_SYMBOL(drm_get_edid); | |
426 | ||
427 | /*** EDID parsing ***/ | |
428 | ||
f453ba04 DA |
429 | /** |
430 | * edid_vendor - match a string against EDID's obfuscated vendor field | |
431 | * @edid: EDID to match | |
432 | * @vendor: vendor string | |
433 | * | |
434 | * Returns true if @vendor is in @edid, false otherwise | |
435 | */ | |
436 | static bool edid_vendor(struct edid *edid, char *vendor) | |
437 | { | |
438 | char edid_vendor[3]; | |
439 | ||
440 | edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; | |
441 | edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | | |
442 | ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; | |
16456c87 | 443 | edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; |
f453ba04 DA |
444 | |
445 | return !strncmp(edid_vendor, vendor, 3); | |
446 | } | |
447 | ||
448 | /** | |
449 | * edid_get_quirks - return quirk flags for a given EDID | |
450 | * @edid: EDID to process | |
451 | * | |
452 | * This tells subsequent routines what fixes they need to apply. | |
453 | */ | |
454 | static u32 edid_get_quirks(struct edid *edid) | |
455 | { | |
456 | struct edid_quirk *quirk; | |
457 | int i; | |
458 | ||
459 | for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { | |
460 | quirk = &edid_quirk_list[i]; | |
461 | ||
462 | if (edid_vendor(edid, quirk->vendor) && | |
463 | (EDID_PRODUCT_ID(edid) == quirk->product_id)) | |
464 | return quirk->quirks; | |
465 | } | |
466 | ||
467 | return 0; | |
468 | } | |
469 | ||
470 | #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) | |
471 | #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) | |
472 | ||
f453ba04 DA |
473 | /** |
474 | * edid_fixup_preferred - set preferred modes based on quirk list | |
475 | * @connector: has mode list to fix up | |
476 | * @quirks: quirks list | |
477 | * | |
478 | * Walk the mode list for @connector, clearing the preferred status | |
479 | * on existing modes and setting it anew for the right mode ala @quirks. | |
480 | */ | |
481 | static void edid_fixup_preferred(struct drm_connector *connector, | |
482 | u32 quirks) | |
483 | { | |
484 | struct drm_display_mode *t, *cur_mode, *preferred_mode; | |
f890607b | 485 | int target_refresh = 0; |
f453ba04 DA |
486 | |
487 | if (list_empty(&connector->probed_modes)) | |
488 | return; | |
489 | ||
490 | if (quirks & EDID_QUIRK_PREFER_LARGE_60) | |
491 | target_refresh = 60; | |
492 | if (quirks & EDID_QUIRK_PREFER_LARGE_75) | |
493 | target_refresh = 75; | |
494 | ||
495 | preferred_mode = list_first_entry(&connector->probed_modes, | |
496 | struct drm_display_mode, head); | |
497 | ||
498 | list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { | |
499 | cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; | |
500 | ||
501 | if (cur_mode == preferred_mode) | |
502 | continue; | |
503 | ||
504 | /* Largest mode is preferred */ | |
505 | if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) | |
506 | preferred_mode = cur_mode; | |
507 | ||
508 | /* At a given size, try to get closest to target refresh */ | |
509 | if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && | |
510 | MODE_REFRESH_DIFF(cur_mode, target_refresh) < | |
511 | MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { | |
512 | preferred_mode = cur_mode; | |
513 | } | |
514 | } | |
515 | ||
516 | preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; | |
517 | } | |
518 | ||
f6e252ba AJ |
519 | static bool |
520 | mode_is_rb(const struct drm_display_mode *mode) | |
521 | { | |
522 | return (mode->htotal - mode->hdisplay == 160) && | |
523 | (mode->hsync_end - mode->hdisplay == 80) && | |
524 | (mode->hsync_end - mode->hsync_start == 32) && | |
525 | (mode->vsync_start - mode->vdisplay == 3); | |
526 | } | |
527 | ||
33c7531d AJ |
528 | /* |
529 | * drm_mode_find_dmt - Create a copy of a mode if present in DMT | |
530 | * @dev: Device to duplicate against | |
531 | * @hsize: Mode width | |
532 | * @vsize: Mode height | |
533 | * @fresh: Mode refresh rate | |
f6e252ba | 534 | * @rb: Mode reduced-blanking-ness |
33c7531d AJ |
535 | * |
536 | * Walk the DMT mode list looking for a match for the given parameters. | |
537 | * Return a newly allocated copy of the mode, or NULL if not found. | |
538 | */ | |
1d42bbc8 | 539 | struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, |
f6e252ba AJ |
540 | int hsize, int vsize, int fresh, |
541 | bool rb) | |
559ee21d | 542 | { |
07a5e632 | 543 | int i; |
559ee21d | 544 | |
07a5e632 | 545 | for (i = 0; i < drm_num_dmt_modes; i++) { |
b1f559ec | 546 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
f8b46a05 AJ |
547 | if (hsize != ptr->hdisplay) |
548 | continue; | |
549 | if (vsize != ptr->vdisplay) | |
550 | continue; | |
551 | if (fresh != drm_mode_vrefresh(ptr)) | |
552 | continue; | |
f6e252ba AJ |
553 | if (rb != mode_is_rb(ptr)) |
554 | continue; | |
f8b46a05 AJ |
555 | |
556 | return drm_mode_duplicate(dev, ptr); | |
559ee21d | 557 | } |
f8b46a05 AJ |
558 | |
559 | return NULL; | |
559ee21d | 560 | } |
1d42bbc8 | 561 | EXPORT_SYMBOL(drm_mode_find_dmt); |
23425cae | 562 | |
d1ff6409 AJ |
563 | typedef void detailed_cb(struct detailed_timing *timing, void *closure); |
564 | ||
4d76a221 AJ |
565 | static void |
566 | cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) | |
567 | { | |
568 | int i, n = 0; | |
4966b2a9 | 569 | u8 d = ext[0x02]; |
4d76a221 AJ |
570 | u8 *det_base = ext + d; |
571 | ||
4966b2a9 | 572 | n = (127 - d) / 18; |
4d76a221 AJ |
573 | for (i = 0; i < n; i++) |
574 | cb((struct detailed_timing *)(det_base + 18 * i), closure); | |
575 | } | |
576 | ||
cbba98f8 AJ |
577 | static void |
578 | vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) | |
579 | { | |
580 | unsigned int i, n = min((int)ext[0x02], 6); | |
581 | u8 *det_base = ext + 5; | |
582 | ||
583 | if (ext[0x01] != 1) | |
584 | return; /* unknown version */ | |
585 | ||
586 | for (i = 0; i < n; i++) | |
587 | cb((struct detailed_timing *)(det_base + 18 * i), closure); | |
588 | } | |
589 | ||
d1ff6409 AJ |
590 | static void |
591 | drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) | |
592 | { | |
593 | int i; | |
594 | struct edid *edid = (struct edid *)raw_edid; | |
595 | ||
596 | if (edid == NULL) | |
597 | return; | |
598 | ||
599 | for (i = 0; i < EDID_DETAILED_TIMINGS; i++) | |
600 | cb(&(edid->detailed_timings[i]), closure); | |
601 | ||
4d76a221 AJ |
602 | for (i = 1; i <= raw_edid[0x7e]; i++) { |
603 | u8 *ext = raw_edid + (i * EDID_LENGTH); | |
604 | switch (*ext) { | |
605 | case CEA_EXT: | |
606 | cea_for_each_detailed_block(ext, cb, closure); | |
607 | break; | |
cbba98f8 AJ |
608 | case VTB_EXT: |
609 | vtb_for_each_detailed_block(ext, cb, closure); | |
610 | break; | |
4d76a221 AJ |
611 | default: |
612 | break; | |
613 | } | |
614 | } | |
d1ff6409 AJ |
615 | } |
616 | ||
617 | static void | |
618 | is_rb(struct detailed_timing *t, void *data) | |
619 | { | |
620 | u8 *r = (u8 *)t; | |
621 | if (r[3] == EDID_DETAIL_MONITOR_RANGE) | |
622 | if (r[15] & 0x10) | |
623 | *(bool *)data = true; | |
624 | } | |
625 | ||
626 | /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ | |
627 | static bool | |
628 | drm_monitor_supports_rb(struct edid *edid) | |
629 | { | |
630 | if (edid->revision >= 4) { | |
b196a498 | 631 | bool ret = false; |
d1ff6409 AJ |
632 | drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); |
633 | return ret; | |
634 | } | |
635 | ||
636 | return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); | |
637 | } | |
638 | ||
7a374350 AJ |
639 | static void |
640 | find_gtf2(struct detailed_timing *t, void *data) | |
641 | { | |
642 | u8 *r = (u8 *)t; | |
643 | if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) | |
644 | *(u8 **)data = r; | |
645 | } | |
646 | ||
647 | /* Secondary GTF curve kicks in above some break frequency */ | |
648 | static int | |
649 | drm_gtf2_hbreak(struct edid *edid) | |
650 | { | |
651 | u8 *r = NULL; | |
652 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
653 | return r ? (r[12] * 2) : 0; | |
654 | } | |
655 | ||
656 | static int | |
657 | drm_gtf2_2c(struct edid *edid) | |
658 | { | |
659 | u8 *r = NULL; | |
660 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
661 | return r ? r[13] : 0; | |
662 | } | |
663 | ||
664 | static int | |
665 | drm_gtf2_m(struct edid *edid) | |
666 | { | |
667 | u8 *r = NULL; | |
668 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
669 | return r ? (r[15] << 8) + r[14] : 0; | |
670 | } | |
671 | ||
672 | static int | |
673 | drm_gtf2_k(struct edid *edid) | |
674 | { | |
675 | u8 *r = NULL; | |
676 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
677 | return r ? r[16] : 0; | |
678 | } | |
679 | ||
680 | static int | |
681 | drm_gtf2_2j(struct edid *edid) | |
682 | { | |
683 | u8 *r = NULL; | |
684 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); | |
685 | return r ? r[17] : 0; | |
686 | } | |
687 | ||
688 | /** | |
689 | * standard_timing_level - get std. timing level(CVT/GTF/DMT) | |
690 | * @edid: EDID block to scan | |
691 | */ | |
692 | static int standard_timing_level(struct edid *edid) | |
693 | { | |
694 | if (edid->revision >= 2) { | |
695 | if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) | |
696 | return LEVEL_CVT; | |
697 | if (drm_gtf2_hbreak(edid)) | |
698 | return LEVEL_GTF2; | |
699 | return LEVEL_GTF; | |
700 | } | |
701 | return LEVEL_DMT; | |
702 | } | |
703 | ||
23425cae AJ |
704 | /* |
705 | * 0 is reserved. The spec says 0x01 fill for unused timings. Some old | |
706 | * monitors fill with ascii space (0x20) instead. | |
707 | */ | |
708 | static int | |
709 | bad_std_timing(u8 a, u8 b) | |
710 | { | |
711 | return (a == 0x00 && b == 0x00) || | |
712 | (a == 0x01 && b == 0x01) || | |
713 | (a == 0x20 && b == 0x20); | |
714 | } | |
715 | ||
f453ba04 DA |
716 | /** |
717 | * drm_mode_std - convert standard mode info (width, height, refresh) into mode | |
718 | * @t: standard timing params | |
5c61259e | 719 | * @timing_level: standard timing level |
f453ba04 DA |
720 | * |
721 | * Take the standard timing params (in this case width, aspect, and refresh) | |
5c61259e | 722 | * and convert them into a real mode using CVT/GTF/DMT. |
f453ba04 | 723 | */ |
7ca6adb3 | 724 | static struct drm_display_mode * |
7a374350 AJ |
725 | drm_mode_std(struct drm_connector *connector, struct edid *edid, |
726 | struct std_timing *t, int revision) | |
f453ba04 | 727 | { |
7ca6adb3 AJ |
728 | struct drm_device *dev = connector->dev; |
729 | struct drm_display_mode *m, *mode = NULL; | |
5c61259e ZY |
730 | int hsize, vsize; |
731 | int vrefresh_rate; | |
0454beab MD |
732 | unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) |
733 | >> EDID_TIMING_ASPECT_SHIFT; | |
5c61259e ZY |
734 | unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) |
735 | >> EDID_TIMING_VFREQ_SHIFT; | |
7a374350 | 736 | int timing_level = standard_timing_level(edid); |
5c61259e | 737 | |
23425cae AJ |
738 | if (bad_std_timing(t->hsize, t->vfreq_aspect)) |
739 | return NULL; | |
740 | ||
5c61259e ZY |
741 | /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ |
742 | hsize = t->hsize * 8 + 248; | |
743 | /* vrefresh_rate = vfreq + 60 */ | |
744 | vrefresh_rate = vfreq + 60; | |
745 | /* the vdisplay is calculated based on the aspect ratio */ | |
f066a17d AJ |
746 | if (aspect_ratio == 0) { |
747 | if (revision < 3) | |
748 | vsize = hsize; | |
749 | else | |
750 | vsize = (hsize * 10) / 16; | |
751 | } else if (aspect_ratio == 1) | |
f453ba04 | 752 | vsize = (hsize * 3) / 4; |
0454beab | 753 | else if (aspect_ratio == 2) |
f453ba04 DA |
754 | vsize = (hsize * 4) / 5; |
755 | else | |
756 | vsize = (hsize * 9) / 16; | |
a0910c8e AJ |
757 | |
758 | /* HDTV hack, part 1 */ | |
759 | if (vrefresh_rate == 60 && | |
760 | ((hsize == 1360 && vsize == 765) || | |
761 | (hsize == 1368 && vsize == 769))) { | |
762 | hsize = 1366; | |
763 | vsize = 768; | |
764 | } | |
765 | ||
7ca6adb3 AJ |
766 | /* |
767 | * If this connector already has a mode for this size and refresh | |
768 | * rate (because it came from detailed or CVT info), use that | |
769 | * instead. This way we don't have to guess at interlace or | |
770 | * reduced blanking. | |
771 | */ | |
522032da | 772 | list_for_each_entry(m, &connector->probed_modes, head) |
7ca6adb3 AJ |
773 | if (m->hdisplay == hsize && m->vdisplay == vsize && |
774 | drm_mode_vrefresh(m) == vrefresh_rate) | |
775 | return NULL; | |
776 | ||
a0910c8e AJ |
777 | /* HDTV hack, part 2 */ |
778 | if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { | |
779 | mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, | |
d50ba256 | 780 | false); |
559ee21d | 781 | mode->hdisplay = 1366; |
a4967de6 AJ |
782 | mode->hsync_start = mode->hsync_start - 1; |
783 | mode->hsync_end = mode->hsync_end - 1; | |
559ee21d ZY |
784 | return mode; |
785 | } | |
a0910c8e | 786 | |
559ee21d | 787 | /* check whether it can be found in default mode table */ |
f6e252ba AJ |
788 | if (drm_monitor_supports_rb(edid)) { |
789 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, | |
790 | true); | |
791 | if (mode) | |
792 | return mode; | |
793 | } | |
794 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); | |
559ee21d ZY |
795 | if (mode) |
796 | return mode; | |
797 | ||
f6e252ba | 798 | /* okay, generate it */ |
5c61259e ZY |
799 | switch (timing_level) { |
800 | case LEVEL_DMT: | |
5c61259e ZY |
801 | break; |
802 | case LEVEL_GTF: | |
803 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); | |
804 | break; | |
7a374350 AJ |
805 | case LEVEL_GTF2: |
806 | /* | |
807 | * This is potentially wrong if there's ever a monitor with | |
808 | * more than one ranges section, each claiming a different | |
809 | * secondary GTF curve. Please don't do that. | |
810 | */ | |
811 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); | |
fc48f169 TI |
812 | if (!mode) |
813 | return NULL; | |
7a374350 | 814 | if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { |
aefd330e | 815 | drm_mode_destroy(dev, mode); |
7a374350 AJ |
816 | mode = drm_gtf_mode_complex(dev, hsize, vsize, |
817 | vrefresh_rate, 0, 0, | |
818 | drm_gtf2_m(edid), | |
819 | drm_gtf2_2c(edid), | |
820 | drm_gtf2_k(edid), | |
821 | drm_gtf2_2j(edid)); | |
822 | } | |
823 | break; | |
5c61259e | 824 | case LEVEL_CVT: |
d50ba256 DA |
825 | mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, |
826 | false); | |
5c61259e ZY |
827 | break; |
828 | } | |
f453ba04 DA |
829 | return mode; |
830 | } | |
831 | ||
b58db2c6 AJ |
832 | /* |
833 | * EDID is delightfully ambiguous about how interlaced modes are to be | |
834 | * encoded. Our internal representation is of frame height, but some | |
835 | * HDTV detailed timings are encoded as field height. | |
836 | * | |
837 | * The format list here is from CEA, in frame size. Technically we | |
838 | * should be checking refresh rate too. Whatever. | |
839 | */ | |
840 | static void | |
841 | drm_mode_do_interlace_quirk(struct drm_display_mode *mode, | |
842 | struct detailed_pixel_timing *pt) | |
843 | { | |
844 | int i; | |
845 | static const struct { | |
846 | int w, h; | |
847 | } cea_interlaced[] = { | |
848 | { 1920, 1080 }, | |
849 | { 720, 480 }, | |
850 | { 1440, 480 }, | |
851 | { 2880, 480 }, | |
852 | { 720, 576 }, | |
853 | { 1440, 576 }, | |
854 | { 2880, 576 }, | |
855 | }; | |
b58db2c6 AJ |
856 | |
857 | if (!(pt->misc & DRM_EDID_PT_INTERLACED)) | |
858 | return; | |
859 | ||
3c581411 | 860 | for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { |
b58db2c6 AJ |
861 | if ((mode->hdisplay == cea_interlaced[i].w) && |
862 | (mode->vdisplay == cea_interlaced[i].h / 2)) { | |
863 | mode->vdisplay *= 2; | |
864 | mode->vsync_start *= 2; | |
865 | mode->vsync_end *= 2; | |
866 | mode->vtotal *= 2; | |
867 | mode->vtotal |= 1; | |
868 | } | |
869 | } | |
870 | ||
871 | mode->flags |= DRM_MODE_FLAG_INTERLACE; | |
872 | } | |
873 | ||
f453ba04 DA |
874 | /** |
875 | * drm_mode_detailed - create a new mode from an EDID detailed timing section | |
876 | * @dev: DRM device (needed to create new mode) | |
877 | * @edid: EDID block | |
878 | * @timing: EDID detailed timing info | |
879 | * @quirks: quirks to apply | |
880 | * | |
881 | * An EDID detailed timing block contains enough info for us to create and | |
882 | * return a new struct drm_display_mode. | |
883 | */ | |
884 | static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, | |
885 | struct edid *edid, | |
886 | struct detailed_timing *timing, | |
887 | u32 quirks) | |
888 | { | |
889 | struct drm_display_mode *mode; | |
890 | struct detailed_pixel_timing *pt = &timing->data.pixel_data; | |
0454beab MD |
891 | unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; |
892 | unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; | |
893 | unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; | |
894 | unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; | |
e14cbee4 MD |
895 | unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; |
896 | unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; | |
897 | unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; | |
898 | unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); | |
f453ba04 | 899 | |
fc438966 | 900 | /* ignore tiny modes */ |
0454beab | 901 | if (hactive < 64 || vactive < 64) |
fc438966 AJ |
902 | return NULL; |
903 | ||
0454beab | 904 | if (pt->misc & DRM_EDID_PT_STEREO) { |
f453ba04 DA |
905 | printk(KERN_WARNING "stereo mode not supported\n"); |
906 | return NULL; | |
907 | } | |
0454beab | 908 | if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { |
79b7dcb2 | 909 | printk(KERN_WARNING "composite sync not supported\n"); |
f453ba04 DA |
910 | } |
911 | ||
fcb45611 ZY |
912 | /* it is incorrect if hsync/vsync width is zero */ |
913 | if (!hsync_pulse_width || !vsync_pulse_width) { | |
914 | DRM_DEBUG_KMS("Incorrect Detailed timing. " | |
915 | "Wrong Hsync/Vsync pulse width\n"); | |
916 | return NULL; | |
917 | } | |
bc42aabc AJ |
918 | |
919 | if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { | |
920 | mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); | |
921 | if (!mode) | |
922 | return NULL; | |
923 | ||
924 | goto set_size; | |
925 | } | |
926 | ||
f453ba04 DA |
927 | mode = drm_mode_create(dev); |
928 | if (!mode) | |
929 | return NULL; | |
930 | ||
f453ba04 | 931 | if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) |
0454beab MD |
932 | timing->pixel_clock = cpu_to_le16(1088); |
933 | ||
934 | mode->clock = le16_to_cpu(timing->pixel_clock) * 10; | |
935 | ||
936 | mode->hdisplay = hactive; | |
937 | mode->hsync_start = mode->hdisplay + hsync_offset; | |
938 | mode->hsync_end = mode->hsync_start + hsync_pulse_width; | |
939 | mode->htotal = mode->hdisplay + hblank; | |
940 | ||
941 | mode->vdisplay = vactive; | |
942 | mode->vsync_start = mode->vdisplay + vsync_offset; | |
943 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; | |
944 | mode->vtotal = mode->vdisplay + vblank; | |
f453ba04 | 945 | |
7064fef5 JB |
946 | /* Some EDIDs have bogus h/vtotal values */ |
947 | if (mode->hsync_end > mode->htotal) | |
948 | mode->htotal = mode->hsync_end + 1; | |
949 | if (mode->vsync_end > mode->vtotal) | |
950 | mode->vtotal = mode->vsync_end + 1; | |
951 | ||
b58db2c6 | 952 | drm_mode_do_interlace_quirk(mode, pt); |
f453ba04 DA |
953 | |
954 | if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { | |
0454beab | 955 | pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; |
f453ba04 DA |
956 | } |
957 | ||
0454beab MD |
958 | mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? |
959 | DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; | |
960 | mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? | |
961 | DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; | |
f453ba04 | 962 | |
bc42aabc | 963 | set_size: |
e14cbee4 MD |
964 | mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; |
965 | mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; | |
f453ba04 DA |
966 | |
967 | if (quirks & EDID_QUIRK_DETAILED_IN_CM) { | |
968 | mode->width_mm *= 10; | |
969 | mode->height_mm *= 10; | |
970 | } | |
971 | ||
972 | if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { | |
973 | mode->width_mm = edid->width_cm * 10; | |
974 | mode->height_mm = edid->height_cm * 10; | |
975 | } | |
976 | ||
bc42aabc AJ |
977 | mode->type = DRM_MODE_TYPE_DRIVER; |
978 | drm_mode_set_name(mode); | |
979 | ||
f453ba04 DA |
980 | return mode; |
981 | } | |
982 | ||
b17e52ef | 983 | static bool |
b1f559ec CW |
984 | mode_in_hsync_range(const struct drm_display_mode *mode, |
985 | struct edid *edid, u8 *t) | |
b17e52ef AJ |
986 | { |
987 | int hsync, hmin, hmax; | |
988 | ||
989 | hmin = t[7]; | |
990 | if (edid->revision >= 4) | |
991 | hmin += ((t[4] & 0x04) ? 255 : 0); | |
992 | hmax = t[8]; | |
993 | if (edid->revision >= 4) | |
994 | hmax += ((t[4] & 0x08) ? 255 : 0); | |
07a5e632 | 995 | hsync = drm_mode_hsync(mode); |
07a5e632 | 996 | |
b17e52ef AJ |
997 | return (hsync <= hmax && hsync >= hmin); |
998 | } | |
999 | ||
1000 | static bool | |
b1f559ec CW |
1001 | mode_in_vsync_range(const struct drm_display_mode *mode, |
1002 | struct edid *edid, u8 *t) | |
b17e52ef AJ |
1003 | { |
1004 | int vsync, vmin, vmax; | |
1005 | ||
1006 | vmin = t[5]; | |
1007 | if (edid->revision >= 4) | |
1008 | vmin += ((t[4] & 0x01) ? 255 : 0); | |
1009 | vmax = t[6]; | |
1010 | if (edid->revision >= 4) | |
1011 | vmax += ((t[4] & 0x02) ? 255 : 0); | |
1012 | vsync = drm_mode_vrefresh(mode); | |
1013 | ||
1014 | return (vsync <= vmax && vsync >= vmin); | |
1015 | } | |
1016 | ||
1017 | static u32 | |
1018 | range_pixel_clock(struct edid *edid, u8 *t) | |
1019 | { | |
1020 | /* unspecified */ | |
1021 | if (t[9] == 0 || t[9] == 255) | |
1022 | return 0; | |
1023 | ||
1024 | /* 1.4 with CVT support gives us real precision, yay */ | |
1025 | if (edid->revision >= 4 && t[10] == 0x04) | |
1026 | return (t[9] * 10000) - ((t[12] >> 2) * 250); | |
1027 | ||
1028 | /* 1.3 is pathetic, so fuzz up a bit */ | |
1029 | return t[9] * 10000 + 5001; | |
1030 | } | |
1031 | ||
b17e52ef | 1032 | static bool |
b1f559ec | 1033 | mode_in_range(const struct drm_display_mode *mode, struct edid *edid, |
b17e52ef AJ |
1034 | struct detailed_timing *timing) |
1035 | { | |
1036 | u32 max_clock; | |
1037 | u8 *t = (u8 *)timing; | |
1038 | ||
1039 | if (!mode_in_hsync_range(mode, edid, t)) | |
07a5e632 AJ |
1040 | return false; |
1041 | ||
b17e52ef | 1042 | if (!mode_in_vsync_range(mode, edid, t)) |
07a5e632 AJ |
1043 | return false; |
1044 | ||
b17e52ef | 1045 | if ((max_clock = range_pixel_clock(edid, t))) |
07a5e632 AJ |
1046 | if (mode->clock > max_clock) |
1047 | return false; | |
b17e52ef AJ |
1048 | |
1049 | /* 1.4 max horizontal check */ | |
1050 | if (edid->revision >= 4 && t[10] == 0x04) | |
1051 | if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) | |
1052 | return false; | |
1053 | ||
1054 | if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) | |
1055 | return false; | |
07a5e632 AJ |
1056 | |
1057 | return true; | |
1058 | } | |
1059 | ||
7b668ebe TI |
1060 | static bool valid_inferred_mode(const struct drm_connector *connector, |
1061 | const struct drm_display_mode *mode) | |
1062 | { | |
1063 | struct drm_display_mode *m; | |
1064 | bool ok = false; | |
1065 | ||
1066 | list_for_each_entry(m, &connector->probed_modes, head) { | |
1067 | if (mode->hdisplay == m->hdisplay && | |
1068 | mode->vdisplay == m->vdisplay && | |
1069 | drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) | |
1070 | return false; /* duplicated */ | |
1071 | if (mode->hdisplay <= m->hdisplay && | |
1072 | mode->vdisplay <= m->vdisplay) | |
1073 | ok = true; | |
1074 | } | |
1075 | return ok; | |
1076 | } | |
1077 | ||
b17e52ef | 1078 | static int |
cd4cd3de | 1079 | drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
b17e52ef | 1080 | struct detailed_timing *timing) |
07a5e632 AJ |
1081 | { |
1082 | int i, modes = 0; | |
1083 | struct drm_display_mode *newmode; | |
1084 | struct drm_device *dev = connector->dev; | |
1085 | ||
1086 | for (i = 0; i < drm_num_dmt_modes; i++) { | |
7b668ebe TI |
1087 | if (mode_in_range(drm_dmt_modes + i, edid, timing) && |
1088 | valid_inferred_mode(connector, drm_dmt_modes + i)) { | |
07a5e632 AJ |
1089 | newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); |
1090 | if (newmode) { | |
1091 | drm_mode_probed_add(connector, newmode); | |
1092 | modes++; | |
1093 | } | |
1094 | } | |
1095 | } | |
1096 | ||
1097 | return modes; | |
1098 | } | |
1099 | ||
c09dedb7 TI |
1100 | /* fix up 1366x768 mode from 1368x768; |
1101 | * GFT/CVT can't express 1366 width which isn't dividable by 8 | |
1102 | */ | |
1103 | static void fixup_mode_1366x768(struct drm_display_mode *mode) | |
1104 | { | |
1105 | if (mode->hdisplay == 1368 && mode->vdisplay == 768) { | |
1106 | mode->hdisplay = 1366; | |
1107 | mode->hsync_start--; | |
1108 | mode->hsync_end--; | |
1109 | drm_mode_set_name(mode); | |
1110 | } | |
1111 | } | |
1112 | ||
b309bd37 AJ |
1113 | static int |
1114 | drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, | |
1115 | struct detailed_timing *timing) | |
1116 | { | |
1117 | int i, modes = 0; | |
1118 | struct drm_display_mode *newmode; | |
1119 | struct drm_device *dev = connector->dev; | |
1120 | ||
1121 | for (i = 0; i < num_extra_modes; i++) { | |
1122 | const struct minimode *m = &extra_modes[i]; | |
1123 | newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); | |
fc48f169 TI |
1124 | if (!newmode) |
1125 | return modes; | |
b309bd37 | 1126 | |
c09dedb7 | 1127 | fixup_mode_1366x768(newmode); |
7b668ebe TI |
1128 | if (!mode_in_range(newmode, edid, timing) || |
1129 | !valid_inferred_mode(connector, newmode)) { | |
b309bd37 AJ |
1130 | drm_mode_destroy(dev, newmode); |
1131 | continue; | |
1132 | } | |
1133 | ||
1134 | drm_mode_probed_add(connector, newmode); | |
1135 | modes++; | |
1136 | } | |
1137 | ||
1138 | return modes; | |
1139 | } | |
1140 | ||
1141 | static int | |
1142 | drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, | |
1143 | struct detailed_timing *timing) | |
1144 | { | |
1145 | int i, modes = 0; | |
1146 | struct drm_display_mode *newmode; | |
1147 | struct drm_device *dev = connector->dev; | |
1148 | bool rb = drm_monitor_supports_rb(edid); | |
1149 | ||
1150 | for (i = 0; i < num_extra_modes; i++) { | |
1151 | const struct minimode *m = &extra_modes[i]; | |
1152 | newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); | |
fc48f169 TI |
1153 | if (!newmode) |
1154 | return modes; | |
b309bd37 | 1155 | |
c09dedb7 | 1156 | fixup_mode_1366x768(newmode); |
7b668ebe TI |
1157 | if (!mode_in_range(newmode, edid, timing) || |
1158 | !valid_inferred_mode(connector, newmode)) { | |
b309bd37 AJ |
1159 | drm_mode_destroy(dev, newmode); |
1160 | continue; | |
1161 | } | |
1162 | ||
1163 | drm_mode_probed_add(connector, newmode); | |
1164 | modes++; | |
1165 | } | |
1166 | ||
1167 | return modes; | |
1168 | } | |
1169 | ||
13931579 AJ |
1170 | static void |
1171 | do_inferred_modes(struct detailed_timing *timing, void *c) | |
9340d8cf | 1172 | { |
13931579 AJ |
1173 | struct detailed_mode_closure *closure = c; |
1174 | struct detailed_non_pixel *data = &timing->data.other_data; | |
b309bd37 | 1175 | struct detailed_data_monitor_range *range = &data->data.range; |
9340d8cf | 1176 | |
cb21aafe AJ |
1177 | if (data->type != EDID_DETAIL_MONITOR_RANGE) |
1178 | return; | |
1179 | ||
1180 | closure->modes += drm_dmt_modes_for_range(closure->connector, | |
1181 | closure->edid, | |
1182 | timing); | |
b309bd37 AJ |
1183 | |
1184 | if (!version_greater(closure->edid, 1, 1)) | |
1185 | return; /* GTF not defined yet */ | |
1186 | ||
1187 | switch (range->flags) { | |
1188 | case 0x02: /* secondary gtf, XXX could do more */ | |
1189 | case 0x00: /* default gtf */ | |
1190 | closure->modes += drm_gtf_modes_for_range(closure->connector, | |
1191 | closure->edid, | |
1192 | timing); | |
1193 | break; | |
1194 | case 0x04: /* cvt, only in 1.4+ */ | |
1195 | if (!version_greater(closure->edid, 1, 3)) | |
1196 | break; | |
1197 | ||
1198 | closure->modes += drm_cvt_modes_for_range(closure->connector, | |
1199 | closure->edid, | |
1200 | timing); | |
1201 | break; | |
1202 | case 0x01: /* just the ranges, no formula */ | |
1203 | default: | |
1204 | break; | |
1205 | } | |
13931579 | 1206 | } |
69da3015 | 1207 | |
13931579 AJ |
1208 | static int |
1209 | add_inferred_modes(struct drm_connector *connector, struct edid *edid) | |
1210 | { | |
1211 | struct detailed_mode_closure closure = { | |
1212 | connector, edid, 0, 0, 0 | |
1213 | }; | |
9340d8cf | 1214 | |
13931579 AJ |
1215 | if (version_greater(edid, 1, 0)) |
1216 | drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, | |
1217 | &closure); | |
9340d8cf | 1218 | |
13931579 | 1219 | return closure.modes; |
9340d8cf AJ |
1220 | } |
1221 | ||
2255be14 AJ |
1222 | static int |
1223 | drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) | |
1224 | { | |
1225 | int i, j, m, modes = 0; | |
1226 | struct drm_display_mode *mode; | |
1227 | u8 *est = ((u8 *)timing) + 5; | |
1228 | ||
1229 | for (i = 0; i < 6; i++) { | |
1230 | for (j = 7; j > 0; j--) { | |
1231 | m = (i * 8) + (7 - j); | |
3c581411 | 1232 | if (m >= ARRAY_SIZE(est3_modes)) |
2255be14 AJ |
1233 | break; |
1234 | if (est[i] & (1 << j)) { | |
1d42bbc8 DA |
1235 | mode = drm_mode_find_dmt(connector->dev, |
1236 | est3_modes[m].w, | |
1237 | est3_modes[m].h, | |
f6e252ba AJ |
1238 | est3_modes[m].r, |
1239 | est3_modes[m].rb); | |
2255be14 AJ |
1240 | if (mode) { |
1241 | drm_mode_probed_add(connector, mode); | |
1242 | modes++; | |
1243 | } | |
1244 | } | |
1245 | } | |
1246 | } | |
1247 | ||
1248 | return modes; | |
1249 | } | |
1250 | ||
13931579 AJ |
1251 | static void |
1252 | do_established_modes(struct detailed_timing *timing, void *c) | |
9cf00977 | 1253 | { |
13931579 | 1254 | struct detailed_mode_closure *closure = c; |
9cf00977 | 1255 | struct detailed_non_pixel *data = &timing->data.other_data; |
9cf00977 | 1256 | |
13931579 AJ |
1257 | if (data->type == EDID_DETAIL_EST_TIMINGS) |
1258 | closure->modes += drm_est3_modes(closure->connector, timing); | |
1259 | } | |
9cf00977 | 1260 | |
13931579 AJ |
1261 | /** |
1262 | * add_established_modes - get est. modes from EDID and add them | |
1263 | * @edid: EDID block to scan | |
1264 | * | |
1265 | * Each EDID block contains a bitmap of the supported "established modes" list | |
1266 | * (defined above). Tease them out and add them to the global modes list. | |
1267 | */ | |
1268 | static int | |
1269 | add_established_modes(struct drm_connector *connector, struct edid *edid) | |
1270 | { | |
1271 | struct drm_device *dev = connector->dev; | |
1272 | unsigned long est_bits = edid->established_timings.t1 | | |
1273 | (edid->established_timings.t2 << 8) | | |
1274 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); | |
1275 | int i, modes = 0; | |
1276 | struct detailed_mode_closure closure = { | |
1277 | connector, edid, 0, 0, 0 | |
1278 | }; | |
9cf00977 | 1279 | |
13931579 AJ |
1280 | for (i = 0; i <= EDID_EST_TIMINGS; i++) { |
1281 | if (est_bits & (1<<i)) { | |
1282 | struct drm_display_mode *newmode; | |
1283 | newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); | |
1284 | if (newmode) { | |
1285 | drm_mode_probed_add(connector, newmode); | |
1286 | modes++; | |
1287 | } | |
1288 | } | |
9cf00977 AJ |
1289 | } |
1290 | ||
13931579 AJ |
1291 | if (version_greater(edid, 1, 0)) |
1292 | drm_for_each_detailed_block((u8 *)edid, | |
1293 | do_established_modes, &closure); | |
1294 | ||
1295 | return modes + closure.modes; | |
1296 | } | |
1297 | ||
1298 | static void | |
1299 | do_standard_modes(struct detailed_timing *timing, void *c) | |
1300 | { | |
1301 | struct detailed_mode_closure *closure = c; | |
1302 | struct detailed_non_pixel *data = &timing->data.other_data; | |
1303 | struct drm_connector *connector = closure->connector; | |
1304 | struct edid *edid = closure->edid; | |
1305 | ||
1306 | if (data->type == EDID_DETAIL_STD_MODES) { | |
1307 | int i; | |
9cf00977 AJ |
1308 | for (i = 0; i < 6; i++) { |
1309 | struct std_timing *std; | |
1310 | struct drm_display_mode *newmode; | |
1311 | ||
1312 | std = &data->data.timings[i]; | |
7a374350 AJ |
1313 | newmode = drm_mode_std(connector, edid, std, |
1314 | edid->revision); | |
9cf00977 AJ |
1315 | if (newmode) { |
1316 | drm_mode_probed_add(connector, newmode); | |
13931579 | 1317 | closure->modes++; |
9cf00977 AJ |
1318 | } |
1319 | } | |
9cf00977 | 1320 | } |
9cf00977 AJ |
1321 | } |
1322 | ||
f453ba04 | 1323 | /** |
13931579 | 1324 | * add_standard_modes - get std. modes from EDID and add them |
f453ba04 | 1325 | * @edid: EDID block to scan |
f453ba04 | 1326 | * |
13931579 AJ |
1327 | * Standard modes can be calculated using the appropriate standard (DMT, |
1328 | * GTF or CVT. Grab them from @edid and add them to the list. | |
f453ba04 | 1329 | */ |
13931579 AJ |
1330 | static int |
1331 | add_standard_modes(struct drm_connector *connector, struct edid *edid) | |
f453ba04 | 1332 | { |
9cf00977 | 1333 | int i, modes = 0; |
13931579 AJ |
1334 | struct detailed_mode_closure closure = { |
1335 | connector, edid, 0, 0, 0 | |
1336 | }; | |
1337 | ||
1338 | for (i = 0; i < EDID_STD_TIMINGS; i++) { | |
1339 | struct drm_display_mode *newmode; | |
1340 | ||
1341 | newmode = drm_mode_std(connector, edid, | |
1342 | &edid->standard_timings[i], | |
1343 | edid->revision); | |
1344 | if (newmode) { | |
1345 | drm_mode_probed_add(connector, newmode); | |
1346 | modes++; | |
1347 | } | |
1348 | } | |
1349 | ||
1350 | if (version_greater(edid, 1, 0)) | |
1351 | drm_for_each_detailed_block((u8 *)edid, do_standard_modes, | |
1352 | &closure); | |
1353 | ||
1354 | /* XXX should also look for standard codes in VTB blocks */ | |
1355 | ||
1356 | return modes + closure.modes; | |
1357 | } | |
f453ba04 | 1358 | |
13931579 AJ |
1359 | static int drm_cvt_modes(struct drm_connector *connector, |
1360 | struct detailed_timing *timing) | |
1361 | { | |
1362 | int i, j, modes = 0; | |
1363 | struct drm_display_mode *newmode; | |
1364 | struct drm_device *dev = connector->dev; | |
1365 | struct cvt_timing *cvt; | |
1366 | const int rates[] = { 60, 85, 75, 60, 50 }; | |
1367 | const u8 empty[3] = { 0, 0, 0 }; | |
a327f6b8 | 1368 | |
13931579 AJ |
1369 | for (i = 0; i < 4; i++) { |
1370 | int uninitialized_var(width), height; | |
1371 | cvt = &(timing->data.other_data.data.cvt[i]); | |
f453ba04 | 1372 | |
13931579 | 1373 | if (!memcmp(cvt->code, empty, 3)) |
9cf00977 | 1374 | continue; |
f453ba04 | 1375 | |
13931579 AJ |
1376 | height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; |
1377 | switch (cvt->code[1] & 0x0c) { | |
1378 | case 0x00: | |
1379 | width = height * 4 / 3; | |
1380 | break; | |
1381 | case 0x04: | |
1382 | width = height * 16 / 9; | |
1383 | break; | |
1384 | case 0x08: | |
1385 | width = height * 16 / 10; | |
1386 | break; | |
1387 | case 0x0c: | |
1388 | width = height * 15 / 9; | |
1389 | break; | |
1390 | } | |
1391 | ||
1392 | for (j = 1; j < 5; j++) { | |
1393 | if (cvt->code[2] & (1 << j)) { | |
1394 | newmode = drm_cvt_mode(dev, width, height, | |
1395 | rates[j], j == 0, | |
1396 | false, false); | |
1397 | if (newmode) { | |
1398 | drm_mode_probed_add(connector, newmode); | |
1399 | modes++; | |
1400 | } | |
1401 | } | |
1402 | } | |
f453ba04 DA |
1403 | } |
1404 | ||
1405 | return modes; | |
1406 | } | |
9cf00977 | 1407 | |
13931579 AJ |
1408 | static void |
1409 | do_cvt_mode(struct detailed_timing *timing, void *c) | |
882f0219 | 1410 | { |
13931579 AJ |
1411 | struct detailed_mode_closure *closure = c; |
1412 | struct detailed_non_pixel *data = &timing->data.other_data; | |
882f0219 | 1413 | |
13931579 AJ |
1414 | if (data->type == EDID_DETAIL_CVT_3BYTE) |
1415 | closure->modes += drm_cvt_modes(closure->connector, timing); | |
1416 | } | |
882f0219 | 1417 | |
13931579 AJ |
1418 | static int |
1419 | add_cvt_modes(struct drm_connector *connector, struct edid *edid) | |
1420 | { | |
1421 | struct detailed_mode_closure closure = { | |
1422 | connector, edid, 0, 0, 0 | |
1423 | }; | |
882f0219 | 1424 | |
13931579 AJ |
1425 | if (version_greater(edid, 1, 2)) |
1426 | drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); | |
882f0219 | 1427 | |
13931579 | 1428 | /* XXX should also look for CVT codes in VTB blocks */ |
882f0219 | 1429 | |
13931579 AJ |
1430 | return closure.modes; |
1431 | } | |
1432 | ||
1433 | static void | |
1434 | do_detailed_mode(struct detailed_timing *timing, void *c) | |
1435 | { | |
1436 | struct detailed_mode_closure *closure = c; | |
1437 | struct drm_display_mode *newmode; | |
1438 | ||
1439 | if (timing->pixel_clock) { | |
1440 | newmode = drm_mode_detailed(closure->connector->dev, | |
1441 | closure->edid, timing, | |
1442 | closure->quirks); | |
1443 | if (!newmode) | |
1444 | return; | |
1445 | ||
1446 | if (closure->preferred) | |
1447 | newmode->type |= DRM_MODE_TYPE_PREFERRED; | |
1448 | ||
1449 | drm_mode_probed_add(closure->connector, newmode); | |
1450 | closure->modes++; | |
1451 | closure->preferred = 0; | |
882f0219 | 1452 | } |
13931579 | 1453 | } |
882f0219 | 1454 | |
13931579 AJ |
1455 | /* |
1456 | * add_detailed_modes - Add modes from detailed timings | |
1457 | * @connector: attached connector | |
1458 | * @edid: EDID block to scan | |
1459 | * @quirks: quirks to apply | |
1460 | */ | |
1461 | static int | |
1462 | add_detailed_modes(struct drm_connector *connector, struct edid *edid, | |
1463 | u32 quirks) | |
1464 | { | |
1465 | struct detailed_mode_closure closure = { | |
1466 | connector, | |
1467 | edid, | |
1468 | 1, | |
1469 | quirks, | |
1470 | 0 | |
1471 | }; | |
1472 | ||
1473 | if (closure.preferred && !version_greater(edid, 1, 3)) | |
1474 | closure.preferred = | |
1475 | (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); | |
1476 | ||
1477 | drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); | |
1478 | ||
1479 | return closure.modes; | |
882f0219 | 1480 | } |
f453ba04 | 1481 | |
f23c20c8 | 1482 | #define HDMI_IDENTIFIER 0x000C03 |
8fe9790d | 1483 | #define AUDIO_BLOCK 0x01 |
54ac76f8 | 1484 | #define VIDEO_BLOCK 0x02 |
f23c20c8 | 1485 | #define VENDOR_BLOCK 0x03 |
76adaa34 | 1486 | #define SPEAKER_BLOCK 0x04 |
b1edd6a6 | 1487 | #define VIDEO_CAPABILITY_BLOCK 0x07 |
8fe9790d | 1488 | #define EDID_BASIC_AUDIO (1 << 6) |
a988bc72 LPC |
1489 | #define EDID_CEA_YCRCB444 (1 << 5) |
1490 | #define EDID_CEA_YCRCB422 (1 << 4) | |
b1edd6a6 | 1491 | #define EDID_CEA_VCDB_QS (1 << 6) |
8fe9790d | 1492 | |
f23c20c8 | 1493 | /** |
8fe9790d | 1494 | * Search EDID for CEA extension block. |
f23c20c8 | 1495 | */ |
eccaca28 | 1496 | u8 *drm_find_cea_extension(struct edid *edid) |
f23c20c8 | 1497 | { |
8fe9790d ZW |
1498 | u8 *edid_ext = NULL; |
1499 | int i; | |
f23c20c8 ML |
1500 | |
1501 | /* No EDID or EDID extensions */ | |
1502 | if (edid == NULL || edid->extensions == 0) | |
8fe9790d | 1503 | return NULL; |
f23c20c8 | 1504 | |
f23c20c8 | 1505 | /* Find CEA extension */ |
7466f4cc | 1506 | for (i = 0; i < edid->extensions; i++) { |
8fe9790d ZW |
1507 | edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); |
1508 | if (edid_ext[0] == CEA_EXT) | |
f23c20c8 ML |
1509 | break; |
1510 | } | |
1511 | ||
7466f4cc | 1512 | if (i == edid->extensions) |
8fe9790d ZW |
1513 | return NULL; |
1514 | ||
1515 | return edid_ext; | |
1516 | } | |
eccaca28 | 1517 | EXPORT_SYMBOL(drm_find_cea_extension); |
8fe9790d | 1518 | |
18316c8c TR |
1519 | /** |
1520 | * drm_match_cea_mode - look for a CEA mode matching given mode | |
1521 | * @to_match: display mode | |
1522 | * | |
1523 | * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 | |
1524 | * mode. | |
a4799037 | 1525 | */ |
18316c8c | 1526 | u8 drm_match_cea_mode(const struct drm_display_mode *to_match) |
a4799037 SM |
1527 | { |
1528 | struct drm_display_mode *cea_mode; | |
1529 | u8 mode; | |
1530 | ||
1531 | for (mode = 0; mode < drm_num_cea_modes; mode++) { | |
1532 | cea_mode = (struct drm_display_mode *)&edid_cea_modes[mode]; | |
1533 | ||
1534 | if (drm_mode_equal(to_match, cea_mode)) | |
1535 | return mode + 1; | |
1536 | } | |
1537 | return 0; | |
1538 | } | |
1539 | EXPORT_SYMBOL(drm_match_cea_mode); | |
1540 | ||
1541 | ||
54ac76f8 CS |
1542 | static int |
1543 | do_cea_modes (struct drm_connector *connector, u8 *db, u8 len) | |
1544 | { | |
1545 | struct drm_device *dev = connector->dev; | |
1546 | u8 * mode, cea_mode; | |
1547 | int modes = 0; | |
1548 | ||
1549 | for (mode = db; mode < db + len; mode++) { | |
1550 | cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */ | |
1551 | if (cea_mode < drm_num_cea_modes) { | |
1552 | struct drm_display_mode *newmode; | |
1553 | newmode = drm_mode_duplicate(dev, | |
1554 | &edid_cea_modes[cea_mode]); | |
1555 | if (newmode) { | |
1556 | drm_mode_probed_add(connector, newmode); | |
1557 | modes++; | |
1558 | } | |
1559 | } | |
1560 | } | |
1561 | ||
1562 | return modes; | |
1563 | } | |
1564 | ||
9e50b9d5 VS |
1565 | static int |
1566 | cea_db_payload_len(const u8 *db) | |
1567 | { | |
1568 | return db[0] & 0x1f; | |
1569 | } | |
1570 | ||
1571 | static int | |
1572 | cea_db_tag(const u8 *db) | |
1573 | { | |
1574 | return db[0] >> 5; | |
1575 | } | |
1576 | ||
1577 | static int | |
1578 | cea_revision(const u8 *cea) | |
1579 | { | |
1580 | return cea[1]; | |
1581 | } | |
1582 | ||
1583 | static int | |
1584 | cea_db_offsets(const u8 *cea, int *start, int *end) | |
1585 | { | |
1586 | /* Data block offset in CEA extension block */ | |
1587 | *start = 4; | |
1588 | *end = cea[2]; | |
1589 | if (*end == 0) | |
1590 | *end = 127; | |
1591 | if (*end < 4 || *end > 127) | |
1592 | return -ERANGE; | |
1593 | return 0; | |
1594 | } | |
1595 | ||
1596 | #define for_each_cea_db(cea, i, start, end) \ | |
1597 | for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) | |
1598 | ||
54ac76f8 CS |
1599 | static int |
1600 | add_cea_modes(struct drm_connector *connector, struct edid *edid) | |
1601 | { | |
1602 | u8 * cea = drm_find_cea_extension(edid); | |
1603 | u8 * db, dbl; | |
1604 | int modes = 0; | |
1605 | ||
9e50b9d5 VS |
1606 | if (cea && cea_revision(cea) >= 3) { |
1607 | int i, start, end; | |
1608 | ||
1609 | if (cea_db_offsets(cea, &start, &end)) | |
1610 | return 0; | |
1611 | ||
1612 | for_each_cea_db(cea, i, start, end) { | |
1613 | db = &cea[i]; | |
1614 | dbl = cea_db_payload_len(db); | |
1615 | ||
1616 | if (cea_db_tag(db) == VIDEO_BLOCK) | |
54ac76f8 CS |
1617 | modes += do_cea_modes (connector, db+1, dbl); |
1618 | } | |
1619 | } | |
1620 | ||
1621 | return modes; | |
1622 | } | |
1623 | ||
76adaa34 | 1624 | static void |
8504072a | 1625 | parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db) |
76adaa34 | 1626 | { |
8504072a | 1627 | u8 len = cea_db_payload_len(db); |
76adaa34 | 1628 | |
8504072a VS |
1629 | if (len >= 6) { |
1630 | connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ | |
1631 | connector->dvi_dual = db[6] & 1; | |
1632 | } | |
1633 | if (len >= 7) | |
1634 | connector->max_tmds_clock = db[7] * 5; | |
1635 | if (len >= 8) { | |
1636 | connector->latency_present[0] = db[8] >> 7; | |
1637 | connector->latency_present[1] = (db[8] >> 6) & 1; | |
1638 | } | |
1639 | if (len >= 9) | |
1640 | connector->video_latency[0] = db[9]; | |
1641 | if (len >= 10) | |
1642 | connector->audio_latency[0] = db[10]; | |
1643 | if (len >= 11) | |
1644 | connector->video_latency[1] = db[11]; | |
1645 | if (len >= 12) | |
1646 | connector->audio_latency[1] = db[12]; | |
76adaa34 | 1647 | |
670c1ef6 | 1648 | DRM_DEBUG_KMS("HDMI: DVI dual %d, " |
76adaa34 WF |
1649 | "max TMDS clock %d, " |
1650 | "latency present %d %d, " | |
1651 | "video latency %d %d, " | |
1652 | "audio latency %d %d\n", | |
1653 | connector->dvi_dual, | |
1654 | connector->max_tmds_clock, | |
1655 | (int) connector->latency_present[0], | |
1656 | (int) connector->latency_present[1], | |
1657 | connector->video_latency[0], | |
1658 | connector->video_latency[1], | |
1659 | connector->audio_latency[0], | |
1660 | connector->audio_latency[1]); | |
1661 | } | |
1662 | ||
1663 | static void | |
1664 | monitor_name(struct detailed_timing *t, void *data) | |
1665 | { | |
1666 | if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) | |
1667 | *(u8 **)data = t->data.other_data.data.str.str; | |
1668 | } | |
1669 | ||
14f77fdd VS |
1670 | static bool cea_db_is_hdmi_vsdb(const u8 *db) |
1671 | { | |
1672 | int hdmi_id; | |
1673 | ||
1674 | if (cea_db_tag(db) != VENDOR_BLOCK) | |
1675 | return false; | |
1676 | ||
1677 | if (cea_db_payload_len(db) < 5) | |
1678 | return false; | |
1679 | ||
1680 | hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16); | |
1681 | ||
1682 | return hdmi_id == HDMI_IDENTIFIER; | |
1683 | } | |
1684 | ||
76adaa34 WF |
1685 | /** |
1686 | * drm_edid_to_eld - build ELD from EDID | |
1687 | * @connector: connector corresponding to the HDMI/DP sink | |
1688 | * @edid: EDID to parse | |
1689 | * | |
1690 | * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. | |
1691 | * Some ELD fields are left to the graphics driver caller: | |
1692 | * - Conn_Type | |
1693 | * - HDCP | |
1694 | * - Port_ID | |
1695 | */ | |
1696 | void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) | |
1697 | { | |
1698 | uint8_t *eld = connector->eld; | |
1699 | u8 *cea; | |
1700 | u8 *name; | |
1701 | u8 *db; | |
1702 | int sad_count = 0; | |
1703 | int mnl; | |
1704 | int dbl; | |
1705 | ||
1706 | memset(eld, 0, sizeof(connector->eld)); | |
1707 | ||
1708 | cea = drm_find_cea_extension(edid); | |
1709 | if (!cea) { | |
1710 | DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); | |
1711 | return; | |
1712 | } | |
1713 | ||
1714 | name = NULL; | |
1715 | drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); | |
1716 | for (mnl = 0; name && mnl < 13; mnl++) { | |
1717 | if (name[mnl] == 0x0a) | |
1718 | break; | |
1719 | eld[20 + mnl] = name[mnl]; | |
1720 | } | |
1721 | eld[4] = (cea[1] << 5) | mnl; | |
1722 | DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); | |
1723 | ||
1724 | eld[0] = 2 << 3; /* ELD version: 2 */ | |
1725 | ||
1726 | eld[16] = edid->mfg_id[0]; | |
1727 | eld[17] = edid->mfg_id[1]; | |
1728 | eld[18] = edid->prod_code[0]; | |
1729 | eld[19] = edid->prod_code[1]; | |
1730 | ||
9e50b9d5 VS |
1731 | if (cea_revision(cea) >= 3) { |
1732 | int i, start, end; | |
1733 | ||
1734 | if (cea_db_offsets(cea, &start, &end)) { | |
1735 | start = 0; | |
1736 | end = 0; | |
1737 | } | |
1738 | ||
1739 | for_each_cea_db(cea, i, start, end) { | |
1740 | db = &cea[i]; | |
1741 | dbl = cea_db_payload_len(db); | |
1742 | ||
1743 | switch (cea_db_tag(db)) { | |
a0ab734d CS |
1744 | case AUDIO_BLOCK: |
1745 | /* Audio Data Block, contains SADs */ | |
1746 | sad_count = dbl / 3; | |
9e50b9d5 VS |
1747 | if (dbl >= 1) |
1748 | memcpy(eld + 20 + mnl, &db[1], dbl); | |
a0ab734d CS |
1749 | break; |
1750 | case SPEAKER_BLOCK: | |
9e50b9d5 VS |
1751 | /* Speaker Allocation Data Block */ |
1752 | if (dbl >= 1) | |
1753 | eld[7] = db[1]; | |
a0ab734d CS |
1754 | break; |
1755 | case VENDOR_BLOCK: | |
1756 | /* HDMI Vendor-Specific Data Block */ | |
14f77fdd | 1757 | if (cea_db_is_hdmi_vsdb(db)) |
a0ab734d CS |
1758 | parse_hdmi_vsdb(connector, db); |
1759 | break; | |
1760 | default: | |
1761 | break; | |
1762 | } | |
76adaa34 | 1763 | } |
9e50b9d5 | 1764 | } |
76adaa34 WF |
1765 | eld[5] |= sad_count << 4; |
1766 | eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; | |
1767 | ||
1768 | DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); | |
1769 | } | |
1770 | EXPORT_SYMBOL(drm_edid_to_eld); | |
1771 | ||
1772 | /** | |
1773 | * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond | |
1774 | * @connector: connector associated with the HDMI/DP sink | |
1775 | * @mode: the display mode | |
1776 | */ | |
1777 | int drm_av_sync_delay(struct drm_connector *connector, | |
1778 | struct drm_display_mode *mode) | |
1779 | { | |
1780 | int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); | |
1781 | int a, v; | |
1782 | ||
1783 | if (!connector->latency_present[0]) | |
1784 | return 0; | |
1785 | if (!connector->latency_present[1]) | |
1786 | i = 0; | |
1787 | ||
1788 | a = connector->audio_latency[i]; | |
1789 | v = connector->video_latency[i]; | |
1790 | ||
1791 | /* | |
1792 | * HDMI/DP sink doesn't support audio or video? | |
1793 | */ | |
1794 | if (a == 255 || v == 255) | |
1795 | return 0; | |
1796 | ||
1797 | /* | |
1798 | * Convert raw EDID values to millisecond. | |
1799 | * Treat unknown latency as 0ms. | |
1800 | */ | |
1801 | if (a) | |
1802 | a = min(2 * (a - 1), 500); | |
1803 | if (v) | |
1804 | v = min(2 * (v - 1), 500); | |
1805 | ||
1806 | return max(v - a, 0); | |
1807 | } | |
1808 | EXPORT_SYMBOL(drm_av_sync_delay); | |
1809 | ||
1810 | /** | |
1811 | * drm_select_eld - select one ELD from multiple HDMI/DP sinks | |
1812 | * @encoder: the encoder just changed display mode | |
1813 | * @mode: the adjusted display mode | |
1814 | * | |
1815 | * It's possible for one encoder to be associated with multiple HDMI/DP sinks. | |
1816 | * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. | |
1817 | */ | |
1818 | struct drm_connector *drm_select_eld(struct drm_encoder *encoder, | |
1819 | struct drm_display_mode *mode) | |
1820 | { | |
1821 | struct drm_connector *connector; | |
1822 | struct drm_device *dev = encoder->dev; | |
1823 | ||
1824 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) | |
1825 | if (connector->encoder == encoder && connector->eld[0]) | |
1826 | return connector; | |
1827 | ||
1828 | return NULL; | |
1829 | } | |
1830 | EXPORT_SYMBOL(drm_select_eld); | |
1831 | ||
8fe9790d ZW |
1832 | /** |
1833 | * drm_detect_hdmi_monitor - detect whether monitor is hdmi. | |
1834 | * @edid: monitor EDID information | |
1835 | * | |
1836 | * Parse the CEA extension according to CEA-861-B. | |
1837 | * Return true if HDMI, false if not or unknown. | |
1838 | */ | |
1839 | bool drm_detect_hdmi_monitor(struct edid *edid) | |
1840 | { | |
1841 | u8 *edid_ext; | |
14f77fdd | 1842 | int i; |
8fe9790d | 1843 | int start_offset, end_offset; |
8fe9790d ZW |
1844 | |
1845 | edid_ext = drm_find_cea_extension(edid); | |
1846 | if (!edid_ext) | |
14f77fdd | 1847 | return false; |
f23c20c8 | 1848 | |
9e50b9d5 | 1849 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
14f77fdd | 1850 | return false; |
f23c20c8 ML |
1851 | |
1852 | /* | |
1853 | * Because HDMI identifier is in Vendor Specific Block, | |
1854 | * search it from all data blocks of CEA extension. | |
1855 | */ | |
9e50b9d5 | 1856 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
14f77fdd VS |
1857 | if (cea_db_is_hdmi_vsdb(&edid_ext[i])) |
1858 | return true; | |
f23c20c8 ML |
1859 | } |
1860 | ||
14f77fdd | 1861 | return false; |
f23c20c8 ML |
1862 | } |
1863 | EXPORT_SYMBOL(drm_detect_hdmi_monitor); | |
1864 | ||
8fe9790d ZW |
1865 | /** |
1866 | * drm_detect_monitor_audio - check monitor audio capability | |
1867 | * | |
1868 | * Monitor should have CEA extension block. | |
1869 | * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic | |
1870 | * audio' only. If there is any audio extension block and supported | |
1871 | * audio format, assume at least 'basic audio' support, even if 'basic | |
1872 | * audio' is not defined in EDID. | |
1873 | * | |
1874 | */ | |
1875 | bool drm_detect_monitor_audio(struct edid *edid) | |
1876 | { | |
1877 | u8 *edid_ext; | |
1878 | int i, j; | |
1879 | bool has_audio = false; | |
1880 | int start_offset, end_offset; | |
1881 | ||
1882 | edid_ext = drm_find_cea_extension(edid); | |
1883 | if (!edid_ext) | |
1884 | goto end; | |
1885 | ||
1886 | has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); | |
1887 | ||
1888 | if (has_audio) { | |
1889 | DRM_DEBUG_KMS("Monitor has basic audio support\n"); | |
1890 | goto end; | |
1891 | } | |
1892 | ||
9e50b9d5 VS |
1893 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
1894 | goto end; | |
8fe9790d | 1895 | |
9e50b9d5 VS |
1896 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
1897 | if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { | |
8fe9790d | 1898 | has_audio = true; |
9e50b9d5 | 1899 | for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) |
8fe9790d ZW |
1900 | DRM_DEBUG_KMS("CEA audio format %d\n", |
1901 | (edid_ext[i + j] >> 3) & 0xf); | |
1902 | goto end; | |
1903 | } | |
1904 | } | |
1905 | end: | |
1906 | return has_audio; | |
1907 | } | |
1908 | EXPORT_SYMBOL(drm_detect_monitor_audio); | |
1909 | ||
b1edd6a6 VS |
1910 | /** |
1911 | * drm_rgb_quant_range_selectable - is RGB quantization range selectable? | |
1912 | * | |
1913 | * Check whether the monitor reports the RGB quantization range selection | |
1914 | * as supported. The AVI infoframe can then be used to inform the monitor | |
1915 | * which quantization range (full or limited) is used. | |
1916 | */ | |
1917 | bool drm_rgb_quant_range_selectable(struct edid *edid) | |
1918 | { | |
1919 | u8 *edid_ext; | |
1920 | int i, start, end; | |
1921 | ||
1922 | edid_ext = drm_find_cea_extension(edid); | |
1923 | if (!edid_ext) | |
1924 | return false; | |
1925 | ||
1926 | if (cea_db_offsets(edid_ext, &start, &end)) | |
1927 | return false; | |
1928 | ||
1929 | for_each_cea_db(edid_ext, i, start, end) { | |
1930 | if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK && | |
1931 | cea_db_payload_len(&edid_ext[i]) == 2) { | |
1932 | DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]); | |
1933 | return edid_ext[i + 2] & EDID_CEA_VCDB_QS; | |
1934 | } | |
1935 | } | |
1936 | ||
1937 | return false; | |
1938 | } | |
1939 | EXPORT_SYMBOL(drm_rgb_quant_range_selectable); | |
1940 | ||
3b11228b JB |
1941 | /** |
1942 | * drm_add_display_info - pull display info out if present | |
1943 | * @edid: EDID data | |
1944 | * @info: display info (attached to connector) | |
1945 | * | |
1946 | * Grab any available display info and stuff it into the drm_display_info | |
1947 | * structure that's part of the connector. Useful for tracking bpp and | |
1948 | * color spaces. | |
1949 | */ | |
1950 | static void drm_add_display_info(struct edid *edid, | |
1951 | struct drm_display_info *info) | |
1952 | { | |
ebec9a7b JB |
1953 | u8 *edid_ext; |
1954 | ||
3b11228b JB |
1955 | info->width_mm = edid->width_cm * 10; |
1956 | info->height_mm = edid->height_cm * 10; | |
1957 | ||
1958 | /* driver figures it out in this case */ | |
1959 | info->bpc = 0; | |
da05a5a7 | 1960 | info->color_formats = 0; |
3b11228b | 1961 | |
a988bc72 | 1962 | if (edid->revision < 3) |
3b11228b JB |
1963 | return; |
1964 | ||
1965 | if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) | |
1966 | return; | |
1967 | ||
a988bc72 LPC |
1968 | /* Get data from CEA blocks if present */ |
1969 | edid_ext = drm_find_cea_extension(edid); | |
1970 | if (edid_ext) { | |
1971 | info->cea_rev = edid_ext[1]; | |
1972 | ||
1973 | /* The existence of a CEA block should imply RGB support */ | |
1974 | info->color_formats = DRM_COLOR_FORMAT_RGB444; | |
1975 | if (edid_ext[3] & EDID_CEA_YCRCB444) | |
1976 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; | |
1977 | if (edid_ext[3] & EDID_CEA_YCRCB422) | |
1978 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; | |
1979 | } | |
1980 | ||
1981 | /* Only defined for 1.4 with digital displays */ | |
1982 | if (edid->revision < 4) | |
1983 | return; | |
1984 | ||
3b11228b JB |
1985 | switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { |
1986 | case DRM_EDID_DIGITAL_DEPTH_6: | |
1987 | info->bpc = 6; | |
1988 | break; | |
1989 | case DRM_EDID_DIGITAL_DEPTH_8: | |
1990 | info->bpc = 8; | |
1991 | break; | |
1992 | case DRM_EDID_DIGITAL_DEPTH_10: | |
1993 | info->bpc = 10; | |
1994 | break; | |
1995 | case DRM_EDID_DIGITAL_DEPTH_12: | |
1996 | info->bpc = 12; | |
1997 | break; | |
1998 | case DRM_EDID_DIGITAL_DEPTH_14: | |
1999 | info->bpc = 14; | |
2000 | break; | |
2001 | case DRM_EDID_DIGITAL_DEPTH_16: | |
2002 | info->bpc = 16; | |
2003 | break; | |
2004 | case DRM_EDID_DIGITAL_DEPTH_UNDEF: | |
2005 | default: | |
2006 | info->bpc = 0; | |
2007 | break; | |
2008 | } | |
da05a5a7 | 2009 | |
a988bc72 | 2010 | info->color_formats |= DRM_COLOR_FORMAT_RGB444; |
ee58808d LPC |
2011 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) |
2012 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; | |
2013 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) | |
2014 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; | |
3b11228b JB |
2015 | } |
2016 | ||
f453ba04 DA |
2017 | /** |
2018 | * drm_add_edid_modes - add modes from EDID data, if available | |
2019 | * @connector: connector we're probing | |
2020 | * @edid: edid data | |
2021 | * | |
2022 | * Add the specified modes to the connector's mode list. | |
2023 | * | |
2024 | * Return number of modes added or 0 if we couldn't find any. | |
2025 | */ | |
2026 | int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) | |
2027 | { | |
2028 | int num_modes = 0; | |
2029 | u32 quirks; | |
2030 | ||
2031 | if (edid == NULL) { | |
2032 | return 0; | |
2033 | } | |
3c537889 | 2034 | if (!drm_edid_is_valid(edid)) { |
dcdb1674 | 2035 | dev_warn(connector->dev->dev, "%s: EDID invalid.\n", |
f453ba04 DA |
2036 | drm_get_connector_name(connector)); |
2037 | return 0; | |
2038 | } | |
2039 | ||
2040 | quirks = edid_get_quirks(edid); | |
2041 | ||
c867df70 AJ |
2042 | /* |
2043 | * EDID spec says modes should be preferred in this order: | |
2044 | * - preferred detailed mode | |
2045 | * - other detailed modes from base block | |
2046 | * - detailed modes from extension blocks | |
2047 | * - CVT 3-byte code modes | |
2048 | * - standard timing codes | |
2049 | * - established timing codes | |
2050 | * - modes inferred from GTF or CVT range information | |
2051 | * | |
13931579 | 2052 | * We get this pretty much right. |
c867df70 AJ |
2053 | * |
2054 | * XXX order for additional mode types in extension blocks? | |
2055 | */ | |
13931579 AJ |
2056 | num_modes += add_detailed_modes(connector, edid, quirks); |
2057 | num_modes += add_cvt_modes(connector, edid); | |
c867df70 AJ |
2058 | num_modes += add_standard_modes(connector, edid); |
2059 | num_modes += add_established_modes(connector, edid); | |
196e077d PZ |
2060 | if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) |
2061 | num_modes += add_inferred_modes(connector, edid); | |
54ac76f8 | 2062 | num_modes += add_cea_modes(connector, edid); |
f453ba04 DA |
2063 | |
2064 | if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) | |
2065 | edid_fixup_preferred(connector, quirks); | |
2066 | ||
3b11228b | 2067 | drm_add_display_info(edid, &connector->display_info); |
f453ba04 DA |
2068 | |
2069 | return num_modes; | |
2070 | } | |
2071 | EXPORT_SYMBOL(drm_add_edid_modes); | |
f0fda0a4 ZY |
2072 | |
2073 | /** | |
2074 | * drm_add_modes_noedid - add modes for the connectors without EDID | |
2075 | * @connector: connector we're probing | |
2076 | * @hdisplay: the horizontal display limit | |
2077 | * @vdisplay: the vertical display limit | |
2078 | * | |
2079 | * Add the specified modes to the connector's mode list. Only when the | |
2080 | * hdisplay/vdisplay is not beyond the given limit, it will be added. | |
2081 | * | |
2082 | * Return number of modes added or 0 if we couldn't find any. | |
2083 | */ | |
2084 | int drm_add_modes_noedid(struct drm_connector *connector, | |
2085 | int hdisplay, int vdisplay) | |
2086 | { | |
2087 | int i, count, num_modes = 0; | |
b1f559ec | 2088 | struct drm_display_mode *mode; |
f0fda0a4 ZY |
2089 | struct drm_device *dev = connector->dev; |
2090 | ||
2091 | count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); | |
2092 | if (hdisplay < 0) | |
2093 | hdisplay = 0; | |
2094 | if (vdisplay < 0) | |
2095 | vdisplay = 0; | |
2096 | ||
2097 | for (i = 0; i < count; i++) { | |
b1f559ec | 2098 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
f0fda0a4 ZY |
2099 | if (hdisplay && vdisplay) { |
2100 | /* | |
2101 | * Only when two are valid, they will be used to check | |
2102 | * whether the mode should be added to the mode list of | |
2103 | * the connector. | |
2104 | */ | |
2105 | if (ptr->hdisplay > hdisplay || | |
2106 | ptr->vdisplay > vdisplay) | |
2107 | continue; | |
2108 | } | |
f985dedb AJ |
2109 | if (drm_mode_vrefresh(ptr) > 61) |
2110 | continue; | |
f0fda0a4 ZY |
2111 | mode = drm_mode_duplicate(dev, ptr); |
2112 | if (mode) { | |
2113 | drm_mode_probed_add(connector, mode); | |
2114 | num_modes++; | |
2115 | } | |
2116 | } | |
2117 | return num_modes; | |
2118 | } | |
2119 | EXPORT_SYMBOL(drm_add_modes_noedid); |