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ede53344 VS |
1 | /* |
2 | * Copyright © 2016 Intel Corporation | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | */ | |
22 | ||
23 | #include <linux/errno.h> | |
24 | #include <linux/export.h> | |
25 | #include <linux/i2c.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/string.h> | |
28 | #include <drm/drm_dp_dual_mode_helper.h> | |
29 | #include <drm/drmP.h> | |
30 | ||
31 | /** | |
32 | * DOC: dp dual mode helpers | |
33 | * | |
34 | * Helper functions to deal with DP dual mode (aka. DP++) adaptors. | |
35 | * | |
36 | * Type 1: | |
37 | * Adaptor registers (if any) and the sink DDC bus may be accessed via I2C. | |
38 | * | |
39 | * Type 2: | |
40 | * Adaptor registers and sink DDC bus can be accessed either via I2C or | |
41 | * I2C-over-AUX. Source devices may choose to implement either of these | |
42 | * access methods. | |
43 | */ | |
44 | ||
45 | #define DP_DUAL_MODE_SLAVE_ADDRESS 0x40 | |
46 | ||
47 | /** | |
48 | * drm_dp_dual_mode_read - Read from the DP dual mode adaptor register(s) | |
49 | * @adapter: I2C adapter for the DDC bus | |
50 | * @offset: register offset | |
51 | * @buffer: buffer for return data | |
52 | * @size: sizo of the buffer | |
53 | * | |
54 | * Reads @size bytes from the DP dual mode adaptor registers | |
55 | * starting at @offset. | |
56 | * | |
57 | * Returns: | |
58 | * 0 on success, negative error code on failure | |
59 | */ | |
60 | ssize_t drm_dp_dual_mode_read(struct i2c_adapter *adapter, | |
61 | u8 offset, void *buffer, size_t size) | |
62 | { | |
63 | struct i2c_msg msgs[] = { | |
64 | { | |
65 | .addr = DP_DUAL_MODE_SLAVE_ADDRESS, | |
66 | .flags = 0, | |
67 | .len = 1, | |
68 | .buf = &offset, | |
69 | }, | |
70 | { | |
71 | .addr = DP_DUAL_MODE_SLAVE_ADDRESS, | |
72 | .flags = I2C_M_RD, | |
73 | .len = size, | |
74 | .buf = buffer, | |
75 | }, | |
76 | }; | |
77 | int ret; | |
78 | ||
79 | ret = i2c_transfer(adapter, msgs, ARRAY_SIZE(msgs)); | |
80 | if (ret < 0) | |
81 | return ret; | |
82 | if (ret != ARRAY_SIZE(msgs)) | |
83 | return -EPROTO; | |
84 | ||
85 | return 0; | |
86 | } | |
87 | EXPORT_SYMBOL(drm_dp_dual_mode_read); | |
88 | ||
89 | /** | |
90 | * drm_dp_dual_mode_write - Write to the DP dual mode adaptor register(s) | |
91 | * @adapter: I2C adapter for the DDC bus | |
92 | * @offset: register offset | |
93 | * @buffer: buffer for write data | |
94 | * @size: sizo of the buffer | |
95 | * | |
96 | * Writes @size bytes to the DP dual mode adaptor registers | |
97 | * starting at @offset. | |
98 | * | |
99 | * Returns: | |
100 | * 0 on success, negative error code on failure | |
101 | */ | |
102 | ssize_t drm_dp_dual_mode_write(struct i2c_adapter *adapter, | |
103 | u8 offset, const void *buffer, size_t size) | |
104 | { | |
105 | struct i2c_msg msg = { | |
106 | .addr = DP_DUAL_MODE_SLAVE_ADDRESS, | |
107 | .flags = 0, | |
108 | .len = 1 + size, | |
109 | .buf = NULL, | |
110 | }; | |
111 | void *data; | |
112 | int ret; | |
113 | ||
114 | data = kmalloc(msg.len, GFP_TEMPORARY); | |
115 | if (!data) | |
116 | return -ENOMEM; | |
117 | ||
118 | msg.buf = data; | |
119 | ||
120 | memcpy(data, &offset, 1); | |
121 | memcpy(data + 1, buffer, size); | |
122 | ||
123 | ret = i2c_transfer(adapter, &msg, 1); | |
124 | ||
125 | kfree(data); | |
126 | ||
127 | if (ret < 0) | |
128 | return ret; | |
129 | if (ret != 1) | |
130 | return -EPROTO; | |
131 | ||
132 | return 0; | |
133 | } | |
134 | EXPORT_SYMBOL(drm_dp_dual_mode_write); | |
135 | ||
136 | static bool is_hdmi_adaptor(const char hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN]) | |
137 | { | |
138 | static const char dp_dual_mode_hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN] = | |
139 | "DP-HDMI ADAPTOR\x04"; | |
140 | ||
141 | return memcmp(hdmi_id, dp_dual_mode_hdmi_id, | |
142 | sizeof(dp_dual_mode_hdmi_id)) == 0; | |
143 | } | |
144 | ||
145 | static bool is_type2_adaptor(uint8_t adaptor_id) | |
146 | { | |
147 | return adaptor_id == (DP_DUAL_MODE_TYPE_TYPE2 | | |
148 | DP_DUAL_MODE_REV_TYPE2); | |
149 | } | |
150 | ||
b610393a JN |
151 | static bool is_lspcon_adaptor(const char hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN], |
152 | const uint8_t adaptor_id) | |
056996b9 SS |
153 | { |
154 | return is_hdmi_adaptor(hdmi_id) && | |
155 | (adaptor_id == (DP_DUAL_MODE_TYPE_TYPE2 | | |
156 | DP_DUAL_MODE_TYPE_HAS_DPCD)); | |
157 | } | |
158 | ||
ede53344 VS |
159 | /** |
160 | * drm_dp_dual_mode_detect - Identify the DP dual mode adaptor | |
161 | * @adapter: I2C adapter for the DDC bus | |
162 | * | |
163 | * Attempt to identify the type of the DP dual mode adaptor used. | |
164 | * | |
165 | * Note that when the answer is @DRM_DP_DUAL_MODE_UNKNOWN it's not | |
166 | * certain whether we're dealing with a native HDMI port or | |
167 | * a type 1 DVI dual mode adaptor. The driver will have to use | |
168 | * some other hardware/driver specific mechanism to make that | |
169 | * distinction. | |
170 | * | |
171 | * Returns: | |
172 | * The type of the DP dual mode adaptor used | |
173 | */ | |
174 | enum drm_dp_dual_mode_type drm_dp_dual_mode_detect(struct i2c_adapter *adapter) | |
175 | { | |
176 | char hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN] = {}; | |
177 | uint8_t adaptor_id = 0x00; | |
178 | ssize_t ret; | |
179 | ||
180 | /* | |
181 | * Let's see if the adaptor is there the by reading the | |
182 | * HDMI ID registers. | |
183 | * | |
184 | * Note that type 1 DVI adaptors are not required to implemnt | |
185 | * any registers, and that presents a problem for detection. | |
186 | * If the i2c transfer is nacked, we may or may not be dealing | |
187 | * with a type 1 DVI adaptor. Some other mechanism of detecting | |
188 | * the presence of the adaptor is required. One way would be | |
189 | * to check the state of the CONFIG1 pin, Another method would | |
190 | * simply require the driver to know whether the port is a DP++ | |
191 | * port or a native HDMI port. Both of these methods are entirely | |
192 | * hardware/driver specific so we can't deal with them here. | |
193 | */ | |
194 | ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_HDMI_ID, | |
195 | hdmi_id, sizeof(hdmi_id)); | |
196 | if (ret) | |
197 | return DRM_DP_DUAL_MODE_UNKNOWN; | |
198 | ||
199 | /* | |
200 | * Sigh. Some (maybe all?) type 1 adaptors are broken and ack | |
201 | * the offset but ignore it, and instead they just always return | |
202 | * data from the start of the HDMI ID buffer. So for a broken | |
203 | * type 1 HDMI adaptor a single byte read will always give us | |
204 | * 0x44, and for a type 1 DVI adaptor it should give 0x00 | |
205 | * (assuming it implements any registers). Fortunately neither | |
206 | * of those values will match the type 2 signature of the | |
207 | * DP_DUAL_MODE_ADAPTOR_ID register so we can proceed with | |
208 | * the type 2 adaptor detection safely even in the presence | |
209 | * of broken type 1 adaptors. | |
210 | */ | |
211 | ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_ADAPTOR_ID, | |
212 | &adaptor_id, sizeof(adaptor_id)); | |
213 | if (ret == 0) { | |
056996b9 SS |
214 | if (is_lspcon_adaptor(hdmi_id, adaptor_id)) |
215 | return DRM_DP_DUAL_MODE_LSPCON; | |
ede53344 VS |
216 | if (is_type2_adaptor(adaptor_id)) { |
217 | if (is_hdmi_adaptor(hdmi_id)) | |
218 | return DRM_DP_DUAL_MODE_TYPE2_HDMI; | |
219 | else | |
220 | return DRM_DP_DUAL_MODE_TYPE2_DVI; | |
221 | } | |
222 | } | |
223 | ||
224 | if (is_hdmi_adaptor(hdmi_id)) | |
225 | return DRM_DP_DUAL_MODE_TYPE1_HDMI; | |
226 | else | |
227 | return DRM_DP_DUAL_MODE_TYPE1_DVI; | |
228 | } | |
229 | EXPORT_SYMBOL(drm_dp_dual_mode_detect); | |
230 | ||
231 | /** | |
232 | * drm_dp_dual_mode_max_tmds_clock - Max TMDS clock for DP dual mode adaptor | |
233 | * @type: DP dual mode adaptor type | |
234 | * @adapter: I2C adapter for the DDC bus | |
235 | * | |
236 | * Determine the max TMDS clock the adaptor supports based on the | |
237 | * type of the dual mode adaptor and the DP_DUAL_MODE_MAX_TMDS_CLOCK | |
238 | * register (on type2 adaptors). As some type 1 adaptors have | |
239 | * problems with registers (see comments in drm_dp_dual_mode_detect()) | |
240 | * we don't read the register on those, instead we simply assume | |
241 | * a 165 MHz limit based on the specification. | |
242 | * | |
243 | * Returns: | |
244 | * Maximum supported TMDS clock rate for the DP dual mode adaptor in kHz. | |
245 | */ | |
246 | int drm_dp_dual_mode_max_tmds_clock(enum drm_dp_dual_mode_type type, | |
247 | struct i2c_adapter *adapter) | |
248 | { | |
249 | uint8_t max_tmds_clock; | |
250 | ssize_t ret; | |
251 | ||
252 | /* native HDMI so no limit */ | |
253 | if (type == DRM_DP_DUAL_MODE_NONE) | |
254 | return 0; | |
255 | ||
256 | /* | |
257 | * Type 1 adaptors are limited to 165MHz | |
258 | * Type 2 adaptors can tells us their limit | |
259 | */ | |
260 | if (type < DRM_DP_DUAL_MODE_TYPE2_DVI) | |
261 | return 165000; | |
262 | ||
263 | ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_MAX_TMDS_CLOCK, | |
264 | &max_tmds_clock, sizeof(max_tmds_clock)); | |
265 | if (ret || max_tmds_clock == 0x00 || max_tmds_clock == 0xff) { | |
266 | DRM_DEBUG_KMS("Failed to query max TMDS clock\n"); | |
267 | return 165000; | |
268 | } | |
269 | ||
270 | return max_tmds_clock * 5000 / 2; | |
271 | } | |
272 | EXPORT_SYMBOL(drm_dp_dual_mode_max_tmds_clock); | |
273 | ||
274 | /** | |
275 | * drm_dp_dual_mode_get_tmds_output - Get the state of the TMDS output buffers in the DP dual mode adaptor | |
276 | * @type: DP dual mode adaptor type | |
277 | * @adapter: I2C adapter for the DDC bus | |
278 | * @enabled: current state of the TMDS output buffers | |
279 | * | |
280 | * Get the state of the TMDS output buffers in the adaptor. For | |
281 | * type2 adaptors this is queried from the DP_DUAL_MODE_TMDS_OEN | |
282 | * register. As some type 1 adaptors have problems with registers | |
283 | * (see comments in drm_dp_dual_mode_detect()) we don't read the | |
284 | * register on those, instead we simply assume that the buffers | |
285 | * are always enabled. | |
286 | * | |
287 | * Returns: | |
288 | * 0 on success, negative error code on failure | |
289 | */ | |
290 | int drm_dp_dual_mode_get_tmds_output(enum drm_dp_dual_mode_type type, | |
291 | struct i2c_adapter *adapter, | |
292 | bool *enabled) | |
293 | { | |
294 | uint8_t tmds_oen; | |
295 | ssize_t ret; | |
296 | ||
297 | if (type < DRM_DP_DUAL_MODE_TYPE2_DVI) { | |
298 | *enabled = true; | |
299 | return 0; | |
300 | } | |
301 | ||
302 | ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_TMDS_OEN, | |
303 | &tmds_oen, sizeof(tmds_oen)); | |
304 | if (ret) { | |
305 | DRM_DEBUG_KMS("Failed to query state of TMDS output buffers\n"); | |
306 | return ret; | |
307 | } | |
308 | ||
309 | *enabled = !(tmds_oen & DP_DUAL_MODE_TMDS_DISABLE); | |
310 | ||
311 | return 0; | |
312 | } | |
313 | EXPORT_SYMBOL(drm_dp_dual_mode_get_tmds_output); | |
314 | ||
315 | /** | |
316 | * drm_dp_dual_mode_set_tmds_output - Enable/disable TMDS output buffers in the DP dual mode adaptor | |
317 | * @type: DP dual mode adaptor type | |
318 | * @adapter: I2C adapter for the DDC bus | |
319 | * @enable: enable (as opposed to disable) the TMDS output buffers | |
320 | * | |
321 | * Set the state of the TMDS output buffers in the adaptor. For | |
322 | * type2 this is set via the DP_DUAL_MODE_TMDS_OEN register. As | |
323 | * some type 1 adaptors have problems with registers (see comments | |
324 | * in drm_dp_dual_mode_detect()) we avoid touching the register, | |
325 | * making this function a no-op on type 1 adaptors. | |
326 | * | |
327 | * Returns: | |
328 | * 0 on success, negative error code on failure | |
329 | */ | |
330 | int drm_dp_dual_mode_set_tmds_output(enum drm_dp_dual_mode_type type, | |
331 | struct i2c_adapter *adapter, bool enable) | |
332 | { | |
333 | uint8_t tmds_oen = enable ? 0 : DP_DUAL_MODE_TMDS_DISABLE; | |
334 | ssize_t ret; | |
335 | ||
336 | if (type < DRM_DP_DUAL_MODE_TYPE2_DVI) | |
337 | return 0; | |
338 | ||
339 | ret = drm_dp_dual_mode_write(adapter, DP_DUAL_MODE_TMDS_OEN, | |
340 | &tmds_oen, sizeof(tmds_oen)); | |
341 | if (ret) { | |
342 | DRM_DEBUG_KMS("Failed to %s TMDS output buffers\n", | |
343 | enable ? "enable" : "disable"); | |
344 | return ret; | |
345 | } | |
346 | ||
347 | return 0; | |
348 | } | |
349 | EXPORT_SYMBOL(drm_dp_dual_mode_set_tmds_output); | |
350 | ||
351 | /** | |
352 | * drm_dp_get_dual_mode_type_name - Get the name of the DP dual mode adaptor type as a string | |
353 | * @type: DP dual mode adaptor type | |
354 | * | |
355 | * Returns: | |
356 | * String representation of the DP dual mode adaptor type | |
357 | */ | |
358 | const char *drm_dp_get_dual_mode_type_name(enum drm_dp_dual_mode_type type) | |
359 | { | |
360 | switch (type) { | |
361 | case DRM_DP_DUAL_MODE_NONE: | |
362 | return "none"; | |
363 | case DRM_DP_DUAL_MODE_TYPE1_DVI: | |
364 | return "type 1 DVI"; | |
365 | case DRM_DP_DUAL_MODE_TYPE1_HDMI: | |
366 | return "type 1 HDMI"; | |
367 | case DRM_DP_DUAL_MODE_TYPE2_DVI: | |
368 | return "type 2 DVI"; | |
369 | case DRM_DP_DUAL_MODE_TYPE2_HDMI: | |
370 | return "type 2 HDMI"; | |
371 | default: | |
372 | WARN_ON(type != DRM_DP_DUAL_MODE_UNKNOWN); | |
373 | return "unknown"; | |
374 | } | |
375 | } | |
376 | EXPORT_SYMBOL(drm_dp_get_dual_mode_type_name); | |
056996b9 SS |
377 | |
378 | /** | |
379 | * drm_lspcon_get_mode: Get LSPCON's current mode of operation by | |
613a3081 JN |
380 | * reading offset (0x80, 0x41) |
381 | * @adapter: I2C-over-aux adapter | |
382 | * @mode: current lspcon mode of operation output variable | |
056996b9 SS |
383 | * |
384 | * Returns: | |
385 | * 0 on success, sets the current_mode value to appropriate mode | |
386 | * -error on failure | |
387 | */ | |
388 | int drm_lspcon_get_mode(struct i2c_adapter *adapter, | |
389 | enum drm_lspcon_mode *mode) | |
390 | { | |
391 | u8 data; | |
392 | int ret = 0; | |
393 | ||
394 | if (!mode) { | |
395 | DRM_ERROR("NULL input\n"); | |
396 | return -EINVAL; | |
397 | } | |
398 | ||
399 | /* Read Status: i2c over aux */ | |
400 | ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_LSPCON_CURRENT_MODE, | |
401 | &data, sizeof(data)); | |
402 | if (ret < 0) { | |
403 | DRM_ERROR("LSPCON read(0x80, 0x41) failed\n"); | |
404 | return -EFAULT; | |
405 | } | |
406 | ||
407 | if (data & DP_DUAL_MODE_LSPCON_MODE_PCON) | |
408 | *mode = DRM_LSPCON_MODE_PCON; | |
409 | else | |
410 | *mode = DRM_LSPCON_MODE_LS; | |
411 | return 0; | |
412 | } | |
413 | EXPORT_SYMBOL(drm_lspcon_get_mode); | |
414 | ||
415 | /** | |
613a3081 JN |
416 | * drm_lspcon_set_mode: Change LSPCON's mode of operation by |
417 | * writing offset (0x80, 0x40) | |
418 | * @adapter: I2C-over-aux adapter | |
419 | * @mode: required mode of operation | |
056996b9 SS |
420 | * |
421 | * Returns: | |
422 | * 0 on success, -error on failure/timeout | |
423 | */ | |
424 | int drm_lspcon_set_mode(struct i2c_adapter *adapter, | |
425 | enum drm_lspcon_mode mode) | |
426 | { | |
427 | u8 data = 0; | |
428 | int ret; | |
429 | int time_out = 200; | |
430 | enum drm_lspcon_mode current_mode; | |
431 | ||
432 | if (mode == DRM_LSPCON_MODE_PCON) | |
433 | data = DP_DUAL_MODE_LSPCON_MODE_PCON; | |
434 | ||
435 | /* Change mode */ | |
436 | ret = drm_dp_dual_mode_write(adapter, DP_DUAL_MODE_LSPCON_MODE_CHANGE, | |
437 | &data, sizeof(data)); | |
438 | if (ret < 0) { | |
439 | DRM_ERROR("LSPCON mode change failed\n"); | |
440 | return ret; | |
441 | } | |
442 | ||
443 | /* | |
444 | * Confirm mode change by reading the status bit. | |
445 | * Sometimes, it takes a while to change the mode, | |
446 | * so wait and retry until time out or done. | |
447 | */ | |
448 | do { | |
449 | ret = drm_lspcon_get_mode(adapter, ¤t_mode); | |
450 | if (ret) { | |
451 | DRM_ERROR("can't confirm LSPCON mode change\n"); | |
452 | return ret; | |
453 | } else { | |
454 | if (current_mode != mode) { | |
455 | msleep(10); | |
456 | time_out -= 10; | |
457 | } else { | |
458 | DRM_DEBUG_KMS("LSPCON mode changed to %s\n", | |
459 | mode == DRM_LSPCON_MODE_LS ? | |
460 | "LS" : "PCON"); | |
461 | return 0; | |
462 | } | |
463 | } | |
464 | } while (time_out); | |
465 | ||
466 | DRM_ERROR("LSPCON mode change timed out\n"); | |
467 | return -ETIMEDOUT; | |
468 | } | |
469 | EXPORT_SYMBOL(drm_lspcon_set_mode); |