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72fdb40c DV |
1 | /* |
2 | * Copyright (C) 2014 Red Hat | |
3 | * Copyright (C) 2014 Intel Corp. | |
4 | * Copyright (C) 2018 Intel Corp. | |
a4324a7a | 5 | * Copyright (c) 2020, The Linux Foundation. All rights reserved. |
72fdb40c DV |
6 | * |
7 | * Permission is hereby granted, free of charge, to any person obtaining a | |
8 | * copy of this software and associated documentation files (the "Software"), | |
9 | * to deal in the Software without restriction, including without limitation | |
10 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
11 | * and/or sell copies of the Software, and to permit persons to whom the | |
12 | * Software is furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
21 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
22 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
23 | * OTHER DEALINGS IN THE SOFTWARE. | |
24 | * | |
25 | * Authors: | |
26 | * Rob Clark <robdclark@gmail.com> | |
27 | * Daniel Vetter <daniel.vetter@ffwll.ch> | |
28 | */ | |
29 | ||
30 | #include <drm/drm_atomic_uapi.h> | |
31 | #include <drm/drm_atomic.h> | |
32 | #include <drm/drm_print.h> | |
33 | #include <drm/drm_drv.h> | |
34 | #include <drm/drm_writeback.h> | |
35 | #include <drm/drm_vblank.h> | |
36 | ||
37 | #include <linux/dma-fence.h> | |
38 | #include <linux/uaccess.h> | |
39 | #include <linux/sync_file.h> | |
40 | #include <linux/file.h> | |
41 | ||
42 | #include "drm_crtc_internal.h" | |
43 | ||
44 | /** | |
45 | * DOC: overview | |
46 | * | |
47 | * This file contains the marshalling and demarshalling glue for the atomic UAPI | |
1e55a53a MR |
48 | * in all its forms: The monster ATOMIC IOCTL itself, code for GET_PROPERTY and |
49 | * SET_PROPERTY IOCTLs. Plus interface functions for compatibility helpers and | |
72fdb40c | 50 | * drivers which have special needs to construct their own atomic updates, e.g. |
0ae865ef | 51 | * for load detect or similar. |
72fdb40c DV |
52 | */ |
53 | ||
54 | /** | |
55 | * drm_atomic_set_mode_for_crtc - set mode for CRTC | |
56 | * @state: the CRTC whose incoming state to update | |
57 | * @mode: kernel-internal mode to use for the CRTC, or NULL to disable | |
58 | * | |
59 | * Set a mode (originating from the kernel) on the desired CRTC state and update | |
60 | * the enable property. | |
61 | * | |
62 | * RETURNS: | |
63 | * Zero on success, error code on failure. Cannot return -EDEADLK. | |
64 | */ | |
65 | int drm_atomic_set_mode_for_crtc(struct drm_crtc_state *state, | |
66 | const struct drm_display_mode *mode) | |
67 | { | |
68 | struct drm_crtc *crtc = state->crtc; | |
69 | struct drm_mode_modeinfo umode; | |
70 | ||
71 | /* Early return for no change. */ | |
72 | if (mode && memcmp(&state->mode, mode, sizeof(*mode)) == 0) | |
73 | return 0; | |
74 | ||
75 | drm_property_blob_put(state->mode_blob); | |
76 | state->mode_blob = NULL; | |
77 | ||
78 | if (mode) { | |
439cf34c VS |
79 | struct drm_property_blob *blob; |
80 | ||
72fdb40c | 81 | drm_mode_convert_to_umode(&umode, mode); |
439cf34c VS |
82 | blob = drm_property_create_blob(crtc->dev, |
83 | sizeof(umode), &umode); | |
84 | if (IS_ERR(blob)) | |
85 | return PTR_ERR(blob); | |
72fdb40c DV |
86 | |
87 | drm_mode_copy(&state->mode, mode); | |
439cf34c VS |
88 | |
89 | state->mode_blob = blob; | |
72fdb40c | 90 | state->enable = true; |
e3aae683 SS |
91 | drm_dbg_atomic(crtc->dev, |
92 | "Set [MODE:%s] for [CRTC:%d:%s] state %p\n", | |
93 | mode->name, crtc->base.id, crtc->name, state); | |
72fdb40c DV |
94 | } else { |
95 | memset(&state->mode, 0, sizeof(state->mode)); | |
96 | state->enable = false; | |
e3aae683 SS |
97 | drm_dbg_atomic(crtc->dev, |
98 | "Set [NOMODE] for [CRTC:%d:%s] state %p\n", | |
99 | crtc->base.id, crtc->name, state); | |
72fdb40c DV |
100 | } |
101 | ||
102 | return 0; | |
103 | } | |
104 | EXPORT_SYMBOL(drm_atomic_set_mode_for_crtc); | |
105 | ||
106 | /** | |
107 | * drm_atomic_set_mode_prop_for_crtc - set mode for CRTC | |
108 | * @state: the CRTC whose incoming state to update | |
109 | * @blob: pointer to blob property to use for mode | |
110 | * | |
111 | * Set a mode (originating from a blob property) on the desired CRTC state. | |
112 | * This function will take a reference on the blob property for the CRTC state, | |
113 | * and release the reference held on the state's existing mode property, if any | |
114 | * was set. | |
115 | * | |
116 | * RETURNS: | |
117 | * Zero on success, error code on failure. Cannot return -EDEADLK. | |
118 | */ | |
119 | int drm_atomic_set_mode_prop_for_crtc(struct drm_crtc_state *state, | |
e8b05876 | 120 | struct drm_property_blob *blob) |
72fdb40c DV |
121 | { |
122 | struct drm_crtc *crtc = state->crtc; | |
123 | ||
124 | if (blob == state->mode_blob) | |
125 | return 0; | |
126 | ||
127 | drm_property_blob_put(state->mode_blob); | |
128 | state->mode_blob = NULL; | |
129 | ||
130 | memset(&state->mode, 0, sizeof(state->mode)); | |
131 | ||
132 | if (blob) { | |
133 | int ret; | |
134 | ||
135 | if (blob->length != sizeof(struct drm_mode_modeinfo)) { | |
e3aae683 SS |
136 | drm_dbg_atomic(crtc->dev, |
137 | "[CRTC:%d:%s] bad mode blob length: %zu\n", | |
138 | crtc->base.id, crtc->name, | |
139 | blob->length); | |
72fdb40c DV |
140 | return -EINVAL; |
141 | } | |
142 | ||
143 | ret = drm_mode_convert_umode(crtc->dev, | |
144 | &state->mode, blob->data); | |
145 | if (ret) { | |
e3aae683 SS |
146 | drm_dbg_atomic(crtc->dev, |
147 | "[CRTC:%d:%s] invalid mode (ret=%d, status=%s):\n", | |
148 | crtc->base.id, crtc->name, | |
149 | ret, drm_get_mode_status_name(state->mode.status)); | |
72fdb40c DV |
150 | drm_mode_debug_printmodeline(&state->mode); |
151 | return -EINVAL; | |
152 | } | |
153 | ||
154 | state->mode_blob = drm_property_blob_get(blob); | |
155 | state->enable = true; | |
e3aae683 SS |
156 | drm_dbg_atomic(crtc->dev, |
157 | "Set [MODE:%s] for [CRTC:%d:%s] state %p\n", | |
158 | state->mode.name, crtc->base.id, crtc->name, | |
159 | state); | |
72fdb40c DV |
160 | } else { |
161 | state->enable = false; | |
e3aae683 SS |
162 | drm_dbg_atomic(crtc->dev, |
163 | "Set [NOMODE] for [CRTC:%d:%s] state %p\n", | |
164 | crtc->base.id, crtc->name, state); | |
72fdb40c DV |
165 | } |
166 | ||
167 | return 0; | |
168 | } | |
169 | EXPORT_SYMBOL(drm_atomic_set_mode_prop_for_crtc); | |
170 | ||
171 | /** | |
42240c90 | 172 | * drm_atomic_set_crtc_for_plane - set CRTC for plane |
72fdb40c | 173 | * @plane_state: the plane whose incoming state to update |
42240c90 | 174 | * @crtc: CRTC to use for the plane |
72fdb40c | 175 | * |
42240c90 TR |
176 | * Changing the assigned CRTC for a plane requires us to grab the lock and state |
177 | * for the new CRTC, as needed. This function takes care of all these details | |
72fdb40c DV |
178 | * besides updating the pointer in the state object itself. |
179 | * | |
180 | * Returns: | |
181 | * 0 on success or can fail with -EDEADLK or -ENOMEM. When the error is EDEADLK | |
182 | * then the w/w mutex code has detected a deadlock and the entire atomic | |
183 | * sequence must be restarted. All other errors are fatal. | |
184 | */ | |
185 | int | |
186 | drm_atomic_set_crtc_for_plane(struct drm_plane_state *plane_state, | |
187 | struct drm_crtc *crtc) | |
188 | { | |
189 | struct drm_plane *plane = plane_state->plane; | |
190 | struct drm_crtc_state *crtc_state; | |
191 | /* Nothing to do for same crtc*/ | |
192 | if (plane_state->crtc == crtc) | |
193 | return 0; | |
194 | if (plane_state->crtc) { | |
195 | crtc_state = drm_atomic_get_crtc_state(plane_state->state, | |
196 | plane_state->crtc); | |
197 | if (WARN_ON(IS_ERR(crtc_state))) | |
198 | return PTR_ERR(crtc_state); | |
199 | ||
200 | crtc_state->plane_mask &= ~drm_plane_mask(plane); | |
201 | } | |
202 | ||
203 | plane_state->crtc = crtc; | |
204 | ||
205 | if (crtc) { | |
206 | crtc_state = drm_atomic_get_crtc_state(plane_state->state, | |
207 | crtc); | |
208 | if (IS_ERR(crtc_state)) | |
209 | return PTR_ERR(crtc_state); | |
210 | crtc_state->plane_mask |= drm_plane_mask(plane); | |
211 | } | |
212 | ||
213 | if (crtc) | |
e3aae683 SS |
214 | drm_dbg_atomic(plane->dev, |
215 | "Link [PLANE:%d:%s] state %p to [CRTC:%d:%s]\n", | |
216 | plane->base.id, plane->name, plane_state, | |
217 | crtc->base.id, crtc->name); | |
72fdb40c | 218 | else |
e3aae683 SS |
219 | drm_dbg_atomic(plane->dev, |
220 | "Link [PLANE:%d:%s] state %p to [NOCRTC]\n", | |
221 | plane->base.id, plane->name, plane_state); | |
72fdb40c DV |
222 | |
223 | return 0; | |
224 | } | |
225 | EXPORT_SYMBOL(drm_atomic_set_crtc_for_plane); | |
226 | ||
227 | /** | |
228 | * drm_atomic_set_fb_for_plane - set framebuffer for plane | |
229 | * @plane_state: atomic state object for the plane | |
230 | * @fb: fb to use for the plane | |
231 | * | |
232 | * Changing the assigned framebuffer for a plane requires us to grab a reference | |
233 | * to the new fb and drop the reference to the old fb, if there is one. This | |
234 | * function takes care of all these details besides updating the pointer in the | |
235 | * state object itself. | |
236 | */ | |
237 | void | |
238 | drm_atomic_set_fb_for_plane(struct drm_plane_state *plane_state, | |
239 | struct drm_framebuffer *fb) | |
240 | { | |
241 | struct drm_plane *plane = plane_state->plane; | |
242 | ||
243 | if (fb) | |
e3aae683 SS |
244 | drm_dbg_atomic(plane->dev, |
245 | "Set [FB:%d] for [PLANE:%d:%s] state %p\n", | |
246 | fb->base.id, plane->base.id, plane->name, | |
247 | plane_state); | |
72fdb40c | 248 | else |
e3aae683 SS |
249 | drm_dbg_atomic(plane->dev, |
250 | "Set [NOFB] for [PLANE:%d:%s] state %p\n", | |
251 | plane->base.id, plane->name, plane_state); | |
72fdb40c DV |
252 | |
253 | drm_framebuffer_assign(&plane_state->fb, fb); | |
254 | } | |
255 | EXPORT_SYMBOL(drm_atomic_set_fb_for_plane); | |
256 | ||
257 | /** | |
258 | * drm_atomic_set_fence_for_plane - set fence for plane | |
259 | * @plane_state: atomic state object for the plane | |
260 | * @fence: dma_fence to use for the plane | |
261 | * | |
262 | * Helper to setup the plane_state fence in case it is not set yet. | |
263 | * By using this drivers doesn't need to worry if the user choose | |
264 | * implicit or explicit fencing. | |
265 | * | |
266 | * This function will not set the fence to the state if it was set | |
267 | * via explicit fencing interfaces on the atomic ioctl. In that case it will | |
268 | * drop the reference to the fence as we are not storing it anywhere. | |
269 | * Otherwise, if &drm_plane_state.fence is not set this function we just set it | |
270 | * with the received implicit fence. In both cases this function consumes a | |
271 | * reference for @fence. | |
272 | * | |
273 | * This way explicit fencing can be used to overrule implicit fencing, which is | |
274 | * important to make explicit fencing use-cases work: One example is using one | |
275 | * buffer for 2 screens with different refresh rates. Implicit fencing will | |
276 | * clamp rendering to the refresh rate of the slower screen, whereas explicit | |
277 | * fence allows 2 independent render and display loops on a single buffer. If a | |
278 | * driver allows obeys both implicit and explicit fences for plane updates, then | |
279 | * it will break all the benefits of explicit fencing. | |
280 | */ | |
281 | void | |
282 | drm_atomic_set_fence_for_plane(struct drm_plane_state *plane_state, | |
283 | struct dma_fence *fence) | |
284 | { | |
285 | if (plane_state->fence) { | |
286 | dma_fence_put(fence); | |
287 | return; | |
288 | } | |
289 | ||
290 | plane_state->fence = fence; | |
291 | } | |
292 | EXPORT_SYMBOL(drm_atomic_set_fence_for_plane); | |
293 | ||
294 | /** | |
42240c90 | 295 | * drm_atomic_set_crtc_for_connector - set CRTC for connector |
72fdb40c | 296 | * @conn_state: atomic state object for the connector |
42240c90 | 297 | * @crtc: CRTC to use for the connector |
72fdb40c | 298 | * |
42240c90 TR |
299 | * Changing the assigned CRTC for a connector requires us to grab the lock and |
300 | * state for the new CRTC, as needed. This function takes care of all these | |
72fdb40c DV |
301 | * details besides updating the pointer in the state object itself. |
302 | * | |
303 | * Returns: | |
304 | * 0 on success or can fail with -EDEADLK or -ENOMEM. When the error is EDEADLK | |
305 | * then the w/w mutex code has detected a deadlock and the entire atomic | |
306 | * sequence must be restarted. All other errors are fatal. | |
307 | */ | |
308 | int | |
309 | drm_atomic_set_crtc_for_connector(struct drm_connector_state *conn_state, | |
310 | struct drm_crtc *crtc) | |
311 | { | |
312 | struct drm_connector *connector = conn_state->connector; | |
313 | struct drm_crtc_state *crtc_state; | |
314 | ||
315 | if (conn_state->crtc == crtc) | |
316 | return 0; | |
317 | ||
318 | if (conn_state->crtc) { | |
319 | crtc_state = drm_atomic_get_new_crtc_state(conn_state->state, | |
320 | conn_state->crtc); | |
321 | ||
322 | crtc_state->connector_mask &= | |
323 | ~drm_connector_mask(conn_state->connector); | |
324 | ||
325 | drm_connector_put(conn_state->connector); | |
326 | conn_state->crtc = NULL; | |
327 | } | |
328 | ||
329 | if (crtc) { | |
330 | crtc_state = drm_atomic_get_crtc_state(conn_state->state, crtc); | |
331 | if (IS_ERR(crtc_state)) | |
332 | return PTR_ERR(crtc_state); | |
333 | ||
334 | crtc_state->connector_mask |= | |
335 | drm_connector_mask(conn_state->connector); | |
336 | ||
337 | drm_connector_get(conn_state->connector); | |
338 | conn_state->crtc = crtc; | |
339 | ||
0003b687 | 340 | drm_dbg_atomic(connector->dev, |
e3aae683 SS |
341 | "Link [CONNECTOR:%d:%s] state %p to [CRTC:%d:%s]\n", |
342 | connector->base.id, connector->name, | |
343 | conn_state, crtc->base.id, crtc->name); | |
72fdb40c | 344 | } else { |
0003b687 | 345 | drm_dbg_atomic(connector->dev, |
e3aae683 SS |
346 | "Link [CONNECTOR:%d:%s] state %p to [NOCRTC]\n", |
347 | connector->base.id, connector->name, | |
348 | conn_state); | |
72fdb40c DV |
349 | } |
350 | ||
351 | return 0; | |
352 | } | |
353 | EXPORT_SYMBOL(drm_atomic_set_crtc_for_connector); | |
354 | ||
355 | static void set_out_fence_for_crtc(struct drm_atomic_state *state, | |
356 | struct drm_crtc *crtc, s32 __user *fence_ptr) | |
357 | { | |
358 | state->crtcs[drm_crtc_index(crtc)].out_fence_ptr = fence_ptr; | |
359 | } | |
360 | ||
361 | static s32 __user *get_out_fence_for_crtc(struct drm_atomic_state *state, | |
362 | struct drm_crtc *crtc) | |
363 | { | |
364 | s32 __user *fence_ptr; | |
365 | ||
366 | fence_ptr = state->crtcs[drm_crtc_index(crtc)].out_fence_ptr; | |
367 | state->crtcs[drm_crtc_index(crtc)].out_fence_ptr = NULL; | |
368 | ||
369 | return fence_ptr; | |
370 | } | |
371 | ||
372 | static int set_out_fence_for_connector(struct drm_atomic_state *state, | |
373 | struct drm_connector *connector, | |
374 | s32 __user *fence_ptr) | |
375 | { | |
376 | unsigned int index = drm_connector_index(connector); | |
377 | ||
378 | if (!fence_ptr) | |
379 | return 0; | |
380 | ||
381 | if (put_user(-1, fence_ptr)) | |
382 | return -EFAULT; | |
383 | ||
384 | state->connectors[index].out_fence_ptr = fence_ptr; | |
385 | ||
386 | return 0; | |
387 | } | |
388 | ||
389 | static s32 __user *get_out_fence_for_connector(struct drm_atomic_state *state, | |
390 | struct drm_connector *connector) | |
391 | { | |
392 | unsigned int index = drm_connector_index(connector); | |
393 | s32 __user *fence_ptr; | |
394 | ||
395 | fence_ptr = state->connectors[index].out_fence_ptr; | |
396 | state->connectors[index].out_fence_ptr = NULL; | |
397 | ||
398 | return fence_ptr; | |
399 | } | |
400 | ||
401 | static int | |
402 | drm_atomic_replace_property_blob_from_id(struct drm_device *dev, | |
403 | struct drm_property_blob **blob, | |
404 | uint64_t blob_id, | |
405 | ssize_t expected_size, | |
406 | ssize_t expected_elem_size, | |
407 | bool *replaced) | |
408 | { | |
409 | struct drm_property_blob *new_blob = NULL; | |
410 | ||
411 | if (blob_id != 0) { | |
412 | new_blob = drm_property_lookup_blob(dev, blob_id); | |
413 | if (new_blob == NULL) | |
414 | return -EINVAL; | |
415 | ||
416 | if (expected_size > 0 && | |
417 | new_blob->length != expected_size) { | |
418 | drm_property_blob_put(new_blob); | |
419 | return -EINVAL; | |
420 | } | |
421 | if (expected_elem_size > 0 && | |
422 | new_blob->length % expected_elem_size != 0) { | |
423 | drm_property_blob_put(new_blob); | |
424 | return -EINVAL; | |
425 | } | |
426 | } | |
427 | ||
428 | *replaced |= drm_property_replace_blob(blob, new_blob); | |
429 | drm_property_blob_put(new_blob); | |
430 | ||
431 | return 0; | |
432 | } | |
433 | ||
434 | static int drm_atomic_crtc_set_property(struct drm_crtc *crtc, | |
435 | struct drm_crtc_state *state, struct drm_property *property, | |
436 | uint64_t val) | |
437 | { | |
438 | struct drm_device *dev = crtc->dev; | |
439 | struct drm_mode_config *config = &dev->mode_config; | |
440 | bool replaced = false; | |
441 | int ret; | |
442 | ||
443 | if (property == config->prop_active) | |
444 | state->active = val; | |
445 | else if (property == config->prop_mode_id) { | |
446 | struct drm_property_blob *mode = | |
447 | drm_property_lookup_blob(dev, val); | |
448 | ret = drm_atomic_set_mode_prop_for_crtc(state, mode); | |
449 | drm_property_blob_put(mode); | |
450 | return ret; | |
1398958c NK |
451 | } else if (property == config->prop_vrr_enabled) { |
452 | state->vrr_enabled = val; | |
72fdb40c DV |
453 | } else if (property == config->degamma_lut_property) { |
454 | ret = drm_atomic_replace_property_blob_from_id(dev, | |
455 | &state->degamma_lut, | |
456 | val, | |
457 | -1, sizeof(struct drm_color_lut), | |
458 | &replaced); | |
459 | state->color_mgmt_changed |= replaced; | |
460 | return ret; | |
461 | } else if (property == config->ctm_property) { | |
462 | ret = drm_atomic_replace_property_blob_from_id(dev, | |
463 | &state->ctm, | |
464 | val, | |
465 | sizeof(struct drm_color_ctm), -1, | |
466 | &replaced); | |
467 | state->color_mgmt_changed |= replaced; | |
468 | return ret; | |
469 | } else if (property == config->gamma_lut_property) { | |
470 | ret = drm_atomic_replace_property_blob_from_id(dev, | |
471 | &state->gamma_lut, | |
472 | val, | |
473 | -1, sizeof(struct drm_color_lut), | |
474 | &replaced); | |
475 | state->color_mgmt_changed |= replaced; | |
476 | return ret; | |
477 | } else if (property == config->prop_out_fence_ptr) { | |
478 | s32 __user *fence_ptr = u64_to_user_ptr(val); | |
479 | ||
480 | if (!fence_ptr) | |
481 | return 0; | |
482 | ||
483 | if (put_user(-1, fence_ptr)) | |
484 | return -EFAULT; | |
485 | ||
486 | set_out_fence_for_crtc(state->state, crtc, fence_ptr); | |
5c759eda PB |
487 | } else if (property == crtc->scaling_filter_property) { |
488 | state->scaling_filter = val; | |
72fdb40c DV |
489 | } else if (crtc->funcs->atomic_set_property) { |
490 | return crtc->funcs->atomic_set_property(crtc, state, property, val); | |
491 | } else { | |
e3aae683 SS |
492 | drm_dbg_atomic(crtc->dev, |
493 | "[CRTC:%d:%s] unknown property [PROP:%d:%s]]\n", | |
494 | crtc->base.id, crtc->name, | |
495 | property->base.id, property->name); | |
72fdb40c DV |
496 | return -EINVAL; |
497 | } | |
498 | ||
499 | return 0; | |
500 | } | |
501 | ||
502 | static int | |
503 | drm_atomic_crtc_get_property(struct drm_crtc *crtc, | |
504 | const struct drm_crtc_state *state, | |
505 | struct drm_property *property, uint64_t *val) | |
506 | { | |
507 | struct drm_device *dev = crtc->dev; | |
508 | struct drm_mode_config *config = &dev->mode_config; | |
509 | ||
510 | if (property == config->prop_active) | |
1452c25b | 511 | *val = drm_atomic_crtc_effectively_active(state); |
72fdb40c DV |
512 | else if (property == config->prop_mode_id) |
513 | *val = (state->mode_blob) ? state->mode_blob->base.id : 0; | |
1398958c NK |
514 | else if (property == config->prop_vrr_enabled) |
515 | *val = state->vrr_enabled; | |
72fdb40c DV |
516 | else if (property == config->degamma_lut_property) |
517 | *val = (state->degamma_lut) ? state->degamma_lut->base.id : 0; | |
518 | else if (property == config->ctm_property) | |
519 | *val = (state->ctm) ? state->ctm->base.id : 0; | |
520 | else if (property == config->gamma_lut_property) | |
521 | *val = (state->gamma_lut) ? state->gamma_lut->base.id : 0; | |
522 | else if (property == config->prop_out_fence_ptr) | |
523 | *val = 0; | |
5c759eda PB |
524 | else if (property == crtc->scaling_filter_property) |
525 | *val = state->scaling_filter; | |
72fdb40c DV |
526 | else if (crtc->funcs->atomic_get_property) |
527 | return crtc->funcs->atomic_get_property(crtc, state, property, val); | |
528 | else | |
529 | return -EINVAL; | |
530 | ||
531 | return 0; | |
532 | } | |
533 | ||
534 | static int drm_atomic_plane_set_property(struct drm_plane *plane, | |
36e4523a DV |
535 | struct drm_plane_state *state, struct drm_file *file_priv, |
536 | struct drm_property *property, uint64_t val) | |
72fdb40c DV |
537 | { |
538 | struct drm_device *dev = plane->dev; | |
539 | struct drm_mode_config *config = &dev->mode_config; | |
d3b21767 LS |
540 | bool replaced = false; |
541 | int ret; | |
72fdb40c DV |
542 | |
543 | if (property == config->prop_fb_id) { | |
36e4523a | 544 | struct drm_framebuffer *fb; |
948de842 | 545 | |
36e4523a | 546 | fb = drm_framebuffer_lookup(dev, file_priv, val); |
72fdb40c DV |
547 | drm_atomic_set_fb_for_plane(state, fb); |
548 | if (fb) | |
549 | drm_framebuffer_put(fb); | |
550 | } else if (property == config->prop_in_fence_fd) { | |
551 | if (state->fence) | |
552 | return -EINVAL; | |
553 | ||
554 | if (U642I64(val) == -1) | |
555 | return 0; | |
556 | ||
557 | state->fence = sync_file_get_fence(val); | |
558 | if (!state->fence) | |
559 | return -EINVAL; | |
560 | ||
561 | } else if (property == config->prop_crtc_id) { | |
36e4523a | 562 | struct drm_crtc *crtc = drm_crtc_find(dev, file_priv, val); |
948de842 | 563 | |
b8c7d7bc DV |
564 | if (val && !crtc) |
565 | return -EACCES; | |
72fdb40c DV |
566 | return drm_atomic_set_crtc_for_plane(state, crtc); |
567 | } else if (property == config->prop_crtc_x) { | |
568 | state->crtc_x = U642I64(val); | |
569 | } else if (property == config->prop_crtc_y) { | |
570 | state->crtc_y = U642I64(val); | |
571 | } else if (property == config->prop_crtc_w) { | |
572 | state->crtc_w = val; | |
573 | } else if (property == config->prop_crtc_h) { | |
574 | state->crtc_h = val; | |
575 | } else if (property == config->prop_src_x) { | |
576 | state->src_x = val; | |
577 | } else if (property == config->prop_src_y) { | |
578 | state->src_y = val; | |
579 | } else if (property == config->prop_src_w) { | |
580 | state->src_w = val; | |
581 | } else if (property == config->prop_src_h) { | |
582 | state->src_h = val; | |
583 | } else if (property == plane->alpha_property) { | |
584 | state->alpha = val; | |
585 | } else if (property == plane->blend_mode_property) { | |
586 | state->pixel_blend_mode = val; | |
587 | } else if (property == plane->rotation_property) { | |
588 | if (!is_power_of_2(val & DRM_MODE_ROTATE_MASK)) { | |
e3aae683 SS |
589 | drm_dbg_atomic(plane->dev, |
590 | "[PLANE:%d:%s] bad rotation bitmask: 0x%llx\n", | |
591 | plane->base.id, plane->name, val); | |
72fdb40c DV |
592 | return -EINVAL; |
593 | } | |
594 | state->rotation = val; | |
595 | } else if (property == plane->zpos_property) { | |
596 | state->zpos = val; | |
597 | } else if (property == plane->color_encoding_property) { | |
598 | state->color_encoding = val; | |
599 | } else if (property == plane->color_range_property) { | |
600 | state->color_range = val; | |
d3b21767 LS |
601 | } else if (property == config->prop_fb_damage_clips) { |
602 | ret = drm_atomic_replace_property_blob_from_id(dev, | |
603 | &state->fb_damage_clips, | |
604 | val, | |
605 | -1, | |
606 | sizeof(struct drm_rect), | |
607 | &replaced); | |
608 | return ret; | |
5c759eda PB |
609 | } else if (property == plane->scaling_filter_property) { |
610 | state->scaling_filter = val; | |
72fdb40c DV |
611 | } else if (plane->funcs->atomic_set_property) { |
612 | return plane->funcs->atomic_set_property(plane, state, | |
613 | property, val); | |
614 | } else { | |
e3aae683 SS |
615 | drm_dbg_atomic(plane->dev, |
616 | "[PLANE:%d:%s] unknown property [PROP:%d:%s]]\n", | |
617 | plane->base.id, plane->name, | |
618 | property->base.id, property->name); | |
72fdb40c DV |
619 | return -EINVAL; |
620 | } | |
621 | ||
622 | return 0; | |
623 | } | |
624 | ||
625 | static int | |
626 | drm_atomic_plane_get_property(struct drm_plane *plane, | |
627 | const struct drm_plane_state *state, | |
628 | struct drm_property *property, uint64_t *val) | |
629 | { | |
630 | struct drm_device *dev = plane->dev; | |
631 | struct drm_mode_config *config = &dev->mode_config; | |
632 | ||
633 | if (property == config->prop_fb_id) { | |
634 | *val = (state->fb) ? state->fb->base.id : 0; | |
635 | } else if (property == config->prop_in_fence_fd) { | |
636 | *val = -1; | |
637 | } else if (property == config->prop_crtc_id) { | |
638 | *val = (state->crtc) ? state->crtc->base.id : 0; | |
639 | } else if (property == config->prop_crtc_x) { | |
640 | *val = I642U64(state->crtc_x); | |
641 | } else if (property == config->prop_crtc_y) { | |
642 | *val = I642U64(state->crtc_y); | |
643 | } else if (property == config->prop_crtc_w) { | |
644 | *val = state->crtc_w; | |
645 | } else if (property == config->prop_crtc_h) { | |
646 | *val = state->crtc_h; | |
647 | } else if (property == config->prop_src_x) { | |
648 | *val = state->src_x; | |
649 | } else if (property == config->prop_src_y) { | |
650 | *val = state->src_y; | |
651 | } else if (property == config->prop_src_w) { | |
652 | *val = state->src_w; | |
653 | } else if (property == config->prop_src_h) { | |
654 | *val = state->src_h; | |
655 | } else if (property == plane->alpha_property) { | |
656 | *val = state->alpha; | |
657 | } else if (property == plane->blend_mode_property) { | |
658 | *val = state->pixel_blend_mode; | |
659 | } else if (property == plane->rotation_property) { | |
660 | *val = state->rotation; | |
661 | } else if (property == plane->zpos_property) { | |
662 | *val = state->zpos; | |
663 | } else if (property == plane->color_encoding_property) { | |
664 | *val = state->color_encoding; | |
665 | } else if (property == plane->color_range_property) { | |
666 | *val = state->color_range; | |
d3b21767 LS |
667 | } else if (property == config->prop_fb_damage_clips) { |
668 | *val = (state->fb_damage_clips) ? | |
669 | state->fb_damage_clips->base.id : 0; | |
5c759eda PB |
670 | } else if (property == plane->scaling_filter_property) { |
671 | *val = state->scaling_filter; | |
72fdb40c DV |
672 | } else if (plane->funcs->atomic_get_property) { |
673 | return plane->funcs->atomic_get_property(plane, state, property, val); | |
674 | } else { | |
675 | return -EINVAL; | |
676 | } | |
677 | ||
678 | return 0; | |
679 | } | |
680 | ||
72fdb40c DV |
681 | static int drm_atomic_set_writeback_fb_for_connector( |
682 | struct drm_connector_state *conn_state, | |
683 | struct drm_framebuffer *fb) | |
684 | { | |
9d2230dc | 685 | int ret; |
e3aae683 | 686 | struct drm_connector *conn = conn_state->connector; |
72fdb40c | 687 | |
9d2230dc LP |
688 | ret = drm_writeback_set_fb(conn_state, fb); |
689 | if (ret < 0) | |
690 | return ret; | |
72fdb40c DV |
691 | |
692 | if (fb) | |
e3aae683 SS |
693 | drm_dbg_atomic(conn->dev, |
694 | "Set [FB:%d] for connector state %p\n", | |
695 | fb->base.id, conn_state); | |
72fdb40c | 696 | else |
e3aae683 SS |
697 | drm_dbg_atomic(conn->dev, |
698 | "Set [NOFB] for connector state %p\n", | |
699 | conn_state); | |
72fdb40c DV |
700 | |
701 | return 0; | |
702 | } | |
703 | ||
704 | static int drm_atomic_connector_set_property(struct drm_connector *connector, | |
36e4523a DV |
705 | struct drm_connector_state *state, struct drm_file *file_priv, |
706 | struct drm_property *property, uint64_t val) | |
72fdb40c DV |
707 | { |
708 | struct drm_device *dev = connector->dev; | |
709 | struct drm_mode_config *config = &dev->mode_config; | |
fbb5d035 US |
710 | bool replaced = false; |
711 | int ret; | |
72fdb40c DV |
712 | |
713 | if (property == config->prop_crtc_id) { | |
36e4523a | 714 | struct drm_crtc *crtc = drm_crtc_find(dev, file_priv, val); |
948de842 | 715 | |
b8c7d7bc DV |
716 | if (val && !crtc) |
717 | return -EACCES; | |
72fdb40c DV |
718 | return drm_atomic_set_crtc_for_connector(state, crtc); |
719 | } else if (property == config->dpms_property) { | |
720 | /* setting DPMS property requires special handling, which | |
721 | * is done in legacy setprop path for us. Disallow (for | |
722 | * now?) atomic writes to DPMS property: | |
723 | */ | |
724 | return -EINVAL; | |
725 | } else if (property == config->tv_select_subconnector_property) { | |
726 | state->tv.subconnector = val; | |
727 | } else if (property == config->tv_left_margin_property) { | |
728 | state->tv.margins.left = val; | |
729 | } else if (property == config->tv_right_margin_property) { | |
730 | state->tv.margins.right = val; | |
731 | } else if (property == config->tv_top_margin_property) { | |
732 | state->tv.margins.top = val; | |
733 | } else if (property == config->tv_bottom_margin_property) { | |
734 | state->tv.margins.bottom = val; | |
735 | } else if (property == config->tv_mode_property) { | |
736 | state->tv.mode = val; | |
737 | } else if (property == config->tv_brightness_property) { | |
738 | state->tv.brightness = val; | |
739 | } else if (property == config->tv_contrast_property) { | |
740 | state->tv.contrast = val; | |
741 | } else if (property == config->tv_flicker_reduction_property) { | |
742 | state->tv.flicker_reduction = val; | |
743 | } else if (property == config->tv_overscan_property) { | |
744 | state->tv.overscan = val; | |
745 | } else if (property == config->tv_saturation_property) { | |
746 | state->tv.saturation = val; | |
747 | } else if (property == config->tv_hue_property) { | |
748 | state->tv.hue = val; | |
749 | } else if (property == config->link_status_property) { | |
750 | /* Never downgrade from GOOD to BAD on userspace's request here, | |
751 | * only hw issues can do that. | |
752 | * | |
753 | * For an atomic property the userspace doesn't need to be able | |
754 | * to understand all the properties, but needs to be able to | |
755 | * restore the state it wants on VT switch. So if the userspace | |
756 | * tries to change the link_status from GOOD to BAD, driver | |
757 | * silently rejects it and returns a 0. This prevents userspace | |
0ae865ef | 758 | * from accidentally breaking the display when it restores the |
72fdb40c DV |
759 | * state. |
760 | */ | |
761 | if (state->link_status != DRM_LINK_STATUS_GOOD) | |
762 | state->link_status = val; | |
fbb5d035 US |
763 | } else if (property == config->hdr_output_metadata_property) { |
764 | ret = drm_atomic_replace_property_blob_from_id(dev, | |
765 | &state->hdr_output_metadata, | |
766 | val, | |
767 | sizeof(struct hdr_output_metadata), -1, | |
768 | &replaced); | |
769 | return ret; | |
72fdb40c DV |
770 | } else if (property == config->aspect_ratio_property) { |
771 | state->picture_aspect_ratio = val; | |
772 | } else if (property == config->content_type_property) { | |
773 | state->content_type = val; | |
774 | } else if (property == connector->scaling_mode_property) { | |
775 | state->scaling_mode = val; | |
585b000d | 776 | } else if (property == config->content_protection_property) { |
72fdb40c | 777 | if (val == DRM_MODE_CONTENT_PROTECTION_ENABLED) { |
6e22dc35 | 778 | drm_dbg_kms(dev, "only drivers can set CP Enabled\n"); |
72fdb40c DV |
779 | return -EINVAL; |
780 | } | |
781 | state->content_protection = val; | |
7672dbba R |
782 | } else if (property == config->hdcp_content_type_property) { |
783 | state->hdcp_content_type = val; | |
d2c6a405 US |
784 | } else if (property == connector->colorspace_property) { |
785 | state->colorspace = val; | |
72fdb40c | 786 | } else if (property == config->writeback_fb_id_property) { |
36e4523a DV |
787 | struct drm_framebuffer *fb; |
788 | int ret; | |
948de842 | 789 | |
36e4523a DV |
790 | fb = drm_framebuffer_lookup(dev, file_priv, val); |
791 | ret = drm_atomic_set_writeback_fb_for_connector(state, fb); | |
72fdb40c DV |
792 | if (fb) |
793 | drm_framebuffer_put(fb); | |
794 | return ret; | |
795 | } else if (property == config->writeback_out_fence_ptr_property) { | |
796 | s32 __user *fence_ptr = u64_to_user_ptr(val); | |
797 | ||
798 | return set_out_fence_for_connector(state->state, connector, | |
799 | fence_ptr); | |
47e22ff1 RS |
800 | } else if (property == connector->max_bpc_property) { |
801 | state->max_requested_bpc = val; | |
107fe904 RJ |
802 | } else if (property == connector->privacy_screen_sw_state_property) { |
803 | state->privacy_screen_sw_state = val; | |
72fdb40c DV |
804 | } else if (connector->funcs->atomic_set_property) { |
805 | return connector->funcs->atomic_set_property(connector, | |
806 | state, property, val); | |
807 | } else { | |
e3aae683 SS |
808 | drm_dbg_atomic(connector->dev, |
809 | "[CONNECTOR:%d:%s] unknown property [PROP:%d:%s]]\n", | |
810 | connector->base.id, connector->name, | |
811 | property->base.id, property->name); | |
72fdb40c DV |
812 | return -EINVAL; |
813 | } | |
814 | ||
815 | return 0; | |
816 | } | |
817 | ||
818 | static int | |
819 | drm_atomic_connector_get_property(struct drm_connector *connector, | |
820 | const struct drm_connector_state *state, | |
821 | struct drm_property *property, uint64_t *val) | |
822 | { | |
823 | struct drm_device *dev = connector->dev; | |
824 | struct drm_mode_config *config = &dev->mode_config; | |
825 | ||
826 | if (property == config->prop_crtc_id) { | |
827 | *val = (state->crtc) ? state->crtc->base.id : 0; | |
828 | } else if (property == config->dpms_property) { | |
1452c25b SP |
829 | if (state->crtc && state->crtc->state->self_refresh_active) |
830 | *val = DRM_MODE_DPMS_ON; | |
831 | else | |
832 | *val = connector->dpms; | |
72fdb40c DV |
833 | } else if (property == config->tv_select_subconnector_property) { |
834 | *val = state->tv.subconnector; | |
835 | } else if (property == config->tv_left_margin_property) { | |
836 | *val = state->tv.margins.left; | |
837 | } else if (property == config->tv_right_margin_property) { | |
838 | *val = state->tv.margins.right; | |
839 | } else if (property == config->tv_top_margin_property) { | |
840 | *val = state->tv.margins.top; | |
841 | } else if (property == config->tv_bottom_margin_property) { | |
842 | *val = state->tv.margins.bottom; | |
843 | } else if (property == config->tv_mode_property) { | |
844 | *val = state->tv.mode; | |
845 | } else if (property == config->tv_brightness_property) { | |
846 | *val = state->tv.brightness; | |
847 | } else if (property == config->tv_contrast_property) { | |
848 | *val = state->tv.contrast; | |
849 | } else if (property == config->tv_flicker_reduction_property) { | |
850 | *val = state->tv.flicker_reduction; | |
851 | } else if (property == config->tv_overscan_property) { | |
852 | *val = state->tv.overscan; | |
853 | } else if (property == config->tv_saturation_property) { | |
854 | *val = state->tv.saturation; | |
855 | } else if (property == config->tv_hue_property) { | |
856 | *val = state->tv.hue; | |
857 | } else if (property == config->link_status_property) { | |
858 | *val = state->link_status; | |
859 | } else if (property == config->aspect_ratio_property) { | |
860 | *val = state->picture_aspect_ratio; | |
861 | } else if (property == config->content_type_property) { | |
862 | *val = state->content_type; | |
d2c6a405 US |
863 | } else if (property == connector->colorspace_property) { |
864 | *val = state->colorspace; | |
72fdb40c DV |
865 | } else if (property == connector->scaling_mode_property) { |
866 | *val = state->scaling_mode; | |
fbb5d035 US |
867 | } else if (property == config->hdr_output_metadata_property) { |
868 | *val = state->hdr_output_metadata ? | |
869 | state->hdr_output_metadata->base.id : 0; | |
585b000d | 870 | } else if (property == config->content_protection_property) { |
72fdb40c | 871 | *val = state->content_protection; |
7672dbba R |
872 | } else if (property == config->hdcp_content_type_property) { |
873 | *val = state->hdcp_content_type; | |
72fdb40c DV |
874 | } else if (property == config->writeback_fb_id_property) { |
875 | /* Writeback framebuffer is one-shot, write and forget */ | |
876 | *val = 0; | |
877 | } else if (property == config->writeback_out_fence_ptr_property) { | |
878 | *val = 0; | |
47e22ff1 RS |
879 | } else if (property == connector->max_bpc_property) { |
880 | *val = state->max_requested_bpc; | |
107fe904 RJ |
881 | } else if (property == connector->privacy_screen_sw_state_property) { |
882 | *val = state->privacy_screen_sw_state; | |
72fdb40c DV |
883 | } else if (connector->funcs->atomic_get_property) { |
884 | return connector->funcs->atomic_get_property(connector, | |
885 | state, property, val); | |
886 | } else { | |
887 | return -EINVAL; | |
888 | } | |
889 | ||
890 | return 0; | |
891 | } | |
892 | ||
893 | int drm_atomic_get_property(struct drm_mode_object *obj, | |
894 | struct drm_property *property, uint64_t *val) | |
895 | { | |
896 | struct drm_device *dev = property->dev; | |
897 | int ret; | |
898 | ||
899 | switch (obj->type) { | |
900 | case DRM_MODE_OBJECT_CONNECTOR: { | |
901 | struct drm_connector *connector = obj_to_connector(obj); | |
948de842 | 902 | |
72fdb40c DV |
903 | WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)); |
904 | ret = drm_atomic_connector_get_property(connector, | |
905 | connector->state, property, val); | |
906 | break; | |
907 | } | |
908 | case DRM_MODE_OBJECT_CRTC: { | |
909 | struct drm_crtc *crtc = obj_to_crtc(obj); | |
948de842 | 910 | |
72fdb40c DV |
911 | WARN_ON(!drm_modeset_is_locked(&crtc->mutex)); |
912 | ret = drm_atomic_crtc_get_property(crtc, | |
913 | crtc->state, property, val); | |
914 | break; | |
915 | } | |
916 | case DRM_MODE_OBJECT_PLANE: { | |
917 | struct drm_plane *plane = obj_to_plane(obj); | |
948de842 | 918 | |
72fdb40c DV |
919 | WARN_ON(!drm_modeset_is_locked(&plane->mutex)); |
920 | ret = drm_atomic_plane_get_property(plane, | |
921 | plane->state, property, val); | |
922 | break; | |
923 | } | |
924 | default: | |
925 | ret = -EINVAL; | |
926 | break; | |
927 | } | |
928 | ||
929 | return ret; | |
930 | } | |
931 | ||
932 | /* | |
933 | * The big monster ioctl | |
934 | */ | |
935 | ||
936 | static struct drm_pending_vblank_event *create_vblank_event( | |
937 | struct drm_crtc *crtc, uint64_t user_data) | |
938 | { | |
939 | struct drm_pending_vblank_event *e = NULL; | |
940 | ||
941 | e = kzalloc(sizeof *e, GFP_KERNEL); | |
942 | if (!e) | |
943 | return NULL; | |
944 | ||
945 | e->event.base.type = DRM_EVENT_FLIP_COMPLETE; | |
946 | e->event.base.length = sizeof(e->event); | |
947 | e->event.vbl.crtc_id = crtc->base.id; | |
948 | e->event.vbl.user_data = user_data; | |
949 | ||
950 | return e; | |
951 | } | |
952 | ||
953 | int drm_atomic_connector_commit_dpms(struct drm_atomic_state *state, | |
954 | struct drm_connector *connector, | |
955 | int mode) | |
956 | { | |
957 | struct drm_connector *tmp_connector; | |
958 | struct drm_connector_state *new_conn_state; | |
959 | struct drm_crtc *crtc; | |
960 | struct drm_crtc_state *crtc_state; | |
961 | int i, ret, old_mode = connector->dpms; | |
962 | bool active = false; | |
963 | ||
964 | ret = drm_modeset_lock(&state->dev->mode_config.connection_mutex, | |
965 | state->acquire_ctx); | |
966 | if (ret) | |
967 | return ret; | |
968 | ||
969 | if (mode != DRM_MODE_DPMS_ON) | |
970 | mode = DRM_MODE_DPMS_OFF; | |
971 | connector->dpms = mode; | |
972 | ||
973 | crtc = connector->state->crtc; | |
974 | if (!crtc) | |
975 | goto out; | |
976 | ret = drm_atomic_add_affected_connectors(state, crtc); | |
977 | if (ret) | |
978 | goto out; | |
979 | ||
980 | crtc_state = drm_atomic_get_crtc_state(state, crtc); | |
981 | if (IS_ERR(crtc_state)) { | |
982 | ret = PTR_ERR(crtc_state); | |
983 | goto out; | |
984 | } | |
985 | ||
986 | for_each_new_connector_in_state(state, tmp_connector, new_conn_state, i) { | |
987 | if (new_conn_state->crtc != crtc) | |
988 | continue; | |
989 | if (tmp_connector->dpms == DRM_MODE_DPMS_ON) { | |
990 | active = true; | |
991 | break; | |
992 | } | |
993 | } | |
994 | ||
995 | crtc_state->active = active; | |
996 | ret = drm_atomic_commit(state); | |
997 | out: | |
998 | if (ret != 0) | |
999 | connector->dpms = old_mode; | |
1000 | return ret; | |
1001 | } | |
1002 | ||
1003 | int drm_atomic_set_property(struct drm_atomic_state *state, | |
36e4523a | 1004 | struct drm_file *file_priv, |
72fdb40c DV |
1005 | struct drm_mode_object *obj, |
1006 | struct drm_property *prop, | |
1007 | uint64_t prop_value) | |
1008 | { | |
1009 | struct drm_mode_object *ref; | |
1010 | int ret; | |
1011 | ||
1012 | if (!drm_property_change_valid_get(prop, prop_value, &ref)) | |
1013 | return -EINVAL; | |
1014 | ||
1015 | switch (obj->type) { | |
1016 | case DRM_MODE_OBJECT_CONNECTOR: { | |
1017 | struct drm_connector *connector = obj_to_connector(obj); | |
1018 | struct drm_connector_state *connector_state; | |
1019 | ||
1020 | connector_state = drm_atomic_get_connector_state(state, connector); | |
1021 | if (IS_ERR(connector_state)) { | |
1022 | ret = PTR_ERR(connector_state); | |
1023 | break; | |
1024 | } | |
1025 | ||
1026 | ret = drm_atomic_connector_set_property(connector, | |
36e4523a DV |
1027 | connector_state, file_priv, |
1028 | prop, prop_value); | |
72fdb40c DV |
1029 | break; |
1030 | } | |
1031 | case DRM_MODE_OBJECT_CRTC: { | |
1032 | struct drm_crtc *crtc = obj_to_crtc(obj); | |
1033 | struct drm_crtc_state *crtc_state; | |
1034 | ||
1035 | crtc_state = drm_atomic_get_crtc_state(state, crtc); | |
1036 | if (IS_ERR(crtc_state)) { | |
1037 | ret = PTR_ERR(crtc_state); | |
1038 | break; | |
1039 | } | |
1040 | ||
1041 | ret = drm_atomic_crtc_set_property(crtc, | |
1042 | crtc_state, prop, prop_value); | |
1043 | break; | |
1044 | } | |
1045 | case DRM_MODE_OBJECT_PLANE: { | |
1046 | struct drm_plane *plane = obj_to_plane(obj); | |
1047 | struct drm_plane_state *plane_state; | |
1048 | ||
1049 | plane_state = drm_atomic_get_plane_state(state, plane); | |
1050 | if (IS_ERR(plane_state)) { | |
1051 | ret = PTR_ERR(plane_state); | |
1052 | break; | |
1053 | } | |
1054 | ||
1055 | ret = drm_atomic_plane_set_property(plane, | |
36e4523a DV |
1056 | plane_state, file_priv, |
1057 | prop, prop_value); | |
72fdb40c DV |
1058 | break; |
1059 | } | |
1060 | default: | |
1061 | ret = -EINVAL; | |
1062 | break; | |
1063 | } | |
1064 | ||
1065 | drm_property_change_valid_put(prop, ref); | |
1066 | return ret; | |
1067 | } | |
1068 | ||
1069 | /** | |
1070 | * DOC: explicit fencing properties | |
1071 | * | |
1072 | * Explicit fencing allows userspace to control the buffer synchronization | |
0ae865ef | 1073 | * between devices. A Fence or a group of fences are transferred to/from |
72fdb40c DV |
1074 | * userspace using Sync File fds and there are two DRM properties for that. |
1075 | * IN_FENCE_FD on each DRM Plane to send fences to the kernel and | |
1076 | * OUT_FENCE_PTR on each DRM CRTC to receive fences from the kernel. | |
1077 | * | |
1078 | * As a contrast, with implicit fencing the kernel keeps track of any | |
1079 | * ongoing rendering, and automatically ensures that the atomic update waits | |
1080 | * for any pending rendering to complete. For shared buffers represented with | |
52791eee | 1081 | * a &struct dma_buf this is tracked in &struct dma_resv. |
72fdb40c DV |
1082 | * Implicit syncing is how Linux traditionally worked (e.g. DRI2/3 on X.org), |
1083 | * whereas explicit fencing is what Android wants. | |
1084 | * | |
1085 | * "IN_FENCE_FD”: | |
1086 | * Use this property to pass a fence that DRM should wait on before | |
1087 | * proceeding with the Atomic Commit request and show the framebuffer for | |
1088 | * the plane on the screen. The fence can be either a normal fence or a | |
1089 | * merged one, the sync_file framework will handle both cases and use a | |
1090 | * fence_array if a merged fence is received. Passing -1 here means no | |
1091 | * fences to wait on. | |
1092 | * | |
1093 | * If the Atomic Commit request has the DRM_MODE_ATOMIC_TEST_ONLY flag | |
1094 | * it will only check if the Sync File is a valid one. | |
1095 | * | |
1096 | * On the driver side the fence is stored on the @fence parameter of | |
1097 | * &struct drm_plane_state. Drivers which also support implicit fencing | |
1098 | * should set the implicit fence using drm_atomic_set_fence_for_plane(), | |
1099 | * to make sure there's consistent behaviour between drivers in precedence | |
1100 | * of implicit vs. explicit fencing. | |
1101 | * | |
1102 | * "OUT_FENCE_PTR”: | |
1103 | * Use this property to pass a file descriptor pointer to DRM. Once the | |
1104 | * Atomic Commit request call returns OUT_FENCE_PTR will be filled with | |
1105 | * the file descriptor number of a Sync File. This Sync File contains the | |
1106 | * CRTC fence that will be signaled when all framebuffers present on the | |
1107 | * Atomic Commit * request for that given CRTC are scanned out on the | |
1108 | * screen. | |
1109 | * | |
1110 | * The Atomic Commit request fails if a invalid pointer is passed. If the | |
1111 | * Atomic Commit request fails for any other reason the out fence fd | |
1112 | * returned will be -1. On a Atomic Commit with the | |
1113 | * DRM_MODE_ATOMIC_TEST_ONLY flag the out fence will also be set to -1. | |
1114 | * | |
1115 | * Note that out-fences don't have a special interface to drivers and are | |
1116 | * internally represented by a &struct drm_pending_vblank_event in struct | |
1117 | * &drm_crtc_state, which is also used by the nonblocking atomic commit | |
1118 | * helpers and for the DRM event handling for existing userspace. | |
1119 | */ | |
1120 | ||
1121 | struct drm_out_fence_state { | |
1122 | s32 __user *out_fence_ptr; | |
1123 | struct sync_file *sync_file; | |
1124 | int fd; | |
1125 | }; | |
1126 | ||
1127 | static int setup_out_fence(struct drm_out_fence_state *fence_state, | |
1128 | struct dma_fence *fence) | |
1129 | { | |
1130 | fence_state->fd = get_unused_fd_flags(O_CLOEXEC); | |
1131 | if (fence_state->fd < 0) | |
1132 | return fence_state->fd; | |
1133 | ||
1134 | if (put_user(fence_state->fd, fence_state->out_fence_ptr)) | |
1135 | return -EFAULT; | |
1136 | ||
1137 | fence_state->sync_file = sync_file_create(fence); | |
1138 | if (!fence_state->sync_file) | |
1139 | return -ENOMEM; | |
1140 | ||
1141 | return 0; | |
1142 | } | |
1143 | ||
1144 | static int prepare_signaling(struct drm_device *dev, | |
1145 | struct drm_atomic_state *state, | |
1146 | struct drm_mode_atomic *arg, | |
1147 | struct drm_file *file_priv, | |
1148 | struct drm_out_fence_state **fence_state, | |
1149 | unsigned int *num_fences) | |
1150 | { | |
1151 | struct drm_crtc *crtc; | |
1152 | struct drm_crtc_state *crtc_state; | |
1153 | struct drm_connector *conn; | |
1154 | struct drm_connector_state *conn_state; | |
1155 | int i, c = 0, ret; | |
1156 | ||
1157 | if (arg->flags & DRM_MODE_ATOMIC_TEST_ONLY) | |
1158 | return 0; | |
1159 | ||
1160 | for_each_new_crtc_in_state(state, crtc, crtc_state, i) { | |
1161 | s32 __user *fence_ptr; | |
1162 | ||
1163 | fence_ptr = get_out_fence_for_crtc(crtc_state->state, crtc); | |
1164 | ||
1165 | if (arg->flags & DRM_MODE_PAGE_FLIP_EVENT || fence_ptr) { | |
1166 | struct drm_pending_vblank_event *e; | |
1167 | ||
1168 | e = create_vblank_event(crtc, arg->user_data); | |
1169 | if (!e) | |
1170 | return -ENOMEM; | |
1171 | ||
1172 | crtc_state->event = e; | |
1173 | } | |
1174 | ||
1175 | if (arg->flags & DRM_MODE_PAGE_FLIP_EVENT) { | |
1176 | struct drm_pending_vblank_event *e = crtc_state->event; | |
1177 | ||
1178 | if (!file_priv) | |
1179 | continue; | |
1180 | ||
1181 | ret = drm_event_reserve_init(dev, file_priv, &e->base, | |
1182 | &e->event.base); | |
1183 | if (ret) { | |
1184 | kfree(e); | |
1185 | crtc_state->event = NULL; | |
1186 | return ret; | |
1187 | } | |
1188 | } | |
1189 | ||
1190 | if (fence_ptr) { | |
1191 | struct dma_fence *fence; | |
1192 | struct drm_out_fence_state *f; | |
1193 | ||
1194 | f = krealloc(*fence_state, sizeof(**fence_state) * | |
1195 | (*num_fences + 1), GFP_KERNEL); | |
1196 | if (!f) | |
1197 | return -ENOMEM; | |
1198 | ||
1199 | memset(&f[*num_fences], 0, sizeof(*f)); | |
1200 | ||
1201 | f[*num_fences].out_fence_ptr = fence_ptr; | |
1202 | *fence_state = f; | |
1203 | ||
1204 | fence = drm_crtc_create_fence(crtc); | |
1205 | if (!fence) | |
1206 | return -ENOMEM; | |
1207 | ||
1208 | ret = setup_out_fence(&f[(*num_fences)++], fence); | |
1209 | if (ret) { | |
1210 | dma_fence_put(fence); | |
1211 | return ret; | |
1212 | } | |
1213 | ||
1214 | crtc_state->event->base.fence = fence; | |
1215 | } | |
1216 | ||
1217 | c++; | |
1218 | } | |
1219 | ||
1220 | for_each_new_connector_in_state(state, conn, conn_state, i) { | |
1221 | struct drm_writeback_connector *wb_conn; | |
72fdb40c DV |
1222 | struct drm_out_fence_state *f; |
1223 | struct dma_fence *fence; | |
1224 | s32 __user *fence_ptr; | |
1225 | ||
9d2230dc LP |
1226 | if (!conn_state->writeback_job) |
1227 | continue; | |
1228 | ||
72fdb40c DV |
1229 | fence_ptr = get_out_fence_for_connector(state, conn); |
1230 | if (!fence_ptr) | |
1231 | continue; | |
1232 | ||
72fdb40c DV |
1233 | f = krealloc(*fence_state, sizeof(**fence_state) * |
1234 | (*num_fences + 1), GFP_KERNEL); | |
1235 | if (!f) | |
1236 | return -ENOMEM; | |
1237 | ||
1238 | memset(&f[*num_fences], 0, sizeof(*f)); | |
1239 | ||
1240 | f[*num_fences].out_fence_ptr = fence_ptr; | |
1241 | *fence_state = f; | |
1242 | ||
1243 | wb_conn = drm_connector_to_writeback(conn); | |
1244 | fence = drm_writeback_get_out_fence(wb_conn); | |
1245 | if (!fence) | |
1246 | return -ENOMEM; | |
1247 | ||
1248 | ret = setup_out_fence(&f[(*num_fences)++], fence); | |
1249 | if (ret) { | |
1250 | dma_fence_put(fence); | |
1251 | return ret; | |
1252 | } | |
1253 | ||
9d2230dc | 1254 | conn_state->writeback_job->out_fence = fence; |
72fdb40c DV |
1255 | } |
1256 | ||
1257 | /* | |
1258 | * Having this flag means user mode pends on event which will never | |
1259 | * reach due to lack of at least one CRTC for signaling | |
1260 | */ | |
1261 | if (c == 0 && (arg->flags & DRM_MODE_PAGE_FLIP_EVENT)) | |
1262 | return -EINVAL; | |
1263 | ||
1264 | return 0; | |
1265 | } | |
1266 | ||
1267 | static void complete_signaling(struct drm_device *dev, | |
1268 | struct drm_atomic_state *state, | |
1269 | struct drm_out_fence_state *fence_state, | |
1270 | unsigned int num_fences, | |
1271 | bool install_fds) | |
1272 | { | |
1273 | struct drm_crtc *crtc; | |
1274 | struct drm_crtc_state *crtc_state; | |
1275 | int i; | |
1276 | ||
1277 | if (install_fds) { | |
1278 | for (i = 0; i < num_fences; i++) | |
1279 | fd_install(fence_state[i].fd, | |
1280 | fence_state[i].sync_file->file); | |
1281 | ||
1282 | kfree(fence_state); | |
1283 | return; | |
1284 | } | |
1285 | ||
1286 | for_each_new_crtc_in_state(state, crtc, crtc_state, i) { | |
1287 | struct drm_pending_vblank_event *event = crtc_state->event; | |
1288 | /* | |
1289 | * Free the allocated event. drm_atomic_helper_setup_commit | |
1290 | * can allocate an event too, so only free it if it's ours | |
1291 | * to prevent a double free in drm_atomic_state_clear. | |
1292 | */ | |
1293 | if (event && (event->base.fence || event->base.file_priv)) { | |
1294 | drm_event_cancel_free(dev, &event->base); | |
1295 | crtc_state->event = NULL; | |
1296 | } | |
1297 | } | |
1298 | ||
1299 | if (!fence_state) | |
1300 | return; | |
1301 | ||
1302 | for (i = 0; i < num_fences; i++) { | |
1303 | if (fence_state[i].sync_file) | |
1304 | fput(fence_state[i].sync_file->file); | |
1305 | if (fence_state[i].fd >= 0) | |
1306 | put_unused_fd(fence_state[i].fd); | |
1307 | ||
1308 | /* If this fails log error to the user */ | |
1309 | if (fence_state[i].out_fence_ptr && | |
1310 | put_user(-1, fence_state[i].out_fence_ptr)) | |
e3aae683 | 1311 | drm_dbg_atomic(dev, "Couldn't clear out_fence_ptr\n"); |
72fdb40c DV |
1312 | } |
1313 | ||
1314 | kfree(fence_state); | |
1315 | } | |
1316 | ||
1317 | int drm_mode_atomic_ioctl(struct drm_device *dev, | |
1318 | void *data, struct drm_file *file_priv) | |
1319 | { | |
1320 | struct drm_mode_atomic *arg = data; | |
1321 | uint32_t __user *objs_ptr = (uint32_t __user *)(unsigned long)(arg->objs_ptr); | |
1322 | uint32_t __user *count_props_ptr = (uint32_t __user *)(unsigned long)(arg->count_props_ptr); | |
1323 | uint32_t __user *props_ptr = (uint32_t __user *)(unsigned long)(arg->props_ptr); | |
1324 | uint64_t __user *prop_values_ptr = (uint64_t __user *)(unsigned long)(arg->prop_values_ptr); | |
1325 | unsigned int copied_objs, copied_props; | |
1326 | struct drm_atomic_state *state; | |
1327 | struct drm_modeset_acquire_ctx ctx; | |
1328 | struct drm_out_fence_state *fence_state; | |
1329 | int ret = 0; | |
1330 | unsigned int i, j, num_fences; | |
a4324a7a | 1331 | struct drm_printer p = drm_info_printer(dev->dev); |
72fdb40c DV |
1332 | |
1333 | /* disallow for drivers not supporting atomic: */ | |
1334 | if (!drm_core_check_feature(dev, DRIVER_ATOMIC)) | |
69fdf420 | 1335 | return -EOPNOTSUPP; |
72fdb40c DV |
1336 | |
1337 | /* disallow for userspace that has not enabled atomic cap (even | |
1338 | * though this may be a bit overkill, since legacy userspace | |
1339 | * wouldn't know how to call this ioctl) | |
1340 | */ | |
50f3d412 SS |
1341 | if (!file_priv->atomic) { |
1342 | drm_dbg_atomic(dev, | |
1343 | "commit failed: atomic cap not enabled\n"); | |
72fdb40c | 1344 | return -EINVAL; |
50f3d412 | 1345 | } |
72fdb40c | 1346 | |
50f3d412 SS |
1347 | if (arg->flags & ~DRM_MODE_ATOMIC_FLAGS) { |
1348 | drm_dbg_atomic(dev, "commit failed: invalid flag\n"); | |
72fdb40c | 1349 | return -EINVAL; |
50f3d412 | 1350 | } |
72fdb40c | 1351 | |
50f3d412 SS |
1352 | if (arg->reserved) { |
1353 | drm_dbg_atomic(dev, "commit failed: reserved field set\n"); | |
72fdb40c | 1354 | return -EINVAL; |
50f3d412 | 1355 | } |
72fdb40c | 1356 | |
50f3d412 SS |
1357 | if (arg->flags & DRM_MODE_PAGE_FLIP_ASYNC) { |
1358 | drm_dbg_atomic(dev, | |
1359 | "commit failed: invalid flag DRM_MODE_PAGE_FLIP_ASYNC\n"); | |
72fdb40c | 1360 | return -EINVAL; |
50f3d412 | 1361 | } |
72fdb40c DV |
1362 | |
1363 | /* can't test and expect an event at the same time. */ | |
1364 | if ((arg->flags & DRM_MODE_ATOMIC_TEST_ONLY) && | |
50f3d412 SS |
1365 | (arg->flags & DRM_MODE_PAGE_FLIP_EVENT)) { |
1366 | drm_dbg_atomic(dev, | |
1367 | "commit failed: page-flip event requested with test-only commit\n"); | |
72fdb40c | 1368 | return -EINVAL; |
50f3d412 | 1369 | } |
72fdb40c | 1370 | |
72fdb40c DV |
1371 | state = drm_atomic_state_alloc(dev); |
1372 | if (!state) | |
1373 | return -ENOMEM; | |
1374 | ||
4089e272 | 1375 | drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE); |
72fdb40c DV |
1376 | state->acquire_ctx = &ctx; |
1377 | state->allow_modeset = !!(arg->flags & DRM_MODE_ATOMIC_ALLOW_MODESET); | |
1378 | ||
1379 | retry: | |
1380 | copied_objs = 0; | |
1381 | copied_props = 0; | |
1382 | fence_state = NULL; | |
1383 | num_fences = 0; | |
1384 | ||
1385 | for (i = 0; i < arg->count_objs; i++) { | |
1386 | uint32_t obj_id, count_props; | |
1387 | struct drm_mode_object *obj; | |
1388 | ||
1389 | if (get_user(obj_id, objs_ptr + copied_objs)) { | |
1390 | ret = -EFAULT; | |
1391 | goto out; | |
1392 | } | |
1393 | ||
1394 | obj = drm_mode_object_find(dev, file_priv, obj_id, DRM_MODE_OBJECT_ANY); | |
1395 | if (!obj) { | |
1396 | ret = -ENOENT; | |
1397 | goto out; | |
1398 | } | |
1399 | ||
1400 | if (!obj->properties) { | |
1401 | drm_mode_object_put(obj); | |
1402 | ret = -ENOENT; | |
1403 | goto out; | |
1404 | } | |
1405 | ||
1406 | if (get_user(count_props, count_props_ptr + copied_objs)) { | |
1407 | drm_mode_object_put(obj); | |
1408 | ret = -EFAULT; | |
1409 | goto out; | |
1410 | } | |
1411 | ||
1412 | copied_objs++; | |
1413 | ||
1414 | for (j = 0; j < count_props; j++) { | |
1415 | uint32_t prop_id; | |
1416 | uint64_t prop_value; | |
1417 | struct drm_property *prop; | |
1418 | ||
1419 | if (get_user(prop_id, props_ptr + copied_props)) { | |
1420 | drm_mode_object_put(obj); | |
1421 | ret = -EFAULT; | |
1422 | goto out; | |
1423 | } | |
1424 | ||
1425 | prop = drm_mode_obj_find_prop_id(obj, prop_id); | |
1426 | if (!prop) { | |
1427 | drm_mode_object_put(obj); | |
1428 | ret = -ENOENT; | |
1429 | goto out; | |
1430 | } | |
1431 | ||
1432 | if (copy_from_user(&prop_value, | |
1433 | prop_values_ptr + copied_props, | |
1434 | sizeof(prop_value))) { | |
1435 | drm_mode_object_put(obj); | |
1436 | ret = -EFAULT; | |
1437 | goto out; | |
1438 | } | |
1439 | ||
36e4523a DV |
1440 | ret = drm_atomic_set_property(state, file_priv, |
1441 | obj, prop, prop_value); | |
72fdb40c DV |
1442 | if (ret) { |
1443 | drm_mode_object_put(obj); | |
1444 | goto out; | |
1445 | } | |
1446 | ||
1447 | copied_props++; | |
1448 | } | |
1449 | ||
1450 | drm_mode_object_put(obj); | |
1451 | } | |
1452 | ||
1453 | ret = prepare_signaling(dev, state, arg, file_priv, &fence_state, | |
1454 | &num_fences); | |
1455 | if (ret) | |
1456 | goto out; | |
1457 | ||
1458 | if (arg->flags & DRM_MODE_ATOMIC_TEST_ONLY) { | |
1459 | ret = drm_atomic_check_only(state); | |
1460 | } else if (arg->flags & DRM_MODE_ATOMIC_NONBLOCK) { | |
1461 | ret = drm_atomic_nonblocking_commit(state); | |
1462 | } else { | |
f0a8f533 | 1463 | if (drm_debug_enabled(DRM_UT_STATE)) |
a4324a7a | 1464 | drm_atomic_print_new_state(state, &p); |
72fdb40c DV |
1465 | |
1466 | ret = drm_atomic_commit(state); | |
1467 | } | |
1468 | ||
1469 | out: | |
1470 | complete_signaling(dev, state, fence_state, num_fences, !ret); | |
1471 | ||
1472 | if (ret == -EDEADLK) { | |
1473 | drm_atomic_state_clear(state); | |
1474 | ret = drm_modeset_backoff(&ctx); | |
1475 | if (!ret) | |
1476 | goto retry; | |
1477 | } | |
1478 | ||
1479 | drm_atomic_state_put(state); | |
1480 | ||
1481 | drm_modeset_drop_locks(&ctx); | |
1482 | drm_modeset_acquire_fini(&ctx); | |
1483 | ||
1484 | return ret; | |
1485 | } |