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drm/bridge: adv7511: Attach next bridge without creating connector
[linux-2.6-block.git] / drivers / gpu / drm / bridge / adv7511 / adv7511_drv.c
CommitLineData
fda8d26e 1// SPDX-License-Identifier: GPL-2.0-only
9c8af882
LPC		 2/*
3 * Analog Devices ADV7511 HDMI transmitter driver
4 *
5 * Copyright 2012 Analog Devices Inc.
9c8af882
LPC		 6 */
7
95b60804 8#include <linux/clk.h>
9c8af882
LPC		 9#include <linux/device.h>
10#include <linux/gpio/consumer.h>
9c8af882 11#include <linux/module.h>
722d4f06 12#include <linux/of.h>
9c8af882
LPC		 13#include <linux/slab.h>
14
95b60804
SR		 15#include <media/cec.h>
16
e12c2f64
AT		 17#include <drm/drm_atomic.h>
18#include <drm/drm_atomic_helper.h>
9c8af882 19#include <drm/drm_edid.h>
14b3cdbd 20#include <drm/drm_of.h>
95b60804 21#include <drm/drm_print.h>
fcd70cd3 22#include <drm/drm_probe_helper.h>
9c8af882
LPC		 23
24#include "adv7511.h"
25
9c8af882 26/* ADI recommended values for proper operation. */
8019ff6c 27static const struct reg_sequence adv7511_fixed_registers[] = {
9c8af882
LPC		 28 { 0x98, 0x03 },
29 { 0x9a, 0xe0 },
30 { 0x9c, 0x30 },
31 { 0x9d, 0x61 },
32 { 0xa2, 0xa4 },
33 { 0xa3, 0xa4 },
34 { 0xe0, 0xd0 },
35 { 0xf9, 0x00 },
36 { 0x55, 0x02 },
37};
38
39/* -----------------------------------------------------------------------------
40 * Register access
41 */
42
43static const uint8_t adv7511_register_defaults[] = {
44 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 00 */
45 0x00, 0x00, 0x01, 0x0e, 0xbc, 0x18, 0x01, 0x13,
46 0x25, 0x37, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 10 */
47 0x46, 0x62, 0x04, 0xa8, 0x00, 0x00, 0x1c, 0x84,
48 0x1c, 0xbf, 0x04, 0xa8, 0x1e, 0x70, 0x02, 0x1e, /* 20 */
49 0x00, 0x00, 0x04, 0xa8, 0x08, 0x12, 0x1b, 0xac,
50 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */
51 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0xb0,
52 0x00, 0x50, 0x90, 0x7e, 0x79, 0x70, 0x00, 0x00, /* 40 */
53 0x00, 0xa8, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
54 0x00, 0x00, 0x02, 0x0d, 0x00, 0x00, 0x00, 0x00, /* 50 */
55 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
56 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */
57 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
58 0x01, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */
59 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
60 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */
61 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
62 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, /* 90 */
63 0x0b, 0x02, 0x00, 0x18, 0x5a, 0x60, 0x00, 0x00,
64 0x00, 0x00, 0x80, 0x80, 0x08, 0x04, 0x00, 0x00, /* a0 */
65 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x40, 0x14,
66 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* b0 */
67 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
68 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* c0 */
69 0x00, 0x03, 0x00, 0x00, 0x02, 0x00, 0x01, 0x04,
70 0x30, 0xff, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* d0 */
71 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x01,
72 0x80, 0x75, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, /* e0 */
73 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
74 0x00, 0x00, 0x00, 0x00, 0x00, 0x75, 0x11, 0x00, /* f0 */
75 0x00, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
76};
77
78static bool adv7511_register_volatile(struct device *dev, unsigned int reg)
79{
80 switch (reg) {
81 case ADV7511_REG_CHIP_REVISION:
82 case ADV7511_REG_SPDIF_FREQ:
83 case ADV7511_REG_CTS_AUTOMATIC1:
84 case ADV7511_REG_CTS_AUTOMATIC2:
85 case ADV7511_REG_VIC_DETECTED:
86 case ADV7511_REG_VIC_SEND:
87 case ADV7511_REG_AUX_VIC_DETECTED:
88 case ADV7511_REG_STATUS:
89 case ADV7511_REG_GC(1):
90 case ADV7511_REG_INT(0):
91 case ADV7511_REG_INT(1):
92 case ADV7511_REG_PLL_STATUS:
93 case ADV7511_REG_AN(0):
94 case ADV7511_REG_AN(1):
95 case ADV7511_REG_AN(2):
96 case ADV7511_REG_AN(3):
97 case ADV7511_REG_AN(4):
98 case ADV7511_REG_AN(5):
99 case ADV7511_REG_AN(6):
100 case ADV7511_REG_AN(7):
101 case ADV7511_REG_HDCP_STATUS:
102 case ADV7511_REG_BCAPS:
103 case ADV7511_REG_BKSV(0):
104 case ADV7511_REG_BKSV(1):
105 case ADV7511_REG_BKSV(2):
106 case ADV7511_REG_BKSV(3):
107 case ADV7511_REG_BKSV(4):
108 case ADV7511_REG_DDC_STATUS:
cd38a337 109 case ADV7511_REG_EDID_READ_CTRL:
9c8af882
LPC		 110 case ADV7511_REG_BSTATUS(0):
111 case ADV7511_REG_BSTATUS(1):
112 case ADV7511_REG_CHIP_ID_HIGH:
113 case ADV7511_REG_CHIP_ID_LOW:
114 return true;
115 }
116
117 return false;
118}
119
120static const struct regmap_config adv7511_regmap_config = {
121 .reg_bits = 8,
122 .val_bits = 8,
123
124 .max_register = 0xff,
86c3331c 125 .cache_type = REGCACHE_MAPLE,
9c8af882
LPC		 126 .reg_defaults_raw = adv7511_register_defaults,
127 .num_reg_defaults_raw = ARRAY_SIZE(adv7511_register_defaults),
128
129 .volatile_reg = adv7511_register_volatile,
130};
131
132/* -----------------------------------------------------------------------------
133 * Hardware configuration
134 */
135
136static void adv7511_set_colormap(struct adv7511 *adv7511, bool enable,
137 const uint16_t *coeff,
138 unsigned int scaling_factor)
139{
140 unsigned int i;
141
142 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1),
143 ADV7511_CSC_UPDATE_MODE, ADV7511_CSC_UPDATE_MODE);
144
145 if (enable) {
146 for (i = 0; i < 12; ++i) {
147 regmap_update_bits(adv7511->regmap,
148 ADV7511_REG_CSC_UPPER(i),
149 0x1f, coeff[i] >> 8);
150 regmap_write(adv7511->regmap,
151 ADV7511_REG_CSC_LOWER(i),
152 coeff[i] & 0xff);
153 }
154 }
155
156 if (enable)
157 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0),
158 0xe0, 0x80 | (scaling_factor << 5));
159 else
160 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0),
161 0x80, 0x00);
162
163 regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1),
164 ADV7511_CSC_UPDATE_MODE, 0);
165}
166
167static int adv7511_packet_enable(struct adv7511 *adv7511, unsigned int packet)
168{
169 if (packet & 0xff)
170 regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0,
171 packet, 0xff);
172
173 if (packet & 0xff00) {
174 packet >>= 8;
175 regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
176 packet, 0xff);
177 }
178
179 return 0;
180}
181
182static int adv7511_packet_disable(struct adv7511 *adv7511, unsigned int packet)
183{
184 if (packet & 0xff)
185 regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0,
186 packet, 0x00);
187
188 if (packet & 0xff00) {
189 packet >>= 8;
190 regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
191 packet, 0x00);
192 }
193
194 return 0;
195}
196
197/* Coefficients for adv7511 color space conversion */
198static const uint16_t adv7511_csc_ycbcr_to_rgb[] = {
199 0x0734, 0x04ad, 0x0000, 0x1c1b,
200 0x1ddc, 0x04ad, 0x1f24, 0x0135,
201 0x0000, 0x04ad, 0x087c, 0x1b77,
202};
203
204static void adv7511_set_config_csc(struct adv7511 *adv7511,
205 struct drm_connector *connector,
fcb4c5ee 206 bool rgb, bool hdmi_mode)
9c8af882
LPC		 207{
208 struct adv7511_video_config config;
209 bool output_format_422, output_format_ycbcr;
210 unsigned int mode;
211 uint8_t infoframe[17];
212
fcb4c5ee 213 config.hdmi_mode = hdmi_mode;
9c8af882
LPC		 214
215 hdmi_avi_infoframe_init(&config.avi_infoframe);
216
217 config.avi_infoframe.scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
218
219 if (rgb) {
220 config.csc_enable = false;
221 config.avi_infoframe.colorspace = HDMI_COLORSPACE_RGB;
222 } else {
223 config.csc_scaling_factor = ADV7511_CSC_SCALING_4;
224 config.csc_coefficents = adv7511_csc_ycbcr_to_rgb;
225
226 if ((connector->display_info.color_formats &
c03d0b52 227 DRM_COLOR_FORMAT_YCBCR422) &&
9c8af882
LPC		 228 config.hdmi_mode) {
229 config.csc_enable = false;
230 config.avi_infoframe.colorspace =
231 HDMI_COLORSPACE_YUV422;
232 } else {
233 config.csc_enable = true;
234 config.avi_infoframe.colorspace = HDMI_COLORSPACE_RGB;
235 }
236 }
237
238 if (config.hdmi_mode) {
239 mode = ADV7511_HDMI_CFG_MODE_HDMI;
240
241 switch (config.avi_infoframe.colorspace) {
242 case HDMI_COLORSPACE_YUV444:
243 output_format_422 = false;
244 output_format_ycbcr = true;
245 break;
246 case HDMI_COLORSPACE_YUV422:
247 output_format_422 = true;
248 output_format_ycbcr = true;
249 break;
250 default:
251 output_format_422 = false;
252 output_format_ycbcr = false;
253 break;
254 }
255 } else {
256 mode = ADV7511_HDMI_CFG_MODE_DVI;
257 output_format_422 = false;
258 output_format_ycbcr = false;
259 }
260
261 adv7511_packet_disable(adv7511, ADV7511_PACKET_ENABLE_AVI_INFOFRAME);
262
263 adv7511_set_colormap(adv7511, config.csc_enable,
264 config.csc_coefficents,
265 config.csc_scaling_factor);
266
267 regmap_update_bits(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG1, 0x81,
268 (output_format_422 << 7) | output_format_ycbcr);
269
270 regmap_update_bits(adv7511->regmap, ADV7511_REG_HDCP_HDMI_CFG,
271 ADV7511_HDMI_CFG_MODE_MASK, mode);
272
273 hdmi_avi_infoframe_pack(&config.avi_infoframe, infoframe,
274 sizeof(infoframe));
275
276 /* The AVI infoframe id is not configurable */
277 regmap_bulk_write(adv7511->regmap, ADV7511_REG_AVI_INFOFRAME_VERSION,
278 infoframe + 1, sizeof(infoframe) - 1);
279
280 adv7511_packet_enable(adv7511, ADV7511_PACKET_ENABLE_AVI_INFOFRAME);
281}
282
283static void adv7511_set_link_config(struct adv7511 *adv7511,
284 const struct adv7511_link_config *config)
285{
286 /*
287 * The input style values documented in the datasheet don't match the
288 * hardware register field values :-(
289 */
290 static const unsigned int input_styles[4] = { 0, 2, 1, 3 };
291
292 unsigned int clock_delay;
293 unsigned int color_depth;
294 unsigned int input_id;
295
296 clock_delay = (config->clock_delay + 1200) / 400;
297 color_depth = config->input_color_depth == 8 ? 3
298 : (config->input_color_depth == 10 ? 1 : 2);
299
300 /* TODO Support input ID 6 */
301 if (config->input_colorspace != HDMI_COLORSPACE_YUV422)
302 input_id = config->input_clock == ADV7511_INPUT_CLOCK_DDR
303 ? 5 : 0;
304 else if (config->input_clock == ADV7511_INPUT_CLOCK_DDR)
305 input_id = config->embedded_sync ? 8 : 7;
306 else if (config->input_clock == ADV7511_INPUT_CLOCK_2X)
307 input_id = config->embedded_sync ? 4 : 3;
308 else
309 input_id = config->embedded_sync ? 2 : 1;
310
311 regmap_update_bits(adv7511->regmap, ADV7511_REG_I2C_FREQ_ID_CFG, 0xf,
312 input_id);
313 regmap_update_bits(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG1, 0x7e,
314 (color_depth << 4) |
315 (input_styles[config->input_style] << 2));
316 regmap_write(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG2,
317 config->input_justification << 3);
318 regmap_write(adv7511->regmap, ADV7511_REG_TIMING_GEN_SEQ,
319 config->sync_pulse << 2);
320
321 regmap_write(adv7511->regmap, 0xba, clock_delay << 5);
322
323 adv7511->embedded_sync = config->embedded_sync;
324 adv7511->hsync_polarity = config->hsync_polarity;
325 adv7511->vsync_polarity = config->vsync_polarity;
326 adv7511->rgb = config->input_colorspace == HDMI_COLORSPACE_RGB;
327}
328
651e4769 329static void __adv7511_power_on(struct adv7511 *adv7511)
c6169e49
LP		 330{
331 adv7511->current_edid_segment = -1;
332
c6169e49
LP		 333 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
334 ADV7511_POWER_POWER_DOWN, 0);
d0be8584
WS		 335 if (adv7511->i2c_main->irq) {
336 /*
337 * Documentation says the INT_ENABLE registers are reset in
338 * POWER_DOWN mode. My 7511w preserved the bits, however.
339 * Still, let's be safe and stick to the documentation.
340 */
341 regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(0),
40d86d2d 342 ADV7511_INT0_EDID_READY | ADV7511_INT0_HPD);
3b1b9750
HV		 343 regmap_update_bits(adv7511->regmap,
344 ADV7511_REG_INT_ENABLE(1),
345 ADV7511_INT1_DDC_ERROR,
346 ADV7511_INT1_DDC_ERROR);
d0be8584 347 }
c6169e49
LP		 348
349 /*
29ce4ed4 350 * Per spec it is allowed to pulse the HPD signal to indicate that the
c6169e49 351 * EDID information has changed. Some monitors do this when they wakeup
29ce4ed4 352 * from standby or are enabled. When the HPD goes low the adv7511 is
c6169e49 353 * reset and the outputs are disabled which might cause the monitor to
29ce4ed4 354 * go to standby again. To avoid this we ignore the HPD pin for the
3dbc84a5
JT		 355 * first few seconds after enabling the output. On the other hand
356 * adv7535 require to enable HPD Override bit for proper HPD.
c6169e49 357 */
e12c4703 358 if (adv7511->info->hpd_override_enable)
3dbc84a5
JT		 359 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
360 ADV7535_REG_POWER2_HPD_OVERRIDE,
361 ADV7535_REG_POWER2_HPD_OVERRIDE);
362 else
363 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
364 ADV7511_REG_POWER2_HPD_SRC_MASK,
365 ADV7511_REG_POWER2_HPD_SRC_NONE);
651e4769
JS		 366}
367
368static void adv7511_power_on(struct adv7511 *adv7511)
369{
370 __adv7511_power_on(adv7511);
c6169e49
LP		 371
372 /*
373 * Most of the registers are reset during power down or when HPD is low.
374 */
375 regcache_sync(adv7511->regmap);
376
c7555121 377 if (adv7511->info->has_dsi)
2437e7cd 378 adv7533_dsi_power_on(adv7511);
c6169e49
LP		 379 adv7511->powered = true;
380}
381
651e4769 382static void __adv7511_power_off(struct adv7511 *adv7511)
c6169e49
LP		 383{
384 /* TODO: setup additional power down modes */
e12c4703 385 if (adv7511->info->hpd_override_enable)
3dbc84a5
JT		 386 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
387 ADV7535_REG_POWER2_HPD_OVERRIDE, 0);
388
c6169e49
LP		 389 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
390 ADV7511_POWER_POWER_DOWN,
391 ADV7511_POWER_POWER_DOWN);
3b1b9750
HV		 392 regmap_update_bits(adv7511->regmap,
393 ADV7511_REG_INT_ENABLE(1),
394 ADV7511_INT1_DDC_ERROR, 0);
c6169e49 395 regcache_mark_dirty(adv7511->regmap);
651e4769 396}
c6169e49 397
651e4769
JS		 398static void adv7511_power_off(struct adv7511 *adv7511)
399{
400 __adv7511_power_off(adv7511);
c7555121 401 if (adv7511->info->has_dsi)
2437e7cd 402 adv7533_dsi_power_off(adv7511);
c6169e49
LP		 403 adv7511->powered = false;
404}
405
9c8af882
LPC		 406/* -----------------------------------------------------------------------------
407 * Interrupt and hotplug detection
408 */
409
410static bool adv7511_hpd(struct adv7511 *adv7511)
411{
412 unsigned int irq0;
413 int ret;
414
415 ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(0), &irq0);
416 if (ret < 0)
417 return false;
418
29ce4ed4 419 if (irq0 & ADV7511_INT0_HPD) {
9c8af882 420 regmap_write(adv7511->regmap, ADV7511_REG_INT(0),
29ce4ed4 421 ADV7511_INT0_HPD);
9c8af882
LPC		 422 return true;
423 }
424
425 return false;
426}
427
518cb705
JS		 428static void adv7511_hpd_work(struct work_struct *work)
429{
430 struct adv7511 *adv7511 = container_of(work, struct adv7511, hpd_work);
6d5104c5
JS		 431 enum drm_connector_status status;
432 unsigned int val;
433 int ret;
518cb705 434
6d5104c5
JS		 435 ret = regmap_read(adv7511->regmap, ADV7511_REG_STATUS, &val);
436 if (ret < 0)
437 status = connector_status_disconnected;
438 else if (val & ADV7511_STATUS_HPD)
439 status = connector_status_connected;
440 else
441 status = connector_status_disconnected;
442
5f341756
SP		 443 /*
444 * The bridge resets its registers on unplug. So when we get a plug
445 * event and we're already supposed to be powered, cycle the bridge to
446 * restore its state.
447 */
448 if (status == connector_status_connected &&
449 adv7511->connector.status == connector_status_disconnected &&
450 adv7511->powered) {
451 regcache_mark_dirty(adv7511->regmap);
452 adv7511_power_on(adv7511);
453 }
454
6d5104c5
JS		 455 if (adv7511->connector.status != status) {
456 adv7511->connector.status = status;
7c936157
LP		 457
458 if (adv7511->connector.dev) {
459 if (status == connector_status_disconnected)
460 cec_phys_addr_invalidate(adv7511->cec_adap);
461 drm_kms_helper_hotplug_event(adv7511->connector.dev);
462 } else {
463 drm_bridge_hpd_notify(&adv7511->bridge, status);
464 }
6d5104c5 465 }
518cb705
JS		 466}
467
f0bfcc22 468static int adv7511_irq_process(struct adv7511 *adv7511, bool process_hpd)
9c8af882
LPC		 469{
470 unsigned int irq0, irq1;
9c8af882
LPC		 471 int ret;
472
473 ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(0), &irq0);
474 if (ret < 0)
a5241289
LP		 475 return ret;
476
9c8af882
LPC		 477 ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(1), &irq1);
478 if (ret < 0)
a5241289
LP		 479 return ret;
480
f3d96833
AF		 481 /* If there is no IRQ to handle, exit indicating no IRQ data */
482 if (!(irq0 & (ADV7511_INT0_HPD | ADV7511_INT0_EDID_READY)) &&
483 !(irq1 & ADV7511_INT1_DDC_ERROR))
484 return -ENODATA;
485
a5241289
LP		 486 regmap_write(adv7511->regmap, ADV7511_REG_INT(0), irq0);
487 regmap_write(adv7511->regmap, ADV7511_REG_INT(1), irq1);
9c8af882 488
f0bfcc22 489 if (process_hpd && irq0 & ADV7511_INT0_HPD && adv7511->bridge.encoder)
518cb705 490 schedule_work(&adv7511->hpd_work);
a5241289
LP		 491
492 if (irq0 & ADV7511_INT0_EDID_READY || irq1 & ADV7511_INT1_DDC_ERROR) {
493 adv7511->edid_read = true;
494
495 if (adv7511->i2c_main->irq)
496 wake_up_all(&adv7511->wq);
497 }
498
3b1b9750
HV		 499#ifdef CONFIG_DRM_I2C_ADV7511_CEC
500 adv7511_cec_irq_process(adv7511, irq1);
501#endif
502
a5241289
LP		 503 return 0;
504}
505
506static irqreturn_t adv7511_irq_handler(int irq, void *devid)
507{
508 struct adv7511 *adv7511 = devid;
509 int ret;
9c8af882 510
f0bfcc22 511 ret = adv7511_irq_process(adv7511, true);
a5241289 512 return ret < 0 ? IRQ_NONE : IRQ_HANDLED;
9c8af882
LPC		 513}
514
a5241289
LP		 515/* -----------------------------------------------------------------------------
516 * EDID retrieval
517 */
518
519static int adv7511_wait_for_edid(struct adv7511 *adv7511, int timeout)
9c8af882 520{
9c8af882
LPC		 521 int ret;
522
523 if (adv7511->i2c_main->irq) {
524 ret = wait_event_interruptible_timeout(adv7511->wq,
a5241289 525 adv7511->edid_read, msecs_to_jiffies(timeout));
9c8af882 526 } else {
a5241289 527 for (; timeout > 0; timeout -= 25) {
f0bfcc22 528 ret = adv7511_irq_process(adv7511, false);
a5241289
LP		 529 if (ret < 0)
530 break;
531
532 if (adv7511->edid_read)
9c8af882 533 break;
a5241289 534
9c8af882 535 msleep(25);
a5241289 536 }
9c8af882
LPC		 537 }
538
a5241289 539 return adv7511->edid_read ? 0 : -EIO;
9c8af882
LPC		 540}
541
9c8af882
LPC		 542static int adv7511_get_edid_block(void *data, u8 *buf, unsigned int block,
543 size_t len)
544{
545 struct adv7511 *adv7511 = data;
546 struct i2c_msg xfer[2];
547 uint8_t offset;
548 unsigned int i;
549 int ret;
550
551 if (len > 128)
552 return -EINVAL;
553
554 if (adv7511->current_edid_segment != block / 2) {
555 unsigned int status;
556
557 ret = regmap_read(adv7511->regmap, ADV7511_REG_DDC_STATUS,
558 &status);
559 if (ret < 0)
560 return ret;
561
562 if (status != 2) {
a5241289 563 adv7511->edid_read = false;
9c8af882
LPC		 564 regmap_write(adv7511->regmap, ADV7511_REG_EDID_SEGMENT,
565 block);
a5241289
LP		 566 ret = adv7511_wait_for_edid(adv7511, 200);
567 if (ret < 0)
568 return ret;
9c8af882
LPC		 569 }
570
9c8af882
LPC		 571 /* Break this apart, hopefully more I2C controllers will
572 * support 64 byte transfers than 256 byte transfers
573 */
574
575 xfer[0].addr = adv7511->i2c_edid->addr;
576 xfer[0].flags = 0;
577 xfer[0].len = 1;
578 xfer[0].buf = &offset;
579 xfer[1].addr = adv7511->i2c_edid->addr;
580 xfer[1].flags = I2C_M_RD;
581 xfer[1].len = 64;
582 xfer[1].buf = adv7511->edid_buf;
583
584 offset = 0;
585
586 for (i = 0; i < 4; ++i) {
587 ret = i2c_transfer(adv7511->i2c_edid->adapter, xfer,
588 ARRAY_SIZE(xfer));
589 if (ret < 0)
590 return ret;
591 else if (ret != 2)
592 return -EIO;
593
594 xfer[1].buf += 64;
595 offset += 64;
596 }
597
598 adv7511->current_edid_segment = block / 2;
599 }
600
601 if (block % 2 == 0)
602 memcpy(buf, adv7511->edid_buf, len);
603 else
604 memcpy(buf, adv7511->edid_buf + 128, len);
605
606 return 0;
607}
608
609/* -----------------------------------------------------------------------------
e12c2f64 610 * ADV75xx helpers
9c8af882
LPC		 611 */
612
56e7ce5d
JN		 613static const struct drm_edid *adv7511_edid_read(struct adv7511 *adv7511,
614 struct drm_connector *connector)
9c8af882 615{
56e7ce5d 616 const struct drm_edid *drm_edid;
9c8af882
LPC		 617
618 /* Reading the EDID only works if the device is powered */
3587c856
JS		 619 if (!adv7511->powered) {
620 unsigned int edid_i2c_addr =
680532c5 621 (adv7511->i2c_edid->addr << 1);
3587c856 622
4226d9b1 623 __adv7511_power_on(adv7511);
9c8af882 624
3587c856
JS		 625 /* Reset the EDID_I2C_ADDR register as it might be cleared */
626 regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR,
627 edid_i2c_addr);
628 }
629
56e7ce5d 630 drm_edid = drm_edid_read_custom(connector, adv7511_get_edid_block, adv7511);
9c8af882 631
c6169e49 632 if (!adv7511->powered)
4226d9b1 633 __adv7511_power_off(adv7511);
9c8af882 634
56e7ce5d
JN		 635 if (drm_edid) {
636 /*
637 * FIXME: The CEC physical address should be set using
638 * cec_s_phys_addr(adap,
639 * connector->display_info.source_physical_address, false) from
640 * a path that has read the EDID and called
641 * drm_edid_connector_update().
642 */
643 const struct edid *edid = drm_edid_raw(drm_edid);
644
645 adv7511_set_config_csc(adv7511, connector, adv7511->rgb,
646 drm_detect_hdmi_monitor(edid));
fcb4c5ee 647
56e7ce5d
JN		 648 cec_s_phys_addr_from_edid(adv7511->cec_adap, edid);
649 } else {
650 cec_s_phys_addr_from_edid(adv7511->cec_adap, NULL);
651 }
3b1b9750 652
56e7ce5d 653 return drm_edid;
fed9d35d
LP		 654}
655
656static int adv7511_get_modes(struct adv7511 *adv7511,
657 struct drm_connector *connector)
658{
56e7ce5d 659 const struct drm_edid *drm_edid;
fed9d35d
LP		 660 unsigned int count;
661
56e7ce5d 662 drm_edid = adv7511_edid_read(adv7511, connector);
fed9d35d 663
56e7ce5d
JN		 664 drm_edid_connector_update(connector, drm_edid);
665 count = drm_edid_connector_add_modes(connector);
fed9d35d 666
56e7ce5d 667 drm_edid_free(drm_edid);
8b329486 668
9c8af882
LPC		 669 return count;
670}
671
9c8af882 672static enum drm_connector_status
e12c2f64 673adv7511_detect(struct adv7511 *adv7511, struct drm_connector *connector)
9c8af882 674{
9c8af882
LPC		 675 enum drm_connector_status status;
676 unsigned int val;
677 bool hpd;
678 int ret;
679
680 ret = regmap_read(adv7511->regmap, ADV7511_REG_STATUS, &val);
681 if (ret < 0)
682 return connector_status_disconnected;
683
684 if (val & ADV7511_STATUS_HPD)
685 status = connector_status_connected;
686 else
687 status = connector_status_disconnected;
688
689 hpd = adv7511_hpd(adv7511);
690
691 /* The chip resets itself when the cable is disconnected, so in case
692 * there is a pending HPD interrupt and the cable is connected there was
693 * at least one transition from disconnected to connected and the chip
694 * has to be reinitialized. */
c6169e49 695 if (status == connector_status_connected && hpd && adv7511->powered) {
9c8af882 696 regcache_mark_dirty(adv7511->regmap);
c6169e49 697 adv7511_power_on(adv7511);
7c936157
LP		 698 if (connector)
699 adv7511_get_modes(adv7511, connector);
9c8af882
LPC		 700 if (adv7511->status == connector_status_connected)
701 status = connector_status_disconnected;
702 } else {
29ce4ed4 703 /* Renable HPD sensing */
e12c4703 704 if (adv7511->info->hpd_override_enable)
3dbc84a5
JT		 705 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
706 ADV7535_REG_POWER2_HPD_OVERRIDE,
707 ADV7535_REG_POWER2_HPD_OVERRIDE);
708 else
709 regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
710 ADV7511_REG_POWER2_HPD_SRC_MASK,
711 ADV7511_REG_POWER2_HPD_SRC_BOTH);
9c8af882
LPC		 712 }
713
714 adv7511->status = status;
715 return status;
716}
717
0e19b023 718static enum drm_mode_status adv7511_mode_valid(struct adv7511 *adv7511,
9a0cdcd6 719 const struct drm_display_mode *mode)
9c8af882
LPC		 720{
721 if (mode->clock > 165000)
722 return MODE_CLOCK_HIGH;
723
9c8af882
LPC		 724 return MODE_OK;
725}
726
e12c2f64 727static void adv7511_mode_set(struct adv7511 *adv7511,
63f8f3ba
LP		 728 const struct drm_display_mode *mode,
729 const struct drm_display_mode *adj_mode)
9c8af882 730{
9c8af882
LPC		 731 unsigned int low_refresh_rate;
732 unsigned int hsync_polarity = 0;
733 unsigned int vsync_polarity = 0;
734
735 if (adv7511->embedded_sync) {
736 unsigned int hsync_offset, hsync_len;
737 unsigned int vsync_offset, vsync_len;
738
739 hsync_offset = adj_mode->crtc_hsync_start -
740 adj_mode->crtc_hdisplay;
741 vsync_offset = adj_mode->crtc_vsync_start -
742 adj_mode->crtc_vdisplay;
743 hsync_len = adj_mode->crtc_hsync_end -
744 adj_mode->crtc_hsync_start;
745 vsync_len = adj_mode->crtc_vsync_end -
746 adj_mode->crtc_vsync_start;
747
748 /* The hardware vsync generator has a off-by-one bug */
749 vsync_offset += 1;
750
751 regmap_write(adv7511->regmap, ADV7511_REG_HSYNC_PLACEMENT_MSB,
752 ((hsync_offset >> 10) & 0x7) << 5);
753 regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(0),
754 (hsync_offset >> 2) & 0xff);
755 regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(1),
756 ((hsync_offset & 0x3) << 6) |
757 ((hsync_len >> 4) & 0x3f));
758 regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(2),
759 ((hsync_len & 0xf) << 4) |
760 ((vsync_offset >> 6) & 0xf));
761 regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(3),
762 ((vsync_offset & 0x3f) << 2) |
763 ((vsync_len >> 8) & 0x3));
764 regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(4),
765 vsync_len & 0xff);
766
767 hsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PHSYNC);
768 vsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PVSYNC);
769 } else {
770 enum adv7511_sync_polarity mode_hsync_polarity;
771 enum adv7511_sync_polarity mode_vsync_polarity;
772
773 /**
774 * If the input signal is always low or always high we want to
775 * invert or let it passthrough depending on the polarity of the
776 * current mode.
777 **/
778 if (adj_mode->flags & DRM_MODE_FLAG_NHSYNC)
779 mode_hsync_polarity = ADV7511_SYNC_POLARITY_LOW;
780 else
781 mode_hsync_polarity = ADV7511_SYNC_POLARITY_HIGH;
782
783 if (adj_mode->flags & DRM_MODE_FLAG_NVSYNC)
784 mode_vsync_polarity = ADV7511_SYNC_POLARITY_LOW;
785 else
786 mode_vsync_polarity = ADV7511_SYNC_POLARITY_HIGH;
787
788 if (adv7511->hsync_polarity != mode_hsync_polarity &&
789 adv7511->hsync_polarity !=
790 ADV7511_SYNC_POLARITY_PASSTHROUGH)
791 hsync_polarity = 1;
792
793 if (adv7511->vsync_polarity != mode_vsync_polarity &&
794 adv7511->vsync_polarity !=
795 ADV7511_SYNC_POLARITY_PASSTHROUGH)
796 vsync_polarity = 1;
797 }
798
67793bd3 799 if (drm_mode_vrefresh(mode) <= 24)
9c8af882 800 low_refresh_rate = ADV7511_LOW_REFRESH_RATE_24HZ;
67793bd3 801 else if (drm_mode_vrefresh(mode) <= 25)
9c8af882 802 low_refresh_rate = ADV7511_LOW_REFRESH_RATE_25HZ;
67793bd3 803 else if (drm_mode_vrefresh(mode) <= 30)
9c8af882
LPC		 804 low_refresh_rate = ADV7511_LOW_REFRESH_RATE_30HZ;
805 else
806 low_refresh_rate = ADV7511_LOW_REFRESH_RATE_NONE;
807
19e77c7a 808 if (adv7511->info->type == ADV7511)
d281eeaa
BT		 809 regmap_update_bits(adv7511->regmap, 0xfb,
810 0x6, low_refresh_rate << 1);
811 else
812 regmap_update_bits(adv7511->regmap, 0x4a,
813 0xc, low_refresh_rate << 2);
814
9c8af882
LPC		 815 regmap_update_bits(adv7511->regmap, 0x17,
816 0x60, (vsync_polarity << 6) | (hsync_polarity << 5));
817
78fa479d
AT		 818 drm_mode_copy(&adv7511->curr_mode, adj_mode);
819
9c8af882
LPC		 820 /*
821 * TODO Test first order 4:2:2 to 4:4:4 up conversion method, which is
822 * supposed to give better results.
823 */
824
825 adv7511->f_tmds = mode->clock;
826}
827
c6533015
LP		 828/* -----------------------------------------------------------------------------
829 * DRM Connector Operations
830 */
831
e12c2f64
AT		 832static struct adv7511 *connector_to_adv7511(struct drm_connector *connector)
833{
834 return container_of(connector, struct adv7511, connector);
835}
836
837static int adv7511_connector_get_modes(struct drm_connector *connector)
838{
839 struct adv7511 *adv = connector_to_adv7511(connector);
840
841 return adv7511_get_modes(adv, connector);
842}
843
844static enum drm_mode_status
845adv7511_connector_mode_valid(struct drm_connector *connector,
846 struct drm_display_mode *mode)
847{
848 struct adv7511 *adv = connector_to_adv7511(connector);
849
850 return adv7511_mode_valid(adv, mode);
851}
852
853static struct drm_connector_helper_funcs adv7511_connector_helper_funcs = {
854 .get_modes = adv7511_connector_get_modes,
855 .mode_valid = adv7511_connector_mode_valid,
856};
857
858static enum drm_connector_status
859adv7511_connector_detect(struct drm_connector *connector, bool force)
860{
861 struct adv7511 *adv = connector_to_adv7511(connector);
862
863 return adv7511_detect(adv, connector);
864}
865
758a3e53 866static const struct drm_connector_funcs adv7511_connector_funcs = {
e12c2f64
AT		 867 .fill_modes = drm_helper_probe_single_connector_modes,
868 .detect = adv7511_connector_detect,
869 .destroy = drm_connector_cleanup,
870 .reset = drm_atomic_helper_connector_reset,
871 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
872 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
873};
874
c6533015
LP		 875static int adv7511_connector_init(struct adv7511 *adv)
876{
877 struct drm_bridge *bridge = &adv->bridge;
878 int ret;
879
880 if (!bridge->encoder) {
881 DRM_ERROR("Parent encoder object not found");
882 return -ENODEV;
883 }
884
885 if (adv->i2c_main->irq)
886 adv->connector.polled = DRM_CONNECTOR_POLL_HPD;
887 else
888 adv->connector.polled = DRM_CONNECTOR_POLL_CONNECT |
889 DRM_CONNECTOR_POLL_DISCONNECT;
890
891 ret = drm_connector_init(bridge->dev, &adv->connector,
892 &adv7511_connector_funcs,
893 DRM_MODE_CONNECTOR_HDMIA);
894 if (ret < 0) {
895 DRM_ERROR("Failed to initialize connector with drm\n");
896 return ret;
897 }
898 drm_connector_helper_add(&adv->connector,
899 &adv7511_connector_helper_funcs);
900 drm_connector_attach_encoder(&adv->connector, bridge->encoder);
901
902 return 0;
903}
904
905/* -----------------------------------------------------------------------------
906 * DRM Bridge Operations
907 */
908
e12c2f64
AT		 909static struct adv7511 *bridge_to_adv7511(struct drm_bridge *bridge)
910{
911 return container_of(bridge, struct adv7511, bridge);
912}
913
914static void adv7511_bridge_enable(struct drm_bridge *bridge)
915{
916 struct adv7511 *adv = bridge_to_adv7511(bridge);
917
918 adv7511_power_on(adv);
919}
920
921static void adv7511_bridge_disable(struct drm_bridge *bridge)
922{
923 struct adv7511 *adv = bridge_to_adv7511(bridge);
924
925 adv7511_power_off(adv);
926}
927
928static void adv7511_bridge_mode_set(struct drm_bridge *bridge,
63f8f3ba
LP		 929 const struct drm_display_mode *mode,
930 const struct drm_display_mode *adj_mode)
e12c2f64
AT		 931{
932 struct adv7511 *adv = bridge_to_adv7511(bridge);
933
934 adv7511_mode_set(adv, mode, adj_mode);
935}
936
9a0cdcd6
AK		 937static enum drm_mode_status adv7511_bridge_mode_valid(struct drm_bridge *bridge,
938 const struct drm_display_info *info,
939 const struct drm_display_mode *mode)
940{
941 struct adv7511 *adv = bridge_to_adv7511(bridge);
942
c7555121 943 if (adv->info->has_dsi)
9a0cdcd6
AK		 944 return adv7533_mode_valid(adv, mode);
945 else
946 return adv7511_mode_valid(adv, mode);
947}
948
a25b988f
LP		 949static int adv7511_bridge_attach(struct drm_bridge *bridge,
950 enum drm_bridge_attach_flags flags)
e12c2f64
AT		 951{
952 struct adv7511 *adv = bridge_to_adv7511(bridge);
0bae6020 953 int ret = 0;
e12c2f64 954
14b3cdbd 955 if (adv->next_bridge) {
20da948e
LY		 956 ret = drm_bridge_attach(bridge->encoder, adv->next_bridge, bridge,
957 flags | DRM_BRIDGE_ATTACH_NO_CONNECTOR);
14b3cdbd
DB		 958 if (ret)
959 return ret;
960 }
961
0bae6020
LP		 962 if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) {
963 ret = adv7511_connector_init(adv);
964 if (ret < 0)
965 return ret;
e12c2f64 966 }
e12c2f64 967
40d86d2d
AT		 968 if (adv->i2c_main->irq)
969 regmap_write(adv->regmap, ADV7511_REG_INT_ENABLE(0),
970 ADV7511_INT0_HPD);
971
e12c2f64
AT		 972 return ret;
973}
974
7c936157
LP		 975static enum drm_connector_status adv7511_bridge_detect(struct drm_bridge *bridge)
976{
977 struct adv7511 *adv = bridge_to_adv7511(bridge);
978
979 return adv7511_detect(adv, NULL);
980}
981
56e7ce5d
JN		 982static const struct drm_edid *adv7511_bridge_edid_read(struct drm_bridge *bridge,
983 struct drm_connector *connector)
7c936157
LP		 984{
985 struct adv7511 *adv = bridge_to_adv7511(bridge);
986
56e7ce5d 987 return adv7511_edid_read(adv, connector);
7c936157
LP		 988}
989
990static void adv7511_bridge_hpd_notify(struct drm_bridge *bridge,
991 enum drm_connector_status status)
992{
993 struct adv7511 *adv = bridge_to_adv7511(bridge);
994
995 if (status == connector_status_disconnected)
996 cec_phys_addr_invalidate(adv->cec_adap);
997}
998
f4c35e30 999static const struct drm_bridge_funcs adv7511_bridge_funcs = {
e12c2f64
AT		 1000 .enable = adv7511_bridge_enable,
1001 .disable = adv7511_bridge_disable,
1002 .mode_set = adv7511_bridge_mode_set,
9a0cdcd6 1003 .mode_valid = adv7511_bridge_mode_valid,
e12c2f64 1004 .attach = adv7511_bridge_attach,
7c936157 1005 .detect = adv7511_bridge_detect,
56e7ce5d 1006 .edid_read = adv7511_bridge_edid_read,
7c936157 1007 .hpd_notify = adv7511_bridge_hpd_notify,
9c8af882
LPC		 1008};
1009
1010/* -----------------------------------------------------------------------------
1011 * Probe & remove
1012 */
1013
5b06ba23
AT		 1014static const char * const adv7511_supply_names[] = {
1015 "avdd",
1016 "dvdd",
1017 "pvdd",
1018 "bgvdd",
1019 "dvdd-3v",
1020};
1021
1022static const char * const adv7533_supply_names[] = {
1023 "avdd",
1024 "dvdd",
1025 "pvdd",
1026 "a2vdd",
1027 "v3p3",
1028 "v1p2",
1029};
1030
1031static int adv7511_init_regulators(struct adv7511 *adv)
1032{
9ac196fb
BD		 1033 const char * const *supply_names = adv->info->supply_names;
1034 unsigned int num_supplies = adv->info->num_supplies;
5b06ba23 1035 struct device *dev = &adv->i2c_main->dev;
5b06ba23
AT		 1036 unsigned int i;
1037 int ret;
1038
9ac196fb 1039 adv->supplies = devm_kcalloc(dev, num_supplies,
5b06ba23
AT		 1040 sizeof(*adv->supplies), GFP_KERNEL);
1041 if (!adv->supplies)
1042 return -ENOMEM;
1043
9ac196fb 1044 for (i = 0; i < num_supplies; i++)
5b06ba23
AT		 1045 adv->supplies[i].supply = supply_names[i];
1046
9ac196fb 1047 ret = devm_regulator_bulk_get(dev, num_supplies, adv->supplies);
5b06ba23
AT		 1048 if (ret)
1049 return ret;
1050
9ac196fb 1051 return regulator_bulk_enable(num_supplies, adv->supplies);
5b06ba23
AT		 1052}
1053
1054static void adv7511_uninit_regulators(struct adv7511 *adv)
1055{
9ac196fb 1056 regulator_bulk_disable(adv->info->num_supplies, adv->supplies);
5b06ba23
AT		 1057}
1058
3b1b9750
HV		 1059static bool adv7511_cec_register_volatile(struct device *dev, unsigned int reg)
1060{
1061 struct i2c_client *i2c = to_i2c_client(dev);
1062 struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
1063
8d6cf571 1064 reg -= adv7511->info->reg_cec_offset;
3b1b9750
HV		 1065
1066 switch (reg) {
ab0af093
AŠ		 1067 case ADV7511_REG_CEC_RX1_FRAME_HDR:
1068 case ADV7511_REG_CEC_RX1_FRAME_DATA0 ... ADV7511_REG_CEC_RX1_FRAME_DATA0 + 14:
1069 case ADV7511_REG_CEC_RX1_FRAME_LEN:
1070 case ADV7511_REG_CEC_RX2_FRAME_HDR:
1071 case ADV7511_REG_CEC_RX2_FRAME_DATA0 ... ADV7511_REG_CEC_RX2_FRAME_DATA0 + 14:
1072 case ADV7511_REG_CEC_RX2_FRAME_LEN:
1073 case ADV7511_REG_CEC_RX3_FRAME_HDR:
1074 case ADV7511_REG_CEC_RX3_FRAME_DATA0 ... ADV7511_REG_CEC_RX3_FRAME_DATA0 + 14:
1075 case ADV7511_REG_CEC_RX3_FRAME_LEN:
1076 case ADV7511_REG_CEC_RX_STATUS:
3b1b9750
HV		 1077 case ADV7511_REG_CEC_RX_BUFFERS:
1078 case ADV7511_REG_CEC_TX_LOW_DRV_CNT:
1079 return true;
1080 }
1081
1082 return false;
1083}
1084
1085static const struct regmap_config adv7511_cec_regmap_config = {
1086 .reg_bits = 8,
1087 .val_bits = 8,
1088
1089 .max_register = 0xff,
86c3331c 1090 .cache_type = REGCACHE_MAPLE,
3b1b9750
HV		 1091 .volatile_reg = adv7511_cec_register_volatile,
1092};
1093
1094static int adv7511_init_cec_regmap(struct adv7511 *adv)
1095{
1096 int ret;
1097
af80559b 1098 adv->i2c_cec = i2c_new_ancillary_device(adv->i2c_main, "cec",
680532c5 1099 ADV7511_CEC_I2C_ADDR_DEFAULT);
af80559b
WS		 1100 if (IS_ERR(adv->i2c_cec))
1101 return PTR_ERR(adv->i2c_cec);
9cc4853e
AB		 1102
1103 regmap_write(adv->regmap, ADV7511_REG_CEC_I2C_ADDR,
1104 adv->i2c_cec->addr << 1);
1105
3b1b9750
HV		 1106 i2c_set_clientdata(adv->i2c_cec, adv);
1107
1108 adv->regmap_cec = devm_regmap_init_i2c(adv->i2c_cec,
1109 &adv7511_cec_regmap_config);
1110 if (IS_ERR(adv->regmap_cec)) {
1111 ret = PTR_ERR(adv->regmap_cec);
1112 goto err;
1113 }
1114
8d6cf571 1115 if (adv->info->reg_cec_offset == ADV7533_REG_CEC_OFFSET) {
3b1b9750
HV		 1116 ret = adv7533_patch_cec_registers(adv);
1117 if (ret)
1118 goto err;
1119 }
1120
1121 return 0;
1122err:
1123 i2c_unregister_device(adv->i2c_cec);
1124 return ret;
1125}
1126
9c8af882
LPC		 1127static int adv7511_parse_dt(struct device_node *np,
1128 struct adv7511_link_config *config)
1129{
1130 const char *str;
1131 int ret;
1132
9c8af882
LPC		 1133 of_property_read_u32(np, "adi,input-depth", &config->input_color_depth);
1134 if (config->input_color_depth != 8 && config->input_color_depth != 10 &&
1135 config->input_color_depth != 12)
1136 return -EINVAL;
1137
1138 ret = of_property_read_string(np, "adi,input-colorspace", &str);
1139 if (ret < 0)
1140 return ret;
1141
1142 if (!strcmp(str, "rgb"))
1143 config->input_colorspace = HDMI_COLORSPACE_RGB;
1144 else if (!strcmp(str, "yuv422"))
1145 config->input_colorspace = HDMI_COLORSPACE_YUV422;
1146 else if (!strcmp(str, "yuv444"))
1147 config->input_colorspace = HDMI_COLORSPACE_YUV444;
1148 else
1149 return -EINVAL;
1150
1151 ret = of_property_read_string(np, "adi,input-clock", &str);
1152 if (ret < 0)
1153 return ret;
1154
1155 if (!strcmp(str, "1x"))
1156 config->input_clock = ADV7511_INPUT_CLOCK_1X;
1157 else if (!strcmp(str, "2x"))
1158 config->input_clock = ADV7511_INPUT_CLOCK_2X;
1159 else if (!strcmp(str, "ddr"))
1160 config->input_clock = ADV7511_INPUT_CLOCK_DDR;
1161 else
1162 return -EINVAL;
1163
1164 if (config->input_colorspace == HDMI_COLORSPACE_YUV422 ||
1165 config->input_clock != ADV7511_INPUT_CLOCK_1X) {
1166 ret = of_property_read_u32(np, "adi,input-style",
1167 &config->input_style);
1168 if (ret)
1169 return ret;
1170
1171 if (config->input_style < 1 || config->input_style > 3)
1172 return -EINVAL;
1173
1174 ret = of_property_read_string(np, "adi,input-justification",
1175 &str);
1176 if (ret < 0)
1177 return ret;
1178
1179 if (!strcmp(str, "left"))
1180 config->input_justification =
1181 ADV7511_INPUT_JUSTIFICATION_LEFT;
1182 else if (!strcmp(str, "evenly"))
1183 config->input_justification =
1184 ADV7511_INPUT_JUSTIFICATION_EVENLY;
1185 else if (!strcmp(str, "right"))
1186 config->input_justification =
1187 ADV7511_INPUT_JUSTIFICATION_RIGHT;
1188 else
1189 return -EINVAL;
1190
1191 } else {
1192 config->input_style = 1;
1193 config->input_justification = ADV7511_INPUT_JUSTIFICATION_LEFT;
1194 }
1195
1196 of_property_read_u32(np, "adi,clock-delay", &config->clock_delay);
1197 if (config->clock_delay < -1200 || config->clock_delay > 1600)
1198 return -EINVAL;
1199
1200 config->embedded_sync = of_property_read_bool(np, "adi,embedded-sync");
1201
1202 /* Hardcode the sync pulse configurations for now. */
1203 config->sync_pulse = ADV7511_INPUT_SYNC_PULSE_NONE;
1204 config->vsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;
1205 config->hsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;
1206
1207 return 0;
1208}
1209
1c546894 1210static int adv7511_probe(struct i2c_client *i2c)
9c8af882
LPC		 1211{
1212 struct adv7511_link_config link_config;
1213 struct adv7511 *adv7511;
1214 struct device *dev = &i2c->dev;
1215 unsigned int val;
1216 int ret;
1217
1218 if (!dev->of_node)
1219 return -EINVAL;
1220
1221 adv7511 = devm_kzalloc(dev, sizeof(*adv7511), GFP_KERNEL);
1222 if (!adv7511)
1223 return -ENOMEM;
1224
5b06ba23 1225 adv7511->i2c_main = i2c;
c6169e49 1226 adv7511->powered = false;
9c8af882 1227 adv7511->status = connector_status_disconnected;
19e77c7a 1228 adv7511->info = i2c_get_match_data(i2c);
2437e7cd
AT		 1229
1230 memset(&link_config, 0, sizeof(link_config));
1231
14b3cdbd
DB		 1232 ret = drm_of_find_panel_or_bridge(dev->of_node, 1, -1, NULL,
1233 &adv7511->next_bridge);
1234 if (ret && ret != -ENODEV)
1235 return ret;
1236
7618aa3a 1237 if (adv7511->info->link_config)
2437e7cd 1238 ret = adv7511_parse_dt(dev->of_node, &link_config);
1e4d58cd
AT		 1239 else
1240 ret = adv7533_parse_dt(dev->of_node, adv7511);
1241 if (ret)
1242 return ret;
9c8af882 1243
5b06ba23 1244 ret = adv7511_init_regulators(adv7511);
2a865248
AF		 1245 if (ret)
1246 return dev_err_probe(dev, ret, "failed to init regulators\n");
5b06ba23 1247
9c8af882
LPC		 1248 /*
1249 * The power down GPIO is optional. If present, toggle it from active to
1250 * inactive to wake up the encoder.
1251 */
1252 adv7511->gpio_pd = devm_gpiod_get_optional(dev, "pd", GPIOD_OUT_HIGH);
5b06ba23
AT		 1253 if (IS_ERR(adv7511->gpio_pd)) {
1254 ret = PTR_ERR(adv7511->gpio_pd);
1255 goto uninit_regulators;
1256 }
9c8af882
LPC		 1257
1258 if (adv7511->gpio_pd) {
5f273141 1259 usleep_range(5000, 6000);
9c8af882
LPC		 1260 gpiod_set_value_cansleep(adv7511->gpio_pd, 0);
1261 }
1262
1263 adv7511->regmap = devm_regmap_init_i2c(i2c, &adv7511_regmap_config);
5b06ba23
AT		 1264 if (IS_ERR(adv7511->regmap)) {
1265 ret = PTR_ERR(adv7511->regmap);
1266 goto uninit_regulators;
1267 }
9c8af882
LPC		 1268
1269 ret = regmap_read(adv7511->regmap, ADV7511_REG_CHIP_REVISION, &val);
1270 if (ret)
5b06ba23 1271 goto uninit_regulators;
9c8af882
LPC		 1272 dev_dbg(dev, "Rev. %d\n", val);
1273
19e77c7a 1274 if (adv7511->info->type == ADV7511)
2437e7cd
AT		 1275 ret = regmap_register_patch(adv7511->regmap,
1276 adv7511_fixed_registers,
1277 ARRAY_SIZE(adv7511_fixed_registers));
1278 else
1279 ret = adv7533_patch_registers(adv7511);
9c8af882 1280 if (ret)
5b06ba23 1281 goto uninit_regulators;
9c8af882 1282
9c8af882
LPC		 1283 adv7511_packet_disable(adv7511, 0xffff);
1284
af80559b 1285 adv7511->i2c_edid = i2c_new_ancillary_device(i2c, "edid",
680532c5 1286 ADV7511_EDID_I2C_ADDR_DEFAULT);
af80559b
WS		 1287 if (IS_ERR(adv7511->i2c_edid)) {
1288 ret = PTR_ERR(adv7511->i2c_edid);
5b06ba23
AT		 1289 goto uninit_regulators;
1290 }
9c8af882 1291
680532c5
KB		 1292 regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR,
1293 adv7511->i2c_edid->addr << 1);
1294
af80559b 1295 adv7511->i2c_packet = i2c_new_ancillary_device(i2c, "packet",
680532c5 1296 ADV7511_PACKET_I2C_ADDR_DEFAULT);
af80559b
WS		 1297 if (IS_ERR(adv7511->i2c_packet)) {
1298 ret = PTR_ERR(adv7511->i2c_packet);
680532c5
KB		 1299 goto err_i2c_unregister_edid;
1300 }
1301
1302 regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
1303 adv7511->i2c_packet->addr << 1);
1304
3b1b9750
HV		 1305 ret = adv7511_init_cec_regmap(adv7511);
1306 if (ret)
680532c5
KB		 1307 goto err_i2c_unregister_packet;
1308
518cb705
JS		 1309 INIT_WORK(&adv7511->hpd_work, adv7511_hpd_work);
1310
c6169e49 1311 adv7511_power_off(adv7511);
9c8af882
LPC		 1312
1313 i2c_set_clientdata(i2c, adv7511);
1314
7618aa3a 1315 if (adv7511->info->link_config)
2437e7cd 1316 adv7511_set_link_config(adv7511, &link_config);
9c8af882 1317
1b6fba45
HV		 1318 ret = adv7511_cec_init(dev, adv7511);
1319 if (ret)
1320 goto err_unregister_cec;
1321
e12c2f64 1322 adv7511->bridge.funcs = &adv7511_bridge_funcs;
04b19d32
BD		 1323 adv7511->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;
1324 if (adv7511->i2c_main->irq)
1325 adv7511->bridge.ops |= DRM_BRIDGE_OP_HPD;
1326
e12c2f64 1327 adv7511->bridge.of_node = dev->of_node;
f10761c9 1328 adv7511->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
e12c2f64 1329
9a120848 1330 drm_bridge_add(&adv7511->bridge);
e12c2f64 1331
53c515be 1332 adv7511_audio_init(dev, adv7511);
864c49a3 1333
aeedaee5
MBN		 1334 if (i2c->irq) {
1335 init_waitqueue_head(&adv7511->wq);
1336
1337 ret = devm_request_threaded_irq(dev, i2c->irq, NULL,
1338 adv7511_irq_handler,
f3d96833
AF		 1339 IRQF_ONESHOT | IRQF_SHARED,
1340 dev_name(dev),
aeedaee5
MBN		 1341 adv7511);
1342 if (ret)
1343 goto err_unregister_audio;
1344 }
1345
c7555121 1346 if (adv7511->info->has_dsi) {
864c49a3
MR		 1347 ret = adv7533_attach_dsi(adv7511);
1348 if (ret)
1349 goto err_unregister_audio;
1350 }
1351
9c8af882
LPC		 1352 return 0;
1353
864c49a3
MR		 1354err_unregister_audio:
1355 adv7511_audio_exit(adv7511);
1356 drm_bridge_remove(&adv7511->bridge);
2437e7cd 1357err_unregister_cec:
7ed2b0da 1358 cec_unregister_adapter(adv7511->cec_adap);
3b1b9750 1359 i2c_unregister_device(adv7511->i2c_cec);
3fc5a284 1360 clk_disable_unprepare(adv7511->cec_clk);
680532c5
KB		 1361err_i2c_unregister_packet:
1362 i2c_unregister_device(adv7511->i2c_packet);
2437e7cd 1363err_i2c_unregister_edid:
9c8af882 1364 i2c_unregister_device(adv7511->i2c_edid);
5b06ba23
AT		 1365uninit_regulators:
1366 adv7511_uninit_regulators(adv7511);
9c8af882
LPC		 1367
1368 return ret;
1369}
1370
ed5c2f5f 1371static void adv7511_remove(struct i2c_client *i2c)
9c8af882
LPC		 1372{
1373 struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
1374
5b06ba23
AT		 1375 adv7511_uninit_regulators(adv7511);
1376
e12c2f64
AT		 1377 drm_bridge_remove(&adv7511->bridge);
1378
53c515be
JS		 1379 adv7511_audio_exit(adv7511);
1380
3b1b9750 1381 cec_unregister_adapter(adv7511->cec_adap);
40cdb02c
AŠ		 1382 i2c_unregister_device(adv7511->i2c_cec);
1383 clk_disable_unprepare(adv7511->cec_clk);
3b1b9750 1384
680532c5 1385 i2c_unregister_device(adv7511->i2c_packet);
9c8af882 1386 i2c_unregister_device(adv7511->i2c_edid);
9c8af882
LPC		 1387}
1388
19e77c7a
BD		 1389static const struct adv7511_chip_info adv7511_chip_info = {
1390 .type = ADV7511,
9ac196fb
BD		 1391 .supply_names = adv7511_supply_names,
1392 .num_supplies = ARRAY_SIZE(adv7511_supply_names),
7618aa3a 1393 .link_config = true,
19e77c7a
BD		 1394};
1395
1396static const struct adv7511_chip_info adv7533_chip_info = {
1397 .type = ADV7533,
11ae4e40 1398 .max_mode_clock_khz = 80000,
399562fc 1399 .max_lane_freq_khz = 800000,
9ac196fb
BD		 1400 .supply_names = adv7533_supply_names,
1401 .num_supplies = ARRAY_SIZE(adv7533_supply_names),
8d6cf571 1402 .reg_cec_offset = ADV7533_REG_CEC_OFFSET,
c7555121 1403 .has_dsi = true,
19e77c7a
BD		 1404};
1405
1406static const struct adv7511_chip_info adv7535_chip_info = {
1407 .type = ADV7535,
11ae4e40 1408 .max_mode_clock_khz = 148500,
399562fc 1409 .max_lane_freq_khz = 891000,
9ac196fb
BD		 1410 .supply_names = adv7533_supply_names,
1411 .num_supplies = ARRAY_SIZE(adv7533_supply_names),
8d6cf571 1412 .reg_cec_offset = ADV7533_REG_CEC_OFFSET,
c7555121 1413 .has_dsi = true,
e12c4703 1414 .hpd_override_enable = true,
19e77c7a
BD		 1415};
1416
9c8af882 1417static const struct i2c_device_id adv7511_i2c_ids[] = {
19e77c7a
BD		 1418 { "adv7511", (kernel_ulong_t)&adv7511_chip_info },
1419 { "adv7511w", (kernel_ulong_t)&adv7511_chip_info },
1420 { "adv7513", (kernel_ulong_t)&adv7511_chip_info },
1421 { "adv7533", (kernel_ulong_t)&adv7533_chip_info },
1422 { "adv7535", (kernel_ulong_t)&adv7535_chip_info },
9c8af882
LPC		 1423 { }
1424};
1425MODULE_DEVICE_TABLE(i2c, adv7511_i2c_ids);
1426
1427static const struct of_device_id adv7511_of_ids[] = {
19e77c7a
BD		 1428 { .compatible = "adi,adv7511", .data = &adv7511_chip_info },
1429 { .compatible = "adi,adv7511w", .data = &adv7511_chip_info },
1430 { .compatible = "adi,adv7513", .data = &adv7511_chip_info },
1431 { .compatible = "adi,adv7533", .data = &adv7533_chip_info },
1432 { .compatible = "adi,adv7535", .data = &adv7535_chip_info },
9c8af882
LPC		 1433 { }
1434};
1435MODULE_DEVICE_TABLE(of, adv7511_of_ids);
1436
1e4d58cd
AT		 1437static struct mipi_dsi_driver adv7533_dsi_driver = {
1438 .driver.name = "adv7533",
1439};
1440
e12c2f64
AT		 1441static struct i2c_driver adv7511_driver = {
1442 .driver = {
1443 .name = "adv7511",
1444 .of_match_table = adv7511_of_ids,
9c8af882 1445 },
e12c2f64 1446 .id_table = adv7511_i2c_ids,
332af828 1447 .probe = adv7511_probe,
e12c2f64 1448 .remove = adv7511_remove,
9c8af882
LPC		 1449};
1450
1e4d58cd
AT		 1451static int __init adv7511_init(void)
1452{
83146366
JJ		 1453 int ret;
1454
1455 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI)) {
1456 ret = mipi_dsi_driver_register(&adv7533_dsi_driver);
1457 if (ret)
1458 return ret;
1459 }
1e4d58cd 1460
83146366
JJ		 1461 ret = i2c_add_driver(&adv7511_driver);
1462 if (ret) {
1463 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
1464 mipi_dsi_driver_unregister(&adv7533_dsi_driver);
1465 }
1466
1467 return ret;
1e4d58cd
AT		 1468}
1469module_init(adv7511_init);
1470
1471static void __exit adv7511_exit(void)
1472{
1473 i2c_del_driver(&adv7511_driver);
1474
1475 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
1476 mipi_dsi_driver_unregister(&adv7533_dsi_driver);
1477}
1478module_exit(adv7511_exit);
9c8af882
LPC		 1479
1480MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
1481MODULE_DESCRIPTION("ADV7511 HDMI transmitter driver");
1482MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)