[linux-2.6-block.git] / drivers / gpu / drm / arm / malidp_drv.h

/*
 * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
 * Author: Liviu Dudau <Liviu.Dudau@arm.com>
 *
 * This program is free software and is provided to you under the terms of the
 * GNU General Public License version 2 as published by the Free Software
 * Foundation, and any use by you of this program is subject to the terms
 * of such GNU licence.
 *
 * ARM Mali DP500/DP550/DP650 KMS/DRM driver structures
 */

#ifndef __MALIDP_DRV_H__
#define __MALIDP_DRV_H__

#include <drm/drm_writeback.h>
#include <drm/drm_encoder.h>
#include <linux/mutex.h>
#include <linux/wait.h>
#include <linux/spinlock.h>
#include <drm/drmP.h>
#include "malidp_hw.h"

#define MALIDP_CONFIG_VALID_INIT	0
#define MALIDP_CONFIG_VALID_DONE	1
#define MALIDP_CONFIG_START		0xd0

struct malidp_error_stats {
	s32 num_errors;
	u32 last_error_status;
	s64 last_error_vblank;
};

struct malidp_drm {
	struct malidp_hw_device *dev;
	struct drm_crtc crtc;
	struct drm_writeback_connector mw_connector;
	wait_queue_head_t wq;
	struct drm_pending_vblank_event *event;
	atomic_t config_valid;
	u32 core_id;
#ifdef CONFIG_DEBUG_FS
	struct malidp_error_stats de_errors;
	struct malidp_error_stats se_errors;
	/* Protects errors stats */
	spinlock_t errors_lock;
#endif
};

#define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc)

struct malidp_plane {
	struct drm_plane base;
	struct malidp_hw_device *hwdev;
	const struct malidp_layer *layer;
};

enum mmu_prefetch_mode {
	MALIDP_PREFETCH_MODE_NONE,
	MALIDP_PREFETCH_MODE_PARTIAL,
	MALIDP_PREFETCH_MODE_FULL,
};

struct malidp_plane_state {
	struct drm_plane_state base;

	/* size of the required rotation memory if plane is rotated */
	u32 rotmem_size;
	/* internal format ID */
	u8 format;
	u8 n_planes;
	enum mmu_prefetch_mode mmu_prefetch_mode;
	u32 mmu_prefetch_pgsize;
};

#define to_malidp_plane(x) container_of(x, struct malidp_plane, base)
#define to_malidp_plane_state(x) container_of(x, struct malidp_plane_state, base)

struct malidp_crtc_state {
	struct drm_crtc_state base;
	u32 gamma_coeffs[MALIDP_COEFFTAB_NUM_COEFFS];
	u32 coloradj_coeffs[MALIDP_COLORADJ_NUM_COEFFS];
	struct malidp_se_config scaler_config;
	/* Bitfield of all the planes that have requested a scaled output. */
	u8 scaled_planes_mask;
};

#define to_malidp_crtc_state(x) container_of(x, struct malidp_crtc_state, base)

int malidp_de_planes_init(struct drm_device *drm);
int malidp_crtc_init(struct drm_device *drm);

#ifdef CONFIG_DEBUG_FS
void malidp_error(struct malidp_drm *malidp,
		  struct malidp_error_stats *error_stats, u32 status,
		  u64 vblank);
#endif

/* often used combination of rotational bits */
#define MALIDP_ROTATED_MASK	(DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270)

#endif  /* __MALIDP_DRV_H__ */
Commit	Line	Data
ad49f860 LD	1	/*
	2	* (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
	3	* Author: Liviu Dudau <Liviu.Dudau@arm.com>
	4	*
	5	* This program is free software and is provided to you under the terms of the
	6	* GNU General Public License version 2 as published by the Free Software
	7	* Foundation, and any use by you of this program is subject to the terms
	8	* of such GNU licence.
	9	*
	10	* ARM Mali DP500/DP550/DP650 KMS/DRM driver structures
	11	*/
	12
	13	#ifndef __MALIDP_DRV_H__
	14	#define __MALIDP_DRV_H__
	15
8cbc5caf BS	16	#include <drm/drm_writeback.h>
8cbc5caf BS	17	#include <drm/drm_encoder.h>
ad49f860 LD	18	#include <linux/mutex.h>
ad49f860 LD	19	#include <linux/wait.h>
613c5c7f	20	#include <linux/spinlock.h>
cf4c8870	21	#include <drm/drmP.h>
ad49f860 LD	22	#include "malidp_hw.h"
ad49f860 LD	23
1cb3cbe7 LD	24	#define MALIDP_CONFIG_VALID_INIT 0
	25	#define MALIDP_CONFIG_VALID_DONE 1
	26	#define MALIDP_CONFIG_START 0xd0
	27
613c5c7f AG	28	struct malidp_error_stats {
	29	s32 num_errors;
	30	u32 last_error_status;
	31	s64 last_error_vblank;
	32	};
	33
ad49f860 LD	34	struct malidp_drm {
ad49f860 LD	35	struct malidp_hw_device *dev;
ad49f860	36	struct drm_crtc crtc;
8cbc5caf	37	struct drm_writeback_connector mw_connector;
ad49f860	38	wait_queue_head_t wq;
d862b2d6	39	struct drm_pending_vblank_event *event;
ad49f860	40	atomic_t config_valid;
50c7512f	41	u32 core_id;
613c5c7f AG	42	#ifdef CONFIG_DEBUG_FS
	43	struct malidp_error_stats de_errors;
	44	struct malidp_error_stats se_errors;
	45	/* Protects errors stats */
	46	spinlock_t errors_lock;
	47	#endif
ad49f860 LD	48	};
	49
	50	#define crtc_to_malidp_device(x) container_of(x, struct malidp_drm, crtc)
	51
	52	struct malidp_plane {
	53	struct drm_plane base;
	54	struct malidp_hw_device *hwdev;
	55	const struct malidp_layer *layer;
	56	};
	57
1f23a56a JF	58	enum mmu_prefetch_mode {
	59	MALIDP_PREFETCH_MODE_NONE,
	60	MALIDP_PREFETCH_MODE_PARTIAL,
	61	MALIDP_PREFETCH_MODE_FULL,
	62	};
	63
ad49f860 LD	64	struct malidp_plane_state {
	65	struct drm_plane_state base;
	66
	67	/* size of the required rotation memory if plane is rotated */
	68	u32 rotmem_size;
70c94a3c BS	69	/* internal format ID */
	70	u8 format;
	71	u8 n_planes;
1f23a56a JF	72	enum mmu_prefetch_mode mmu_prefetch_mode;
1f23a56a JF	73	u32 mmu_prefetch_pgsize;
ad49f860 LD	74	};
	75
	76	#define to_malidp_plane(x) container_of(x, struct malidp_plane, base)
	77	#define to_malidp_plane_state(x) container_of(x, struct malidp_plane_state, base)
	78
99665d07 MA	79	struct malidp_crtc_state {
99665d07 MA	80	struct drm_crtc_state base;
02725d31	81	u32 gamma_coeffs[MALIDP_COEFFTAB_NUM_COEFFS];
6954f245	82	u32 coloradj_coeffs[MALIDP_COLORADJ_NUM_COEFFS];
28ce675b MA	83	struct malidp_se_config scaler_config;
	84	/* Bitfield of all the planes that have requested a scaled output. */
	85	u8 scaled_planes_mask;
99665d07 MA	86	};
	87
	88	#define to_malidp_crtc_state(x) container_of(x, struct malidp_crtc_state, base)
	89
ad49f860	90	int malidp_de_planes_init(struct drm_device *drm);
ad49f860 LD	91	int malidp_crtc_init(struct drm_device *drm);
ad49f860 LD	92
613c5c7f AG	93	#ifdef CONFIG_DEBUG_FS
	94	void malidp_error(struct malidp_drm *malidp,
	95	struct malidp_error_stats *error_stats, u32 status,
	96	u64 vblank);
	97	#endif
	98
ad49f860	99	/* often used combination of rotational bits */
c2c446ad	100	#define MALIDP_ROTATED_MASK (DRM_MODE_ROTATE_90 \| DRM_MODE_ROTATE_270)
ad49f860 LD	101
ad49f860 LD	102	#endif /* __MALIDP_DRV_H__ */